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usb: dwc3: OCTEON: add support for device tree

PATCH In review Steven J. Hill 2 participants 2 messages Sep 10, 2016 – Sep 12, 2016

Subsystems (3)
USB MIPS DesignWare USB3 DRD IP driver
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Steven J. Hill

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PATCH v3 1/1 usb: dwc3: OCTEON: add support for device tree

This patch adds support to parse probe data for
the dwc3-octeon driver using device tree. The
DWC3 IP core is found on OCTEON III processors.

Signed-off-by Steven J. Hill <[email protected]>

Changes in v3:
- Massive simplification of glue logic. Almost all the work is done in the SoC platform code.
Changes in v2:
- Changed comment block to acurately describe why the DMA properties are being set.
- Deleted 'dwc3_octeon_remove()' function as it serves no purpose. Also changed driver from tristate to a boolen as we have no plans to make it modular.
- Changed driver dependency from CAVIUM_OCTEON_SOC to CPU_CAVIUM_OCTEON || COMPILE_TEST per Balbi's request.

---
 drivers/usb/dwc3/Kconfig       | 10 +++++++
 drivers/usb/dwc3/Makefile      |  1 +
 drivers/usb/dwc3/dwc3-octeon.c | 61 ++++++++++++++++++++++++++++++++++++++++++
 3 files changed, 72 insertions(+)
 create mode 100644 drivers/usb/dwc3/dwc3-octeon.c
drivers/usb/dwc3/Kconfig +10 -0
index a64ce1c..f2cb24b 100644
@@ -105,4 +105,14 @@ config USB_DWC3_ST
 	  inside (i.e. STiH407).
 	  Say 'Y' or 'M' if you have one such device.
 
+config USB_DWC3_OCTEON
+	bool "Cavium OCTEON III Platforms"
+	depends on CPU_CAVIUM_OCTEON || COMPILE_TEST
+	depends on OF
+	default USB_DWC3
+	help
+	  Cavium OCTEON III SoCs with one DesignWare Core USB3 IP
+	  inside (i.e. cn71xx and cn78xx).
+	  Say 'Y' or 'M' if you have one such device.
+
 endif
drivers/usb/dwc3/Makefile +1 -0
index 22420e1..f1a7a3e 100644
@@ -39,3 +39,4 @@ obj-$(CONFIG_USB_DWC3_PCI)		+= dwc3-pci.o
 obj-$(CONFIG_USB_DWC3_KEYSTONE)		+= dwc3-keystone.o
 obj-$(CONFIG_USB_DWC3_OF_SIMPLE)	+= dwc3-of-simple.o
 obj-$(CONFIG_USB_DWC3_ST)		+= dwc3-st.o
+obj-$(CONFIG_USB_DWC3_OCTEON)		+= dwc3-octeon.o
drivers/usb/dwc3/dwc3-octeon.c new file +61 -0

61 lines not on this page · raw message

Signature · 1 line
1.9.1
#1 lore raw
Quoted 6 lines · Steven J. Hill

This patch adds support to parse probe data for
the dwc3-octeon driver using device tree. The
DWC3 IP core is found on OCTEON III processors.

Signed-off-by Steven J. Hill <[email protected]>
Quoted 11 lines

Changes in v3:
- Massive simplification of glue logic. Almost all the work is done in the SoC platform code.
Changes in v2:
- Changed comment block to acurately describe why the DMA properties are being set.
- Deleted 'dwc3_octeon_remove()' function as it serves no purpose. Also changed driver from tristate to a boolen as we have no plans to make it modular.
- Changed driver dependency from CAVIUM_OCTEON_SOC to CPU_CAVIUM_OCTEON || COMPILE_TEST per Balbi's request.

Thanks for updating this changelog, but next time it should come after the tearline (---) below. We don't want this to reach git's history :-)

Quoted 68 lines
---
 drivers/usb/dwc3/Kconfig       | 10 +++++++
 drivers/usb/dwc3/Makefile      |  1 +
 drivers/usb/dwc3/dwc3-octeon.c | 61 ++++++++++++++++++++++++++++++++++++++++++
 3 files changed, 72 insertions(+)
 create mode 100644 drivers/usb/dwc3/dwc3-octeon.c
drivers/usb/dwc3/Kconfig +10 -0
index a64ce1c..f2cb24b 100644
@@ -105,4 +105,14 @@ config USB_DWC3_ST
 	  inside (i.e. STiH407).
 	  Say 'Y' or 'M' if you have one such device.
 
+config USB_DWC3_OCTEON
+	bool "Cavium OCTEON III Platforms"
+	depends on CPU_CAVIUM_OCTEON || COMPILE_TEST
+	depends on OF
+	default USB_DWC3
+	help
+	  Cavium OCTEON III SoCs with one DesignWare Core USB3 IP
+	  inside (i.e. cn71xx and cn78xx).
+	  Say 'Y' or 'M' if you have one such device.
+
 endif
drivers/usb/dwc3/Makefile +1 -0
index 22420e1..f1a7a3e 100644
@@ -39,3 +39,4 @@ obj-$(CONFIG_USB_DWC3_PCI)		+= dwc3-pci.o
 obj-$(CONFIG_USB_DWC3_KEYSTONE)		+= dwc3-keystone.o
 obj-$(CONFIG_USB_DWC3_OF_SIMPLE)	+= dwc3-of-simple.o
 obj-$(CONFIG_USB_DWC3_ST)		+= dwc3-st.o
+obj-$(CONFIG_USB_DWC3_OCTEON)		+= dwc3-octeon.o
drivers/usb/dwc3/dwc3-octeon.c new file +27 -0
new file mode 100644
index 0000000..ae84a01
@@ -0,0 +1,61 @@
+/**
+ * dwc3-octeon.c - Cavium OCTEON III DWC3 Specific Glue Layer
+ *
+ * Copyright (C) 2016 Cavium Networks
+ *
+ * Author: Steven J. Hill <[email protected]>
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2  of
+ * the License as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * Inspired by dwc3-exynos.c and dwc3-st.c files.
+ */
+
+#include <linux/module.h>
+#include <linux/device.h>
+#include <linux/platform_device.h>
+#include <linux/of.h>
+#include <linux/dma-mapping.h>
+
+static int dwc3_octeon_probe(struct platform_device *pdev)
+{

drivers/usb/dwc3/dwc3-octeon.c line 37

Quoted 10 lines
drivers/usb/dwc3/dwc3-octeon.c new file +10 -0
+	struct device		*dev = &pdev->dev;
+	int			ret;
+
+	/*
+	 * Right now device-tree probed devices do not provide
+	 * "dma-ranges" or "dma-coherent" properties.
+	 */
+	ret = dma_coerce_mask_and_coherent(dev, DMA_BIT_MASK(64));
+	if (ret)
+		return ret;

don't you need to call of_platform_populate() at least?

Signature · 1 line
balbi