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arm64: dts: marvell: armada-37xx: reserve memory for ATF

PATCH New Miquel Raynal 3 participants 3 messages Jun 26, 2018 – Jun 29, 2018

Subsystems (2)
Device tree bindings Arm/Marvell Kirkwood and Armada 370, 375, 38x, 39x, XP, 3700, 7K/8K, CN9130 SoC support
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Miquel Raynal

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PATCH v2 1/1 arm64: dts: marvell: armada-37xx: reserve memory for ATF

From: Victor Gu <[email protected]>

The PSCI area should be reserved in Linux for PSCI operations such as suspend/resume.

Reserve 2MiB of memory which matches the area used by ATF (BL1, BL2, BL3x, see [1] in ATF source code). This covers all PSCI code and data area and is 2MiB aligned, which is required by Linux for huge pages handling.

Please note that this is a default setup allowing to perform PSCI operations with legacy bootloaders. Recent bootloaders should update the region size/position accordingly.

[1] plat/marvell/a3700/common/include/platform_def.h

Signed-off-by Victor Gu <[email protected]>
[miquel.raynal at bootlin.com: reword of commit message, comment in the DTSI]
Signed-off-by Miquel Raynal <[email protected]>

---

Changes since v1:
=================
* Updated commit log to explain that this memory region should be updated by recent bootloaders.
* Added a comment to tell the same thing above the psci-area subnode.

 arch/arm64/boot/dts/marvell/armada-37xx.dtsi | 15 +++++++++++++++
 1 file changed, 15 insertions(+)
arch/arm64/boot/dts/marvell/armada-37xx.dtsi +15 -0
index 3353252d78a0..d18a4a098d79 100644
@@ -22,6 +22,21 @@
 		serial1 = &uart1;
 	};
 
+	reserved-memory {
+		#address-cells = <2>;
+		#size-cells = <2>;
+		ranges;
+
+		/*
+		 * The PSCI firmware region depicted below is the default one
+		 * and should be updated by the bootloader.
+		 */
+		psci-area at 4000000 {
+			reg = <0 0x4000000 0 0x200000>;
+			no-map;
+		};
+	};
+
 	cpus {
 		#address-cells = <1>;
 		#size-cells = <0>;
Signature · 1 line
2.14.1
#1 lore raw

PATCH v2 1/1 arm64: dts: marvell: armada-37xx: reserve memory for ATF

Hello,

Quoted 14 lines · Miquel Raynal

From: Victor Gu <[email protected]>

The PSCI area should be reserved in Linux for PSCI operations such as suspend/resume.

Reserve 2MiB of memory which matches the area used by ATF (BL1, BL2, BL3x, see [1] in ATF source code). This covers all PSCI code and data area and is 2MiB aligned, which is required by Linux for huge pages handling.

Please note that this is a default setup allowing to perform PSCI operations with legacy bootloaders. Recent bootloaders should update the region size/position accordingly.

Quoted 5 lines

[1] plat/marvell/a3700/common/include/platform_def.h

Signed-off-by Victor Gu <[email protected]>
[miquel.raynal at bootlin.com: reword of commit message, comment in the DTSI]
Signed-off-by Miquel Raynal <[email protected]>
Acked-by Thomas Petazzoni <[email protected]>

Best regards,

Thomas

Signature · 3 lines
Thomas Petazzoni, CTO, Bootlin (formerly Free Electrons)
Embedded Linux and Kernel engineering
https://bootlin.com
maintainer
#2 lore raw

PATCH v2 1/1 arm64: dts: marvell: armada-37xx: reserve memory for ATF

Hi Miquel, Thomas,

Quoted 17 lines · Thomas Petazzoni

Hello,

Quoted 14 lines · Miquel Raynal

From: Victor Gu <[email protected]>

The PSCI area should be reserved in Linux for PSCI operations such as suspend/resume.

Reserve 2MiB of memory which matches the area used by ATF (BL1, BL2, BL3x, see [1] in ATF source code). This covers all PSCI code and data area and is 2MiB aligned, which is required by Linux for huge pages handling.

Please note that this is a default setup allowing to perform PSCI operations with legacy bootloaders. Recent bootloaders should update the region size/position accordingly.

Quoted 7 lines
Quoted 5 lines

[1] plat/marvell/a3700/common/include/platform_def.h

Signed-off-by Victor Gu <[email protected]>
[miquel.raynal at bootlin.com: reword of commit message, comment in the DTSI]
Signed-off-by Miquel Raynal <[email protected]>
Acked-by Thomas Petazzoni <[email protected]>

Applied on mvebu/dt64

Thanks,

Gregory

Quoted 8 lines

Best regards,

Thomas

Signature · 3 lines
Thomas Petazzoni, CTO, Bootlin (formerly Free Electrons)
Embedded Linux and Kernel engineering
https://bootlin.com
Signature · 3 lines
Gregory Clement, Bootlin (formerly Free Electrons)
Embedded Linux and Kernel engineering
http://bootlin.com