drm: sun8i: Add DE2 HDMI video support

Allwinner's recent SoCs, as A64, A83T and H3, contain a new display engine, DE2.
This patch adds a DRM video driver for this device.

Signed-off-by Jean-Francois Moine <[email protected]>

---
 .../bindings/display/sunxi/sun8i-de2.txt           |  83 +++

 drivers/gpu/drm/Kconfig                            |   2 +
 drivers/gpu/drm/Makefile                           |   1 +
 drivers/gpu/drm/sun8i/Kconfig                      |  19 +
 drivers/gpu/drm/sun8i/Makefile                     |   7 +
 drivers/gpu/drm/sun8i/de2_crtc.c                   | 440 +++++++++++++
 drivers/gpu/drm/sun8i/de2_crtc.h                   |  50 ++
 drivers/gpu/drm/sun8i/de2_drm.h                    |  48 ++
 drivers/gpu/drm/sun8i/de2_drv.c                    | 379 +++++++++++
 drivers/gpu/drm/sun8i/de2_plane.c                  | 712 +++++++++++++++++++++
 10 files changed, 1741 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/display/sunxi/sun8i-de2.txt
 create mode 100644 drivers/gpu/drm/sun8i/Kconfig
 create mode 100644 drivers/gpu/drm/sun8i/Makefile
 create mode 100644 drivers/gpu/drm/sun8i/de2_crtc.c
 create mode 100644 drivers/gpu/drm/sun8i/de2_crtc.h
 create mode 100644 drivers/gpu/drm/sun8i/de2_drm.h
 create mode 100644 drivers/gpu/drm/sun8i/de2_drv.c
 create mode 100644 drivers/gpu/drm/sun8i/de2_plane.c

Documentation/devicetree/bindings/display/sunxi/sun8i-de2.txt new file +15 -0

new file mode 100644
index 0000000..b9edd4b
@@ -0,0 +1,83 @@
+Allwinner sun8i Display Engine 2 subsystem
+==========================================
+
+The Allwinner DE2 subsystem contains a display controller (DE2),
+one or two LCD controllers (TCON) and their external interfaces.
+
+Display controller
+==================
+
+Required properties:
+
+- compatible: value should be one of the following
+		"allwinner,sun8i-a83t-display-engine"
+		"allwinner,sun8i-h3-display-engine"
+

Documentation/devicetree/bindings/display/sunxi/sun8i-de2.txt new file +10 -0

+
+LCD controller
+==============
+
+Required properties:
+
+- compatible: should be
+		"allwinner,sun8i-a83t-tcon"
+
+- clocks: must include clock specifiers corresponding to entries in the

Documentation/devicetree/bindings/display/sunxi/sun8i-de2.txt new file +23 -0

+		clocks = <&ccu CLK_BUS_TCON0>, <&ccu CLK_TCON0>;
+		clock-names = "gate", "clock";
+		resets = <&ccu RST_BUS_TCON0>;
+		#address-cells = <1>;
+		#size-cells = <0>;
+		lcd0_p: port {
+			lcd0_ep: endpoint {
+				remote-endpoint = <&hdmi_ep>;
+			};
+		};
+	};
+
+	hdmi: hdmi at 01ee0000 {
+		...
+		#address-cells = <1>;
+		#size-cells = <0>;
+		port {
+			hdmi_ep: endpoint {
+				remote-endpoint = <&lcd0_ep>;
+			};
+		};
+	};
+

This patch adds a HDMI video driver to the Allwinner's SoCs A83T and H3.

Signed-off-by Jean-Francois Moine <[email protected]>

---
 .../devicetree/bindings/display/sunxi/hdmi.txt     |  53 ++
 drivers/gpu/drm/sun8i/Kconfig                      |   7 +
 drivers/gpu/drm/sun8i/Makefile                     |   2 +
 drivers/gpu/drm/sun8i/de2_hdmi.c                   | 394 ++++++++++
 drivers/gpu/drm/sun8i/de2_hdmi.h                   |  51 ++
 drivers/gpu/drm/sun8i/de2_hdmi_io.c                | 839 +++++++++++++++++++++
 6 files changed, 1346 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/display/sunxi/hdmi.txt
 create mode 100644 drivers/gpu/drm/sun8i/de2_hdmi.c
 create mode 100644 drivers/gpu/drm/sun8i/de2_hdmi.h
 create mode 100644 drivers/gpu/drm/sun8i/de2_hdmi_io.c

Documentation/devicetree/bindings/display/sunxi/hdmi.txt new file +16 -0

new file mode 100644
index 0000000..85709ab
@@ -0,0 +1,53 @@
+Allwinner HDMI Transmitter
+==========================
+
+The Allwinner HDMI transmitters are included in the SoCs.
+They support audio and video.
+
+Required properties:
+ - #address-cells : should be <1>
+ - #size-cells : should be <0>
+ - compatible : should be one of
+		"allwinner,sun8i-a83t-hdmi"
+		"allwinner,sun8i-h3-hdmi"
+ - clocks : phandles to the HDMI clocks as described in
+	Documentation/devicetree/bindings/clock/clock-bindings.txt
+ - clock-names : must be
+		"gate" : bus gate

Documentation/devicetree/bindings/display/sunxi/hdmi.txt new file +15 -0

+		#address-cells = <1>;
+		#size-cells = <0>;
+		port@0 {			/* video */
+			reg = <0>;
+			hdmi_lcd1: endpoint {
+				remote-endpoint = <&lcd1_hdmi>;
+			};
+		};
+		port@1 {			/* audio */
+			reg = <1>;
+			hdmi_i2s2: endpoint {
+				remote-endpoint = <&i2s2_hdmi>;
+			};
+		};
+	};

Signed-off-by Jean-Francois Moine <[email protected]>

---
 arch/arm/boot/dts/sun8i-h3.dtsi | 51 +++++++++++++++++++++++++++++++++++++++++

 1 file changed, 51 insertions(+)

arch/arm/boot/dts/sun8i-h3.dtsi +27 -0

index 416b825..7c6b1d5 100644
@@ -140,6 +140,16 @@
                  #size-cells = <1>;
                  ranges;
 
+ de: de-controller@01000000 {
+ compatible = "allwinner,sun8i-h3-display-engine";
+ reg = <0x01000000 0x400000>;
+ clocks = <&ccu CLK_BUS_DE>, <&ccu CLK_DE>;
+ clock-names = "bus", "clock";
+ resets = <&ccu RST_BUS_DE>;
+ ports = <&lcd0_p>;
+ status = "disabled";
+ };
+
                  dma: dma-controller@01c02000 {
                          compatible = "allwinner,sun8i-h3-dma";
                          reg = <0x01c02000 0x1000>;

@@ -149,6 +159,23 @@
                          #dma-cells = <1>;
                  };
 
+ lcd0: lcd-controller@01c0c000 {
+ compatible = "allwinner,sun8i-a83t-tcon";
+ reg = <0x01c0c000 0x400>;
+ clocks = <&ccu CLK_BUS_TCON0>, <&ccu CLK_TCON0>;
+ clock-names = "bus", "clock";
+ resets = <&ccu RST_BUS_TCON0>;
+ interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;
+ status = "disabled";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ lcd0_p: port {
+ lcd0_hdmi: endpoint {
+ remote-endpoint = <&hdmi_lcd0>;
+ };
+ };
+ };
+
                  mmc0: mmc@01c0f000 {
                          compatible = "allwinner,sun7i-a20-mmc";
                          reg = <0x01c0f000 0x1000>;

arch/arm/boot/dts/sun8i-h3.dtsi +22 -1

+ <&ccu CLK_DE>;
+ assigned-clock-rates = <864000000>,
+ <432000000>;
                  };
 
                  pio: pinctrl@01c20800 {

@@ -564,6 +596,25 @@
                          interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
                  };
 
+ hdmi: hdmi@01ee0000 {
+ compatible = "allwinner,sun8i-h3-hdmi";
+ reg = <0x01ee0000 0x20000>;
+ clocks = <&ccu CLK_BUS_HDMI>, <&ccu CLK_HDMI>,
+ <&ccu CLK_HDMI_DDC>;
+ clock-names = "bus", "clock", "ddc-clock";
+ resets = <&ccu RST_BUS_HDMI0>, <&ccu RST_BUS_HDMI1>;
+ reset-names = "hdmi0", "hdmi1";
+ status = "disabled";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ port@0 { /* video */
+ reg = <0>;
+ hdmi_lcd0: endpoint {
+ remote-endpoint = <&lcd0_hdmi>;
+ };
+ };
+ };
+
                  rtc: rtc@01f00000 {
                          compatible = "allwinner,sun6i-a31-rtc";
                          reg = <0x01f00000 0x54>;
--

2.10.2

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Quoted 1 line

+ assigned-clocks = <&ccu CLK_PLL_DE>,

Cannot get the patch built on 4.9-rc, as CLK_PLL_DE is not an exported clock.

Signed-off-by Jean-Francois Moine <[email protected]>

---
 arch/arm/boot/dts/sun8i-h3.dtsi | 51 +++++++++++++++++++++++++++++++++++++++++

 1 file changed, 51 insertions(+)

arch/arm/boot/dts/sun8i-h3.dtsi +44 -0

index 416b825..7c6b1d5 100644
@@ -140,6 +140,16 @@
                  #size-cells = <1>;
                  ranges;
 
+ de: de-controller@01000000 {
+ compatible = "allwinner,sun8i-h3-display-engine";
+ reg = <0x01000000 0x400000>;
+ clocks = <&ccu CLK_BUS_DE>, <&ccu CLK_DE>;
+ clock-names = "bus", "clock";
+ resets = <&ccu RST_BUS_DE>;
+ ports = <&lcd0_p>;
+ status = "disabled";
+ };
+
                  dma: dma-controller@01c02000 {
                          compatible = "allwinner,sun8i-h3-dma";
                          reg = <0x01c02000 0x1000>;

@@ -149,6 +159,23 @@
                          #dma-cells = <1>;
                  };
 
+ lcd0: lcd-controller@01c0c000 {
+ compatible = "allwinner,sun8i-a83t-tcon";
+ reg = <0x01c0c000 0x400>;
+ clocks = <&ccu CLK_BUS_TCON0>, <&ccu CLK_TCON0>;
+ clock-names = "bus", "clock";
+ resets = <&ccu RST_BUS_TCON0>;
+ interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;
+ status = "disabled";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ lcd0_p: port {
+ lcd0_hdmi: endpoint {
+ remote-endpoint = <&hdmi_lcd0>;
+ };
+ };
+ };
+
                  mmc0: mmc@01c0f000 {
                          compatible = "allwinner,sun7i-a20-mmc";
                          reg = <0x01c0f000 0x1000>;

@@ -314,6 +341,11 @@
                          clock-names = "hosc", "losc";
                          #clock-cells = <1>;
                          #reset-cells = <1>;
+
+ assigned-clocks = <&ccu CLK_PLL_DE>,
+ <&ccu CLK_DE>;
+ assigned-clock-rates = <864000000>,
+ <432000000>;
                  };
 
                  pio: pinctrl@01c20800 {

@@ -564,6 +596,25 @@
                          interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
                  };
 
+ hdmi: hdmi@01ee0000 {
+ compatible = "allwinner,sun8i-h3-hdmi";
+ reg = <0x01ee0000 0x20000>;
+ clocks = <&ccu CLK_BUS_HDMI>, <&ccu CLK_HDMI>,
+ <&ccu CLK_HDMI_DDC>;
+ clock-names = "bus", "clock", "ddc-clock";
+ resets = <&ccu RST_BUS_HDMI0>, <&ccu RST_BUS_HDMI1>;
+ reset-names = "hdmi0", "hdmi1";
+ status = "disabled";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ port@0 { /* video */

--
2.10.2

_______________________________________________
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After removing CLK_PLL_DE's assigned-clock, the kernel passes compilation.

However, it cannot recognize any HDMI screen...

(My board is Orange Pi One, and I manually added status="okay"; to &lcd0, &de, &hdmi)

[   16.507802] sun8i-de2 1000000.de-controller: bound 1c0c000.lcd-controller (ops de2_lcd_ops [sun8i_de2_drm])
[   16.675948] sun8i-de2 1000000.de-controller: bound 1ee0000.hdmi (ops de2_hdmi_fini [sun8i_de2_hdmi])
[   16.685120] [drm] Supports vblank timestamp caching Rev 2 (21.10.2013).
[   16.695876] [drm] No driver support for vblank timestamp query.
[   16.701862] sun8i-de2 1000000.de-controller: No connectors reported connected with modes
[   16.713061] [drm] Cannot find any crtc or sizes - going 1024x768
[   16.734214] Console: switching to colour frame buffer device 128x48
[   16.751022] sun8i-de2 1000000.de-controller: fb0:  frame buffer device

Quoted 1 line · On Fri, 25 Nov 2016 17:41:51 +0800 Icenowy Zheng…

 After removing CLK_PLL_DE's assigned-clock, the kernel passes compilation.

The 'pll-de' and 'de' must have a fixed rate. Otherwise, if you do not use the legacy u-boot, I don't know which can be the rate of the DE.

Quoted 5 lines

 However, it cannot recognize any HDMI screen...

 (My board is Orange Pi One, and I manually added status="okay"; to &lcd0, &de, &hdmi)

Quoted 8 lines

 [ 16.507802] sun8i-de2 1000000.de-controller: bound 1c0c000.lcd-controller (ops de2_lcd_ops [sun8i_de2_drm])
 [ 16.675948] sun8i-de2 1000000.de-controller: bound 1ee0000.hdmi (ops de2_hdmi_fini [sun8i_de2_hdmi])
 [ 16.685120] [drm] Supports vblank timestamp caching Rev 2 (21.10.2013).
 [ 16.695876] [drm] No driver support for vblank timestamp query.
 [ 16.701862] sun8i-de2 1000000.de-controller: No connectors reported connected with modes
 [ 16.713061] [drm] Cannot find any crtc or sizes - going 1024x768
 [ 16.734214] Console: switching to colour frame buffer device 128x48
 [ 16.751022] sun8i-de2 1000000.de-controller: fb0: frame buffer device

I put a 'pr_warn' message is case the EDID cannot be read. Have you this message?

Anyway, there is a problem with the EDID:
- my Orange Pi 2 (H3) randomly fails to read it. But this succeeds after rebooting once or twice.
- my Banana Pi M2+ (H3) reads it correctly each time.
- my Banana Pi M3 (A83T) can never read it.

BTW, on first tries, I was forcing a CEA mode thru the kernel command line. This was working with the OPi2 and BPiM3, but there was no sound. In the last version, I use a EDID in edid_firmware for having sound with the BPiM3. This works fine.
But, forcing a CEA mode is no more possible, so, when the OPi2 cannot read the EDID, the system switches to a VGA mode (default 1024x768) which is not supported. It seems that this is your case.

So, in brief, if your board cannot read the EDID, put a EDID somewhere and its path in /sys/module/drm_kms_helper/parameters/edid_firmware. There will be no console, but X11 will work correctly.

--
Ken ar c'hentañ | ** Breizh ha Linux atav! **
Jef | http://moinejf.free.fr/

Quoted 1 line · On Fri, 25 Nov 2016 17:41:51 +0800 Icenowy Zheng…

After removing CLK_PLL_DE's assigned-clock, the kernel passes compilation.

The 'pll-de' and 'de' must have a fixed rate. Otherwise, if you do not use the legacy u-boot, I don't know which can be the rate of the DE.

Quoted 4 lines

However, it cannot recognize any HDMI screen...

(My board is Orange Pi One, and I manually added status="okay"; to &lcd0, &de, &hdmi)

Quoted 8 lines

[   16.507802] sun8i-de2 1000000.de-controller: bound 1c0c000.lcd-controller (ops de2_lcd_ops [sun8i_de2_drm])
[   16.675948] sun8i-de2 1000000.de-controller: bound 1ee0000.hdmi (ops de2_hdmi_fini [sun8i_de2_hdmi])
[   16.685120] [drm] Supports vblank timestamp caching Rev 2 (21.10.2013).
[   16.695876] [drm] No driver support for vblank timestamp query.
[   16.701862] sun8i-de2 1000000.de-controller: No connectors reported connected with modes
[   16.713061] [drm] Cannot find any crtc or sizes - going 1024x768
[   16.734214] Console: switching to colour frame buffer device 128x48
[   16.751022] sun8i-de2 1000000.de-controller: fb0:  frame buffer device

I put a 'pr_warn' message is case the EDID cannot be read. Have you this message?

Anyway, there is a problem with the EDID:
- my Orange Pi 2 (H3) randomly fails to read it. But this succeeds after rebooting once or twice.
- my Banana Pi M2+ (H3) reads it correctly each time.
- my Banana Pi M3 (A83T) can never read it.

BTW, on first tries, I was forcing a CEA mode thru the kernel command line. This was working with the OPi2 and BPiM3, but there was no sound. In the last version, I use a EDID in edid_firmware for having sound with the BPiM3. This works fine.
But, forcing a CEA mode is no more possible, so, when the OPi2 cannot read the EDID, the system switches to a VGA mode (default 1024x768) which is not supported. It seems that this is your case.

So, in brief, if your board cannot read the EDID, put a EDID somewhere and its path in /sys/module/drm_kms_helper/parameters/edid_firmware. There will be no console, but X11 will work correctly.

Quoted 1 line · On Fri, 25 Nov 2016 17:41:51 +0800 Icenowy Zheng…

After removing CLK_PLL_DE's assigned-clock, the kernel passes

compilation.

The 'pll-de' and 'de' must have a fixed rate. Otherwise, if you do not use the legacy u-boot, I don't know which can be the rate of the DE.

Quoted 3 lines

However, it cannot recognize any HDMI screen...

(My board is Orange Pi One, and I manually added status="okay"; to

&lcd0, &de, &hdmi)

Quoted 2 lines

[   16.507802] sun8i-de2 1000000.de-controller: bound 

1c0c000.lcd-controller (ops de2_lcd_ops [sun8i_de2_drm])

Quoted 1 line

[   16.675948] sun8i-de2 1000000.de-controller: bound 1ee0000.hdmi (ops 

de2_hdmi_fini [sun8i_de2_hdmi])

Quoted 1 line

[   16.685120] [drm] Supports vblank timestamp caching Rev 2 

(21.10.2013).

Quoted 2 lines

[   16.695876] [drm] No driver support for vblank timestamp query. 
[   16.701862] sun8i-de2 1000000.de-controller: No connectors reported 

connected with modes

Quoted 3 lines

[   16.713061] [drm] Cannot find any crtc or sizes - going 1024x768 
[   16.734214] Console: switching to colour frame buffer device 128x48 
[   16.751022] sun8i-de2 1000000.de-controller: fb0:  frame buffer 

device

I put a 'pr_warn' message is case the EDID cannot be read. Have you this message?

Anyway, there is a problem with the EDID:
- my Orange Pi 2 (H3) randomly fails to read it. But this succeeds after rebooting once or twice.

- my Banana Pi M2+ (H3) reads it correctly each time.
- my Banana Pi M3 (A83T) can never read it.

BTW, on first tries, I was forcing a CEA mode thru the kernel command line. This was working with the OPi2 and BPiM3, but there was no sound. In the last version, I use a EDID in edid_firmware for having sound with the BPiM3. This works fine.
But, forcing a CEA mode is no more possible, so, when the OPi2 cannot read the EDID, the system switches to a VGA mode (default 1024x768) which is not supported. It seems that this is your case.

So, in brief, if your board cannot read the EDID, put a EDID somewhere and its path in /sys/module/drm_kms_helper/parameters/edid_firmware. There will be no console, but X11 will work correctly.

Signature · 2 lines

Ken ar c'hentañ        |              ** Breizh ha Linux atav! ** 
Jef                |                http://moinejf.free.fr/

This patchset series adds HDMI video support to the Allwinner sun8i SoCs which include the display engine 2 (DE2). The driver contains the code for the A83T and H3, but it could be used/extended for other SoCs as the A64, H2 and H5.

v6:
- remove audio support (other patchset to come)
- use DRM modeset data for HDMI configuration (thanks to Jernej Škrabec)
- more meaningfull register names
- use a mutex for DE I/O protection
- merge DE and plane into one file
- don't activate the video hardware when video not started (Maxime Ripard)
- remove 'type = "video" in DT graph ports
(Rob Herring)
- change the I/O accesses by #define instead of struct (Maxime Ripard, André Przywara)
- remove pm functions (Maxime Ripard)
- set the pll-de/de clocks in the DT (Maxime Ripard)

- use platform_get_irq instead of irq_of_parse_and_map (Maxime Ripard)
- rename sunxi to sun8i (Maxime Ripard)
- fix coding style errors (Maxime Ripard)
- subclass the drm structure in private data (Daniel Vetter)
- move drm_dev_register at end of init (Daniel Vetter)
v5:
- add overlay plane
- add audio support
- add support for the A83T
- add back the HDMI driver
- many bug fixes
v4:
- drivers/clk/sunxi/Makefile was missing (Emil Velikov)
v3:
- add the hardware cursor
- simplify and fix the DE2 init sequences
- generation for all SUNXI SoCs (Andre Przywara)
v2:
- remove the HDMI driver
- remarks from Chen-Yu Tsai and Russell King
- DT documentation added

Jean-Francois Moine (5):
drm: sun8i: Add a basic DRM driver for Allwinner DE2
drm: sunxi: add HDMI video support to A83T and H3
ARM: dts: sun8i-h3: add HDMI video nodes
ARM: dts: sun8i-h3: Add HDMI video to the Banana Pi M2+
ARM: dts: sun8i-h3: Add HDMI video to the Orange PI 2

 .../devicetree/bindings/display/sunxi/hdmi.txt     |  53 ++
 .../bindings/display/sunxi/sun8i-de2.txt           |  83 ++
 arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts    |  13 +
 arch/arm/boot/dts/sun8i-h3-orangepi-2.dts          |  13 +
 arch/arm/boot/dts/sun8i-h3.dtsi                    |  51 ++
 drivers/gpu/drm/Kconfig                            |   2 +
 drivers/gpu/drm/Makefile                           |   1 +
 drivers/gpu/drm/sun8i/Kconfig                      |  26 +
 drivers/gpu/drm/sun8i/Makefile                     |   9 +
 drivers/gpu/drm/sun8i/de2_crtc.c                   | 440 +++++++++++
 drivers/gpu/drm/sun8i/de2_crtc.h                   |  50 ++
 drivers/gpu/drm/sun8i/de2_drm.h                    |  48 ++
 drivers/gpu/drm/sun8i/de2_drv.c                    | 379 ++++++++++
 drivers/gpu/drm/sun8i/de2_hdmi.c                   | 394 ++++++++++
 drivers/gpu/drm/sun8i/de2_hdmi.h                   |  51 ++
 drivers/gpu/drm/sun8i/de2_hdmi_io.c                | 839 +++++++++++++++++++++
 drivers/gpu/drm/sun8i/de2_plane.c                  | 712 +++++++++++++++++
 17 files changed, 3164 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/display/sunxi/hdmi.txt
 create mode 100644 Documentation/devicetree/bindings/display/sunxi/sun8i-de2.txt
 create mode 100644 drivers/gpu/drm/sun8i/Kconfig
 create mode 100644 drivers/gpu/drm/sun8i/Makefile
 create mode 100644 drivers/gpu/drm/sun8i/de2_crtc.c
 create mode 100644 drivers/gpu/drm/sun8i/de2_crtc.h
 create mode 100644 drivers/gpu/drm/sun8i/de2_drm.h
 create mode 100644 drivers/gpu/drm/sun8i/de2_drv.c
 create mode 100644 drivers/gpu/drm/sun8i/de2_hdmi.c
 create mode 100644 drivers/gpu/drm/sun8i/de2_hdmi.h
 create mode 100644 drivers/gpu/drm/sun8i/de2_hdmi_io.c
 create mode 100644 drivers/gpu/drm/sun8i/de2_plane.c

Dne 20.11.2016 v 12:32 Jean-Francois Moine napsal(a):

Quoted 4 lines

This patchset series adds HDMI video support to the Allwinner sun8i SoCs which include the display engine 2 (DE2). The driver contains the code for the A83T and H3, but it could be used/extended for other SoCs as the A64, H2 and H5.

Hi,

I'm trying to test your patches on Orange Pi PC, and I've run into a few
issues: (I'm using sunxi-ng with the same patches as last time, to make it work with your driver)

1] I just get pink output on the monitor - there's some signal, but it's pink (or more like magenta).

dmesg ouput indicates no error:

[    1.887823] [drm] Initialized
[    1.888503] sun8i-de2 1000000.de-controller: bound
1c0c000.lcd-controller (ops 0xc0a63894)
[    2.057298] sun8i-de2 1000000.de-controller: bound 1ee0000.hdmi (ops
0xc0a63b54)
[    2.057304] [drm] Supports vblank timestamp caching Rev 2 (21.10.2013).
[    2.057307] [drm] No driver support for vblank timestamp query.
[    2.690862] Console: switching to colour frame buffer device 240x67
[    2.723059] sun8i-de2 1000000.de-controller: fb0:  frame buffer device

Quoted 17 lines · On Mon, 21 Nov 2016 01:54:53 +0100 Ondřej Jirman…

Dne 20.11.2016 v 12:32 Jean-Francois Moine napsal(a):

Quoted 4 lines

This patchset series adds HDMI video support to the Allwinner sun8i SoCs which include the display engine 2 (DE2). The driver contains the code for the A83T and H3, but it could be used/extended for other SoCs as the A64, H2 and H5.

Hi,

I'm trying to test your patches on Orange Pi PC, and I've run into a few
issues: (I'm using sunxi-ng with the same patches as last time, to make it work with your driver)

1] I just get pink output on the monitor - there's some signal, but it's pink (or more like magenta).

dmesg ouput indicates no error:

Quoted 9 lines

[    1.887823] [drm] Initialized
[    1.888503] sun8i-de2 1000000.de-controller: bound
1c0c000.lcd-controller (ops 0xc0a63894)
[    2.057298] sun8i-de2 1000000.de-controller: bound 1ee0000.hdmi (ops
0xc0a63b54)
[    2.057304] [drm] Supports vblank timestamp caching Rev 2 (21.10.2013).
[    2.057307] [drm] No driver support for vblank timestamp query.
[    2.690862] Console: switching to colour frame buffer device 240x67
[    2.723059] sun8i-de2 1000000.de-controller: fb0:  frame buffer device

	[snip]

My H3 boards work correctly, except the Orange PI 2 when it cannot read the EDID (but it is OK after reboot).

Did you check if the EDID was correctly read?

Which resolution do you expect?