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sunxi: reduce Orange Pi Zero DRAM clock speed

PATCH New Clément Bœsch 3 participants 4 messages Jul 23, 2017 – May 31, 2018

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Clément Bœsch

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#0 lore raw

PATCH 1/1 sunxi: reduce Orange Pi Zero DRAM clock speed

Using fel-boot-lima-memtester-on-orange-pi-pc 672 on an Orange Pi without heatsink results in the following error after a few minutes:
WRITE FAILURE: 0x00200000 != 0xffdfffff at offset 0x0137f47c (bitflip).

Also, the constructor repository (github/orangepi-xunlong) seems to contain that 624 Mhz clock speed in its u-boot fork. It may be that 672 Mhz is the advertized overclocked speed.

According to http://linux-sunxi.org/Orange_Pi_PC#DRAM_clock_speed_limit
it may be worth decreasing that value with other Orange Pi boards.

See also e7d6aa0b74b7f4d08ee68da8a586c76c761348e2.

---
 configs/orangepi_zero_defconfig | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)
configs/orangepi_zero_defconfig +1 -1
index c650ce87d9..16a3929aa5 100644
@@ -2,7 +2,7 @@ CONFIG_ARM=y
 CONFIG_ARCH_SUNXI=y
 CONFIG_SPL_SPI_FLASH_SUPPORT=y
 CONFIG_MACH_SUN8I_H3=y
-CONFIG_DRAM_CLK=672
+CONFIG_DRAM_CLK=624
 CONFIG_DRAM_ZQ=3881979
 CONFIG_DRAM_ODT_EN=y
 # CONFIG_VIDEO_DE2 is not set
Signature · 1 line
2.13.3
#1 lore raw

PATCH 1/1 sunxi: reduce Orange Pi Zero DRAM clock speed

Quoted 4 lines · Clément Bœsch

Using fel-boot-lima-memtester-on-orange-pi-pc 672 on an Orange Pi without heatsink results in the following error after a few minutes:
WRITE FAILURE: 0x00200000 != 0xffdfffff at offset 0x0137f47c (bitflip).

Quoted 8 lines

Also, the constructor repository (github/orangepi-xunlong) seems to contain that 624 Mhz clock speed in its u-boot fork. It may be that 672 Mhz is the advertized overclocked speed.

According to http://linux-sunxi.org/Orange_Pi_PC#DRAM_clock_speed_limit
it may be worth decreasing that value with other Orange Pi boards.

See also e7d6aa0b74b7f4d08ee68da8a586c76c761348e2.

Applied to u-boot-sunxi/master

thanks!

Signature · 4 lines
Jagan Teki
Free Software Engineer | www.openedev.com
U-Boot, Linux | Upstream Maintainer
Hyderabad, India.
#2 lore raw

PATCH 1/1 sunxi: reduce Orange Pi Zero DRAM clock speed

Quoted 9 lines · Jagan Teki
Quoted 8 lines · Clément Bœsch

Using fel-boot-lima-memtester-on-orange-pi-pc 672 on an Orange Pi without heatsink results in the following error after a few minutes:
WRITE FAILURE: 0x00200000 != 0xffdfffff at offset 0x0137f47c (bitflip).

Also, the constructor repository (github/orangepi-xunlong) seems to contain that 624 Mhz clock speed in its u-boot fork. It may be that 672 Mhz is the advertized overclocked speed.

Quoted 7 lines
Quoted 4 lines

According to http://linux-sunxi.org/Orange_Pi_PC#DRAM_clock_speed_limit
it may be worth decreasing that value with other Orange Pi boards.

See also e7d6aa0b74b7f4d08ee68da8a586c76c761348e2.

Applied to u-boot-sunxi/master

I've a 1.5 years old OPi Zero that was running uboot 2017.01 so far. I just tried to update to 2018.05, also using the new defconfig. The result was that uboot got stuck early during the first lines of output. Then I changed the DRAM clock back to 672, and things seem to work find.

Are we facing different board revisions that need different settings, or could the lowering be incorrect?

Jan

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#3 lore raw

PATCH 1/1 sunxi: reduce Orange Pi Zero DRAM clock speed

Quoted 18 lines · Jan Kiszka
Quoted 9 lines · Jagan Teki
Quoted 8 lines · Clément Bœsch

Using fel-boot-lima-memtester-on-orange-pi-pc 672 on an Orange Pi without heatsink results in the following error after a few minutes:
WRITE FAILURE: 0x00200000 != 0xffdfffff at offset 0x0137f47c (bitflip).

Also, the constructor repository (github/orangepi-xunlong) seems to contain that 624 Mhz clock speed in its u-boot fork. It may be that 672 Mhz is the advertized overclocked speed.

Quoted 7 lines
Quoted 4 lines

According to http://linux-sunxi.org/Orange_Pi_PC#DRAM_clock_speed_limit
it may be worth decreasing that value with other Orange Pi boards.

See also e7d6aa0b74b7f4d08ee68da8a586c76c761348e2.

Applied to u-boot-sunxi/master

Quoted 7 lines

I've a 1.5 years old OPi Zero that was running uboot 2017.01 so far. I just tried to update to 2018.05, also using the new defconfig. The result was that uboot got stuck early during the first lines of output. Then I changed the DRAM clock back to 672, and things seem to work find.

Are we facing different board revisions that need different settings, or could the lowering be incorrect?

Sorry, false alarm. Seems I messed up something when writing out the 624 MHz version and happen to fix that while testing the 672 one. But now also the upstream config works. And I suspect/hope that the lower frequency will resolve the sporadic crashes of the board that I saw in the past...

Thanks,
Jan

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