dma: add channels support

PATCH Superseded Grygorii Strashko 5 participants 145 messages Nov 10, 2018 – Dec 10, 2018 Page 1 of 2

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Network drivers Device tree bindings MIPS Common clk +2 more subsystems

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Grygorii Strashko

author

2018-11-10 21:06 UTC #0 lore raw

v7 cover dma: add channels support

Hi All,

This series is the next try to add DMA channels support for DMA controllers which last version was posted by Álvaro Fernández Rojas [1]. i've kept version numbering.

Comparing to the original post I've added few changes:
- added possibility to pass DMA driver/channel's specific data per each transfer using additional parameter "metadata" in dma_send/dma_receive() API. For example, port number for network packets to be directed to the specific port on multi port ethernet controllers.
- added new dma_prepare_rcv_buf() API which allows to implement zero-copy DEV_TO_MEM transfer using DMA streaming channels which is usual case for Networking.
- added dma-uclass test
- removed unused function dma_get_by_index_platdata()
- updated comments

Hence, originally DMA channels support was introduced to add support for "bmips: add bcm6348-enet support" - that series can be easily updated following DMA channels API changes (if still actual).

Patches 5-6 - Here I'm providing DMA and networking drivers for the new TI AM65x SoC [2] as an illustration of DMA channels API usage only. Unfortunately, those drivers are still under development so NOT-FOR-MERGE (!will not build!)
- we'd like code/bindings to be accepted in LKML first.
Full sources can be found at [3].

[1] https://patchwork.ozlabs.org/cover/881642/
[2] http://www.ti.com/lit/ug/spruid7b/spruid7b.pdf
[3] git at git.ti.com:~gragst/ti-u-boot/gragsts-ti-u-boot.git
branch: master-am6-dma-wip
===

A DMA is a feature of computer systems that allows certain hardware subsystems to access main system memory, independent of the CPU. DMA channels are typically generated externally to the HW module consuming them, by an entity this API calls a DMA provider. This API provides a standard means for drivers to enable and disable DMAs, and to copy, send and receive data using DMA.

DMA channel API:
dma_get_by_index()
dma_get_by_name()
dma_request()
dma_free()
dma_enable()
dma_disable()
dma_prepare_rcv_buf()
dma_receive()
dma_send()

A driver that implements UCLASS_DMA is a DMA provider. A provider will often implement multiple separate DMAs channels, since the hardware it manages often has this capability. dma_uclass.h describes the interface which DMA providers must implement.

DMA consumers/clients are the HW modules driven by the DMA channels.

DMA consumer DMA_MEM_TO_DEV (transmit) usage example (based on networking). Note. In u-boot dma_send() is sync operation always - it'll start transfer and will poll for it to complete:
- get/request dma channel

	struct dma dma_tx;
	ret = dma_get_by_name(common->dev, "tx0", &dma_tx);
	if (ret) ...

- enable dma channel

	ret = dma_enable(&dma_tx);
	if (ret) ...

- dma transmit DMA_MEM_TO_DEV.

	struct ti_drv_packet_data packet_data;
	
	packet_data.opt1 = val1;
	packet_data.opt2 = val2;
	ret = dma_send(&dma_tx, packet, length, &packet_data);
	if (ret) ..

DMA consumer DMA_DEV_TO_MEM (receive) usage example (based on networking). Note. dma_receive() is sync operation always - it'll start transfer (if required) and will poll for it to complete (or for any previously configured dev2mem transfer to complete):
- get/request dma channel

	struct dma dma_rx;
	ret = dma_get_by_name(common->dev, "rx0", &dma_rx);
	if (ret) ...

- enable dma channel

	ret = dma_enable(&dma_rx);
	if (ret) ...

- dma receive DMA_DEV_TO_MEM.

	struct ti_drv_packet_data packet_data;
	
	len = dma_receive(&dma_rx, (void **)packet, &packet_data);
	if (ret < 0) ...

DMA consumer DMA_DEV_TO_MEM (receive) zero-copy usage example (based on networking). Networking subsystem allows to configure and use few receive buffers (dev2mem), as Networking RX DMA channels usually implemented as streaming interface
- get/request dma channel

	struct dma dma_rx;
	ret = dma_get_by_name(common->dev, "rx0", &dma_rx);
	if (ret) ...
	
	for (i = 0; i < RX_DESC_NUM; i++) {
		ret = dma_prepare_rcv_buf(&dma_rx,
					  net_rx_packets[i],
					  RX_BUF_SIZE);
		if (ret) ...
	}

- enable dma channel

	ret = dma_enable(&dma_rx);
	if (ret) ...

- dma receive DMA_DEV_TO_MEM.

	struct ti_drv_packet_data packet_data;
	void *packet;
	
	len = dma_receive(&dma_rx, &packet, &packet_data);
	if (ret < 0) ..
	
	/* packet - points on buffer prepared by dma_prepare_rcv_buf().
	   process packet*/
	
	- return buffer back to DAM channel
	ret = dma_prepare_rcv_buf(&dma_rx,
				  net_rx_packets[rx_next],
				  RX_BUF_SIZE);

changes in v7:
- copyright fixed as suggested by Tom Rini
- added "Reviewed-by" tags

v1: http://patchwork.ozlabs.org/cover/987948/

Grygorii Strashko (2):
test: dma: add dma-uclass test
net: ethernet: ti: introduce am654 gigabit eth switch subsystem driver

Vignesh R (1):
dma: ti: add driver to K3 UDMA

Álvaro Fernández Rojas (2):
dma: move dma_ops to dma-uclass.h
dma: add channels support

 arch/sandbox/dts/test.dts         |    8 +
 configs/sandbox_defconfig         |    3 +
 drivers/dma/Kconfig               |   16 +
 drivers/dma/Makefile              |    3 +
 drivers/dma/dma-uclass.c          |  183 +++-
 drivers/dma/sandbox-dma-test.c    |  282 +++++++
 drivers/dma/ti-edma3.c            |    2 +-
 drivers/dma/ti/Kconfig            |   14 +
 drivers/dma/ti/Makefile           |    3 +
 drivers/dma/ti/k3-udma-hwdef.h    |  184 ++++
 drivers/dma/ti/k3-udma.c          | 1679 +++++++++++++++++++++++++++++++++++++
 drivers/net/Kconfig               |    8 +
 drivers/net/Makefile              |    1 +
 drivers/net/am65-cpsw-nuss.c      |  962 +++++++++++++++++++++
 include/dma-uclass.h              |  128 +++
 include/dma.h                     |  282 ++++++-
 include/dt-bindings/dma/k3-udma.h |   26 +
 include/linux/soc/ti/ti-udma.h    |   24 +
 test/dm/Makefile                  |    1 +
 test/dm/dma.c                     |  123 +++
 20 files changed, 3902 insertions(+), 30 deletions(-)
 create mode 100644 drivers/dma/sandbox-dma-test.c
 create mode 100644 drivers/dma/ti/Kconfig
 create mode 100644 drivers/dma/ti/Makefile
 create mode 100644 drivers/dma/ti/k3-udma-hwdef.h
 create mode 100644 drivers/dma/ti/k3-udma.c
 create mode 100644 drivers/net/am65-cpsw-nuss.c
 create mode 100644 include/dma-uclass.h
 create mode 100644 include/dt-bindings/dma/k3-udma.h
 create mode 100644 include/linux/soc/ti/ti-udma.h
 create mode 100644 test/dm/dma.c

Signature · 1 line

2.10.5

Grygorii Strashko

author

2018-11-10 21:06 UTC #1 lore raw

PATCH v7 1/5 dma: move dma_ops to dma-uclass.h

From: Álvaro Fernández Rojas <[email protected]>

Move dma_ops to a separate header file, following other uclass implementations. While doing so, this patch also improves dma_ops documentation.

Reviewed-by Tom Rini <[email protected]>

Reviewed-by Simon Glass <[email protected]>

Signed-off-by Álvaro Fernández Rojas <[email protected]>

Signed-off-by Grygorii Strashko <[email protected]>

---
 drivers/dma/dma-uclass.c |  2 +-
 drivers/dma/ti-edma3.c   |  2 +-
 include/dma-uclass.h     | 39 +++++++++++++++++++++++++++++++++++++++
 include/dma.h            | 22 ----------------------
 4 files changed, 41 insertions(+), 24 deletions(-)
 create mode 100644 include/dma-uclass.h

drivers/dma/dma-uclass.c +1 -1

index a33f7d5..6c3506c 100644
@@ -9,10 +9,10 @@
  */
 
 #include <common.h>
-#include <dma.h>
 #include <dm.h>
 #include <dm/uclass-internal.h>
 #include <dm/device-internal.h>
+#include <dma-uclass.h>
 #include <errno.h>
 
 int dma_get_device(u32 transfer_type, struct udevice **devp)

drivers/dma/ti-edma3.c +1 -1

index 2131e10..7e11b13 100644
@@ -11,7 +11,7 @@
 #include <asm/io.h>
 #include <common.h>
 #include <dm.h>
-#include <dma.h>
+#include <dma-uclass.h>
 #include <asm/omap_common.h>
 #include <asm/ti-common/ti-edma3.h>

include/dma-uclass.h new file +39 -0

new file mode 100644
index 0000000..7bec5d3
@@ -0,0 +1,39 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+/*
+ * Copyright (C) 2018 Álvaro Fernández Rojas <[email protected]>
+ * Copyright (C) 2015 Texas Instruments Incorporated <www.ti.com>
+ * Written by Mugunthan V N <[email protected]>
+ *
+ */
+
+#ifndef _DMA_UCLASS_H
+#define _DMA_UCLASS_H
+
+/* See dma.h for background documentation. */
+
+#include <dma.h>
+
+/*
+ * struct dma_ops - Driver model DMA operations
+ *
+ * The uclass interface is implemented by all DMA devices which use
+ * driver model.
+ */
+struct dma_ops {
+	/**
+	 * transfer() - Issue a DMA transfer. The implementation must
+	 *   wait until the transfer is done.
+	 *
+	 * @dev: The DMA device
+	 * @direction: direction of data transfer (should be one from
+	 *   enum dma_direction)
+	 * @dst: The destination pointer.
+	 * @src: The source pointer.
+	 * @len: Length of the data to be copied (number of bytes).
+	 * @return zero on success, or -ve error code.
+	 */
+	int (*transfer)(struct udevice *dev, int direction, void *dst,
+			void *src, size_t len);
+};
+
+#endif /* _DMA_UCLASS_H */

include/dma.h +0 ~~-22~~

index 50e9652..97fa0cf 100644
@@ -27,28 +27,6 @@ enum dma_direction {
 #define DMA_SUPPORTS_DEV_TO_DEV	BIT(3)
 
 /*
- * struct dma_ops - Driver model DMA operations
- *
- * The uclass interface is implemented by all DMA devices which use
- * driver model.
- */
-struct dma_ops {
-	/*
-	 * Get the current timer count
-	 *
-	 * @dev: The DMA device
-	 * @direction: direction of data transfer should be one from
-		       enum dma_direction
-	 * @dst: Destination pointer
-	 * @src: Source pointer
-	 * @len: Length of the data to be copied.
-	 * @return: 0 if OK, -ve on error
-	 */
-	int (*transfer)(struct udevice *dev, int direction, void *dst,
-			void *src, size_t len);
-};
-
-/*
  * struct dma_dev_priv - information about a device used by the uclass
  *
  * @supported: mode of transfers that DMA can support, should be

Signature · 1 line

2.10.5

Grygorii Strashko

author

2018-11-10 21:06 UTC #2 lore raw

PATCH v7 2/5 dma: add channels support

In reply to Grygorii Strashko

From: Álvaro Fernández Rojas <[email protected]>

This adds channels support for dma controllers that have multiple channels which can transfer data to/from different devices (enet, usb...).

DMA channle API:
dma_get_by_index()
dma_get_by_name()
dma_request()
dma_free()
dma_enable()
dma_disable()
dma_prepare_rcv_buf()
dma_receive()
dma_send()

Reviewed-by Tom Rini <[email protected]>

Signed-off-by Álvaro Fernández Rojas <[email protected]>

[grygorii.strashko at ti.com: drop unused dma_get_by_index_platdata(),
add metadata to send/receive ops, add dma_prepare_rcv_buf(), minor clean up]

Signed-off-by Grygorii Strashko <[email protected]>

---
 drivers/dma/Kconfig      |   7 ++
 drivers/dma/dma-uclass.c | 181 ++++++++++++++++++++++++++++++++-
 include/dma-uclass.h     |  91 ++++++++++++++++-
 include/dma.h            | 260 ++++++++++++++++++++++++++++++++++++++++++++++-
 4 files changed, 532 insertions(+), 7 deletions(-)

drivers/dma/Kconfig +7 -0

index 4ee6afa..b9b85c6 100644
@@ -12,6 +12,13 @@ config DMA
 	  buses that is used to transfer data to and from memory.
 	  The uclass interface is defined in include/dma.h.
 
+config DMA_CHANNELS
+	bool "Enable DMA channels support"
+	depends on DMA
+	help
+	  Enable channels support for DMA. Some DMA controllers have multiple
+	  channels which can either transfer data to/from different devices.
+
 config TI_EDMA3
 	bool "TI EDMA3 driver"
 	help

drivers/dma/dma-uclass.c +177 -4

196 lines not on this page · raw message

include/dma-uclass.h +90 -1

109 lines not on this page · raw message

include/dma.h +258 -2

276 lines not on this page · raw message

Signature · 1 line

2.10.5

Simon Glass

2018-11-13 19:53 UTC #3 lore raw

PATCH v7 2/5 dma: add channels support

Quoted 21 lines · Grygorii Strashko

From: Álvaro Fernández Rojas <[email protected]>
This adds channels support for dma controllers that have multiple channels which can transfer data to/from different devices (enet, usb...).
DMA channle API:
dma_get_by_index()
dma_get_by_name()
dma_request()
dma_free()
dma_enable()
dma_disable()
dma_prepare_rcv_buf()
dma_receive()
dma_send()
Reviewed-by Tom Rini <[email protected]>
Signed-off-by Álvaro Fernández Rojas <[email protected]>
[grygorii.strashko at ti.com: drop unused dma_get_by_index_platdata(),
add metadata to send/receive ops, add dma_prepare_rcv_buf(), minor clean up]

Quoted 7 lines

Signed-off-by Grygorii Strashko <[email protected]>

---
 drivers/dma/Kconfig      |   7 ++
 drivers/dma/dma-uclass.c | 181 ++++++++++++++++++++++++++++++++-
 include/dma-uclass.h     |  91 ++++++++++++++++-
 include/dma.h            | 260 ++++++++++++++++++++++++++++++++++++++++++++++-
 4 files changed, 532 insertions(+), 7 deletions(-)

Reviewed-by Simon Glass <[email protected]>

Grygorii Strashko

author

2018-11-10 21:06 UTC #4 lore raw

PATCH v7 3/5 test: dma: add dma-uclass test

In reply to Grygorii Strashko

Add a sandbox DMA driver implementation (provider) and corresponding DM test.

Reviewed-by Tom Rini <[email protected]>

Signed-off-by Grygorii Strashko <[email protected]>

---
 arch/sandbox/dts/test.dts      |   8 ++
 configs/sandbox_defconfig      |   3 +
 drivers/dma/Kconfig            |   7 +
 drivers/dma/Makefile           |   1 +
 drivers/dma/sandbox-dma-test.c | 282 +++++++++++++++++++++++++++++++++++++++++
 test/dm/Makefile               |   1 +
 test/dm/dma.c                  | 123 ++++++++++++++++++
 7 files changed, 425 insertions(+)
 create mode 100644 drivers/dma/sandbox-dma-test.c
 create mode 100644 test/dm/dma.c

arch/sandbox/dts/test.dts +8 -0

index 57e0dd7..b721007 100644
@@ -712,6 +712,14 @@
 	sandbox_tee {
 		compatible = "sandbox,tee";
 	};
+
+	dma: dma {
+		compatible = "sandbox,dma";
+		#dma-cells = <1>;
+
+		dmas = <&dma 0>, <&dma 1>, <&dma 2>;
+		dma-names = "m2m", "tx0", "rx0";
+	};
 };
 
 #include "sandbox_pmic.dtsi"

configs/sandbox_defconfig +3 -0

index 2ce336f..7cdc01c 100644
@@ -217,3 +217,6 @@ CONFIG_UT_TIME=y
 CONFIG_UT_DM=y
 CONFIG_UT_ENV=y
 CONFIG_UT_OVERLAY=y
+CONFIG_DMA=y
+CONFIG_DMA_CHANNELS=y
+CONFIG_SANDBOX_DMA=y

drivers/dma/Kconfig +7 -0

index b9b85c6..8a4162e 100644
@@ -19,6 +19,13 @@ config DMA_CHANNELS
 	  Enable channels support for DMA. Some DMA controllers have multiple
 	  channels which can either transfer data to/from different devices.
 
+config SANDBOX_DMA
+	bool "Enable the sandbox DMA test driver"
+	depends on DMA && DMA_CHANNELS && SANDBOX
+	help
+	  Enable support for a test DMA uclass implementation. It stimulates
+	  DMA transfer by simple copying data between channels.
+
 config TI_EDMA3
 	bool "TI EDMA3 driver"
 	help

drivers/dma/Makefile +1 -0

index 4eaef8a..aff31f9 100644
@@ -8,6 +8,7 @@ obj-$(CONFIG_DMA) += dma-uclass.o
 obj-$(CONFIG_FSLDMAFEC) += MCD_tasksInit.o MCD_dmaApi.o MCD_tasks.o
 obj-$(CONFIG_APBH_DMA) += apbh_dma.o
 obj-$(CONFIG_FSL_DMA) += fsl_dma.o
+obj-$(CONFIG_SANDBOX_DMA) += sandbox-dma-test.o
 obj-$(CONFIG_TI_KSNAV) += keystone_nav.o keystone_nav_cfg.o
 obj-$(CONFIG_TI_EDMA3) += ti-edma3.o
 obj-$(CONFIG_DMA_LPC32XX) += lpc32xx_dma.o

drivers/dma/sandbox-dma-test.c new file +282 -0

282 lines not on this page · raw message

test/dm/Makefile +1 -0

index b490cf2..afc6664 100644
@@ -53,4 +53,5 @@ obj-$(CONFIG_MISC) += misc.o
 obj-$(CONFIG_DM_SERIAL) += serial.o
 obj-$(CONFIG_CPU) += cpu.o
 obj-$(CONFIG_TEE) += tee.o
+obj-$(CONFIG_DMA) += dma.o
 endif

test/dm/dma.c new file +123 -0

123 lines not on this page · raw message

Signature · 1 line

2.10.5

Simon Glass

2018-11-13 19:53 UTC #5 lore raw

PATCH v7 3/5 test: dma: add dma-uclass test

Quoted 5 lines · Grygorii Strashko

Add a sandbox DMA driver implementation (provider) and corresponding DM test.
Reviewed-by Tom Rini <[email protected]>
Signed-off-by Grygorii Strashko <[email protected]>

Quoted 11 lines

---
 arch/sandbox/dts/test.dts      |   8 ++
 configs/sandbox_defconfig      |   3 +
 drivers/dma/Kconfig            |   7 +
 drivers/dma/Makefile           |   1 +
 drivers/dma/sandbox-dma-test.c | 282 +++++++++++++++++++++++++++++++++++++++++
 test/dm/Makefile               |   1 +
 test/dm/dma.c                  | 123 ++++++++++++++++++
 7 files changed, 425 insertions(+)
 create mode 100644 drivers/dma/sandbox-dma-test.c
 create mode 100644 test/dm/dma.c

Reviewed-by Simon Glass <[email protected]>

Grygorii Strashko

author

2018-11-10 21:06 UTC #6 lore raw

PATCH v7 4/5 dma: ti: add driver to K3 UDMA

In reply to Grygorii Strashko

From: Vignesh R <[email protected]>

Add support for K3 AM65x UDMA with only support pktmode MEM_TO_MEM transfers and DEV_TO_MEM/MEM_TO_DEV through DMA channels.

Signed-off-by Peter Ujfalusi <[email protected]>

Signed-off-by Grygorii Strashko <[email protected]>

---
 drivers/dma/Kconfig               |    2 +
 drivers/dma/Makefile              |    2 +
 drivers/dma/ti/Kconfig            |   14 +
 drivers/dma/ti/Makefile           |    3 +
 drivers/dma/ti/k3-udma-hwdef.h    |  184 ++++
 drivers/dma/ti/k3-udma.c          | 1679 +++++++++++++++++++++++++++++++++++++
 include/dt-bindings/dma/k3-udma.h |   26 +
 include/linux/soc/ti/ti-udma.h    |   24 +
 8 files changed, 1934 insertions(+)
 create mode 100644 drivers/dma/ti/Kconfig
 create mode 100644 drivers/dma/ti/Makefile
 create mode 100644 drivers/dma/ti/k3-udma-hwdef.h
 create mode 100644 drivers/dma/ti/k3-udma.c
 create mode 100644 include/dt-bindings/dma/k3-udma.h
 create mode 100644 include/linux/soc/ti/ti-udma.h

drivers/dma/Kconfig +2 -0

index 8a4162e..306261c 100644
@@ -48,4 +48,6 @@ config APBH_DMA_BURST8
 
 endif
 
+source "drivers/dma/ti/Kconfig"
+
 endmenu # menu "DMA Support"

drivers/dma/Makefile +2 -0

index aff31f9..ef2865a 100644
@@ -12,3 +12,5 @@ obj-$(CONFIG_SANDBOX_DMA) += sandbox-dma-test.o
 obj-$(CONFIG_TI_KSNAV) += keystone_nav.o keystone_nav_cfg.o
 obj-$(CONFIG_TI_EDMA3) += ti-edma3.o
 obj-$(CONFIG_DMA_LPC32XX) += lpc32xx_dma.o
+
+obj-y += ti/

drivers/dma/ti/Kconfig new file +14 -0

new file mode 100644
index 0000000..3d54983
@@ -0,0 +1,14 @@
+# SPDX-License-Identifier: GPL-2.0+
+
+if ARCH_K3
+
+config TI_K3_NAVSS_UDMA
+        bool "Texas Instruments UDMA"
+        depends on ARCH_K3
+        select DMA
+        select TI_K3_NAVSS_RINGACC
+        select TI_K3_NAVSS_PSILCFG
+        default n
+        help
+          Support for UDMA used in K3 devices.
+endif

drivers/dma/ti/Makefile new file +3 -0

new file mode 100644
index 0000000..de2f9ac
@@ -0,0 +1,3 @@
+# SPDX-License-Identifier: GPL-2.0+
+
+obj-$(CONFIG_TI_K3_NAVSS_UDMA) += k3-udma.o

drivers/dma/ti/k3-udma-hwdef.h new file +184 -0

184 lines not on this page · raw message

drivers/dma/ti/k3-udma.c new file +1679 -0

1,679 lines not on this page · raw message

include/dt-bindings/dma/k3-udma.h new file +26 -0

new file mode 100644
index 0000000..89ba6a9
@@ -0,0 +1,26 @@
+#ifndef __DT_TI_UDMA_H
+#define __DT_TI_UDMA_H
+
+#define UDMA_TR_MODE		0
+#define UDMA_PKT_MODE		1
+
+#define UDMA_DIR_TX		0
+#define UDMA_DIR_RX		1
+
+#define PSIL_STATIC_TR_NONE	0
+#define PSIL_STATIC_TR_XY	1
+#define PSIL_STATIC_TR_MCAN	2
+
+#define UDMA_PDMA_TR_XY(id)				\
+	ti,psil-config##id {				\
+		linux,udma-mode = <UDMA_TR_MODE>;	\
+		statictr-type = <PSIL_STATIC_TR_XY>;	\
+	}
+
+#define UDMA_PDMA_PKT_XY(id)				\
+	ti,psil-config##id {				\
+		linux,udma-mode = <UDMA_PKT_MODE>;	\
+		statictr-type = <PSIL_STATIC_TR_XY>;	\
+	}
+
+#endif /* __DT_TI_UDMA_H */

include/linux/soc/ti/ti-udma.h new file +24 -0

new file mode 100644
index 0000000..e9d4226
@@ -0,0 +1,24 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ *  Copyright (C) 2018 Texas Instruments Incorporated - http://www.ti.com
+ *  Author: Peter Ujfalusi <[email protected]>
+ */
+
+#ifndef __TI_UDMA_H
+#define __TI_UDMA_H
+
+/**
+ * struct ti_udma_drv_packet_data - TI UDMA transfer specific data
+ *
+ * @pkt_type: Packet Type - specific for each DMA client HW
+ * @dest_tag: Destination tag The source pointer.
+ *
+ * TI UDMA transfer specific data passed as part of DMA transfer to
+ * the DMA client HW in UDMA descriptors.
+ */
+struct ti_udma_drv_packet_data {
+	u32	pkt_type;
+	u32	dest_tag;
+};
+
+#endif /* __TI_UDMA_H */

Signature · 1 line

2.10.5

Grygorii Strashko

author

2018-11-10 21:06 UTC #7 lore raw

PATCH v7 5/5 net: ethernet: ti: introduce am654 gigabit eth switch subsystem driver

In reply to Grygorii Strashko

Add new driver for the TI AM65x SoC Gigabit Ethernet Switch subsystem (CPSW NUSS). It has two ports and provides Ethernet packet communication for the device and can be configured as an Ethernet switch. CPSW NUSS features: the Reduced Gigabit Media Independent Interface (RGMII), Reduced Media Independent Interface (RMII), and the Management Data Input/Output (MDIO) interface for physical layer device (PHY) management. The TI AM65x SoC has integrated two-port Gigabit Ethernet Switch subsystem into device MCU domain named MCU_CPSW0. One Ethernet port (port 1) with selectable RGMII and RMII interfaces and an internal Communications Port Programming Interface (CPPI) port (Host port 0).

Host Port 0 CPPI Packet Streaming Interface interface supports 8 TX channels and on RX channels operating by TI am654 NAVSS Unified DMA Peripheral Root Complex (UDMA-P) controller.

Signed-off-by Grygorii Strashko <[email protected]>

---
 drivers/net/Kconfig          |   8 +
 drivers/net/Makefile         |   1 +
 drivers/net/am65-cpsw-nuss.c | 962 +++++++++++++++++++++++++++++++++++++++++++
 3 files changed, 971 insertions(+)
 create mode 100644 drivers/net/am65-cpsw-nuss.c

drivers/net/Kconfig +8 -0

index e2d5b97..3a45732 100644
@@ -316,6 +316,14 @@ config SH_ETHER
 	help
 	  This driver supports the Ethernet for Renesas SH and ARM SoCs.
 
+config TI_AM65_CPSW_NUSS
+	bool "TI K3 AM65x MCU CPSW Nuss Ethernet controller driver"
+	depends on ARCH_K3
+	select PHYLIB
+	help
+	  This driver supports TI K3 MCU CPSW Nuss Ethernet controller
+	  in Texas Instruments K3 AM65x SoCs.
+
 config XILINX_AXIEMAC
 	depends on DM_ETH && (MICROBLAZE || ARCH_ZYNQ || ARCH_ZYNQMP)
 	select PHYLIB

drivers/net/Makefile +1 -0

index 8e33d7a..073fb3e 100644
@@ -57,6 +57,7 @@ obj-$(CONFIG_SMC91111) += smc91111.o
 obj-$(CONFIG_SMC911X) += smc911x.o
 obj-$(CONFIG_TSEC_ENET) += tsec.o fsl_mdio.o
 obj-$(CONFIG_FMAN_ENET) += fsl_mdio.o
+obj-$(CONFIG_TI_AM65_CPSW_NUSS) += am65-cpsw-nuss.o
 obj-$(CONFIG_ULI526X) += uli526x.o
 obj-$(CONFIG_VSC7385_ENET) += vsc7385.o
 obj-$(CONFIG_XILINX_AXIEMAC) += xilinx_axi_emac.o

drivers/net/am65-cpsw-nuss.c new file +962 -0

962 lines not on this page · raw message

Signature · 1 line

2.10.5

Álvaro Fernández Rojas

2018-11-26 18:00 UTC #8 lore raw

v8 cover dma: add channels support

In reply to Grygorii Strashko

In order to add bcm6348-enet support, dma-uclass must be extended to support dma channels and reworked to operate like the other dm uclass (clk, reset...).

===

DMA channel API:
dma_get_by_index()
dma_get_by_name()
dma_request()
dma_free()
dma_enable()
dma_disable()
dma_prepare_rcv_buf()
dma_receive()
dma_send()

DMA consumers/clients are the HW modules driven by the DMA channels.

	struct dma dma_tx;
	ret = dma_get_by_name(common->dev, "tx0", &dma_tx);
	if (ret) ...

- enable dma channel

	ret = dma_enable(&dma_tx);
	if (ret) ...

- dma transmit DMA_MEM_TO_DEV.

	struct ti_drv_packet_data packet_data;
	
	packet_data.opt1 = val1;
	packet_data.opt2 = val2;
	ret = dma_send(&dma_tx, packet, length, &packet_data);
	if (ret) ..

	struct dma dma_rx;
	ret = dma_get_by_name(common->dev, "rx0", &dma_rx);
	if (ret) ...

- enable dma channel

	ret = dma_enable(&dma_rx);
	if (ret) ...

- dma receive DMA_DEV_TO_MEM.

	struct ti_drv_packet_data packet_data;
	
	len = dma_receive(&dma_rx, (void **)packet, &packet_data);
	if (ret < 0) ...

	struct dma dma_rx;
	ret = dma_get_by_name(common->dev, "rx0", &dma_rx);
	if (ret) ...
	
	for (i = 0; i < RX_DESC_NUM; i++) {
		ret = dma_prepare_rcv_buf(&dma_rx,
					  net_rx_packets[i],
					  RX_BUF_SIZE);
		if (ret) ...
	}

- enable dma channel

	ret = dma_enable(&dma_rx);
	if (ret) ...

- dma receive DMA_DEV_TO_MEM.

	struct ti_drv_packet_data packet_data;
	void *packet;
	
	len = dma_receive(&dma_rx, &packet, &packet_data);
	if (ret < 0) ..
	
	/* packet - points on buffer prepared by dma_prepare_rcv_buf().
	   process packet*/
	
	- return buffer back to DAM channel
	ret = dma_prepare_rcv_buf(&dma_rx,
				  net_rx_packets[rx_next],
				  RX_BUF_SIZE);

===

v8: Adopt changes introduced by Grygorii Strashko:
- Sync with latest u-boot.
- Introduce bcm6368-enet driver support.
v7: From Grygorii Strashko:
- copyright fixed as suggested by Tom Rini
- added "Reviewed-by" tags
v6: From Grygorii Strashko:
- added possibility to pass DMA driver/channel's specific data per each transfer using additional parameter "metadata" in dma_send/dma_receive() API. For example, port number for network packets to be directed to the specific port on multi port ethernet controllers.
- added new dma_prepare_rcv_buf() API which allows to implement zero-copy DEV_TO_MEM transfer using DMA streaming channels which is usual case for Networking.
- added dma-uclass test
- removed unused function dma_get_by_index_platdata()
- updated comments
v5: Fix issues reported by Grygorii Strashko and other fixes:
- Fix build of ti-edma3.
- Remove unused bcm6348-iudma defines.
- Increment bcm6348-iudma rx descriptors.
- Fix bcm6348-iudma flow control issues.
- bcm6348-iudma error checking now depends on hw.
- Remove unneeded bcm6348-iudma interrupts.
- Receive as much packets as possible from bcm6348-eth and cache them in net_rx_packets. This is needed in order to fix flow control issues.
v4: Fix issues reported by Grygorii Strashko and other fixes:
- Remove usage of net_rx_packets as buffer from bcm6348-iudma.
- Allocate dynamic rx buffer on bcm6348-iudma.
- Copy received dma buffer to net_rx_packets in order to avoid possible dma overwrites.
- Check dma errors and discard invalid packets.
- Reset dma rx channel when sending a new packet to prevent flow control issues.
- Fix packet casting on bcm6348_eth_recv/send.
v3: Introduce changes reported by Simon Glass:
- Improve dma-uclass.h documentation.
- Switch to live tree API.
v2: Introduce changes reported by Vignesh:
- Respect current dma implementation.
- Let dma_memcpy find a compatible dma device.
Other changes:
- Fix bcm6348-iudma rx burst config.

Grygorii Strashko (1):
test: dma: add dma-uclass test

Álvaro Fernández Rojas (30):
dma: move dma_ops to dma-uclass.h
dma: add channels support
dma: add bcm6348-iudma support
bmips: bcm6338: add bcm6348-iudma support
bmips: bcm6348: add bcm6348-iudma support
bmips: bcm6358: add bcm6348-iudma support
bmips: bcm6368: add bcm6348-iudma support
bmips: bcm6328: add bcm6348-iudma support
bmips: bcm6362: add bcm6348-iudma support
bmips: bcm63268: add bcm6348-iudma support
bmips: bcm6318: add bcm6348-iudma support
net: add support for bcm6348-enet
bmips: bcm6338: add support for bcm6348-enet
bmips: enable f at st1704 enet support
bmips: bcm6348: add support for bcm6348-enet
bmips: enable ct-5361 enet support
bmips: bcm6358: add support for bcm6348-enet
bmips: enable hg556a enet support
bmips: enable nb4-ser enet support
net: add support for bcm6368-enet
bmips: bcm6368: add support for bcm6368-enet
bmips: enable wap-5813n enet support
bmips: bcm6328: add support for bcm6368-enet
bmips: enable ar-5387un enet support
bmips: bcm6362: add support for bcm6368-enet
bmips: enable dgnd3700v2 enet support
bmips: bcm63268: add support for bcm6368-enet
bmips: enable vr-3032u enet support
bmips: bcm6318: add support for bcm6368-enet
bmips: enable ar-5315u enet support

 arch/mips/dts/brcm,bcm6318.dtsi           |  38 ++
 arch/mips/dts/brcm,bcm63268.dtsi          |  38 ++
 arch/mips/dts/brcm,bcm6328.dtsi           |  30 ++
 arch/mips/dts/brcm,bcm6338.dtsi           |  29 ++
 arch/mips/dts/brcm,bcm6348.dtsi           |  42 +++
 arch/mips/dts/brcm,bcm6358.dtsi           |  46 +++
 arch/mips/dts/brcm,bcm6362.dtsi           |  32 ++
 arch/mips/dts/brcm,bcm6368.dtsi           |  32 ++
 arch/mips/dts/comtrend,ar-5315u.dts       |  32 ++
 arch/mips/dts/comtrend,ar-5387un.dts      |  32 ++
 arch/mips/dts/comtrend,ct-5361.dts        |  12 +
 arch/mips/dts/comtrend,vr-3032u.dts       |  32 ++
 arch/mips/dts/comtrend,wap-5813n.dts      |  14 +
 arch/mips/dts/huawei,hg556a.dts           |  12 +
 arch/mips/dts/netgear,dgnd3700v2.dts      |  14 +
 arch/mips/dts/sagem,f at st1704.dts          |  12 +
 arch/mips/dts/sfr,nb4-ser.dts             |  24 ++
 arch/sandbox/dts/test.dts                 |   8 +
 configs/comtrend_ar5315u_ram_defconfig    |   7 +-
 configs/comtrend_ar5387un_ram_defconfig   |   7 +-
 configs/comtrend_ct5361_ram_defconfig     |   8 +-
 configs/comtrend_vr3032u_ram_defconfig    |   7 +-
 configs/comtrend_wap5813n_ram_defconfig   |   8 +-
 configs/huawei_hg556a_ram_defconfig       |   8 +-
 configs/netgear_dgnd3700v2_ram_defconfig  |   8 +-
 configs/sagem_f@st1704_ram_defconfig      |   8 +-
 configs/sandbox_defconfig                 |   3 +
 configs/sfr_nb4-ser_ram_defconfig         |   8 +-
 drivers/dma/Kconfig                       |  23 ++
 drivers/dma/Makefile                      |   2 +
 drivers/dma/bcm6348-iudma.c               | 533 ++++++++++++++++++++++++++
 drivers/dma/dma-uclass.c                  | 183 ++++++++-
 drivers/dma/sandbox-dma-test.c            | 282 ++++++++++++++
 drivers/dma/ti-edma3.c                    |   2 +-
 drivers/net/Kconfig                       |  18 +
 drivers/net/Makefile                      |   2 +
 drivers/net/bcm6348-eth.c                 | 576 ++++++++++++++++++++++++++++
 drivers/net/bcm6368-eth.c                 | 604 ++++++++++++++++++++++++++++++
 include/configs/bmips_common.h            |   5 +-
 include/dma-uclass.h                      | 128 +++++++
 include/dma.h                             | 282 ++++++++++++--
 include/dt-bindings/clock/bcm6318-clock.h |  11 +
 include/dt-bindings/dma/bcm6318-dma.h     |  15 +
 include/dt-bindings/dma/bcm63268-dma.h    |  15 +
 include/dt-bindings/dma/bcm6328-dma.h     |  15 +
 include/dt-bindings/dma/bcm6338-dma.h     |  15 +
 include/dt-bindings/dma/bcm6348-dma.h     |  17 +
 include/dt-bindings/dma/bcm6358-dma.h     |  17 +
 include/dt-bindings/dma/bcm6362-dma.h     |  15 +
 include/dt-bindings/dma/bcm6368-dma.h     |  15 +
 test/dm/Makefile                          |   1 +
 test/dm/dma.c                             | 123 ++++++
 52 files changed, 3410 insertions(+), 40 deletions(-)
 create mode 100644 drivers/dma/bcm6348-iudma.c
 create mode 100644 drivers/dma/sandbox-dma-test.c
 create mode 100644 drivers/net/bcm6348-eth.c
 create mode 100644 drivers/net/bcm6368-eth.c
 create mode 100644 include/dma-uclass.h
 create mode 100644 include/dt-bindings/dma/bcm6318-dma.h
 create mode 100644 include/dt-bindings/dma/bcm63268-dma.h
 create mode 100644 include/dt-bindings/dma/bcm6328-dma.h
 create mode 100644 include/dt-bindings/dma/bcm6338-dma.h
 create mode 100644 include/dt-bindings/dma/bcm6348-dma.h
 create mode 100644 include/dt-bindings/dma/bcm6358-dma.h
 create mode 100644 include/dt-bindings/dma/bcm6362-dma.h
 create mode 100644 include/dt-bindings/dma/bcm6368-dma.h
 create mode 100644 test/dm/dma.c

Signature · 1 line

2.11.0

Álvaro Fernández Rojas

2018-11-26 18:00 UTC #9 lore raw

PATCH v8 1/31 dma: move dma_ops to dma-uclass.h

Move dma_ops to a separate header file, following other uclass implementations. While doing so, this patch also improves dma_ops documentation.

Reviewed-by Tom Rini <[email protected]>

Reviewed-by Simon Glass <[email protected]>

Signed-off-by Álvaro Fernández Rojas <[email protected]>

Signed-off-by Grygorii Strashko <[email protected]>

---
v8: no changes
v7: From Grygorii Strashko:
- copyright fixed as suggested by Tom Rini
- added "Reviewed-by" tags
v6: no changes
v5: fix build of ti-edma3 (reported by Grygorii Strashko) and remove unneeded dma.h include
v4: no changes
v3: Introduce changes reported by Simon Glass:
- Improve dma-uclass.h documentation.
- Switch to live tree API.

 drivers/dma/dma-uclass.c |  2 +-
 drivers/dma/ti-edma3.c   |  2 +-
 include/dma-uclass.h     | 39 +++++++++++++++++++++++++++++++++++++++
 include/dma.h            | 22 ----------------------
 4 files changed, 41 insertions(+), 24 deletions(-)
 create mode 100644 include/dma-uclass.h

drivers/dma/dma-uclass.c +1 -1

index a33f7d52da..6c3506c302 100644
@@ -9,10 +9,10 @@
  */
 
 #include <common.h>
-#include <dma.h>
 #include <dm.h>
 #include <dm/uclass-internal.h>
 #include <dm/device-internal.h>
+#include <dma-uclass.h>
 #include <errno.h>
 
 int dma_get_device(u32 transfer_type, struct udevice **devp)

drivers/dma/ti-edma3.c +1 -1

index 2131e10a40..7e11b13e45 100644
@@ -11,7 +11,7 @@
 #include <asm/io.h>
 #include <common.h>
 #include <dm.h>
-#include <dma.h>
+#include <dma-uclass.h>
 #include <asm/omap_common.h>
 #include <asm/ti-common/ti-edma3.h>

include/dma-uclass.h new file +39 -0

new file mode 100644
index 0000000000..7bec5d3399
@@ -0,0 +1,39 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+/*
+ * Copyright (C) 2018 Álvaro Fernández Rojas <[email protected]>
+ * Copyright (C) 2015 Texas Instruments Incorporated <www.ti.com>
+ * Written by Mugunthan V N <[email protected]>
+ *
+ */
+
+#ifndef _DMA_UCLASS_H
+#define _DMA_UCLASS_H
+
+/* See dma.h for background documentation. */
+
+#include <dma.h>
+
+/*
+ * struct dma_ops - Driver model DMA operations
+ *
+ * The uclass interface is implemented by all DMA devices which use
+ * driver model.
+ */
+struct dma_ops {
+	/**
+	 * transfer() - Issue a DMA transfer. The implementation must
+	 *   wait until the transfer is done.
+	 *
+	 * @dev: The DMA device
+	 * @direction: direction of data transfer (should be one from
+	 *   enum dma_direction)
+	 * @dst: The destination pointer.
+	 * @src: The source pointer.
+	 * @len: Length of the data to be copied (number of bytes).
+	 * @return zero on success, or -ve error code.
+	 */
+	int (*transfer)(struct udevice *dev, int direction, void *dst,
+			void *src, size_t len);
+};
+
+#endif /* _DMA_UCLASS_H */

include/dma.h +0 ~~-22~~

index 50e965241c..97fa0cf695 100644
@@ -27,28 +27,6 @@ enum dma_direction {
 #define DMA_SUPPORTS_DEV_TO_DEV	BIT(3)
 
 /*
- * struct dma_ops - Driver model DMA operations
- *
- * The uclass interface is implemented by all DMA devices which use
- * driver model.
- */
-struct dma_ops {
-	/*
-	 * Get the current timer count
-	 *
-	 * @dev: The DMA device
-	 * @direction: direction of data transfer should be one from
-		       enum dma_direction
-	 * @dst: Destination pointer
-	 * @src: Source pointer
-	 * @len: Length of the data to be copied.
-	 * @return: 0 if OK, -ve on error
-	 */
-	int (*transfer)(struct udevice *dev, int direction, void *dst,
-			void *src, size_t len);
-};
-
-/*
  * struct dma_dev_priv - information about a device used by the uclass
  *
  * @supported: mode of transfers that DMA can support, should be

Signature · 1 line

2.11.0

Álvaro Fernández Rojas

2018-11-26 18:00 UTC #10 lore raw

PATCH v8 2/31 dma: add channels support

In reply to Álvaro Fernández Rojas

This adds channels support for dma controllers that have multiple channels which can transfer data to/from different devices (enet, usb...).

DMA channle API:
dma_get_by_index()
dma_get_by_name()
dma_request()
dma_free()
dma_enable()
dma_disable()
dma_prepare_rcv_buf()
dma_receive()
dma_send()

Reviewed-by Tom Rini <[email protected]>

Signed-off-by Álvaro Fernández Rojas <[email protected]>

[grygorii.strashko at ti.com: drop unused dma_get_by_index_platdata(),
add metadata to send/receive ops, add dma_prepare_rcv_buf(), minor clean up]

Signed-off-by Grygorii Strashko <[email protected]>

Reviewed-by Simon Glass <[email protected]>

---
v8: no changes
v7: From Grygorii Strashko:
- copyright fixed as suggested by Tom Rini
- added "Reviewed-by" tags
v6: From Grygorii Strashko:
- added possibility to pass DMA driver/channel's specific data per each transfer using additional parameter "metadata" in dma_send/dma_receive() API. For example, port number for network packets to be directed to the specific port on multi port ethernet controllers.
- added new dma_prepare_rcv_buf() API which allows to implement zero-copy DEV_TO_MEM transfer using DMA streaming channels which is usual case for Networking.
- removed unused function dma_get_by_index_platdata()
- updated comments
v5: remove unneeded dma.h include
v4: no changes
v3: Introduce changes reported by Simon Glass:
- Improve dma-uclass.h documentation.
- Switch to live tree API.

 drivers/dma/Kconfig      |   7 ++
 drivers/dma/dma-uclass.c | 181 ++++++++++++++++++++++++++++++++-
 include/dma-uclass.h     |  91 ++++++++++++++++-
 include/dma.h            | 260 ++++++++++++++++++++++++++++++++++++++++++++++-
 4 files changed, 532 insertions(+), 7 deletions(-)

drivers/dma/Kconfig +7 -0

index 4ee6afad35..b9b85c65fc 100644
@@ -12,6 +12,13 @@ config DMA
 	  buses that is used to transfer data to and from memory.
 	  The uclass interface is defined in include/dma.h.
 
+config DMA_CHANNELS
+	bool "Enable DMA channels support"
+	depends on DMA
+	help
+	  Enable channels support for DMA. Some DMA controllers have multiple
+	  channels which can either transfer data to/from different devices.
+
 config TI_EDMA3
 	bool "TI EDMA3 driver"
 	help

drivers/dma/dma-uclass.c +177 -4

196 lines not on this page · raw message

include/dma-uclass.h +90 -1

109 lines not on this page · raw message

include/dma.h +258 -2

276 lines not on this page · raw message

Signature · 1 line

2.11.0

Álvaro Fernández Rojas

2018-11-26 18:00 UTC #11 lore raw

PATCH v8 3/31 test: dma: add dma-uclass test

In reply to Álvaro Fernández Rojas

From: Grygorii Strashko <[email protected]>

Add a sandbox DMA driver implementation (provider) and corresponding DM test.

Reviewed-by Tom Rini <[email protected]>

Signed-off-by Grygorii Strashko <[email protected]>

Reviewed-by Simon Glass <[email protected]>

Acked-by Álvaro Fernández Rojas <[email protected]>

---
v8: sync with latest u-boot
v7: From Grygorii Strashko:
- no changes
v6: From Grygorii Strashko:
- added dma-uclass test

 arch/sandbox/dts/test.dts      |   8 ++
 configs/sandbox_defconfig      |   3 +
 drivers/dma/Kconfig            |   7 +
 drivers/dma/Makefile           |   1 +
 drivers/dma/sandbox-dma-test.c | 282 +++++++++++++++++++++++++++++++++++++++++
 test/dm/Makefile               |   1 +
 test/dm/dma.c                  | 123 ++++++++++++++++++
 7 files changed, 425 insertions(+)
 create mode 100644 drivers/dma/sandbox-dma-test.c
 create mode 100644 test/dm/dma.c

arch/sandbox/dts/test.dts +8 -0

index 2c6b422312..e5932d5a34 100644
@@ -731,6 +731,14 @@
 	pinctrl {
 		compatible = "sandbox,pinctrl";
 	};
+
+	dma: dma {
+		compatible = "sandbox,dma";
+		#dma-cells = <1>;
+
+		dmas = <&dma 0>, <&dma 1>, <&dma 2>;
+		dma-names = "m2m", "tx0", "rx0";
+	};
 };
 
 #include "sandbox_pmic.dtsi"

configs/sandbox_defconfig +3 -0

index 5a744f4791..0e5e6f687e 100644
@@ -215,3 +215,6 @@ CONFIG_UT_TIME=y
 CONFIG_UT_DM=y
 CONFIG_UT_ENV=y
 CONFIG_UT_OVERLAY=y
+CONFIG_DMA=y
+CONFIG_DMA_CHANNELS=y
+CONFIG_SANDBOX_DMA=y

drivers/dma/Kconfig +7 -0

index b9b85c65fc..8a4162eccd 100644
@@ -19,6 +19,13 @@ config DMA_CHANNELS
 	  Enable channels support for DMA. Some DMA controllers have multiple
 	  channels which can either transfer data to/from different devices.
 
+config SANDBOX_DMA
+	bool "Enable the sandbox DMA test driver"
+	depends on DMA && DMA_CHANNELS && SANDBOX
+	help
+	  Enable support for a test DMA uclass implementation. It stimulates
+	  DMA transfer by simple copying data between channels.
+
 config TI_EDMA3
 	bool "TI EDMA3 driver"
 	help

drivers/dma/Makefile +1 -0

index 4eaef8ac65..aff31f986a 100644
@@ -8,6 +8,7 @@ obj-$(CONFIG_DMA) += dma-uclass.o
 obj-$(CONFIG_FSLDMAFEC) += MCD_tasksInit.o MCD_dmaApi.o MCD_tasks.o
 obj-$(CONFIG_APBH_DMA) += apbh_dma.o
 obj-$(CONFIG_FSL_DMA) += fsl_dma.o
+obj-$(CONFIG_SANDBOX_DMA) += sandbox-dma-test.o
 obj-$(CONFIG_TI_KSNAV) += keystone_nav.o keystone_nav_cfg.o
 obj-$(CONFIG_TI_EDMA3) += ti-edma3.o
 obj-$(CONFIG_DMA_LPC32XX) += lpc32xx_dma.o

drivers/dma/sandbox-dma-test.c new file +282 -0

282 lines not on this page · raw message

test/dm/Makefile +1 -0

index 213e0fda94..757dd0c45b 100644
@@ -54,4 +54,5 @@ obj-$(CONFIG_DM_SERIAL) += serial.o
 obj-$(CONFIG_CPU) += cpu.o
 obj-$(CONFIG_TEE) += tee.o
 obj-$(CONFIG_VIRTIO_SANDBOX) += virtio.o
+obj-$(CONFIG_DMA) += dma.o
 endif

test/dm/dma.c new file +123 -0

123 lines not on this page · raw message

Signature · 1 line

2.11.0

Álvaro Fernández Rojas

2018-11-26 18:00 UTC #12 lore raw

PATCH v8 4/31 dma: add bcm6348-iudma support

In reply to Álvaro Fernández Rojas

BCM6348 IUDMA controller is present on multiple BMIPS (BCM63xx) SoCs.

Signed-off-by Álvaro Fernández Rojas <[email protected]>

---
v8: Introduce changes from Grygorii Strashko
v5: Several fixes and improvements:
- Remove unused defines.
- Increment rx descriptors.
- Fix flow control issues.
- Error checking now depends on hw.
- Remove unneeded interrupts.
v4: Fix issues reported by Grygorii Strashko and other fixes:
- Remove usage of net_rx_packets as buffer.
- Allocate dynamic rx buffer.
- Check dma errors and discard invalid packets.
v3: no changes
v2: Fix dma rx burst config and select DMA_CHANNELS.

 drivers/dma/Kconfig         |   9 +
 drivers/dma/Makefile        |   1 +
 drivers/dma/bcm6348-iudma.c | 533 ++++++++++++++++++++++++++++++++++++++++++++
 3 files changed, 543 insertions(+)
 create mode 100644 drivers/dma/bcm6348-iudma.c

drivers/dma/Kconfig +9 -0

index 8a4162eccd..1820676d7a 100644
@@ -26,6 +26,15 @@ config SANDBOX_DMA
 	  Enable support for a test DMA uclass implementation. It stimulates
 	  DMA transfer by simple copying data between channels.
 
+config BCM6348_IUDMA
+	bool "BCM6348 IUDMA driver"
+	depends on ARCH_BMIPS
+	select DMA_CHANNELS
+	help
+	  Enable the BCM6348 IUDMA driver.
+	  This driver support data transfer from devices to
+	  memory and from memory to devices.
+
 config TI_EDMA3
 	bool "TI EDMA3 driver"
 	help

drivers/dma/Makefile +1 -0

index aff31f986a..b5f9147e0a 100644
@@ -7,6 +7,7 @@ obj-$(CONFIG_DMA) += dma-uclass.o
 
 obj-$(CONFIG_FSLDMAFEC) += MCD_tasksInit.o MCD_dmaApi.o MCD_tasks.o
 obj-$(CONFIG_APBH_DMA) += apbh_dma.o
+obj-$(CONFIG_BCM6348_IUDMA) += bcm6348-iudma.o
 obj-$(CONFIG_FSL_DMA) += fsl_dma.o
 obj-$(CONFIG_SANDBOX_DMA) += sandbox-dma-test.o
 obj-$(CONFIG_TI_KSNAV) += keystone_nav.o keystone_nav_cfg.o

drivers/dma/bcm6348-iudma.c new file +533 -0

533 lines not on this page · raw message

Signature · 1 line

2.11.0

Álvaro Fernández Rojas

2018-11-26 18:00 UTC #13 lore raw

PATCH v8 5/31 bmips: bcm6338: add bcm6348-iudma support

In reply to Álvaro Fernández Rojas

Signed-off-by Álvaro Fernández Rojas <[email protected]>

---
v8: no changes
v5: no changes
v4: no changes
v3: no changes
v2: no changes

 arch/mips/dts/brcm,bcm6338.dtsi       | 14 ++++++++++++++
 include/dt-bindings/dma/bcm6338-dma.h | 15 +++++++++++++++
 2 files changed, 29 insertions(+)
 create mode 100644 include/dt-bindings/dma/bcm6338-dma.h

arch/mips/dts/brcm,bcm6338.dtsi +14 -0

index bbd58cf803..990355481c 100644
@@ -4,6 +4,7 @@
  */
 
 #include <dt-bindings/clock/bcm6338-clock.h>
+#include <dt-bindings/dma/bcm6338-dma.h>
 #include <dt-bindings/gpio/gpio.h>
 #include <dt-bindings/reset/bcm6338-reset.h>
 #include "skeleton.dtsi"

@@ -130,5 +131,18 @@
 			reg = <0xfffe3100 0x38>;
 			u-boot,dm-pre-reloc;
 		};
+
+		iudma: dma-controller at fffe2400 {
+			compatible = "brcm,bcm6348-iudma";
+			reg = <0xfffe2400 0x1c>,
+			      <0xfffe2500 0x60>,
+			      <0xfffe2600 0x60>;
+			reg-names = "dma",
+				    "dma-channels",
+				    "dma-sram";
+			#dma-cells = <1>;
+			dma-channels = <6>;
+			resets = <&periph_rst BCM6338_RST_DMAMEM>;
+		};
 	};
 };

include/dt-bindings/dma/bcm6338-dma.h new file +15 -0

new file mode 100644
index 0000000000..5dd66239b4
@@ -0,0 +1,15 @@
+/*
+ * Copyright (C) 2018 Álvaro Fernández Rojas <[email protected]>
+ *
+ * Derived from linux/drivers/net/ethernet/broadcom/bcm63xx_enet.c
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#ifndef __DT_BINDINGS_DMA_BCM6338_H
+#define __DT_BINDINGS_DMA_BCM6338_H
+
+#define BCM6338_DMA_ENET_RX	0
+#define BCM6338_DMA_ENET_TX	1
+
+#endif /* __DT_BINDINGS_DMA_BCM6338_H */

Signature · 1 line

2.11.0

Álvaro Fernández Rojas

2018-11-26 18:00 UTC #14 lore raw

PATCH v8 6/31 bmips: bcm6348: add bcm6348-iudma support

In reply to Álvaro Fernández Rojas

Signed-off-by Álvaro Fernández Rojas <[email protected]>

---
v8: no changes
v5: no changes
v4: no changes
v3: no changes
v2: no changes

 arch/mips/dts/brcm,bcm6348.dtsi       | 16 ++++++++++++++++
 include/dt-bindings/dma/bcm6348-dma.h | 17 +++++++++++++++++
 2 files changed, 33 insertions(+)
 create mode 100644 include/dt-bindings/dma/bcm6348-dma.h

arch/mips/dts/brcm,bcm6348.dtsi +16 -0

index cc80bbc808..875de232ca 100644
@@ -4,6 +4,7 @@
  */
 
 #include <dt-bindings/clock/bcm6348-clock.h>
+#include <dt-bindings/dma/bcm6348-dma.h>
 #include <dt-bindings/gpio/gpio.h>
 #include <dt-bindings/reset/bcm6348-reset.h>
 #include "skeleton.dtsi"

@@ -159,5 +160,20 @@
 			reg = <0xfffe2300 0x38>;
 			u-boot,dm-pre-reloc;
 		};
+
+		iudma: dma-controller at fffe7000 {
+			compatible = "brcm,bcm6348-iudma";
+			reg = <0xfffe7000 0x1c>,
+			      <0xfffe7100 0x40>,
+			      <0xfffe7200 0x40>;
+			reg-names = "dma",
+				    "dma-channels",
+				    "dma-sram";
+			#dma-cells = <1>;
+			dma-channels = <4>;
+			clocks = <&periph_clk BCM6348_CLK_ENET>;
+			resets = <&periph_rst BCM6348_RST_ENET>,
+				 <&periph_rst BCM6348_RST_DMAMEM>;
+		};
 	};
 };

include/dt-bindings/dma/bcm6348-dma.h new file +17 -0

new file mode 100644
index 0000000000..a1d3a6456d
@@ -0,0 +1,17 @@
+/*
+ * Copyright (C) 2018 Álvaro Fernández Rojas <[email protected]>
+ *
+ * Derived from linux/drivers/net/ethernet/broadcom/bcm63xx_enet.c
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#ifndef __DT_BINDINGS_DMA_BCM6348_H
+#define __DT_BINDINGS_DMA_BCM6348_H
+
+#define BCM6348_DMA_ENET0_RX	0
+#define BCM6348_DMA_ENET0_TX	1
+#define BCM6348_DMA_ENET1_RX	2
+#define BCM6348_DMA_ENET1_TX	3
+
+#endif /* __DT_BINDINGS_DMA_BCM6348_H */

Signature · 1 line

2.11.0

Álvaro Fernández Rojas

2018-11-26 18:00 UTC #15 lore raw

PATCH v8 7/31 bmips: bcm6358: add bcm6348-iudma support

In reply to Álvaro Fernández Rojas

Signed-off-by Álvaro Fernández Rojas <[email protected]>

---
v8: no changes
v5: no changes
v4: no changes
v3: no changes
v2: no changes

 arch/mips/dts/brcm,bcm6358.dtsi       | 18 ++++++++++++++++++
 include/dt-bindings/dma/bcm6358-dma.h | 17 +++++++++++++++++
 2 files changed, 35 insertions(+)
 create mode 100644 include/dt-bindings/dma/bcm6358-dma.h

arch/mips/dts/brcm,bcm6358.dtsi +18 -0

index 0617b46e92..5605723e83 100644
@@ -4,6 +4,7 @@
  */
 
 #include <dt-bindings/clock/bcm6358-clock.h>
+#include <dt-bindings/dma/bcm6358-dma.h>
 #include <dt-bindings/gpio/gpio.h>
 #include <dt-bindings/reset/bcm6358-reset.h>
 #include "skeleton.dtsi"

@@ -190,5 +191,22 @@
 
 			status = "disabled";
 		};
+
+		iudma: dma-controller at fffe5000 {
+			compatible = "brcm,bcm6348-iudma";
+			reg = <0xfffe5000 0x24>,
+			      <0xfffe5100 0x80>,
+			      <0xfffe5200 0x80>;
+			reg-names = "dma",
+				    "dma-channels",
+				    "dma-sram";
+			#dma-cells = <1>;
+			dma-channels = <8>;
+			clocks = <&periph_clk BCM6358_CLK_EMUSB>,
+				 <&periph_clk BCM6358_CLK_USBSU>,
+				 <&periph_clk BCM6358_CLK_EPHY>;
+			resets = <&periph_rst BCM6358_RST_ENET>,
+				 <&periph_rst BCM6358_RST_EPHY>;
+		};
 	};
 };

include/dt-bindings/dma/bcm6358-dma.h new file +17 -0

new file mode 100644
index 0000000000..3b1fcf8540
@@ -0,0 +1,17 @@
+/*
+ * Copyright (C) 2018 Álvaro Fernández Rojas <[email protected]>
+ *
+ * Derived from linux/drivers/net/ethernet/broadcom/bcm63xx_enet.c
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#ifndef __DT_BINDINGS_DMA_BCM6358_H
+#define __DT_BINDINGS_DMA_BCM6358_H
+
+#define BCM6358_DMA_ENET0_RX	0
+#define BCM6358_DMA_ENET0_TX	1
+#define BCM6358_DMA_ENET1_RX	2
+#define BCM6358_DMA_ENET1_TX	3
+
+#endif /* __DT_BINDINGS_DMA_BCM6358_H */

Signature · 1 line

2.11.0

Álvaro Fernández Rojas

2018-11-26 18:00 UTC #16 lore raw

PATCH v8 8/31 bmips: bcm6368: add bcm6348-iudma support

In reply to Álvaro Fernández Rojas

Signed-off-by Álvaro Fernández Rojas <[email protected]>

---
v8: introduce bcm6368-enet driver

 arch/mips/dts/brcm,bcm6368.dtsi       | 13 +++++++++++++
 include/dt-bindings/dma/bcm6368-dma.h | 15 +++++++++++++++
 2 files changed, 28 insertions(+)
 create mode 100644 include/dt-bindings/dma/bcm6368-dma.h

arch/mips/dts/brcm,bcm6368.dtsi +13 -0

index 65d769ab4f..30047f6360 100644
@@ -4,6 +4,7 @@
  */
 
 #include <dt-bindings/clock/bcm6368-clock.h>
+#include <dt-bindings/dma/bcm6368-dma.h>
 #include <dt-bindings/gpio/gpio.h>
 #include <dt-bindings/reset/bcm6368-reset.h>
 #include "skeleton.dtsi"

@@ -192,5 +193,17 @@
 
 			status = "disabled";
 		};
+
+		iudma: dma-controller at 10006800 {
+			compatible = "brcm,bcm6368-iudma";
+			reg = <0x10006800 0x80>,
+			      <0x10006a00 0x80>,
+			      <0x10006c00 0x80>;
+			reg-names = "dma",
+				    "dma-channels",
+				    "dma-sram";
+			#dma-cells = <1>;
+			dma-channels = <8>;
+		};
 	};
 };

include/dt-bindings/dma/bcm6368-dma.h new file +15 -0

new file mode 100644
index 0000000000..45ffb89e0a
@@ -0,0 +1,15 @@
+/*
+ * Copyright (C) 2018 Álvaro Fernández Rojas <[email protected]>
+ *
+ * Derived from linux/drivers/net/ethernet/broadcom/bcm63xx_enet.c
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#ifndef __DT_BINDINGS_DMA_BCM6368_H
+#define __DT_BINDINGS_DMA_BCM6368_H
+
+#define BCM6368_DMA_ENETSW_RX	0
+#define BCM6368_DMA_ENETSW_TX	1
+
+#endif /* __DT_BINDINGS_DMA_BCM6368_H */

Signature · 1 line

2.11.0

Álvaro Fernández Rojas

2018-11-26 18:00 UTC #17 lore raw

PATCH v8 9/31 bmips: bcm6328: add bcm6348-iudma support

In reply to Álvaro Fernández Rojas

Signed-off-by Álvaro Fernández Rojas <[email protected]>

---
v8: introduce bcm6368-enet driver

 arch/mips/dts/brcm,bcm6328.dtsi       | 13 +++++++++++++
 include/dt-bindings/dma/bcm6328-dma.h | 15 +++++++++++++++
 2 files changed, 28 insertions(+)
 create mode 100644 include/dt-bindings/dma/bcm6328-dma.h

arch/mips/dts/brcm,bcm6328.dtsi +13 -0

index e00a2950e2..6fa49e22bb 100644
@@ -4,6 +4,7 @@
  */
 
 #include <dt-bindings/clock/bcm6328-clock.h>
+#include <dt-bindings/dma/bcm6328-dma.h>
 #include <dt-bindings/gpio/gpio.h>
 #include <dt-bindings/power-domain/bcm6328-power-domain.h>
 #include <dt-bindings/reset/bcm6328-reset.h>

@@ -187,5 +188,17 @@
 			reg = <0x10003000 0x864>;
 			u-boot,dm-pre-reloc;
 		};
+
+		iudma: dma-controller at 1000d800 {
+			compatible = "brcm,bcm6368-iudma";
+			reg = <0x1000d800 0x80>,
+			      <0x1000da00 0x80>,
+			      <0x1000dc00 0x80>;
+			reg-names = "dma",
+				    "dma-channels",
+				    "dma-sram";
+			#dma-cells = <1>;
+			dma-channels = <8>;
+		};
 	};
 };

include/dt-bindings/dma/bcm6328-dma.h new file +15 -0

new file mode 100644
index 0000000000..508a5dc523
@@ -0,0 +1,15 @@
+/*
+ * Copyright (C) 2018 Álvaro Fernández Rojas <[email protected]>
+ *
+ * Derived from linux/drivers/net/ethernet/broadcom/bcm63xx_enet.c
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#ifndef __DT_BINDINGS_DMA_BCM6328_H
+#define __DT_BINDINGS_DMA_BCM6328_H
+
+#define BCM6328_DMA_ENETSW_RX	0
+#define BCM6328_DMA_ENETSW_TX	1
+
+#endif /* __DT_BINDINGS_DMA_BCM6328_H */

Signature · 1 line

2.11.0

Álvaro Fernández Rojas

2018-11-26 18:00 UTC #18 lore raw

PATCH v8 10/31 bmips: bcm6362: add bcm6348-iudma support

In reply to Álvaro Fernández Rojas

Signed-off-by Álvaro Fernández Rojas <[email protected]>

---
v8: introduce bcm6368-enet driver

 arch/mips/dts/brcm,bcm6362.dtsi       | 13 +++++++++++++
 include/dt-bindings/dma/bcm6362-dma.h | 15 +++++++++++++++
 2 files changed, 28 insertions(+)
 create mode 100644 include/dt-bindings/dma/bcm6362-dma.h

arch/mips/dts/brcm,bcm6362.dtsi +13 -0

index 3047b82b21..94e7de096d 100644
@@ -4,6 +4,7 @@
  */
 
 #include <dt-bindings/clock/bcm6362-clock.h>
+#include <dt-bindings/dma/bcm6362-dma.h>
 #include <dt-bindings/gpio/gpio.h>
 #include <dt-bindings/power-domain/bcm6362-power-domain.h>
 #include <dt-bindings/reset/bcm6362-reset.h>

@@ -211,5 +212,17 @@
 			reg = <0x10003000 0x864>;
 			u-boot,dm-pre-reloc;
 		};
+
+		iudma: dma-controller at 1000d800 {
+			compatible = "brcm,bcm6368-iudma";
+			reg = <0x1000d800 0x80>,
+			      <0x1000da00 0x80>,
+			      <0x1000dc00 0x80>;
+			reg-names = "dma",
+				    "dma-channels",
+				    "dma-sram";
+			#dma-cells = <1>;
+			dma-channels = <8>;
+		};
 	};
 };

include/dt-bindings/dma/bcm6362-dma.h new file +15 -0

new file mode 100644
index 0000000000..b90b3ffeb6
@@ -0,0 +1,15 @@
+/*
+ * Copyright (C) 2018 Álvaro Fernández Rojas <[email protected]>
+ *
+ * Derived from linux/drivers/net/ethernet/broadcom/bcm63xx_enet.c
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#ifndef __DT_BINDINGS_DMA_BCM6362_H
+#define __DT_BINDINGS_DMA_BCM6362_H
+
+#define BCM6362_DMA_ENETSW_RX	0
+#define BCM6362_DMA_ENETSW_TX	1
+
+#endif /* __DT_BINDINGS_DMA_BCM6362_H */

Signature · 1 line

2.11.0

Álvaro Fernández Rojas

2018-11-26 18:00 UTC #19 lore raw

PATCH v8 11/31 bmips: bcm63268: add bcm6348-iudma support

In reply to Álvaro Fernández Rojas

Signed-off-by Álvaro Fernández Rojas <[email protected]>

---
v8: introduce bcm6368-enet driver

 arch/mips/dts/brcm,bcm63268.dtsi       | 13 +++++++++++++
 include/dt-bindings/dma/bcm63268-dma.h | 15 +++++++++++++++
 2 files changed, 28 insertions(+)
 create mode 100644 include/dt-bindings/dma/bcm63268-dma.h

arch/mips/dts/brcm,bcm63268.dtsi +13 -0

index 62c440e675..c7ad83c306 100644
@@ -4,6 +4,7 @@
  */
 
 #include <dt-bindings/clock/bcm63268-clock.h>
+#include <dt-bindings/dma/bcm63268-dma.h>
 #include <dt-bindings/gpio/gpio.h>
 #include <dt-bindings/power-domain/bcm63268-power-domain.h>
 #include <dt-bindings/reset/bcm63268-reset.h>

@@ -217,5 +218,17 @@
 			reg = <0x10003000 0x894>;
 			u-boot,dm-pre-reloc;
 		};
+
+		iudma: dma-controller at 1000d800 {
+			compatible = "brcm,bcm6368-iudma";
+			reg = <0x1000d800 0x80>,
+			      <0x1000da00 0x80>,
+			      <0x1000dc00 0x80>;
+			reg-names = "dma",
+				    "dma-channels",
+				    "dma-sram";
+			#dma-cells = <1>;
+			dma-channels = <8>;
+		};
 	};
 };

include/dt-bindings/dma/bcm63268-dma.h new file +15 -0

new file mode 100644
index 0000000000..d5d7453be1
@@ -0,0 +1,15 @@
+/*
+ * Copyright (C) 2018 Álvaro Fernández Rojas <[email protected]>
+ *
+ * Derived from linux/drivers/net/ethernet/broadcom/bcm63xx_enet.c
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#ifndef __DT_BINDINGS_DMA_BCM63268_H
+#define __DT_BINDINGS_DMA_BCM63268_H
+
+#define BCM63268_DMA_ENETSW_RX	0
+#define BCM63268_DMA_ENETSW_TX	1
+
+#endif /* __DT_BINDINGS_DMA_BCM63268_H */

Signature · 1 line

2.11.0

Álvaro Fernández Rojas

2018-11-26 18:00 UTC #20 lore raw

PATCH v8 12/31 bmips: bcm6318: add bcm6348-iudma support

In reply to Álvaro Fernández Rojas

Signed-off-by Álvaro Fernández Rojas <[email protected]>

---
v8: introduce bcm6368-enet driver

 arch/mips/dts/brcm,bcm6318.dtsi       | 19 +++++++++++++++++++
 include/dt-bindings/dma/bcm6318-dma.h | 15 +++++++++++++++
 2 files changed, 34 insertions(+)
 create mode 100644 include/dt-bindings/dma/bcm6318-dma.h

arch/mips/dts/brcm,bcm6318.dtsi +19 -0

index f75988be12..d04b7cbb01 100644
@@ -4,6 +4,7 @@
  */
 
 #include <dt-bindings/clock/bcm6318-clock.h>
+#include <dt-bindings/dma/bcm6318-dma.h>
 #include <dt-bindings/gpio/gpio.h>
 #include <dt-bindings/power-domain/bcm6318-power-domain.h>
 #include <dt-bindings/reset/bcm6318-reset.h>

@@ -54,6 +55,12 @@
 			reg = <0x10000004 0x4>;
 			#clock-cells = <1>;
 		};
+
+		ubus_clk: ubus-clk {
+			compatible = "brcm,bcm6345-clk";
+			reg = <0x10000008 0x4>;
+			#clock-cells = <1>;
+		};
 	};
 
 	ubus {

@@ -182,5 +189,17 @@
 
 			status = "disabled";
 		};
+
+		iudma: dma-controller at 10088000 {
+			compatible = "brcm,bcm6368-iudma";
+			reg = <0x10088000 0x80>,
+			      <0x10088200 0x80>,
+			      <0x10088400 0x80>;
+			reg-names = "dma",
+				    "dma-channels",
+				    "dma-sram";
+			#dma-cells = <1>;
+			dma-channels = <8>;
+		};
 	};
 };

include/dt-bindings/dma/bcm6318-dma.h new file +15 -0

new file mode 100644
index 0000000000..c039391395
@@ -0,0 +1,15 @@
+/*
+ * Copyright (C) 2018 Álvaro Fernández Rojas <[email protected]>
+ *
+ * Derived from linux/drivers/net/ethernet/broadcom/bcm63xx_enet.c
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#ifndef __DT_BINDINGS_DMA_BCM6318_H
+#define __DT_BINDINGS_DMA_BCM6318_H
+
+#define BCM6318_DMA_ENETSW_RX	0
+#define BCM6318_DMA_ENETSW_TX	1
+
+#endif /* __DT_BINDINGS_DMA_BCM6318_H */

Signature · 1 line

2.11.0

Álvaro Fernández Rojas

2018-11-26 18:00 UTC #21 lore raw

PATCH v8 13/31 net: add support for bcm6348-enet

In reply to Álvaro Fernández Rojas

Signed-off-by Álvaro Fernández Rojas <[email protected]>

---
v8: Introduce changes from Grygorii Strashko
v5: Receive as much packets as possible from bcm6348-eth and cache them in net_rx_packets. This is needed in order to fix flow control issues.
v4: Fix issues reported by Grygorii Strashko and other fixes:
- Copy received dma buffer to net_rx_packets in order to avoid possible dma overwrites.
- Reset dma rx channel when sending a new packet to prevent flow control issues.
- Fix packet casting on bcm6348_eth_recv/send.
v3: no changes
v2: select DMA_CHANNELS.

 drivers/net/Kconfig            |  10 +
 drivers/net/Makefile           |   1 +
 drivers/net/bcm6348-eth.c      | 576 +++++++++++++++++++++++++++++++++++++++++
 include/configs/bmips_common.h |   5 +-
 4 files changed, 591 insertions(+), 1 deletion(-)
 create mode 100644 drivers/net/bcm6348-eth.c

drivers/net/Kconfig +10 -0

index 8fb365fc5d..2b7cec8804 100644
@@ -72,6 +72,16 @@ config BCM_SF2_ETH_GMAC
 	  by the BCM_SF2_ETH driver.
 	  Say Y to any bcmcygnus based platforms.
 
+config BCM6348_ETH
+	bool "BCM6348 EMAC support"
+	depends on DM_ETH && ARCH_BMIPS
+	select DMA
+	select DMA_CHANNELS
+	select MII
+	select PHYLIB
+	help
+	  This driver supports the BCM6348 Ethernet MAC.
+
 config DWC_ETH_QOS
 	bool "Synopsys DWC Ethernet QOS device support"
 	depends on DM_ETH

drivers/net/Makefile +1 -0

index 99056aa041..2647d4dd23 100644
@@ -6,6 +6,7 @@
 obj-$(CONFIG_ALTERA_TSE) += altera_tse.o
 obj-$(CONFIG_AG7XXX) += ag7xxx.o
 obj-$(CONFIG_ARMADA100_FEC) += armada100_fec.o
+obj-$(CONFIG_BCM6348_ETH) += bcm6348-eth.o
 obj-$(CONFIG_DRIVER_AT91EMAC) += at91_emac.o
 obj-$(CONFIG_DRIVER_AX88180) += ax88180.o
 obj-$(CONFIG_BCM_SF2_ETH) += bcm-sf2-eth.o

drivers/net/bcm6348-eth.c new file +576 -0

576 lines not on this page · raw message

include/configs/bmips_common.h +4 -1

index 39ca2e0bf3..65aa9c77cc 100644
@@ -6,6 +6,9 @@
 #ifndef __CONFIG_BMIPS_COMMON_H
 #define __CONFIG_BMIPS_COMMON_H
 
+/* ETH */
+#define CONFIG_PHY_RESET_DELAY		20
+
 /* UART */
 #define CONFIG_SYS_BAUDRATE_TABLE	{ 9600, 19200, 38400, 57600, 115200, \
 					  230400, 500000, 1500000 }

@@ -16,7 +19,7 @@
 
 /* Memory usage */
 #define CONFIG_SYS_MAXARGS		24
-#define CONFIG_SYS_MALLOC_LEN		(1024 * 1024)
+#define CONFIG_SYS_MALLOC_LEN		(2 * 1024 * 1024)
 #define CONFIG_SYS_BOOTPARAMS_LEN	(128 * 1024)
 #define CONFIG_SYS_CBSIZE		512

Signature · 1 line

2.11.0

Álvaro Fernández Rojas

2018-11-26 18:00 UTC #22 lore raw

PATCH v8 14/31 bmips: bcm6338: add support for bcm6348-enet

In reply to Álvaro Fernández Rojas

Signed-off-by Álvaro Fernández Rojas <[email protected]>

---
v8: no changes
v5: no changes
v4: no changes
v3: no changes
v2: no changes

 arch/mips/dts/brcm,bcm6338.dtsi | 15 +++++++++++++++
 1 file changed, 15 insertions(+)

arch/mips/dts/brcm,bcm6338.dtsi +15 -0

index 990355481c..c547e949dd 100644
@@ -144,5 +144,20 @@
 			dma-channels = <6>;
 			resets = <&periph_rst BCM6338_RST_DMAMEM>;
 		};
+
+		enet: ethernet at fffe2800 {
+			compatible = "brcm,bcm6348-enet";
+			#address-cells = <1>;
+			#size-cells = <0>;
+			reg = <0xfffe2800 0x2dc>;
+			clocks = <&periph_clk BCM6338_CLK_ENET>;
+			resets = <&periph_rst BCM6338_RST_ENET>;
+			dmas = <&iudma BCM6338_DMA_ENET_RX>,
+			       <&iudma BCM6338_DMA_ENET_TX>;
+			dma-names = "rx",
+				    "tx";
+
+			status = "disabled";
+		};
 	};
 };

Signature · 1 line

2.11.0

Álvaro Fernández Rojas

2018-11-26 18:00 UTC #23 lore raw

PATCH v8 15/31 bmips: enable f@st1704 enet support

In reply to Álvaro Fernández Rojas

Signed-off-by Álvaro Fernández Rojas <[email protected]>

---
v8: no changes
v5: no changes
v4: no changes
v3: no changes
v2: no changes

 arch/mips/dts/sagem,f at st1704.dts     | 12 ++++++++++++
 configs/sagem_f at st1704_ram_defconfig |  8 +++++++-
 2 files changed, 19 insertions(+), 1 deletion(-)

arch/mips/dts/sagem,f at st1704.dts +12 -0

index 5300f8b6df..ec6846dd9f 100644
@@ -39,6 +39,18 @@
 	};
 };
 
+&enet {
+	status = "okay";
+	phy = <&enetphy>;
+	phy-mode = "mii";
+
+	enetphy: fixed-link {
+		reg = <1>;
+		speed = <100>;
+		full-duplex;
+	};
+};
+
 &gpio {
 	status = "okay";
 };

configs/sagem_f at st1704_ram_defconfig +7 -1

index 91a966327a..8c36f5dbf8 100644
@@ -27,11 +27,14 @@ CONFIG_CMD_MEMINFO=y
 # CONFIG_CMD_LOADS is not set
 CONFIG_CMD_SF=y
 CONFIG_CMD_SPI=y
+CONFIG_CMD_MII=y
+CONFIG_CMD_PING=y
 # CONFIG_CMD_MISC is not set
 CONFIG_OF_EMBED=y
 CONFIG_DEFAULT_DEVICE_TREE="sagem,f at st1704"
-# CONFIG_NET is not set
+CONFIG_NET_RANDOM_ETHADDR=y
 # CONFIG_DM_DEVICE_REMOVE is not set
+CONFIG_BCM6348_IUDMA=y
 CONFIG_DM_GPIO=y
 CONFIG_BCM6345_GPIO=y
 CONFIG_LED=y

@@ -40,6 +43,9 @@ CONFIG_DM_SPI_FLASH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_WINBOND=y
 CONFIG_SPI_FLASH_MTD=y
+CONFIG_PHY_FIXED=y
+CONFIG_DM_ETH=y
+CONFIG_BCM6348_ETH=y
 CONFIG_DM_RESET=y
 CONFIG_RESET_BCM6345=y
 # CONFIG_SPL_SERIAL_PRESENT is not set

Signature · 1 line

2.11.0

Álvaro Fernández Rojas

2018-11-26 18:00 UTC #24 lore raw

PATCH v8 16/31 bmips: bcm6348: add support for bcm6348-enet

In reply to Álvaro Fernández Rojas

Signed-off-by Álvaro Fernández Rojas <[email protected]>

---
v8: no changes
v5: no changes
v4: no changes
v3: no changes
v2: no changes

 arch/mips/dts/brcm,bcm6348.dtsi | 26 ++++++++++++++++++++++++++
 1 file changed, 26 insertions(+)

arch/mips/dts/brcm,bcm6348.dtsi +26 -0

index 875de232ca..79e7bd892b 100644
@@ -161,6 +161,32 @@
 			u-boot,dm-pre-reloc;
 		};
 
+		enet0: ethernet at fffe6000 {
+			compatible = "brcm,bcm6348-enet";
+			#address-cells = <1>;
+			#size-cells = <0>;
+			reg = <0xfffe6000 0x2dc>;
+			dmas = <&iudma BCM6348_DMA_ENET0_RX>,
+			       <&iudma BCM6348_DMA_ENET0_TX>;
+			dma-names = "rx",
+				    "tx";
+
+			status = "disabled";
+		};
+
+		enet1: ethernet at fffe6800 {
+			compatible = "brcm,bcm6348-enet";
+			#address-cells = <1>;
+			#size-cells = <0>;
+			reg = <0xfffe6800 0x2dc>;
+			dmas = <&iudma BCM6348_DMA_ENET1_RX>,
+			       <&iudma BCM6348_DMA_ENET1_TX>;
+			dma-names = "rx",
+				    "tx";
+
+			status = "disabled";
+		};
+
 		iudma: dma-controller at fffe7000 {
 			compatible = "brcm,bcm6348-iudma";
 			reg = <0xfffe7000 0x1c>,

Signature · 1 line

2.11.0

Álvaro Fernández Rojas

2018-11-26 18:00 UTC #25 lore raw

PATCH v8 17/31 bmips: enable ct-5361 enet support

In reply to Álvaro Fernández Rojas

Signed-off-by Álvaro Fernández Rojas <[email protected]>

---
v8: no changes
v5: no changes
v4: no changes
v3: no changes
v2: no changes

 arch/mips/dts/comtrend,ct-5361.dts    | 12 ++++++++++++
 configs/comtrend_ct5361_ram_defconfig |  8 +++++++-
 2 files changed, 19 insertions(+), 1 deletion(-)

arch/mips/dts/comtrend,ct-5361.dts +12 -0

index 25747ca95d..f6b8a94e25 100644
@@ -34,6 +34,18 @@
 	};
 };
 
+&enet1 {
+	status = "okay";
+	phy = <&enet1phy>;
+	phy-mode = "mii";
+
+	enet1phy: fixed-link {
+		reg = <1>;
+		speed = <100>;
+		full-duplex;
+	};
+};
+
 &gpio0 {
 	status = "okay";
 };

configs/comtrend_ct5361_ram_defconfig +7 -1

index 82f2070713..6297e78fd9 100644
@@ -25,11 +25,14 @@ CONFIG_CMD_LICENSE=y
 CONFIG_CMD_MEMINFO=y
 # CONFIG_CMD_LOADS is not set
 CONFIG_CMD_USB=y
+CONFIG_CMD_MII=y
+CONFIG_CMD_PING=y
 # CONFIG_CMD_MISC is not set
 CONFIG_OF_EMBED=y
 CONFIG_DEFAULT_DEVICE_TREE="comtrend,ct-5361"
-# CONFIG_NET is not set
+CONFIG_NET_RANDOM_ETHADDR=y
 # CONFIG_DM_DEVICE_REMOVE is not set
+CONFIG_BCM6348_IUDMA=y
 CONFIG_DM_GPIO=y
 CONFIG_BCM6345_GPIO=y
 CONFIG_LED=y

@@ -40,6 +43,9 @@ CONFIG_FLASH_CFI_DRIVER=y
 CONFIG_CFI_FLASH=y
 CONFIG_SYS_FLASH_PROTECTION=y
 CONFIG_SYS_FLASH_CFI=y
+CONFIG_PHY_FIXED=y
+CONFIG_DM_ETH=y
+CONFIG_BCM6348_ETH=y
 CONFIG_PHY=y
 CONFIG_BCM6348_USBH_PHY=y
 CONFIG_DM_RESET=y

Signature · 1 line

2.11.0

Álvaro Fernández Rojas

2018-11-26 18:00 UTC #26 lore raw

PATCH v8 18/31 bmips: bcm6358: add support for bcm6348-enet

In reply to Álvaro Fernández Rojas

Signed-off-by Álvaro Fernández Rojas <[email protected]>

---
v8: no changes
v5: no changes
v4: no changes
v3: no changes
v2: no changes

 arch/mips/dts/brcm,bcm6358.dtsi | 28 ++++++++++++++++++++++++++++
 1 file changed, 28 insertions(+)

arch/mips/dts/brcm,bcm6358.dtsi +28 -0

index 5605723e83..5e9c9ad769 100644
@@ -192,6 +192,34 @@
 			status = "disabled";
 		};
 
+		enet0: ethernet at fffe4000 {
+			compatible = "brcm,bcm6348-enet";
+			#address-cells = <1>;
+			#size-cells = <0>;
+			reg = <0xfffe4000 0x2dc>;
+			clocks = <&periph_clk BCM6358_CLK_ENET0>;
+			dmas = <&iudma BCM6358_DMA_ENET0_RX>,
+			       <&iudma BCM6358_DMA_ENET0_TX>;
+			dma-names = "rx",
+				    "tx";
+
+			status = "disabled";
+		};
+
+		enet1: ethernet at fffe4800 {
+			compatible = "brcm,bcm6348-enet";
+			#address-cells = <1>;
+			#size-cells = <0>;
+			reg = <0xfffe4800 0x2dc>;
+			clocks = <&periph_clk BCM6358_CLK_ENET1>;
+			dmas = <&iudma BCM6358_DMA_ENET1_RX>,
+			       <&iudma BCM6358_DMA_ENET1_TX>;
+			dma-names = "rx",
+				    "tx";
+
+			status = "disabled";
+		};
+
 		iudma: dma-controller at fffe5000 {
 			compatible = "brcm,bcm6348-iudma";
 			reg = <0xfffe5000 0x24>,

Signature · 1 line

2.11.0

Álvaro Fernández Rojas

2018-11-26 18:00 UTC #27 lore raw

PATCH v8 19/31 bmips: enable hg556a enet support

In reply to Álvaro Fernández Rojas

Signed-off-by Álvaro Fernández Rojas <[email protected]>

---
v8: no changes
v5: no changes
v4: no changes
v3: no changes
v2: no changes

 arch/mips/dts/huawei,hg556a.dts     | 12 ++++++++++++
 configs/huawei_hg556a_ram_defconfig |  8 +++++++-
 2 files changed, 19 insertions(+), 1 deletion(-)

arch/mips/dts/huawei,hg556a.dts +12 -0

index 60455c2ff8..6a7fc1df4b 100644
@@ -93,6 +93,18 @@
 	status = "okay";
 };
 
+&enet1 {
+	status = "okay";
+	phy = <&enet1phy>;
+	phy-mode = "mii";
+
+	enet1phy: fixed-link {
+		reg = <1>;
+		speed = <100>;
+		full-duplex;
+	};
+};
+
 &gpio0 {
 	status = "okay";
 };

configs/huawei_hg556a_ram_defconfig +7 -1

index 6bb14ba736..d4e6144319 100644
@@ -25,11 +25,14 @@ CONFIG_CMD_LICENSE=y
 CONFIG_CMD_MEMINFO=y
 # CONFIG_CMD_LOADS is not set
 CONFIG_CMD_USB=y
+CONFIG_CMD_MII=y
+CONFIG_CMD_PING=y
 # CONFIG_CMD_MISC is not set
 CONFIG_OF_EMBED=y
 CONFIG_DEFAULT_DEVICE_TREE="huawei,hg556a"
-# CONFIG_NET is not set
+CONFIG_NET_RANDOM_ETHADDR=y
 # CONFIG_DM_DEVICE_REMOVE is not set
+CONFIG_BCM6348_IUDMA=y
 CONFIG_DM_GPIO=y
 CONFIG_BCM6345_GPIO=y
 CONFIG_LED=y

@@ -40,6 +43,9 @@ CONFIG_FLASH_CFI_DRIVER=y
 CONFIG_CFI_FLASH=y
 CONFIG_SYS_FLASH_PROTECTION=y
 CONFIG_SYS_FLASH_CFI=y
+CONFIG_PHY_FIXED=y
+CONFIG_DM_ETH=y
+CONFIG_BCM6348_ETH=y
 CONFIG_PHY=y
 CONFIG_BCM6358_USBH_PHY=y
 CONFIG_DM_RESET=y

Signature · 1 line

2.11.0

Álvaro Fernández Rojas

2018-11-26 18:00 UTC #28 lore raw

PATCH v8 20/31 bmips: enable nb4-ser enet support

In reply to Álvaro Fernández Rojas

Signed-off-by Álvaro Fernández Rojas <[email protected]>

---
v8: no changes
v5: no changes
v4: no changes
v3: no changes
v2: no changes

 arch/mips/dts/sfr,nb4-ser.dts     | 24 ++++++++++++++++++++++++
 configs/sfr_nb4-ser_ram_defconfig |  8 +++++++-
 2 files changed, 31 insertions(+), 1 deletion(-)

arch/mips/dts/sfr,nb4-ser.dts +24 -0

index bdc6f8ae45..dfbc4148dc 100644
@@ -53,6 +53,30 @@
 	status = "okay";
 };
 
+&enet0 {
+	status = "okay";
+	phy = <&enet0phy>;
+	phy-mode = "internal";
+
+	enet0phy: fixed-link {
+		reg = <1>;
+		speed = <100>;
+		full-duplex;
+	};
+};
+
+&enet1 {
+	status = "okay";
+	phy = <&enet1phy>;
+	phy-mode = "mii";
+
+	enet1phy: fixed-link {
+		reg = <1>;
+		speed = <100>;
+		full-duplex;
+	};
+};
+
 &gpio0 {
 	status = "okay";
 };

configs/sfr_nb4-ser_ram_defconfig +7 -1

index 12adfb01e7..39622875b1 100644
@@ -26,11 +26,14 @@ CONFIG_CMD_LICENSE=y
 CONFIG_CMD_MEMINFO=y
 # CONFIG_CMD_LOADS is not set
 CONFIG_CMD_USB=y
+CONFIG_CMD_MII=y
+CONFIG_CMD_PING=y
 # CONFIG_CMD_MISC is not set
 CONFIG_OF_EMBED=y
 CONFIG_DEFAULT_DEVICE_TREE="sfr,nb4-ser"
-# CONFIG_NET is not set
+CONFIG_NET_RANDOM_ETHADDR=y
 # CONFIG_DM_DEVICE_REMOVE is not set
+CONFIG_BCM6348_IUDMA=y
 CONFIG_DM_GPIO=y
 CONFIG_BCM6345_GPIO=y
 CONFIG_LED=y

@@ -42,6 +45,9 @@ CONFIG_FLASH_CFI_DRIVER=y
 CONFIG_CFI_FLASH=y
 CONFIG_SYS_FLASH_PROTECTION=y
 CONFIG_SYS_FLASH_CFI=y
+CONFIG_PHY_FIXED=y
+CONFIG_DM_ETH=y
+CONFIG_BCM6348_ETH=y
 CONFIG_PHY=y
 CONFIG_BCM6358_USBH_PHY=y
 CONFIG_DM_RESET=y

Signature · 1 line

2.11.0

Álvaro Fernández Rojas

2018-11-26 18:00 UTC #29 lore raw

PATCH v8 21/31 net: add support for bcm6368-enet

In reply to Álvaro Fernández Rojas

Signed-off-by Álvaro Fernández Rojas <[email protected]>

---
v8: introduce bcm6368-enet driver

 drivers/net/Kconfig       |   8 +
 drivers/net/Makefile      |   1 +
 drivers/net/bcm6368-eth.c | 604 ++++++++++++++++++++++++++++++++++++++++++++++
 3 files changed, 613 insertions(+)
 create mode 100644 drivers/net/bcm6368-eth.c

drivers/net/Kconfig +8 -0

index 2b7cec8804..7044c6adf3 100644
@@ -82,6 +82,14 @@ config BCM6348_ETH
 	help
 	  This driver supports the BCM6348 Ethernet MAC.
 
+config BCM6368_ETH
+	bool "BCM6368 EMAC support"
+	depends on DM_ETH && ARCH_BMIPS
+	select DMA
+	select MII
+	help
+	  This driver supports the BCM6368 Ethernet MAC.
+
 config DWC_ETH_QOS
 	bool "Synopsys DWC Ethernet QOS device support"
 	depends on DM_ETH

drivers/net/Makefile +1 -0

index 2647d4dd23..0dbfa03306 100644
@@ -7,6 +7,7 @@ obj-$(CONFIG_ALTERA_TSE) += altera_tse.o
 obj-$(CONFIG_AG7XXX) += ag7xxx.o
 obj-$(CONFIG_ARMADA100_FEC) += armada100_fec.o
 obj-$(CONFIG_BCM6348_ETH) += bcm6348-eth.o
+obj-$(CONFIG_BCM6368_ETH) += bcm6368-eth.o
 obj-$(CONFIG_DRIVER_AT91EMAC) += at91_emac.o
 obj-$(CONFIG_DRIVER_AX88180) += ax88180.o
 obj-$(CONFIG_BCM_SF2_ETH) += bcm-sf2-eth.o

drivers/net/bcm6368-eth.c new file +604 -0

604 lines not on this page · raw message

Signature · 1 line

2.11.0

Álvaro Fernández Rojas

2018-11-26 18:00 UTC #30 lore raw

PATCH v8 22/31 bmips: bcm6368: add support for bcm6368-enet

In reply to Álvaro Fernández Rojas

Signed-off-by Álvaro Fernández Rojas <[email protected]>

---
v8: introduce bcm6368-enet driver

 arch/mips/dts/brcm,bcm6368.dtsi | 19 +++++++++++++++++++
 1 file changed, 19 insertions(+)

arch/mips/dts/brcm,bcm6368.dtsi +19 -0

index 30047f6360..89590d6ff9 100644
@@ -205,5 +205,24 @@
 			#dma-cells = <1>;
 			dma-channels = <8>;
 		};
+
+		enet: ethernet at 10f00000 {
+			compatible = "brcm,bcm6368-enet";
+			#address-cells = <1>;
+			#size-cells = <0>;
+			reg = <0x10f00000 0x10000>;
+			clocks = <&periph_clk BCM6368_CLK_SWPKT_USB>,
+				 <&periph_clk BCM6368_CLK_SWPKT_SAR>,
+				 <&periph_clk BCM6368_CLK_ROBOSW>;
+			resets = <&periph_rst BCM6368_RST_SWITCH>,
+				 <&periph_rst BCM6368_RST_EPHY>;
+			dmas = <&iudma BCM6368_DMA_ENETSW_RX>,
+			       <&iudma BCM6368_DMA_ENETSW_TX>;
+			dma-names = "rx",
+				    "tx";
+			brcm,num-ports = <6>;
+
+			status = "disabled";
+		};
 	};
 };

Signature · 1 line

2.11.0

Álvaro Fernández Rojas

2018-11-26 18:00 UTC #31 lore raw

PATCH v8 23/31 bmips: enable wap-5813n enet support

In reply to Álvaro Fernández Rojas

Signed-off-by Álvaro Fernández Rojas <[email protected]>

---
v8: introduce bcm6368-enet driver

 arch/mips/dts/comtrend,wap-5813n.dts    | 14 ++++++++++++++
 configs/comtrend_wap5813n_ram_defconfig |  8 +++++++-
 2 files changed, 21 insertions(+), 1 deletion(-)

arch/mips/dts/comtrend,wap-5813n.dts +14 -0

index bd41dab9f8..7e835b28d2 100644
@@ -54,6 +54,20 @@
 	status = "okay";
 };
 
+&enet {
+	status = "okay";
+
+	port at 4 {
+		compatible = "brcm,enetsw-port";
+		reg = <4>;
+		label = "rgmii";
+		brcm,phy-id = <0xff>;
+		speed = <1000>;
+		full-duplex;
+		bypass-link;
+	};
+};
+
 &gpio0 {
 	status = "okay";
 };

configs/comtrend_wap5813n_ram_defconfig +7 -1

index 987e4c3fbc..fd5107bb7d 100644
@@ -25,11 +25,14 @@ CONFIG_CMD_LICENSE=y
 CONFIG_CMD_MEMINFO=y
 # CONFIG_CMD_LOADS is not set
 CONFIG_CMD_USB=y
+CONFIG_CMD_MII=y
+CONFIG_CMD_PING=y
 # CONFIG_CMD_MISC is not set
 CONFIG_OF_EMBED=y
 CONFIG_DEFAULT_DEVICE_TREE="comtrend,wap-5813n"
-# CONFIG_NET is not set
+CONFIG_NET_RANDOM_ETHADDR=y
 # CONFIG_DM_DEVICE_REMOVE is not set
+CONFIG_BCM6348_IUDMA=y
 CONFIG_DM_GPIO=y
 CONFIG_BCM6345_GPIO=y
 CONFIG_LED=y

@@ -40,6 +43,9 @@ CONFIG_FLASH_CFI_DRIVER=y
 CONFIG_CFI_FLASH=y
 CONFIG_SYS_FLASH_PROTECTION=y
 CONFIG_SYS_FLASH_CFI=y
+CONFIG_DM_ETH=y
+CONFIG_PHY_GIGE=y
+CONFIG_BCM6368_ETH=y
 CONFIG_PHY=y
 CONFIG_BCM6368_USBH_PHY=y
 CONFIG_DM_RESET=y

Signature · 1 line

2.11.0

Álvaro Fernández Rojas

2018-11-26 18:00 UTC #32 lore raw

PATCH v8 24/31 bmips: bcm6328: add support for bcm6368-enet

In reply to Álvaro Fernández Rojas

Signed-off-by Álvaro Fernández Rojas <[email protected]>

---
v8: introduce bcm6368-enet driver

 arch/mips/dts/brcm,bcm6328.dtsi | 17 +++++++++++++++++
 1 file changed, 17 insertions(+)

arch/mips/dts/brcm,bcm6328.dtsi +17 -0

index 6fa49e22bb..50beed4171 100644
@@ -200,5 +200,22 @@
 			#dma-cells = <1>;
 			dma-channels = <8>;
 		};
+
+		enet: ethernet at 10e00000 {
+			compatible = "brcm,bcm6368-enet";
+			#address-cells = <1>;
+			#size-cells = <0>;
+			reg = <0x10e00000 0x10000>;
+			clocks = <&periph_clk BCM6328_CLK_ROBOSW>;
+			resets = <&periph_rst BCM6328_RST_ENETSW>,
+				 <&periph_rst BCM6328_RST_EPHY>;
+			dmas = <&iudma BCM6328_DMA_ENETSW_RX>,
+			       <&iudma BCM6328_DMA_ENETSW_TX>;
+			dma-names = "rx",
+				    "tx";
+			brcm,num-ports = <5>;
+
+			status = "disabled";
+		};
 	};
 };

Signature · 1 line

2.11.0

Álvaro Fernández Rojas

2018-11-26 18:00 UTC #33 lore raw

PATCH v8 25/31 bmips: enable ar-5387un enet support

In reply to Álvaro Fernández Rojas

Signed-off-by Álvaro Fernández Rojas <[email protected]>

---
v8: introduce bcm6368-enet driver

 arch/mips/dts/comtrend,ar-5387un.dts    | 32 ++++++++++++++++++++++++++++++++
 configs/comtrend_ar5387un_ram_defconfig |  7 ++++++-
 2 files changed, 38 insertions(+), 1 deletion(-)

arch/mips/dts/comtrend,ar-5387un.dts +32 -0

index e993b5cd89..03e3851ab1 100644
@@ -24,6 +24,38 @@
 	status = "okay";
 };
 
+&enet {
+	status = "okay";
+
+	port at 0 {
+		compatible = "brcm,enetsw-port";
+		reg = <0>;
+		label = "fe1";
+		brcm,phy-id = <1>;
+	};
+
+	port at 1 {
+		compatible = "brcm,enetsw-port";
+		reg = <1>;
+		label = "fe2";
+		brcm,phy-id = <2>;
+	};
+
+	port at 2 {
+		compatible = "brcm,enetsw-port";
+		reg = <2>;
+		label = "fe3";
+		brcm,phy-id = <3>;
+	};
+
+	port at 3 {
+		compatible = "brcm,enetsw-port";
+		reg = <3>;
+		label = "fe4";
+		brcm,phy-id = <4>;
+	};
+};
+
 &leds {
 	status = "okay";

configs/comtrend_ar5387un_ram_defconfig +6 -1

index f129870ca0..5ba401a441 100644
@@ -28,11 +28,14 @@ CONFIG_CMD_MEMINFO=y
 CONFIG_CMD_SF=y
 CONFIG_CMD_SPI=y
 CONFIG_CMD_USB=y
+CONFIG_CMD_MII=y
+CONFIG_CMD_PING=y
 # CONFIG_CMD_MISC is not set
 CONFIG_OF_EMBED=y
 CONFIG_DEFAULT_DEVICE_TREE="comtrend,ar-5387un"
-# CONFIG_NET is not set
+CONFIG_NET_RANDOM_ETHADDR=y
 # CONFIG_DM_DEVICE_REMOVE is not set
+CONFIG_BCM6348_IUDMA=y
 CONFIG_DM_GPIO=y
 CONFIG_LED=y
 CONFIG_LED_BCM6328=y

@@ -41,6 +44,8 @@ CONFIG_DM_SPI_FLASH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_MACRONIX=y
 CONFIG_SPI_FLASH_MTD=y
+CONFIG_DM_ETH=y
+CONFIG_BCM6368_ETH=y
 CONFIG_PHY=y
 CONFIG_BCM6368_USBH_PHY=y
 CONFIG_POWER_DOMAIN=y

Signature · 1 line

2.11.0

Álvaro Fernández Rojas

2018-11-26 18:00 UTC #34 lore raw

PATCH v8 26/31 bmips: bcm6362: add support for bcm6368-enet

In reply to Álvaro Fernández Rojas

Signed-off-by Álvaro Fernández Rojas <[email protected]>

---
v8: introduce bcm6368-enet driver

 arch/mips/dts/brcm,bcm6362.dtsi | 19 +++++++++++++++++++
 1 file changed, 19 insertions(+)

arch/mips/dts/brcm,bcm6362.dtsi +19 -0

index 94e7de096d..c77b80a4cc 100644
@@ -224,5 +224,24 @@
 			#dma-cells = <1>;
 			dma-channels = <8>;
 		};
+
+		enet: ethernet at 10e00000 {
+			compatible = "brcm,bcm6368-enet";
+			#address-cells = <1>;
+			#size-cells = <0>;
+			reg = <0x10e00000 0x10000>;
+			clocks = <&periph_clk BCM6362_CLK_SWPKT_USB>,
+				 <&periph_clk BCM6362_CLK_SWPKT_SAR>,
+				 <&periph_clk BCM6362_CLK_ROBOSW>;
+			resets = <&periph_rst BCM6362_RST_ENETSW>,
+				 <&periph_rst BCM6362_RST_EPHY>;
+			dmas = <&iudma BCM6362_DMA_ENETSW_RX>,
+			       <&iudma BCM6362_DMA_ENETSW_TX>;
+			dma-names = "rx",
+				    "tx";
+			brcm,num-ports = <6>;
+
+			status = "disabled";
+		};
 	};
 };

Signature · 1 line

2.11.0

Álvaro Fernández Rojas

2018-11-26 18:00 UTC #35 lore raw

PATCH v8 27/31 bmips: enable dgnd3700v2 enet support

In reply to Álvaro Fernández Rojas

Signed-off-by Álvaro Fernández Rojas <[email protected]>

---
v8: introduce bcm6368-enet driver

 arch/mips/dts/netgear,dgnd3700v2.dts     | 14 ++++++++++++++
 configs/netgear_dgnd3700v2_ram_defconfig |  8 +++++++-
 2 files changed, 21 insertions(+), 1 deletion(-)

arch/mips/dts/netgear,dgnd3700v2.dts +14 -0

index 322d1567ff..2b72491f0b 100644
@@ -43,6 +43,20 @@
 	status = "okay";
 };
 
+&enet {
+	status = "okay";
+
+	port at 4 {
+		compatible = "brcm,enetsw-port";
+		reg = <4>;
+		label = "rgmii";
+		brcm,phy-id = <0xff>;
+		speed = <1000>;
+		full-duplex;
+		bypass-link;
+	};
+};
+
 &gpio0 {
 	status = "okay";
 };

configs/netgear_dgnd3700v2_ram_defconfig +7 -1

index 1abc869856..0f3914fe7e 100644
@@ -27,17 +27,23 @@ CONFIG_CMD_MEMINFO=y
 # CONFIG_CMD_FLASH is not set
 # CONFIG_CMD_LOADS is not set
 CONFIG_CMD_USB=y
-# CONFIG_CMD_NET is not set
+CONFIG_CMD_MII=y
+CONFIG_CMD_PING=y
 # CONFIG_CMD_MISC is not set
 CONFIG_OF_EMBED=y
 CONFIG_DEFAULT_DEVICE_TREE="netgear,dgnd3700v2"
+CONFIG_NET_RANDOM_ETHADDR=y
 # CONFIG_DM_DEVICE_REMOVE is not set
+CONFIG_BCM6348_IUDMA=y
 CONFIG_DM_GPIO=y
 CONFIG_BCM6345_GPIO=y
 CONFIG_LED=y
 CONFIG_LED_BCM6328=y
 CONFIG_LED_BLINK=y
 CONFIG_LED_GPIO=y
+CONFIG_DM_ETH=y
+CONFIG_PHY_GIGE=y
+CONFIG_BCM6368_ETH=y
 CONFIG_PHY=y
 CONFIG_BCM6368_USBH_PHY=y
 CONFIG_POWER_DOMAIN=y

Signature · 1 line

2.11.0

Álvaro Fernández Rojas

2018-11-26 18:00 UTC #36 lore raw

PATCH v8 28/31 bmips: bcm63268: add support for bcm6368-enet

In reply to Álvaro Fernández Rojas

Signed-off-by Álvaro Fernández Rojas <[email protected]>

---
v8: introduce bcm6368-enet driver

 arch/mips/dts/brcm,bcm63268.dtsi | 25 +++++++++++++++++++++++++
 1 file changed, 25 insertions(+)

arch/mips/dts/brcm,bcm63268.dtsi +25 -0

index c7ad83c306..f8a72ef535 100644
@@ -230,5 +230,30 @@
 			#dma-cells = <1>;
 			dma-channels = <8>;
 		};
+
+		enet: ethernet at 10700000 {
+			compatible = "brcm,bcm6368-enet";
+			#address-cells = <1>;
+			#size-cells = <0>;
+			reg = <0x10700000 0x10000>;
+			clocks = <&periph_clk BCM63268_CLK_GMAC>,
+				 <&periph_clk BCM63268_CLK_ROBOSW>,
+				 <&periph_clk BCM63268_CLK_ROBOSW250>,
+				 <&timer_clk BCM63268_TCLK_EPHY1>,
+				 <&timer_clk BCM63268_TCLK_EPHY2>,
+				 <&timer_clk BCM63268_TCLK_EPHY3>,
+				 <&timer_clk BCM63268_TCLK_GPHY>;
+			resets = <&periph_rst BCM63268_RST_ENETSW>,
+				 <&periph_rst BCM63268_RST_EPHY>,
+				 <&periph_rst BCM63268_RST_GPHY>;
+			dmas = <&iudma BCM63268_DMA_ENETSW_RX>,
+			       <&iudma BCM63268_DMA_ENETSW_TX>;
+			dma-names = "rx",
+				    "tx";
+			brcm,rgmii-override;
+			brcm,rgmii-timing;
+
+			status = "disabled";
+		};
 	};
 };

Signature · 1 line

2.11.0

Álvaro Fernández Rojas

2018-11-26 18:00 UTC #37 lore raw

PATCH v8 29/31 bmips: enable vr-3032u enet support

In reply to Álvaro Fernández Rojas

Signed-off-by Álvaro Fernández Rojas <[email protected]>

---
v8: introduce bcm6368-enet driver

 arch/mips/dts/comtrend,vr-3032u.dts    | 32 ++++++++++++++++++++++++++++++++
 configs/comtrend_vr3032u_ram_defconfig |  7 ++++++-
 2 files changed, 38 insertions(+), 1 deletion(-)

arch/mips/dts/comtrend,vr-3032u.dts +32 -0

index 8c6a4a1eac..512cb52de3 100644
@@ -24,6 +24,38 @@
 	status = "okay";
 };
 
+&enet {
+	status = "okay";
+
+	port at 0 {
+		compatible = "brcm,enetsw-port";
+		reg = <0>;
+		label = "fe2";
+		brcm,phy-id = <1>;
+	};
+
+	port at 1 {
+		compatible = "brcm,enetsw-port";
+		reg = <1>;
+		label = "fe3";
+		brcm,phy-id = <2>;
+	};
+
+	port at 2 {
+		compatible = "brcm,enetsw-port";
+		reg = <2>;
+		label = "fe4";
+		brcm,phy-id = <3>;
+	};
+
+	port at 3 {
+		compatible = "brcm,enetsw-port";
+		reg = <3>;
+		label = "fe1";
+		brcm,phy-id = <4>;
+	};
+};
+
 &leds {
 	status = "okay";
 	brcm,serial-leds;

configs/comtrend_vr3032u_ram_defconfig +6 -1

index 1689eecec1..47f53998e1 100644
@@ -26,15 +26,20 @@ CONFIG_CMD_MEMINFO=y
 # CONFIG_CMD_FLASH is not set
 # CONFIG_CMD_LOADS is not set
 CONFIG_CMD_USB=y
+CONFIG_CMD_MII=y
+CONFIG_CMD_PING=y
 # CONFIG_CMD_MISC is not set
 CONFIG_OF_EMBED=y
 CONFIG_DEFAULT_DEVICE_TREE="comtrend,vr-3032u"
-# CONFIG_NET is not set
+CONFIG_NET_RANDOM_ETHADDR=y
 # CONFIG_DM_DEVICE_REMOVE is not set
+CONFIG_BCM6348_IUDMA=y
 CONFIG_DM_GPIO=y
 CONFIG_LED=y
 CONFIG_LED_BCM6328=y
 CONFIG_LED_BLINK=y
+CONFIG_DM_ETH=y
+CONFIG_BCM6368_ETH=y
 CONFIG_PHY=y
 CONFIG_BCM6368_USBH_PHY=y
 CONFIG_POWER_DOMAIN=y

Signature · 1 line

2.11.0

Álvaro Fernández Rojas

2018-11-26 18:00 UTC #38 lore raw

PATCH v8 30/31 bmips: bcm6318: add support for bcm6368-enet

In reply to Álvaro Fernández Rojas

Signed-off-by Álvaro Fernández Rojas <[email protected]>

---
v8: introduce bcm6368-enet driver

 arch/mips/dts/brcm,bcm6318.dtsi           | 19 +++++++++++++++++++
 include/dt-bindings/clock/bcm6318-clock.h | 11 +++++++++++
 2 files changed, 30 insertions(+)

arch/mips/dts/brcm,bcm6318.dtsi +19 -0

index d04b7cbb01..d678dab242 100644
@@ -190,6 +190,25 @@
 			status = "disabled";
 		};
 
+		enet: ethernet at 10080000 {
+			compatible = "brcm,bcm6368-enet";
+			#address-cells = <1>;
+			#size-cells = <0>;
+			reg = <0x10080000 0x8000>;
+			clocks = <&periph_clk BCM6318_CLK_ROBOSW250>,
+				 <&periph_clk BCM6318_CLK_ROBOSW025>,
+				 <&ubus_clk BCM6318_UCLK_ROBOSW>;
+			resets = <&periph_rst BCM6318_RST_ENETSW>,
+				 <&periph_rst BCM6318_RST_EPHY>;
+			dmas = <&iudma BCM6318_DMA_ENETSW_RX>,
+			       <&iudma BCM6318_DMA_ENETSW_TX>;
+			dma-names = "rx",
+				    "tx";
+			brcm,num-ports = <5>;
+
+			status = "disabled";
+		};
+
 		iudma: dma-controller at 10088000 {
 			compatible = "brcm,bcm6368-iudma";
 			reg = <0x10088000 0x80>,

include/dt-bindings/clock/bcm6318-clock.h +11 -0

index d5e13c5c2d..3f10448cef 100644
@@ -33,4 +33,15 @@
 #define BCM6318_CLK_AFE		29
 #define BCM6318_CLK_QPROC	30
 
+#define BCM6318_UCLK_ADSL	0
+#define BCM6318_UCLK_ARB	1
+#define BCM6318_UCLK_MIPS	2
+#define BCM6318_UCLK_PCIE	3
+#define BCM6318_UCLK_PERIPH	4
+#define BCM6318_UCLK_PHYMIPS	5
+#define BCM6318_UCLK_ROBOSW	6
+#define BCM6318_UCLK_SAR	7
+#define BCM6318_UCLK_SDR	8
+#define BCM6318_UCLK_USB	9
+
 #endif /* __DT_BINDINGS_CLOCK_BCM6318_H */

Signature · 1 line

2.11.0

Álvaro Fernández Rojas

2018-11-26 18:00 UTC #39 lore raw

PATCH v8 31/31 bmips: enable ar-5315u enet support

In reply to Álvaro Fernández Rojas

Signed-off-by Álvaro Fernández Rojas <[email protected]>

---
v8: introduce bcm6368-enet driver

 arch/mips/dts/comtrend,ar-5315u.dts    | 32 ++++++++++++++++++++++++++++++++
 configs/comtrend_ar5315u_ram_defconfig |  7 ++++++-
 2 files changed, 38 insertions(+), 1 deletion(-)

arch/mips/dts/comtrend,ar-5315u.dts +32 -0

index 45570189d0..eb60aaa8d5 100644
@@ -24,6 +24,38 @@
 	status = "okay";
 };
 
+&enet {
+	status = "okay";
+
+	port at 0 {
+		compatible = "brcm,enetsw-port";
+		reg = <0>;
+		label = "fe4";
+		brcm,phy-id = <1>;
+	};
+
+	port at 1 {
+		compatible = "brcm,enetsw-port";
+		reg = <1>;
+		label = "fe3";
+		brcm,phy-id = <2>;
+	};
+
+	port at 2 {
+		compatible = "brcm,enetsw-port";
+		reg = <2>;
+		label = "fe2";
+		brcm,phy-id = <3>;
+	};
+
+	port at 3 {
+		compatible = "brcm,enetsw-port";
+		reg = <3>;
+		label = "fe1";
+		brcm,phy-id = <4>;
+	};
+};
+
 &leds {
 	status = "okay";

configs/comtrend_ar5315u_ram_defconfig +6 -1

index d9ef52e68d..1b8e4e43c4 100644
@@ -28,11 +28,14 @@ CONFIG_CMD_MEMINFO=y
 CONFIG_CMD_SF=y
 CONFIG_CMD_SPI=y
 CONFIG_CMD_USB=y
+CONFIG_CMD_MII=y
+CONFIG_CMD_PING=y
 # CONFIG_CMD_MISC is not set
 CONFIG_OF_EMBED=y
 CONFIG_DEFAULT_DEVICE_TREE="comtrend,ar-5315u"
-# CONFIG_NET is not set
+CONFIG_NET_RANDOM_ETHADDR=y
 # CONFIG_DM_DEVICE_REMOVE is not set
+CONFIG_BCM6348_IUDMA=y
 CONFIG_DM_GPIO=y
 CONFIG_LED=y
 CONFIG_LED_BCM6328=y

@@ -41,6 +44,8 @@ CONFIG_DM_SPI_FLASH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_WINBOND=y
 CONFIG_SPI_FLASH_MTD=y
+CONFIG_DM_ETH=y
+CONFIG_BCM6368_ETH=y
 CONFIG_PHY=y
 CONFIG_BCM6318_USBH_PHY=y
 CONFIG_BCM6328_POWER_DOMAIN=y

Signature · 1 line

2.11.0

Tom Rini

2018-11-26 23:15 UTC #40 lore raw

v8 cover dma: add channels support

In reply to Álvaro Fernández Rojas

Quoted 90 lines · Álvaro Fernández Rojas

In order to add bcm6348-enet support, dma-uclass must be extended to support dma channels and reworked to operate like the other dm uclass (clk, reset...).
===
A DMA is a feature of computer systems that allows certain hardware subsystems to access main system memory, independent of the CPU. DMA channels are typically generated externally to the HW module consuming them, by an entity this API calls a DMA provider. This API provides a standard means for drivers to enable and disable DMAs, and to copy, send and receive data using DMA.
DMA channel API:
dma_get_by_index()
dma_get_by_name()
dma_request()
dma_free()
dma_enable()
dma_disable()
dma_prepare_rcv_buf()
dma_receive()
dma_send()
A driver that implements UCLASS_DMA is a DMA provider. A provider will often implement multiple separate DMAs channels, since the hardware it manages often has this capability. dma_uclass.h describes the interface which DMA providers must implement.
DMA consumers/clients are the HW modules driven by the DMA channels.
DMA consumer DMA_MEM_TO_DEV (transmit) usage example (based on networking). Note. In u-boot dma_send() is sync operation always - it'll start transfer and will poll for it to complete:
- get/request dma channel
	struct dma dma_tx;
	ret = dma_get_by_name(common->dev, "tx0", &dma_tx);
	if (ret) ...
- enable dma channel
	ret = dma_enable(&dma_tx);
	if (ret) ...
- dma transmit DMA_MEM_TO_DEV.
	struct ti_drv_packet_data packet_data;
	
	packet_data.opt1 = val1;
	packet_data.opt2 = val2;
	ret = dma_send(&dma_tx, packet, length, &packet_data);
	if (ret) ..
DMA consumer DMA_DEV_TO_MEM (receive) usage example (based on networking). Note. dma_receive() is sync operation always - it'll start transfer (if required) and will poll for it to complete (or for any previously configured dev2mem transfer to complete):
- get/request dma channel
	struct dma dma_rx;
	ret = dma_get_by_name(common->dev, "rx0", &dma_rx);
	if (ret) ...
- enable dma channel
	ret = dma_enable(&dma_rx);
	if (ret) ...
- dma receive DMA_DEV_TO_MEM.
	struct ti_drv_packet_data packet_data;
	
	len = dma_receive(&dma_rx, (void **)packet, &packet_data);
	if (ret < 0) ...
DMA consumer DMA_DEV_TO_MEM (receive) zero-copy usage example (based on networking). Networking subsystem allows to configure and use few receive buffers (dev2mem), as Networking RX DMA channels usually implemented as streaming interface
- get/request dma channel
	struct dma dma_rx;
	ret = dma_get_by_name(common->dev, "rx0", &dma_rx);
	if (ret) ...
	
	for (i = 0; i < RX_DESC_NUM; i++) {
		ret = dma_prepare_rcv_buf(&dma_rx,
					  net_rx_packets[i],
					  RX_BUF_SIZE);
		if (ret) ...
	}
- enable dma channel
	ret = dma_enable(&dma_rx);
	if (ret) ...
- dma receive DMA_DEV_TO_MEM.

Quoted 14 lines

	struct ti_drv_packet_data packet_data;
	void *packet;
	
	len = dma_receive(&dma_rx, &packet, &packet_data);
	if (ret < 0) ..
	
	/* packet - points on buffer prepared by dma_prepare_rcv_buf().
	   process packet*/
	
	- return buffer back to DAM channel
	ret = dma_prepare_rcv_buf(&dma_rx,
				  net_rx_packets[rx_next],
				  RX_BUF_SIZE);

Can you please split this into 2 parts, the generic DMA portion, and the bcm6368-enet/etc part? Thanks!

Signature · 8 lines

Tom
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Álvaro Fernández Rojas

2018-11-28 18:17 UTC #41 lore raw

v9 cover dma: add channels support

In reply to Álvaro Fernández Rojas

In order to add bcm6348-enet support, dma-uclass must be extended to support dma channels and reworked to operate like the other dm uclass (clk, reset...).

===

DMA channel API:
dma_get_by_index()
dma_get_by_name()
dma_request()
dma_free()
dma_enable()
dma_disable()
dma_prepare_rcv_buf()
dma_receive()
dma_send()

DMA consumers/clients are the HW modules driven by the DMA channels.

	struct dma dma_tx;
	ret = dma_get_by_name(common->dev, "tx0", &dma_tx);
	if (ret) ...

- enable dma channel

	ret = dma_enable(&dma_tx);
	if (ret) ...

- dma transmit DMA_MEM_TO_DEV.

	struct ti_drv_packet_data packet_data;
	
	packet_data.opt1 = val1;
	packet_data.opt2 = val2;
	ret = dma_send(&dma_tx, packet, length, &packet_data);
	if (ret) ..

	struct dma dma_rx;
	ret = dma_get_by_name(common->dev, "rx0", &dma_rx);
	if (ret) ...

- enable dma channel

	ret = dma_enable(&dma_rx);
	if (ret) ...

- dma receive DMA_DEV_TO_MEM.

	struct ti_drv_packet_data packet_data;
	
	len = dma_receive(&dma_rx, (void **)packet, &packet_data);
	if (ret < 0) ...

	struct dma dma_rx;
	ret = dma_get_by_name(common->dev, "rx0", &dma_rx);
	if (ret) ...
	
	for (i = 0; i < RX_DESC_NUM; i++) {
		ret = dma_prepare_rcv_buf(&dma_rx,
					  net_rx_packets[i],
					  RX_BUF_SIZE);
		if (ret) ...
	}

- enable dma channel

	ret = dma_enable(&dma_rx);
	if (ret) ...

- dma receive DMA_DEV_TO_MEM.

	struct ti_drv_packet_data packet_data;
	void *packet;
	
	len = dma_receive(&dma_rx, &packet, &packet_data);
	if (ret < 0) ..
	
	/* packet - points on buffer prepared by dma_prepare_rcv_buf().
	   process packet*/
	
	- return buffer back to DAM channel
	ret = dma_prepare_rcv_buf(&dma_rx,
				  net_rx_packets[rx_next],
				  RX_BUF_SIZE);

===

v9: Separate generic dma channels support from bmips enet support
v8: Sync with latest u-boot.
v7: From Grygorii Strashko:
- copyright fixed as suggested by Tom Rini
- added "Reviewed-by" tags
v6: From Grygorii Strashko:
- added possibility to pass DMA driver/channel's specific data per each transfer using additional parameter "metadata" in dma_send/dma_receive() API. For example, port number for network packets to be directed to the specific port on multi port ethernet controllers.
- added new dma_prepare_rcv_buf() API which allows to implement zero-copy DEV_TO_MEM transfer using DMA streaming channels which is usual case for Networking.
- added dma-uclass test
- removed unused function dma_get_by_index_platdata()
- updated comments
v5: Fix build of ti-edma3.
v4: No changes
v3: Introduce changes reported by Simon Glass:
- Improve dma-uclass.h documentation.
- Switch to live tree API.
v2: Introduce changes reported by Vignesh:
- Respect current dma implementation.
- Let dma_memcpy find a compatible dma device.

Grygorii Strashko (1):
test: dma: add dma-uclass test

Álvaro Fernández Rojas (2):
dma: move dma_ops to dma-uclass.h
dma: add channels support

 arch/sandbox/dts/test.dts      |   8 ++
 configs/sandbox_defconfig      |   3 +
 drivers/dma/Kconfig            |  14 ++
 drivers/dma/Makefile           |   1 +
 drivers/dma/dma-uclass.c       | 183 +++++++++++++++++++++++++-
 drivers/dma/sandbox-dma-test.c | 282 +++++++++++++++++++++++++++++++++++++++++
 drivers/dma/ti-edma3.c         |   2 +-
 include/dma-uclass.h           | 128 +++++++++++++++++++
 include/dma.h                  | 282 +++++++++++++++++++++++++++++++++++++----
 test/dm/Makefile               |   1 +
 test/dm/dma.c                  | 123 ++++++++++++++++++
 11 files changed, 997 insertions(+), 30 deletions(-)
 create mode 100644 drivers/dma/sandbox-dma-test.c
 create mode 100644 include/dma-uclass.h
 create mode 100644 test/dm/dma.c

Signature · 1 line

2.11.0

Álvaro Fernández Rojas

2018-11-28 18:17 UTC #42 lore raw

PATCH v9 1/3 dma: move dma_ops to dma-uclass.h

Move dma_ops to a separate header file, following other uclass implementations. While doing so, this patch also improves dma_ops documentation.

Reviewed-by Tom Rini <[email protected]>

Reviewed-by Simon Glass <[email protected]>

Signed-off-by Álvaro Fernández Rojas <[email protected]>

Signed-off-by Grygorii Strashko <[email protected]>

---
v9: no changes
v8: no changes
v7: From Grygorii Strashko:
- copyright fixed as suggested by Tom Rini
- added "Reviewed-by" tags
v6: no changes
v5: fix build of ti-edma3 (reported by Grygorii Strashko) and remove unneeded dma.h include
v4: no changes
v3: Introduce changes reported by Simon Glass:
- Improve dma-uclass.h documentation.
- Switch to live tree API.

 drivers/dma/dma-uclass.c |  2 +-
 drivers/dma/ti-edma3.c   |  2 +-
 include/dma-uclass.h     | 39 +++++++++++++++++++++++++++++++++++++++
 include/dma.h            | 22 ----------------------
 4 files changed, 41 insertions(+), 24 deletions(-)
 create mode 100644 include/dma-uclass.h

drivers/dma/dma-uclass.c +1 -1

index a33f7d52da..6c3506c302 100644
@@ -9,10 +9,10 @@
  */
 
 #include <common.h>
-#include <dma.h>
 #include <dm.h>
 #include <dm/uclass-internal.h>
 #include <dm/device-internal.h>
+#include <dma-uclass.h>
 #include <errno.h>
 
 int dma_get_device(u32 transfer_type, struct udevice **devp)

drivers/dma/ti-edma3.c +1 -1

index 2131e10a40..7e11b13e45 100644
@@ -11,7 +11,7 @@
 #include <asm/io.h>
 #include <common.h>
 #include <dm.h>
-#include <dma.h>
+#include <dma-uclass.h>
 #include <asm/omap_common.h>
 #include <asm/ti-common/ti-edma3.h>

include/dma-uclass.h new file +39 -0

new file mode 100644
index 0000000000..7bec5d3399
@@ -0,0 +1,39 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+/*
+ * Copyright (C) 2018 Álvaro Fernández Rojas <[email protected]>
+ * Copyright (C) 2015 Texas Instruments Incorporated <www.ti.com>
+ * Written by Mugunthan V N <[email protected]>
+ *
+ */
+
+#ifndef _DMA_UCLASS_H
+#define _DMA_UCLASS_H
+
+/* See dma.h for background documentation. */
+
+#include <dma.h>
+
+/*
+ * struct dma_ops - Driver model DMA operations
+ *
+ * The uclass interface is implemented by all DMA devices which use
+ * driver model.
+ */
+struct dma_ops {
+	/**
+	 * transfer() - Issue a DMA transfer. The implementation must
+	 *   wait until the transfer is done.
+	 *
+	 * @dev: The DMA device
+	 * @direction: direction of data transfer (should be one from
+	 *   enum dma_direction)
+	 * @dst: The destination pointer.
+	 * @src: The source pointer.
+	 * @len: Length of the data to be copied (number of bytes).
+	 * @return zero on success, or -ve error code.
+	 */
+	int (*transfer)(struct udevice *dev, int direction, void *dst,
+			void *src, size_t len);
+};
+
+#endif /* _DMA_UCLASS_H */

include/dma.h +0 ~~-22~~

index 50e965241c..97fa0cf695 100644
@@ -27,28 +27,6 @@ enum dma_direction {
 #define DMA_SUPPORTS_DEV_TO_DEV	BIT(3)
 
 /*
- * struct dma_ops - Driver model DMA operations
- *
- * The uclass interface is implemented by all DMA devices which use
- * driver model.
- */
-struct dma_ops {
-	/*
-	 * Get the current timer count
-	 *
-	 * @dev: The DMA device
-	 * @direction: direction of data transfer should be one from
-		       enum dma_direction
-	 * @dst: Destination pointer
-	 * @src: Source pointer
-	 * @len: Length of the data to be copied.
-	 * @return: 0 if OK, -ve on error
-	 */
-	int (*transfer)(struct udevice *dev, int direction, void *dst,
-			void *src, size_t len);
-};
-
-/*
  * struct dma_dev_priv - information about a device used by the uclass
  *
  * @supported: mode of transfers that DMA can support, should be

Signature · 1 line

2.11.0

Tom Rini

2018-12-07 20:33 UTC #43 lore raw

PATCH v9 1/3 dma: move dma_ops to dma-uclass.h

Quoted 8 lines · Álvaro Fernández Rojas

Move dma_ops to a separate header file, following other uclass implementations. While doing so, this patch also improves dma_ops documentation.
Reviewed-by Tom Rini <[email protected]>
Reviewed-by Simon Glass <[email protected]>
Signed-off-by Álvaro Fernández Rojas <[email protected]>
Signed-off-by Grygorii Strashko <[email protected]>

Note that we had a comment about add_recv rather than prepare_rcv_buf that I've corrected.

Applied to u-boot/master, thanks!

Signature · 8 lines

Tom
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Álvaro Fernández Rojas

2018-11-28 18:17 UTC #44 lore raw

PATCH v9 2/3 dma: add channels support

In reply to Álvaro Fernández Rojas

This adds channels support for dma controllers that have multiple channels which can transfer data to/from different devices (enet, usb...).

DMA channle API:
dma_get_by_index()
dma_get_by_name()
dma_request()
dma_free()
dma_enable()
dma_disable()
dma_prepare_rcv_buf()
dma_receive()
dma_send()

Reviewed-by Tom Rini <[email protected]>

Signed-off-by Álvaro Fernández Rojas <[email protected]>

[grygorii.strashko at ti.com: drop unused dma_get_by_index_platdata(),
add metadata to send/receive ops, add dma_prepare_rcv_buf(), minor clean up]

Signed-off-by Grygorii Strashko <[email protected]>

Reviewed-by Simon Glass <[email protected]>

---
v9: no changes
v8: no changes
v7: From Grygorii Strashko:
- copyright fixed as suggested by Tom Rini
- added "Reviewed-by" tags
v6: From Grygorii Strashko:
- added possibility to pass DMA driver/channel's specific data per each transfer using additional parameter "metadata" in dma_send/dma_receive() API. For example, port number for network packets to be directed to the specific port on multi port ethernet controllers.
- added new dma_prepare_rcv_buf() API which allows to implement zero-copy DEV_TO_MEM transfer using DMA streaming channels which is usual case for Networking.
- removed unused function dma_get_by_index_platdata()
- updated comments
v5: remove unneeded dma.h include
v4: no changes
v3: Introduce changes reported by Simon Glass:
- Improve dma-uclass.h documentation.
- Switch to live tree API.

 drivers/dma/Kconfig      |   7 ++
 drivers/dma/dma-uclass.c | 181 ++++++++++++++++++++++++++++++++-
 include/dma-uclass.h     |  91 ++++++++++++++++-
 include/dma.h            | 260 ++++++++++++++++++++++++++++++++++++++++++++++-
 4 files changed, 532 insertions(+), 7 deletions(-)

drivers/dma/Kconfig +7 -0

index 4ee6afad35..b9b85c65fc 100644
@@ -12,6 +12,13 @@ config DMA
 	  buses that is used to transfer data to and from memory.
 	  The uclass interface is defined in include/dma.h.
 
+config DMA_CHANNELS
+	bool "Enable DMA channels support"
+	depends on DMA
+	help
+	  Enable channels support for DMA. Some DMA controllers have multiple
+	  channels which can either transfer data to/from different devices.
+
 config TI_EDMA3
 	bool "TI EDMA3 driver"
 	help

drivers/dma/dma-uclass.c +177 -4

196 lines not on this page · raw message

include/dma-uclass.h +90 -1

109 lines not on this page · raw message

include/dma.h +258 -2

276 lines not on this page · raw message

Signature · 1 line

2.11.0

Tom Rini

2018-12-07 20:33 UTC #45 lore raw

PATCH v9 2/3 dma: add channels support

Quoted 14 lines · Álvaro Fernández Rojas

This adds channels support for dma controllers that have multiple channels which can transfer data to/from different devices (enet, usb...).
DMA channle API:
dma_get_by_index()
dma_get_by_name()
dma_request()
dma_free()
dma_enable()
dma_disable()
dma_prepare_rcv_buf()
dma_receive()
dma_send()

Quoted 7 lines

Reviewed-by Tom Rini <[email protected]>
Signed-off-by Álvaro Fernández Rojas <[email protected]>
[grygorii.strashko at ti.com: drop unused dma_get_by_index_platdata(),
add metadata to send/receive ops, add dma_prepare_rcv_buf(), minor clean up]
Signed-off-by Grygorii Strashko <[email protected]>
Reviewed-by Simon Glass <[email protected]>

Applied to u-boot/master, thanks!

Signature · 8 lines

Tom
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Álvaro Fernández Rojas

2018-11-28 18:17 UTC #46 lore raw

PATCH v9 3/3 test: dma: add dma-uclass test

In reply to Álvaro Fernández Rojas

From: Grygorii Strashko <[email protected]>

Add a sandbox DMA driver implementation (provider) and corresponding DM test.

Reviewed-by Tom Rini <[email protected]>

Signed-off-by Grygorii Strashko <[email protected]>

Reviewed-by Simon Glass <[email protected]>

Acked-by Álvaro Fernández Rojas <[email protected]>

---
v9: no changes
v8: sync with latest u-boot
v7: no changes
v6: From Grygorii Strashko:
- added dma-uclass test

 arch/sandbox/dts/test.dts      |   8 ++
 configs/sandbox_defconfig      |   3 +
 drivers/dma/Kconfig            |   7 +
 drivers/dma/Makefile           |   1 +
 drivers/dma/sandbox-dma-test.c | 282 +++++++++++++++++++++++++++++++++++++++++
 test/dm/Makefile               |   1 +
 test/dm/dma.c                  | 123 ++++++++++++++++++
 7 files changed, 425 insertions(+)
 create mode 100644 drivers/dma/sandbox-dma-test.c
 create mode 100644 test/dm/dma.c

arch/sandbox/dts/test.dts +8 -0

index 2c6b422312..e5932d5a34 100644
@@ -731,6 +731,14 @@
 	pinctrl {
 		compatible = "sandbox,pinctrl";
 	};
+
+	dma: dma {
+		compatible = "sandbox,dma";
+		#dma-cells = <1>;
+
+		dmas = <&dma 0>, <&dma 1>, <&dma 2>;
+		dma-names = "m2m", "tx0", "rx0";
+	};
 };
 
 #include "sandbox_pmic.dtsi"

configs/sandbox_defconfig +3 -0

index 5a744f4791..0e5e6f687e 100644
@@ -215,3 +215,6 @@ CONFIG_UT_TIME=y
 CONFIG_UT_DM=y
 CONFIG_UT_ENV=y
 CONFIG_UT_OVERLAY=y
+CONFIG_DMA=y
+CONFIG_DMA_CHANNELS=y
+CONFIG_SANDBOX_DMA=y

drivers/dma/Kconfig +7 -0

index b9b85c65fc..8a4162eccd 100644
@@ -19,6 +19,13 @@ config DMA_CHANNELS
 	  Enable channels support for DMA. Some DMA controllers have multiple
 	  channels which can either transfer data to/from different devices.
 
+config SANDBOX_DMA
+	bool "Enable the sandbox DMA test driver"
+	depends on DMA && DMA_CHANNELS && SANDBOX
+	help
+	  Enable support for a test DMA uclass implementation. It stimulates
+	  DMA transfer by simple copying data between channels.
+
 config TI_EDMA3
 	bool "TI EDMA3 driver"
 	help

drivers/dma/Makefile +1 -0

index 4eaef8ac65..aff31f986a 100644
@@ -8,6 +8,7 @@ obj-$(CONFIG_DMA) += dma-uclass.o
 obj-$(CONFIG_FSLDMAFEC) += MCD_tasksInit.o MCD_dmaApi.o MCD_tasks.o
 obj-$(CONFIG_APBH_DMA) += apbh_dma.o
 obj-$(CONFIG_FSL_DMA) += fsl_dma.o
+obj-$(CONFIG_SANDBOX_DMA) += sandbox-dma-test.o
 obj-$(CONFIG_TI_KSNAV) += keystone_nav.o keystone_nav_cfg.o
 obj-$(CONFIG_TI_EDMA3) += ti-edma3.o
 obj-$(CONFIG_DMA_LPC32XX) += lpc32xx_dma.o

drivers/dma/sandbox-dma-test.c new file +282 -0

282 lines not on this page · raw message

test/dm/Makefile +1 -0

index 213e0fda94..757dd0c45b 100644
@@ -54,4 +54,5 @@ obj-$(CONFIG_DM_SERIAL) += serial.o
 obj-$(CONFIG_CPU) += cpu.o
 obj-$(CONFIG_TEE) += tee.o
 obj-$(CONFIG_VIRTIO_SANDBOX) += virtio.o
+obj-$(CONFIG_DMA) += dma.o
 endif

test/dm/dma.c new file +123 -0

123 lines not on this page · raw message

Signature · 1 line

2.11.0

Tom Rini

2018-12-07 20:33 UTC #47 lore raw

PATCH v9 3/3 test: dma: add dma-uclass test

Quoted 9 lines · Álvaro Fernández Rojas

From: Grygorii Strashko <[email protected]>
Add a sandbox DMA driver implementation (provider) and corresponding DM test.
Reviewed-by Tom Rini <[email protected]>
Signed-off-by Grygorii Strashko <[email protected]>
Reviewed-by Simon Glass <[email protected]>
Acked-by Álvaro Fernández Rojas <[email protected]>

Note that all of this was using add_recv and not prepare_rcv_buf and I've fixed that.

Applied to u-boot/master, thanks!

Signature · 8 lines

Tom
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Grygorii Strashko

author

2018-11-30 23:56 UTC #48 lore raw

v9 cover dma: add channels support

In reply to Álvaro Fernández Rojas

Hi Álvaro,

Quoted 4 lines · Álvaro Fernández Rojas

In order to add bcm6348-enet support, dma-uclass must be extended to support dma channels and reworked to operate like the other dm uclass (clk, reset...).
===

Thank you for picking this up.
I, unfortunately, will be out unresponsive next few month due to personal reasons, but hope this will be moved forward eventually.

Quoted 51 lines

===
v9: Separate generic dma channels support from bmips enet support
v8: Sync with latest u-boot.
v7: From Grygorii Strashko:
- copyright fixed as suggested by Tom Rini
- added "Reviewed-by" tags
v6: From Grygorii Strashko:
- added possibility to pass DMA driver/channel's specific data per each transfer using additional parameter "metadata" in dma_send/dma_receive() API. For example, port number for network packets to be directed to the specific port on multi port ethernet controllers.
- added new dma_prepare_rcv_buf() API which allows to implement zero-copy DEV_TO_MEM transfer using DMA streaming channels which is usual case for Networking.
- added dma-uclass test
- removed unused function dma_get_by_index_platdata()
- updated comments
v5: Fix build of ti-edma3.
v4: No changes
v3: Introduce changes reported by Simon Glass:
- Improve dma-uclass.h documentation.
- Switch to live tree API.
v2: Introduce changes reported by Vignesh:
- Respect current dma implementation.
- Let dma_memcpy find a compatible dma device.
Grygorii Strashko (1):
test: dma: add dma-uclass test
Álvaro Fernández Rojas (2):
dma: move dma_ops to dma-uclass.h
dma: add channels support
  arch/sandbox/dts/test.dts      |   8 ++
  configs/sandbox_defconfig      |   3 +
  drivers/dma/Kconfig            |  14 ++
  drivers/dma/Makefile           |   1 +
  drivers/dma/dma-uclass.c       | 183 +++++++++++++++++++++++++-
  drivers/dma/sandbox-dma-test.c | 282 +++++++++++++++++++++++++++++++++++++++++
  drivers/dma/ti-edma3.c         |   2 +-
  include/dma-uclass.h           | 128 +++++++++++++++++++
  include/dma.h                  | 282 +++++++++++++++++++++++++++++++++++++----
  test/dm/Makefile               |   1 +
  test/dm/dma.c                  | 123 ++++++++++++++++++
  11 files changed, 997 insertions(+), 30 deletions(-)
create mode 100644 drivers/dma/sandbox-dma-test.c create mode 100644 include/dma-uclass.h create mode 100644 test/dm/dma.c

Signature · 2 lines

regards,
-grygorii

Álvaro Fernández Rojas

2018-11-28 18:23 UTC #49 lore raw

v9 cover bmips: add iudma/enet support

In reply to Álvaro Fernández Rojas

In order to add bcm6348-enet support, dma-uclass must be extended to support dma channels and reworked to operate like the other dm uclass (clk, reset...).

v9: Separate generic dma channels support from bmips enet support
bcm6348-iudma:
- bcm6348_iudma_chan_stop: switch to mdelay when resetting channel.
- bcm6348_iudma_receive: track dirty dma descriptors and no longer trigger dma rx channel.
- bcm6348_iudma_send: reorder to properly flush cache and set dma descriptor config.
- bcm6348_iudma_prepare_rcv_buf: implemented to clear dirty dma descriptors.
bcm6348-enet:
- bcm6348_eth_recv: clear dirty dma descriptors only when packets are copied from rx dma.
- bcm6348_eth_send: remove dma rx channel reset when sending packet.
bcm6368-enet:
- introduce rx packets caching functionality from bcm6348-eth to fix flow control issues.
- code style fixes.
v8: Introduce bcm6368-enet driver support.
v5: Fix issues reported by Grygorii Strashko and other fixes:
- Remove unused bcm6348-iudma defines.
- Increment bcm6348-iudma rx descriptors.
- Fix bcm6348-iudma flow control issues.
- bcm6348-iudma error checking now depends on hw.
- Remove unneeded bcm6348-iudma interrupts.
- Receive as much packets as possible from bcm6348-eth and cache them in net_rx_packets. This is needed in order to fix flow control issues.
v4: Fix issues reported by Grygorii Strashko and other fixes:
- Remove usage of net_rx_packets as buffer from bcm6348-iudma.
- Allocate dynamic rx buffer on bcm6348-iudma.
- Copy received dma buffer to net_rx_packets in order to avoid possible dma overwrites.
- Check dma errors and discard invalid packets.
- Reset dma rx channel when sending a new packet to prevent flow control issues.
- Fix packet casting on bcm6348_eth_recv/send.
v3: Switch to live tree API.
v2: Fix bcm6348-iudma rx burst config.

Álvaro Fernández Rojas (28):
dma: add bcm6348-iudma support
bmips: bcm6338: add bcm6348-iudma support
bmips: bcm6348: add bcm6348-iudma support
bmips: bcm6358: add bcm6348-iudma support
bmips: bcm6368: add bcm6348-iudma support
bmips: bcm6328: add bcm6348-iudma support
bmips: bcm6362: add bcm6348-iudma support
bmips: bcm63268: add bcm6348-iudma support
bmips: bcm6318: add bcm6348-iudma support
net: add support for bcm6348-enet
bmips: bcm6338: add support for bcm6348-enet
bmips: enable f at st1704 enet support
bmips: bcm6348: add support for bcm6348-enet
bmips: enable ct-5361 enet support
bmips: bcm6358: add support for bcm6348-enet
bmips: enable hg556a enet support
bmips: enable nb4-ser enet support
net: add support for bcm6368-enet
bmips: bcm6368: add support for bcm6368-enet
bmips: enable wap-5813n enet support
bmips: bcm6328: add support for bcm6368-enet
bmips: enable ar-5387un enet support
bmips: bcm6362: add support for bcm6368-enet
bmips: enable dgnd3700v2 enet support
bmips: bcm63268: add support for bcm6368-enet
bmips: enable vr-3032u enet support
bmips: bcm6318: add support for bcm6368-enet
bmips: enable ar-5315u enet support

 arch/mips/dts/brcm,bcm6318.dtsi           |  38 ++
 arch/mips/dts/brcm,bcm63268.dtsi          |  38 ++
 arch/mips/dts/brcm,bcm6328.dtsi           |  30 ++
 arch/mips/dts/brcm,bcm6338.dtsi           |  29 ++
 arch/mips/dts/brcm,bcm6348.dtsi           |  42 ++
 arch/mips/dts/brcm,bcm6358.dtsi           |  46 ++
 arch/mips/dts/brcm,bcm6362.dtsi           |  32 ++
 arch/mips/dts/brcm,bcm6368.dtsi           |  32 ++
 arch/mips/dts/comtrend,ar-5315u.dts       |  32 ++
 arch/mips/dts/comtrend,ar-5387un.dts      |  32 ++
 arch/mips/dts/comtrend,ct-5361.dts        |  12 +
 arch/mips/dts/comtrend,vr-3032u.dts       |  32 ++
 arch/mips/dts/comtrend,wap-5813n.dts      |  14 +
 arch/mips/dts/huawei,hg556a.dts           |  12 +
 arch/mips/dts/netgear,dgnd3700v2.dts      |  14 +
 arch/mips/dts/sagem,f at st1704.dts          |  12 +
 arch/mips/dts/sfr,nb4-ser.dts             |  24 ++
 configs/comtrend_ar5315u_ram_defconfig    |   7 +-
 configs/comtrend_ar5387un_ram_defconfig   |   7 +-
 configs/comtrend_ct5361_ram_defconfig     |   8 +-
 configs/comtrend_vr3032u_ram_defconfig    |   7 +-
 configs/comtrend_wap5813n_ram_defconfig   |   8 +-
 configs/huawei_hg556a_ram_defconfig       |   8 +-
 configs/netgear_dgnd3700v2_ram_defconfig  |   8 +-
 configs/sagem_f at st1704_ram_defconfig      |   8 +-
 configs/sfr_nb4-ser_ram_defconfig         |   8 +-
 drivers/dma/Kconfig                       |   9 +
 drivers/dma/Makefile                      |   1 +
 drivers/dma/bcm6348-iudma.c               | 576 +++++++++++++++++++++++++
 drivers/net/Kconfig                       |  18 +
 drivers/net/Makefile                      |   2 +
 drivers/net/bcm6348-eth.c                 | 576 +++++++++++++++++++++++++
 drivers/net/bcm6368-eth.c                 | 670 ++++++++++++++++++++++++++++++
 include/configs/bmips_common.h            |   5 +-
 include/dt-bindings/clock/bcm6318-clock.h |  11 +
 include/dt-bindings/dma/bcm6318-dma.h     |  15 +
 include/dt-bindings/dma/bcm63268-dma.h    |  15 +
 include/dt-bindings/dma/bcm6328-dma.h     |  15 +
 include/dt-bindings/dma/bcm6338-dma.h     |  15 +
 include/dt-bindings/dma/bcm6348-dma.h     |  17 +
 include/dt-bindings/dma/bcm6358-dma.h     |  17 +
 include/dt-bindings/dma/bcm6362-dma.h     |  15 +
 include/dt-bindings/dma/bcm6368-dma.h     |  15 +
 43 files changed, 2522 insertions(+), 10 deletions(-)
 create mode 100644 drivers/dma/bcm6348-iudma.c
 create mode 100644 drivers/net/bcm6348-eth.c
 create mode 100644 drivers/net/bcm6368-eth.c
 create mode 100644 include/dt-bindings/dma/bcm6318-dma.h
 create mode 100644 include/dt-bindings/dma/bcm63268-dma.h
 create mode 100644 include/dt-bindings/dma/bcm6328-dma.h
 create mode 100644 include/dt-bindings/dma/bcm6338-dma.h
 create mode 100644 include/dt-bindings/dma/bcm6348-dma.h
 create mode 100644 include/dt-bindings/dma/bcm6358-dma.h
 create mode 100644 include/dt-bindings/dma/bcm6362-dma.h
 create mode 100644 include/dt-bindings/dma/bcm6368-dma.h

Signature · 1 line

2.11.0

Álvaro Fernández Rojas

2018-11-28 18:23 UTC #50 lore raw

PATCH v9 1/28 dma: add bcm6348-iudma support

BCM6348 IUDMA controller is present on multiple BMIPS (BCM63xx) SoCs.

Signed-off-by Álvaro Fernández Rojas <[email protected]>

---
v9: introduce dma_prepare_rcv_buf dma op:
- bcm6348_iudma_chan_stop: switch to mdelay when resetting channel.
- bcm6348_iudma_receive: track dirty dma descriptors and no longer trigger dma rx channel.
- bcm6348_iudma_send: reorder to properly flush cache and set dma descriptor config.
- bcm6348_iudma_prepare_rcv_buf: implemented to clear dirty dma descriptors.
v8: Introduce changes from Grygorii Strashko
v5: Several fixes and improvements:
- Remove unused defines.
- Increment rx descriptors.
- Fix flow control issues.
- Error checking now depends on hw.
- Remove unneeded interrupts.
v4: Fix issues reported by Grygorii Strashko and other fixes:
- Remove usage of net_rx_packets as buffer.
- Allocate dynamic rx buffer.
- Check dma errors and discard invalid packets.
v3: no changes
v2: Fix dma rx burst config and select DMA_CHANNELS.

 drivers/dma/Kconfig         |   9 +
 drivers/dma/Makefile        |   1 +
 drivers/dma/bcm6348-iudma.c | 576 ++++++++++++++++++++++++++++++++++++++++++++
 3 files changed, 586 insertions(+)
 create mode 100644 drivers/dma/bcm6348-iudma.c

drivers/dma/Kconfig +9 -0

index 8a4162eccd..1820676d7a 100644
@@ -26,6 +26,15 @@ config SANDBOX_DMA
 	  Enable support for a test DMA uclass implementation. It stimulates
 	  DMA transfer by simple copying data between channels.
 
+config BCM6348_IUDMA
+	bool "BCM6348 IUDMA driver"
+	depends on ARCH_BMIPS
+	select DMA_CHANNELS
+	help
+	  Enable the BCM6348 IUDMA driver.
+	  This driver support data transfer from devices to
+	  memory and from memory to devices.
+
 config TI_EDMA3
 	bool "TI EDMA3 driver"
 	help

drivers/dma/Makefile +1 -0

index aff31f986a..b5f9147e0a 100644
@@ -7,6 +7,7 @@ obj-$(CONFIG_DMA) += dma-uclass.o
 
 obj-$(CONFIG_FSLDMAFEC) += MCD_tasksInit.o MCD_dmaApi.o MCD_tasks.o
 obj-$(CONFIG_APBH_DMA) += apbh_dma.o
+obj-$(CONFIG_BCM6348_IUDMA) += bcm6348-iudma.o
 obj-$(CONFIG_FSL_DMA) += fsl_dma.o
 obj-$(CONFIG_SANDBOX_DMA) += sandbox-dma-test.o
 obj-$(CONFIG_TI_KSNAV) += keystone_nav.o keystone_nav_cfg.o

drivers/dma/bcm6348-iudma.c new file +576 -0

576 lines not on this page · raw message

Signature · 1 line

2.11.0

Daniel Schwierzeck

2018-11-28 23:44 UTC #51 lore raw

PATCH v9 1/28 dma: add bcm6348-iudma support

Am 28.11.18 um 19:23 schrieb Álvaro Fernández Rojas:

Quoted 75 lines

BCM6348 IUDMA controller is present on multiple BMIPS (BCM63xx) SoCs.
Signed-off-by Álvaro Fernández Rojas <[email protected]>
---
v9: introduce dma_prepare_rcv_buf dma op:
- bcm6348_iudma_chan_stop: switch to mdelay when resetting channel.
- bcm6348_iudma_receive: track dirty dma descriptors and no longer trigger dma rx channel.
- bcm6348_iudma_send: reorder to properly flush cache and set dma descriptor config.
- bcm6348_iudma_prepare_rcv_buf: implemented to clear dirty dma descriptors.
v8: Introduce changes from Grygorii Strashko
v5: Several fixes and improvements:
- Remove unused defines.
- Increment rx descriptors.
- Fix flow control issues.
- Error checking now depends on hw.
- Remove unneeded interrupts.
v4: Fix issues reported by Grygorii Strashko and other fixes:
- Remove usage of net_rx_packets as buffer.
- Allocate dynamic rx buffer.
- Check dma errors and discard invalid packets.
v3: no changes
v2: Fix dma rx burst config and select DMA_CHANNELS.
 drivers/dma/Kconfig         |   9 +
 drivers/dma/Makefile        |   1 +
 drivers/dma/bcm6348-iudma.c | 576 ++++++++++++++++++++++++++++++++++++++++++++
 3 files changed, 586 insertions(+)
 create mode 100644 drivers/dma/bcm6348-iudma.c
drivers/dma/Kconfig +9 -0
index 8a4162eccd..1820676d7a 100644
@@ -26,6 +26,15 @@ config SANDBOX_DMA
 	  Enable support for a test DMA uclass implementation. It stimulates
 	  DMA transfer by simple copying data between channels.
 
+config BCM6348_IUDMA
+	bool "BCM6348 IUDMA driver"
+	depends on ARCH_BMIPS
+	select DMA_CHANNELS
+	help
+	  Enable the BCM6348 IUDMA driver.
+	  This driver support data transfer from devices to
+	  memory and from memory to devices.
+
 config TI_EDMA3
 	bool "TI EDMA3 driver"
 	help
drivers/dma/Makefile +1 -0
index aff31f986a..b5f9147e0a 100644
@@ -7,6 +7,7 @@ obj-$(CONFIG_DMA) += dma-uclass.o
 
 obj-$(CONFIG_FSLDMAFEC) += MCD_tasksInit.o MCD_dmaApi.o MCD_tasks.o
 obj-$(CONFIG_APBH_DMA) += apbh_dma.o
+obj-$(CONFIG_BCM6348_IUDMA) += bcm6348-iudma.o
 obj-$(CONFIG_FSL_DMA) += fsl_dma.o
 obj-$(CONFIG_SANDBOX_DMA) += sandbox-dma-test.o
 obj-$(CONFIG_TI_KSNAV) += keystone_nav.o keystone_nav_cfg.o
drivers/dma/bcm6348-iudma.c new file +6 -0
new file mode 100644
index 0000000000..284735fff3
@@ -0,0 +1,576 @@
+/*
+ * Copyright (C) 2018 Álvaro Fernández Rojas <[email protected]>
+ *
+ * Derived from linux/drivers/dma/bcm63xx-iudma.c:
+ *	Copyright (C) 2015 Simon Arlott <[email protected]>
+ *

drivers/dma/bcm6348-iudma.c line 16

Quoted 10 lines

drivers/dma/bcm6348-iudma.c new file +10 -0

+ * Derived from linux/drivers/net/ethernet/broadcom/bcm63xx_enet.c:
+ *	Copyright (C) 2008 Maxime Bizon <[email protected]>
+ *
+ * Derived from bcm963xx_4.12L.06B_consumer/shared/opensource/include/bcm963xx/63268_map_part.h:
+ *	Copyright (C) 2000-2010 Broadcom Corporation
+ *
+ * Derived from bcm963xx_4.12L.06B_consumer/bcmdrivers/opensource/net/enet/impl4/bcmenet.c:
+ *	Copyright (C) 2010 Broadcom Corporation
+ *
+ * SPDX-License-Identifier: GPL-2.0+

// SPDX-License-Identifier: GPL-2.0+
must be the first line of the file

Quoted 84 lines

drivers/dma/bcm6348-iudma.c new file +84 -0

+ */
+
+#include <common.h>
+#include <clk.h>
+#include <dm.h>
+#include <dma-uclass.h>
+#include <memalign.h>
+#include <reset.h>
+#include <asm/io.h>
+
+#define DMA_RX_DESC	6
+#define DMA_TX_DESC	1
+
+DECLARE_GLOBAL_DATA_PTR;
+
+#define ALIGN_END_ADDR(type, ptr, size)	\
+	((unsigned long)(ptr) + roundup((size) * sizeof(type), \
+	 ARCH_DMA_MINALIGN))
+
+/* DMA Channels */
+#define DMA_CHAN_FLOWC(x)		((x) >> 1)
+#define DMA_CHAN_MAX			16
+#define DMA_CHAN_SIZE			0x10
+#define DMA_CHAN_TOUT			500
+
+/* DMA Global Configuration register */
+#define DMA_CFG_REG			0x00
+#define  DMA_CFG_ENABLE_SHIFT		0
+#define  DMA_CFG_ENABLE_MASK		(1 << DMA_CFG_ENABLE_SHIFT)
+#define  DMA_CFG_FLOWC_ENABLE(x)	BIT(DMA_CHAN_FLOWC(x) + 1)
+#define  DMA_CFG_NCHANS_SHIFT		24
+#define  DMA_CFG_NCHANS_MASK		(0xf << DMA_CFG_NCHANS_SHIFT)
+
+/* DMA Global Flow Control registers */
+#define DMA_FLOWC_THR_LO_REG(x)		(0x04 + DMA_CHAN_FLOWC(x) * 0x0c)
+#define DMA_FLOWC_THR_HI_REG(x)		(0x08 + DMA_CHAN_FLOWC(x) * 0x0c)
+#define DMA_FLOWC_ALLOC_REG(x)		(0x0c + DMA_CHAN_FLOWC(x) * 0x0c)
+#define  DMA_FLOWC_ALLOC_FORCE_SHIFT	31
+#define  DMA_FLOWC_ALLOC_FORCE_MASK	(1 << DMA_FLOWC_ALLOC_FORCE_SHIFT)
+
+/* DMA Global Reset register */
+#define DMA_RST_REG			0x34
+#define  DMA_RST_CHAN_SHIFT		0
+#define  DMA_RST_CHAN_MASK(x)		(1 << x)
+
+/* DMA Channel Configuration register */
+#define DMAC_CFG_REG(x)			(DMA_CHAN_SIZE * (x) + 0x00)
+#define  DMAC_CFG_ENABLE_SHIFT		0
+#define  DMAC_CFG_ENABLE_MASK		(1 << DMAC_CFG_ENABLE_SHIFT)
+#define  DMAC_CFG_PKT_HALT_SHIFT	1
+#define  DMAC_CFG_PKT_HALT_MASK		(1 << DMAC_CFG_PKT_HALT_SHIFT)
+#define  DMAC_CFG_BRST_HALT_SHIFT	2
+#define  DMAC_CFG_BRST_HALT_MASK	(1 << DMAC_CFG_BRST_HALT_SHIFT)
+
+/* DMA Channel Max Burst Length register */
+#define DMAC_BURST_REG(x)		(DMA_CHAN_SIZE * (x) + 0x0c)
+
+/* DMA SRAM Descriptor Ring Start register */
+#define DMAS_RSTART_REG(x)		(DMA_CHAN_SIZE * (x) + 0x00)
+
+/* DMA SRAM State/Bytes done/ring offset register */
+#define DMAS_STATE_DATA_REG(x)		(DMA_CHAN_SIZE * (x) + 0x04)
+
+/* DMA SRAM Buffer Descriptor status and length register */
+#define DMAS_DESC_LEN_STATUS_REG(x)	(DMA_CHAN_SIZE * (x) + 0x08)
+
+/* DMA SRAM Buffer Descriptor status and length register */
+#define DMAS_DESC_BASE_BUFPTR_REG(x)	(DMA_CHAN_SIZE * (x) + 0x0c)
+
+struct bcm6348_dma_desc {
+	uint16_t length;
+
+	uint16_t status;
+#define DMAD_ST_CRC_SHIFT		8
+#define DMAD_ST_CRC_MASK		(1 << DMAD_ST_CRC_SHIFT)
+#define DMAD_ST_WRAP_SHIFT		12
+#define DMAD_ST_WRAP_MASK		(1 << DMAD_ST_WRAP_SHIFT)
+#define DMAD_ST_SOP_SHIFT		13
+#define DMAD_ST_SOP_MASK		(1 << DMAD_ST_SOP_SHIFT)
+#define DMAD_ST_EOP_SHIFT		14
+#define DMAD_ST_EOP_MASK		(1 << DMAD_ST_EOP_SHIFT)
+#define DMAD_ST_OWN_SHIFT		15
+#define DMAD_ST_OWN_MASK		(1 << DMAD_ST_OWN_SHIFT)
+

drivers/dma/bcm6348-iudma.c line 110

Quoted 10 lines

drivers/dma/bcm6348-iudma.c new file +10 -0

+#define DMAD6348_ST_OV_ERR_SHIFT	0
+#define DMAD6348_ST_OV_ERR_MASK		(1 << DMAD6348_ST_OV_ERR_SHIFT)
+#define DMAD6348_ST_CRC_ERR_SHIFT	1
+#define DMAD6348_ST_CRC_ERR_MASK	(1 << DMAD6348_ST_CRC_ERR_SHIFT)
+#define DMAD6348_ST_RX_ERR_SHIFT	2
+#define DMAD6348_ST_RX_ERR_MASK		(1 << DMAD6348_ST_RX_ERR_SHIFT)
+#define DMAD6348_ST_OS_ERR_SHIFT	4
+#define DMAD6348_ST_OS_ERR_MASK		(1 << DMAD6348_ST_OS_ERR_SHIFT)
+#define DMAD6348_ST_UN_ERR_SHIFT	9
+#define DMAD6348_ST_UN_ERR_MASK		(1 << DMAD6348_ST_UN_ERR_SHIFT)

I would move this out of the struct definition

drivers/dma/bcm6348-iudma.c line 113

Quoted 3 lines

drivers/dma/bcm6348-iudma.c new file +3 -0
+
+	uint32_t address;
+} __attribute__((aligned(1)));

__aligned(1)? But what's the sense of aligning to 1 byte?

Quoted 83 lines

drivers/dma/bcm6348-iudma.c new file +83 -0

+
+struct bcm6348_chan_priv {
+	void __iomem *dma_buff;
+	void __iomem *dma_ring;
+	uint8_t dma_ring_size;
+	uint8_t desc_id;
+	uint8_t dirty_cnt;
+	uint8_t dirty_desc;
+};
+
+struct bcm6348_iudma_hw {
+	uint16_t err_mask;
+};
+
+struct bcm6348_iudma_priv {
+	const struct bcm6348_iudma_hw *hw;
+	void __iomem *base;
+	void __iomem *chan;
+	void __iomem *sram;
+	struct bcm6348_chan_priv **ch_priv;
+	uint8_t n_channels;
+};
+
+static inline bool bcm6348_iudma_chan_is_rx(uint8_t ch)
+{
+	return !(ch & 1);
+}
+
+static void bcm6348_iudma_chan_stop(struct bcm6348_iudma_priv *priv,
+				    uint8_t ch)
+{
+	unsigned int timeout = DMA_CHAN_TOUT;
+
+	do {
+		uint32_t cfg, halt;
+
+		if (timeout > DMA_CHAN_TOUT / 2)
+			halt = DMAC_CFG_PKT_HALT_MASK;
+		else
+			halt = DMAC_CFG_BRST_HALT_MASK;
+
+		/* try to stop dma channel */
+		writel_be(halt, priv->chan + DMAC_CFG_REG(ch));
+		mb();
+
+		/* check if channel was stopped */
+		cfg = readl_be(priv->chan + DMAC_CFG_REG(ch));
+		if (!(cfg & DMAC_CFG_ENABLE_MASK))
+			break;
+
+		udelay(1);
+	} while (--timeout);
+
+	if (!timeout)
+		pr_err("unable to stop channel %u\n", ch);
+
+	/* reset dma channel */
+	setbits_be32(priv->base + DMA_RST_REG, DMA_RST_CHAN_MASK(ch));
+	mdelay(1);
+	clrbits_be32(priv->base + DMA_RST_REG, DMA_RST_CHAN_MASK(ch));
+}
+
+static int bcm6348_iudma_disable(struct dma *dma)
+{
+	struct bcm6348_iudma_priv *priv = dev_get_priv(dma->dev);
+
+	bcm6348_iudma_chan_stop(priv, dma->id);
+
+	if (bcm6348_iudma_chan_is_rx(dma->id))
+		writel_be(DMA_FLOWC_ALLOC_FORCE_MASK,
+			  DMA_FLOWC_ALLOC_REG(dma->id));
+
+	return 0;
+}
+
+static int bcm6348_iudma_enable(struct dma *dma)
+{
+	const struct bcm6348_iudma_priv *priv = dev_get_priv(dma->dev);
+	struct bcm6348_chan_priv *ch_priv = priv->ch_priv[dma->id];
+	struct bcm6348_dma_desc *dma_desc;
+	void __iomem *dma_buff = ch_priv->dma_buff;
+	uint8_t i;
+

drivers/dma/bcm6348-iudma.c line 206

Quoted 10 lines

drivers/dma/bcm6348-iudma.c new file +10 -0

+	/* init dma rings */
+	dma_desc = ch_priv->dma_ring;
+	for (i = 0; i < ch_priv->dma_ring_size; i++) {
+		uint16_t status;
+
+		if (bcm6348_iudma_chan_is_rx(dma->id)) {
+			status = DMAD_ST_OWN_MASK;
+			dma_desc->length = PKTSIZE_ALIGN;
+			dma_desc->address = virt_to_phys(dma_buff);
+			dma_buff += PKTSIZE_ALIGN;

shouldn't this be somehow set by a consumer driver instead of hard-coding the size of a network packet?

Quoted 137 lines

drivers/dma/bcm6348-iudma.c new file +137 -0

+		} else {
+			status = 0;
+			dma_desc->length = 0;
+			dma_desc->address = 0;
+		}
+
+		if (i == ch_priv->dma_ring_size - 1)
+			status |= DMAD_ST_WRAP_MASK;
+
+		dma_desc->status = status;
+
+		dma_desc++;
+	}
+
+	/* init to first descriptor */
+	ch_priv->desc_id = 0;
+	ch_priv->dirty_desc = 0;
+	ch_priv->dirty_cnt = 0;
+
+	/* force cache writeback */
+	flush_dcache_range((ulong)ch_priv->dma_ring,
+		ALIGN_END_ADDR(struct bcm6348_dma_desc, ch_priv->dma_ring,
+			       ch_priv->dma_ring_size));
+
+	/* clear sram */
+	writel_be(0, priv->sram + DMAS_STATE_DATA_REG(dma->id));
+	writel_be(0, priv->sram + DMAS_DESC_LEN_STATUS_REG(dma->id));
+	writel_be(0, priv->sram + DMAS_DESC_BASE_BUFPTR_REG(dma->id));
+
+	/* set dma ring start */
+	writel_be(virt_to_phys(ch_priv->dma_ring),
+		  priv->sram + DMAS_RSTART_REG(dma->id));
+
+	/* set flow control */
+	if (bcm6348_iudma_chan_is_rx(dma->id)) {
+		u32 val;
+
+		setbits_be32(priv->base + DMA_CFG_REG,
+			     DMA_CFG_FLOWC_ENABLE(dma->id));
+
+		val = ch_priv->dma_ring_size / 3;
+		writel_be(val, priv->base + DMA_FLOWC_THR_LO_REG(dma->id));
+
+		val = (ch_priv->dma_ring_size * 2) / 3;
+		writel_be(val, priv->base + DMA_FLOWC_THR_HI_REG(dma->id));
+
+		writel_be(0, priv->base + DMA_FLOWC_ALLOC_REG(dma->id));
+	}
+
+	/* set dma max burst */
+	writel_be(ch_priv->dma_ring_size,
+		  priv->chan + DMAC_BURST_REG(dma->id));
+
+	/* kick dma channel */
+	setbits_be32(priv->chan + DMAC_CFG_REG(dma->id), DMAC_CFG_ENABLE_MASK);
+
+	return 0;
+}
+
+static int bcm6348_iudma_request(struct dma *dma)
+{
+	const struct bcm6348_iudma_priv *priv = dev_get_priv(dma->dev);
+	struct bcm6348_chan_priv *ch_priv;
+
+	/* check if channel is valid */
+	if (dma->id >= priv->n_channels)
+		return -ENODEV;
+
+	/* alloc channel private data */
+	priv->ch_priv[dma->id] = calloc(1, sizeof(struct bcm6348_chan_priv));
+	if (!priv->ch_priv[dma->id])
+		return -ENOMEM;
+	ch_priv = priv->ch_priv[dma->id];
+
+	/* alloc dma ring */
+	if (bcm6348_iudma_chan_is_rx(dma->id))
+		ch_priv->dma_ring_size = DMA_RX_DESC;
+	else
+		ch_priv->dma_ring_size = DMA_TX_DESC;
+
+	ch_priv->dma_ring =
+		malloc_cache_aligned(sizeof(struct bcm6348_dma_desc) *
+				     ch_priv->dma_ring_size);
+	if (!ch_priv->dma_ring)
+		return -ENOMEM;
+
+	if (bcm6348_iudma_chan_is_rx(dma->id)) {
+		ch_priv->dma_buff =
+			malloc_cache_aligned(PKTSIZE_ALIGN *
+					     ch_priv->dma_ring_size);
+		if (!ch_priv->dma_buff)
+			return -ENOMEM;
+	} else {
+		ch_priv->dma_buff = NULL;
+	}
+
+	return 0;
+}
+
+static int bcm6348_iudma_receive(struct dma *dma, void **dst, void *metadata)
+{
+	const struct bcm6348_iudma_priv *priv = dev_get_priv(dma->dev);
+	const struct bcm6348_iudma_hw *hw = priv->hw;
+	struct bcm6348_chan_priv *ch_priv = priv->ch_priv[dma->id];
+	struct bcm6348_dma_desc *dma_desc;
+	void __iomem *dma_buff;
+	int ret;
+
+	if (ch_priv->dirty_cnt == ch_priv->dma_ring_size) {
+		pr_err("dma rx ring full of dirty descriptors\n");
+		return -EAGAIN;
+	}
+
+	/* get dma ring descriptor address */
+	dma_desc = ch_priv->dma_ring;
+	dma_desc += ch_priv->desc_id;
+
+	/* invalidate cache data */
+	invalidate_dcache_range((ulong)dma_desc,
+		ALIGN_END_ADDR(struct bcm6348_dma_desc, dma_desc, 1));
+
+	/* check dma own */
+	if (dma_desc->status & DMAD_ST_OWN_MASK)
+		return -EAGAIN;
+
+	/* check pkt */
+	if (!(dma_desc->status & DMAD_ST_EOP_MASK) ||
+	    !(dma_desc->status & DMAD_ST_SOP_MASK) ||
+	    (dma_desc->status & hw->err_mask)) {
+		pr_err("invalid pkt received (ch=%ld) (st=%04x)\n",
+		       dma->id, dma_desc->status);
+		ret = -EAGAIN;
+	} else {
+		uint16_t length;
+
+		/* get dma buff descriptor address */
+		dma_buff = phys_to_virt(dma_desc->address);

drivers/dma/bcm6348-iudma.c line 353

Quoted 10 lines

drivers/dma/bcm6348-iudma.c new file +10 -0

+
+		/* invalidate cache data */
+		invalidate_dcache_range((ulong)dma_buff,
+					(ulong)(dma_buff + PKTSIZE_ALIGN));
+
+		/* remove crc */
+		length = dma_desc->length - 4;
+
+		/* copy data */
+		memcpy(*dst, dma_buff, length);

why not returning the buffer address where the DMA transfered the data to instead of making a copy?

Quoted 11 lines

drivers/dma/bcm6348-iudma.c new file +11 -0

+
+		ret = length;
+	}
+
+	/* increment dma descriptor */
+	ch_priv->desc_id = (ch_priv->desc_id + 1) % ch_priv->dma_ring_size;
+	ch_priv->dirty_cnt++;
+
+	return ret;
+}
+

drivers/dma/bcm6348-iudma.c line 374

Quoted 10 lines

drivers/dma/bcm6348-iudma.c new file +10 -0

+static int bcm6348_iudma_send(struct dma *dma, void *src, size_t len,
+			      void *metadata)
+{
+	const struct bcm6348_iudma_priv *priv = dev_get_priv(dma->dev);
+	struct bcm6348_chan_priv *ch_priv = priv->ch_priv[dma->id];
+	struct bcm6348_dma_desc *dma_desc;
+	uint16_t status;
+
+	/* flush cache */
+	flush_dcache_range((ulong)src, (ulong)src + PKTSIZE_ALIGN);

you pass a 'size_t len' but still use the hard-coded buffer size?

Quoted 47 lines

drivers/dma/bcm6348-iudma.c new file +47 -0

+
+	/* get dma ring descriptor address */
+	dma_desc = ch_priv->dma_ring;
+	dma_desc += ch_priv->desc_id;
+
+	/* config dma descriptor */
+	status = (DMAD_ST_OWN_MASK |
+		  DMAD_ST_EOP_MASK |
+		  DMAD_ST_CRC_MASK |
+		  DMAD_ST_SOP_MASK);
+	if (ch_priv->desc_id == ch_priv->dma_ring_size - 1)
+		status |= DMAD_ST_WRAP_MASK;
+
+	dma_desc->address = virt_to_phys(src);
+	dma_desc->length = len;
+	dma_desc->status = status;
+
+	/* flush cache */
+	flush_dcache_range((ulong)dma_desc,
+		ALIGN_END_ADDR(struct bcm6348_dma_desc, dma_desc, 1));
+
+	/* kick tx dma channel */
+	setbits_be32(priv->chan + DMAC_CFG_REG(dma->id), DMAC_CFG_ENABLE_MASK);
+
+	/* poll dma status */
+	do {
+		/* invalidate cache */
+		invalidate_dcache_range((ulong)dma_desc,
+			ALIGN_END_ADDR(struct bcm6348_dma_desc, dma_desc, 1));
+
+		if (!(dma_desc->status & DMAD_ST_OWN_MASK))
+			break;
+	} while(1);
+
+	/* increment dma descriptor */
+	ch_priv->desc_id = (ch_priv->desc_id + 1) % ch_priv->dma_ring_size;
+
+	return 0;
+}
+
+int bcm6348_iudma_prepare_rcv_buf(struct dma *dma, void *dst, size_t size)
+{
+	const struct bcm6348_iudma_priv *priv = dev_get_priv(dma->dev);
+	struct bcm6348_chan_priv *ch_priv = priv->ch_priv[dma->id];
+
+	/* init dma rings */
+	while (ch_priv->dirty_cnt) {

drivers/dma/bcm6348-iudma.c line 431

Quoted 10 lines

drivers/dma/bcm6348-iudma.c new file +10 -0

+		struct bcm6348_dma_desc *dma_desc = ch_priv->dma_ring;
+		uint16_t status = DMAD_ST_OWN_MASK;
+
+		/* get dirty dma descriptor */
+		dma_desc += ch_priv->dirty_desc;
+
+		/* reinit dirty dma descriptor */
+		if (ch_priv->dirty_desc == ch_priv->dma_ring_size - 1)
+			status |= DMAD_ST_WRAP_MASK;
+		dma_desc->length = PKTSIZE_ALIGN;

you pass a 'size_t size' but still use the hard-coded buffer size?

Quoted 66 lines

drivers/dma/bcm6348-iudma.c new file +66 -0

+		dma_desc->status = status;
+
+		/* flush cache */
+		flush_dcache_range((ulong)dma_desc,
+			ALIGN_END_ADDR(struct bcm6348_dma_desc, dma_desc, 1));
+
+		/* tell dma engine we allocated one buffer */
+		writel_be(1, DMA_FLOWC_ALLOC_REG(dma->id));
+
+		/* bump dirty dma descriptor */
+		ch_priv->dirty_desc = (ch_priv->dirty_desc + 1) %
+				      ch_priv->dma_ring_size;
+
+		/* kick rx dma channel */
+		ch_priv->dirty_cnt--;
+		if (!ch_priv->dirty_cnt)
+			setbits_be32(priv->chan + DMAC_CFG_REG(dma->id),
+				     DMAC_CFG_ENABLE_MASK);
+	}
+
+	return 0;
+}
+
+static const struct dma_ops bcm6348_iudma_ops = {
+	.disable = bcm6348_iudma_disable,
+	.enable = bcm6348_iudma_enable,
+	.prepare_rcv_buf = bcm6348_iudma_prepare_rcv_buf,
+	.request = bcm6348_iudma_request,
+	.receive = bcm6348_iudma_receive,
+	.send = bcm6348_iudma_send,
+};
+
+static const struct bcm6348_iudma_hw bcm6348_hw = {
+	.err_mask = (DMAD6348_ST_OV_ERR_MASK |
+		     DMAD6348_ST_CRC_ERR_MASK |
+		     DMAD6348_ST_RX_ERR_MASK |
+		     DMAD6348_ST_OS_ERR_MASK |
+		     DMAD6348_ST_UN_ERR_MASK),
+};
+
+static const struct bcm6348_iudma_hw bcm6368_hw = {
+	.err_mask = 0,
+};
+
+static const struct udevice_id bcm6348_iudma_ids[] = {
+	{
+		.compatible = "brcm,bcm6348-iudma",
+		.data = (ulong)&bcm6348_hw,
+	}, {
+		.compatible = "brcm,bcm6368-iudma",
+		.data = (ulong)&bcm6368_hw,
+	}, { /* sentinel */ }
+};
+
+static int bcm6348_iudma_probe(struct udevice *dev)
+{
+	struct dma_dev_priv *uc_priv = dev_get_uclass_priv(dev);
+	struct bcm6348_iudma_priv *priv = dev_get_priv(dev);
+	const struct bcm6348_iudma_hw *hw =
+		(const struct bcm6348_iudma_hw *)dev_get_driver_data(dev);
+	fdt_addr_t addr;
+	uint8_t ch;
+	int i;
+
+	uc_priv->supported = (DMA_SUPPORTS_DEV_TO_MEM |
+			      DMA_SUPPORTS_MEM_TO_DEV);

drivers/dma/bcm6348-iudma.c line 507

Quoted 10 lines

drivers/dma/bcm6348-iudma.c new file +10 -0

+	priv->hw = hw;
+
+	/* try to enable clocks */
+	for (i = 0; ; i++) {
+		struct clk clk;
+		int ret;
+
+		ret = clk_get_by_index(dev, i, &clk);
+		if (ret < 0)
+			break;

why not getting the reference once and do appropiate error handling. Although it's only probing but this looks very inefficient

drivers/dma/bcm6348-iudma.c line 513

Quoted 6 lines

drivers/dma/bcm6348-iudma.c new file +6 -0

+		if (clk_enable(&clk))
+			pr_err("failed to enable clock %d\n", i);
+		clk_free(&clk);
+	}
+
+	/* try to perform resets */

no error handling for clk_get_by_index()? I guess it doesn't make sense to continue without enabled clocks?

drivers/dma/bcm6348-iudma.c line 524

Quoted 11 lines

drivers/dma/bcm6348-iudma.c new file +11 -0

+	for (i = 0; ; i++) {
+		struct reset_ctl reset;
+		int ret;
+
+		ret = reset_get_by_index(dev, i, &reset);
+		if (ret < 0)
+			break;
+		if (reset_deassert(&reset))
+			pr_err("failed to deassert reset %d\n", i);
+		reset_free(&reset);
+	}

same here

drivers/dma/bcm6348-iudma.c line 530

Quoted 6 lines

drivers/dma/bcm6348-iudma.c new file +6 -0

+
+	/* dma global base address */
+	addr = devfdt_get_addr_name(dev, "dma");
+	if (addr == FDT_ADDR_T_NONE)
+		return -EINVAL;
+	priv->base = ioremap(addr, 0);

this is not compatible with DM live tree which you already enabled for BMIPS platform. You should use dev_remap_addr_index() or you should add a generic dev_remap_addr_name().

Quoted 9 lines

drivers/dma/bcm6348-iudma.c new file +9 -0

+
+	/* dma channels base address */
+	addr = devfdt_get_addr_name(dev, "dma-channels");
+	if (addr == FDT_ADDR_T_NONE)
+		return -EINVAL;
+	priv->chan = ioremap(addr, 0);
+
+	/* dma sram base address */
+	addr = devfdt_get_addr_name(dev, "dma-sram");

drivers/dma/bcm6348-iudma.c line 549

Quoted 10 lines

drivers/dma/bcm6348-iudma.c new file +10 -0

+	if (addr == FDT_ADDR_T_NONE)
+		return -EINVAL;
+	priv->sram = ioremap(addr, 0);
+
+	/* disable dma controller */
+	clrbits_be32(priv->base + DMA_CFG_REG, DMA_CFG_ENABLE_MASK);
+
+	/* get number of channels */
+	priv->n_channels = fdtdec_get_uint(gd->fdt_blob, dev_of_offset(dev),
+					   "dma-channels", 8);

dev_read_u32() ?

Quoted 28 lines

drivers/dma/bcm6348-iudma.c new file +27 -0

+	if (priv->n_channels > DMA_CHAN_MAX)
+		return -EINVAL;
+
+	/* alloc channel private data pointers */
+	priv->ch_priv = calloc(priv->n_channels,
+			       sizeof(struct bcm6348_chan_priv*));
+	if (!priv->ch_priv)
+		return -ENOMEM;
+
+	/* stop dma channels */
+	for (ch = 0; ch < priv->n_channels; ch++)
+		bcm6348_iudma_chan_stop(priv, ch);
+
+	/* enable dma controller */
+	setbits_be32(priv->base + DMA_CFG_REG, DMA_CFG_ENABLE_MASK);
+
+	return 0;
+}
+
+U_BOOT_DRIVER(bcm6348_iudma) = {
+	.name = "bcm6348_iudma",
+	.id = UCLASS_DMA,
+	.of_match = bcm6348_iudma_ids,
+	.ops = &bcm6348_iudma_ops,
+	.priv_auto_alloc_size = sizeof(struct bcm6348_iudma_priv),
+	.probe = bcm6348_iudma_probe,
+};

Signature · 9 lines

- Daniel

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Álvaro Fernández Rojas

2018-11-28 18:23 UTC #52 lore raw

PATCH v9 2/28 bmips: bcm6338: add bcm6348-iudma support

In reply to Álvaro Fernández Rojas

Signed-off-by Álvaro Fernández Rojas <[email protected]>

---
v9: no changes
v8: no changes
v5: no changes
v4: no changes
v3: no changes
v2: no changes

 arch/mips/dts/brcm,bcm6338.dtsi       | 14 ++++++++++++++
 include/dt-bindings/dma/bcm6338-dma.h | 15 +++++++++++++++
 2 files changed, 29 insertions(+)
 create mode 100644 include/dt-bindings/dma/bcm6338-dma.h

arch/mips/dts/brcm,bcm6338.dtsi +14 -0

index bbd58cf803..990355481c 100644
@@ -4,6 +4,7 @@
  */
 
 #include <dt-bindings/clock/bcm6338-clock.h>
+#include <dt-bindings/dma/bcm6338-dma.h>
 #include <dt-bindings/gpio/gpio.h>
 #include <dt-bindings/reset/bcm6338-reset.h>
 #include "skeleton.dtsi"

@@ -130,5 +131,18 @@
 			reg = <0xfffe3100 0x38>;
 			u-boot,dm-pre-reloc;
 		};
+
+		iudma: dma-controller at fffe2400 {
+			compatible = "brcm,bcm6348-iudma";
+			reg = <0xfffe2400 0x1c>,
+			      <0xfffe2500 0x60>,
+			      <0xfffe2600 0x60>;
+			reg-names = "dma",
+				    "dma-channels",
+				    "dma-sram";
+			#dma-cells = <1>;
+			dma-channels = <6>;
+			resets = <&periph_rst BCM6338_RST_DMAMEM>;
+		};
 	};
 };

include/dt-bindings/dma/bcm6338-dma.h new file +15 -0

new file mode 100644
index 0000000000..5dd66239b4
@@ -0,0 +1,15 @@
+/*
+ * Copyright (C) 2018 Álvaro Fernández Rojas <[email protected]>
+ *
+ * Derived from linux/drivers/net/ethernet/broadcom/bcm63xx_enet.c
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#ifndef __DT_BINDINGS_DMA_BCM6338_H
+#define __DT_BINDINGS_DMA_BCM6338_H
+
+#define BCM6338_DMA_ENET_RX	0
+#define BCM6338_DMA_ENET_TX	1
+
+#endif /* __DT_BINDINGS_DMA_BCM6338_H */

Signature · 1 line

2.11.0

Daniel Schwierzeck

2018-11-28 23:48 UTC #53 lore raw

PATCH v9 2/28 bmips: bcm6338: add bcm6348-iudma support

Am 28.11.18 um 19:23 schrieb Álvaro Fernández Rojas:

Quoted 51 lines

Signed-off-by Álvaro Fernández Rojas <[email protected]>

---
v9: no changes
v8: no changes
v5: no changes
v4: no changes
v3: no changes
v2: no changes

 arch/mips/dts/brcm,bcm6338.dtsi       | 14 ++++++++++++++
 include/dt-bindings/dma/bcm6338-dma.h | 15 +++++++++++++++
 2 files changed, 29 insertions(+)
 create mode 100644 include/dt-bindings/dma/bcm6338-dma.h

arch/mips/dts/brcm,bcm6338.dtsi +14 -0

index bbd58cf803..990355481c 100644
@@ -4,6 +4,7 @@
  */
 
 #include <dt-bindings/clock/bcm6338-clock.h>
+#include <dt-bindings/dma/bcm6338-dma.h>
 #include <dt-bindings/gpio/gpio.h>
 #include <dt-bindings/reset/bcm6338-reset.h>
 #include "skeleton.dtsi"

@@ -130,5 +131,18 @@
 			reg = <0xfffe3100 0x38>;
 			u-boot,dm-pre-reloc;
 		};
+
+		iudma: dma-controller at fffe2400 {
+			compatible = "brcm,bcm6348-iudma";
+			reg = <0xfffe2400 0x1c>,
+			      <0xfffe2500 0x60>,
+			      <0xfffe2600 0x60>;
+			reg-names = "dma",
+				    "dma-channels",
+				    "dma-sram";
+			#dma-cells = <1>;
+			dma-channels = <6>;
+			resets = <&periph_rst BCM6338_RST_DMAMEM>;
+		};
 	};
 };

include/dt-bindings/dma/bcm6338-dma.h new file +0 -0

new file mode 100644
index 0000000000..5dd66239b4

include/dt-bindings/dma/bcm6338-dma.h line 6

Quoted 6 lines

include/dt-bindings/dma/bcm6338-dma.h new file +6 -0

@@ -0,0 +1,15 @@
+/*
+ * Copyright (C) 2018 Álvaro Fernández Rojas <[email protected]>
+ *
+ * Derived from linux/drivers/net/ethernet/broadcom/bcm63xx_enet.c
+ *
+ * SPDX-License-Identifier:	GPL-2.0+

// SPDX-License-Identifier: GPL-2.0+

need to be fixed in all patches

Quoted 10 lines

include/dt-bindings/dma/bcm6338-dma.h new file +9 -0

+ */
+
+#ifndef __DT_BINDINGS_DMA_BCM6338_H
+#define __DT_BINDINGS_DMA_BCM6338_H
+
+#define BCM6338_DMA_ENET_RX	0
+#define BCM6338_DMA_ENET_TX	1
+
+#endif /* __DT_BINDINGS_DMA_BCM6338_H */

Signature · 9 lines

- Daniel

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Álvaro Fernández Rojas

2018-11-28 18:23 UTC #54 lore raw

PATCH v9 3/28 bmips: bcm6348: add bcm6348-iudma support

In reply to Álvaro Fernández Rojas

Signed-off-by Álvaro Fernández Rojas <[email protected]>

---
v9: no changes
v8: no changes
v5: no changes
v4: no changes
v3: no changes
v2: no changes

 arch/mips/dts/brcm,bcm6348.dtsi       | 16 ++++++++++++++++
 include/dt-bindings/dma/bcm6348-dma.h | 17 +++++++++++++++++
 2 files changed, 33 insertions(+)
 create mode 100644 include/dt-bindings/dma/bcm6348-dma.h

arch/mips/dts/brcm,bcm6348.dtsi +16 -0

index cc80bbc808..875de232ca 100644
@@ -4,6 +4,7 @@
  */
 
 #include <dt-bindings/clock/bcm6348-clock.h>
+#include <dt-bindings/dma/bcm6348-dma.h>
 #include <dt-bindings/gpio/gpio.h>
 #include <dt-bindings/reset/bcm6348-reset.h>
 #include "skeleton.dtsi"

@@ -159,5 +160,20 @@
 			reg = <0xfffe2300 0x38>;
 			u-boot,dm-pre-reloc;
 		};
+
+		iudma: dma-controller at fffe7000 {
+			compatible = "brcm,bcm6348-iudma";
+			reg = <0xfffe7000 0x1c>,
+			      <0xfffe7100 0x40>,
+			      <0xfffe7200 0x40>;
+			reg-names = "dma",
+				    "dma-channels",
+				    "dma-sram";
+			#dma-cells = <1>;
+			dma-channels = <4>;
+			clocks = <&periph_clk BCM6348_CLK_ENET>;
+			resets = <&periph_rst BCM6348_RST_ENET>,
+				 <&periph_rst BCM6348_RST_DMAMEM>;
+		};
 	};
 };

include/dt-bindings/dma/bcm6348-dma.h new file +17 -0

new file mode 100644
index 0000000000..a1d3a6456d
@@ -0,0 +1,17 @@
+/*
+ * Copyright (C) 2018 Álvaro Fernández Rojas <[email protected]>
+ *
+ * Derived from linux/drivers/net/ethernet/broadcom/bcm63xx_enet.c
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#ifndef __DT_BINDINGS_DMA_BCM6348_H
+#define __DT_BINDINGS_DMA_BCM6348_H
+
+#define BCM6348_DMA_ENET0_RX	0
+#define BCM6348_DMA_ENET0_TX	1
+#define BCM6348_DMA_ENET1_RX	2
+#define BCM6348_DMA_ENET1_TX	3
+
+#endif /* __DT_BINDINGS_DMA_BCM6348_H */

Signature · 1 line

2.11.0

Álvaro Fernández Rojas

2018-11-28 18:23 UTC #55 lore raw

PATCH v9 4/28 bmips: bcm6358: add bcm6348-iudma support

In reply to Álvaro Fernández Rojas

Signed-off-by Álvaro Fernández Rojas <[email protected]>

---
v9: no changes
v8: no changes
v5: no changes
v4: no changes
v3: no changes
v2: no changes

 arch/mips/dts/brcm,bcm6358.dtsi       | 18 ++++++++++++++++++
 include/dt-bindings/dma/bcm6358-dma.h | 17 +++++++++++++++++
 2 files changed, 35 insertions(+)
 create mode 100644 include/dt-bindings/dma/bcm6358-dma.h

arch/mips/dts/brcm,bcm6358.dtsi +18 -0

index 0617b46e92..5605723e83 100644
@@ -4,6 +4,7 @@
  */
 
 #include <dt-bindings/clock/bcm6358-clock.h>
+#include <dt-bindings/dma/bcm6358-dma.h>
 #include <dt-bindings/gpio/gpio.h>
 #include <dt-bindings/reset/bcm6358-reset.h>
 #include "skeleton.dtsi"

@@ -190,5 +191,22 @@
 
 			status = "disabled";
 		};
+
+		iudma: dma-controller at fffe5000 {
+			compatible = "brcm,bcm6348-iudma";
+			reg = <0xfffe5000 0x24>,
+			      <0xfffe5100 0x80>,
+			      <0xfffe5200 0x80>;
+			reg-names = "dma",
+				    "dma-channels",
+				    "dma-sram";
+			#dma-cells = <1>;
+			dma-channels = <8>;
+			clocks = <&periph_clk BCM6358_CLK_EMUSB>,
+				 <&periph_clk BCM6358_CLK_USBSU>,
+				 <&periph_clk BCM6358_CLK_EPHY>;
+			resets = <&periph_rst BCM6358_RST_ENET>,
+				 <&periph_rst BCM6358_RST_EPHY>;
+		};
 	};
 };

include/dt-bindings/dma/bcm6358-dma.h new file +17 -0

new file mode 100644
index 0000000000..3b1fcf8540
@@ -0,0 +1,17 @@
+/*
+ * Copyright (C) 2018 Álvaro Fernández Rojas <[email protected]>
+ *
+ * Derived from linux/drivers/net/ethernet/broadcom/bcm63xx_enet.c
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#ifndef __DT_BINDINGS_DMA_BCM6358_H
+#define __DT_BINDINGS_DMA_BCM6358_H
+
+#define BCM6358_DMA_ENET0_RX	0
+#define BCM6358_DMA_ENET0_TX	1
+#define BCM6358_DMA_ENET1_RX	2
+#define BCM6358_DMA_ENET1_TX	3
+
+#endif /* __DT_BINDINGS_DMA_BCM6358_H */

Signature · 1 line

2.11.0

Álvaro Fernández Rojas

2018-11-28 18:23 UTC #56 lore raw

PATCH v9 5/28 bmips: bcm6368: add bcm6348-iudma support

In reply to Álvaro Fernández Rojas

Signed-off-by Álvaro Fernández Rojas <[email protected]>

---
v9: no changes
v8: introduce bcm6368-enet driver

 arch/mips/dts/brcm,bcm6368.dtsi       | 13 +++++++++++++
 include/dt-bindings/dma/bcm6368-dma.h | 15 +++++++++++++++
 2 files changed, 28 insertions(+)
 create mode 100644 include/dt-bindings/dma/bcm6368-dma.h

arch/mips/dts/brcm,bcm6368.dtsi +13 -0

index 65d769ab4f..30047f6360 100644
@@ -4,6 +4,7 @@
  */
 
 #include <dt-bindings/clock/bcm6368-clock.h>
+#include <dt-bindings/dma/bcm6368-dma.h>
 #include <dt-bindings/gpio/gpio.h>
 #include <dt-bindings/reset/bcm6368-reset.h>
 #include "skeleton.dtsi"

@@ -192,5 +193,17 @@
 
 			status = "disabled";
 		};
+
+		iudma: dma-controller at 10006800 {
+			compatible = "brcm,bcm6368-iudma";
+			reg = <0x10006800 0x80>,
+			      <0x10006a00 0x80>,
+			      <0x10006c00 0x80>;
+			reg-names = "dma",
+				    "dma-channels",
+				    "dma-sram";
+			#dma-cells = <1>;
+			dma-channels = <8>;
+		};
 	};
 };

include/dt-bindings/dma/bcm6368-dma.h new file +15 -0

new file mode 100644
index 0000000000..45ffb89e0a
@@ -0,0 +1,15 @@
+/*
+ * Copyright (C) 2018 Álvaro Fernández Rojas <[email protected]>
+ *
+ * Derived from linux/drivers/net/ethernet/broadcom/bcm63xx_enet.c
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#ifndef __DT_BINDINGS_DMA_BCM6368_H
+#define __DT_BINDINGS_DMA_BCM6368_H
+
+#define BCM6368_DMA_ENETSW_RX	0
+#define BCM6368_DMA_ENETSW_TX	1
+
+#endif /* __DT_BINDINGS_DMA_BCM6368_H */

Signature · 1 line

2.11.0

Álvaro Fernández Rojas

2018-11-28 18:23 UTC #57 lore raw

PATCH v9 6/28 bmips: bcm6328: add bcm6348-iudma support

In reply to Álvaro Fernández Rojas

Signed-off-by Álvaro Fernández Rojas <[email protected]>

---
v9: no changes
v8: introduce bcm6368-enet driver

 arch/mips/dts/brcm,bcm6328.dtsi       | 13 +++++++++++++
 include/dt-bindings/dma/bcm6328-dma.h | 15 +++++++++++++++
 2 files changed, 28 insertions(+)
 create mode 100644 include/dt-bindings/dma/bcm6328-dma.h

arch/mips/dts/brcm,bcm6328.dtsi +13 -0

index e00a2950e2..6fa49e22bb 100644
@@ -4,6 +4,7 @@
  */
 
 #include <dt-bindings/clock/bcm6328-clock.h>
+#include <dt-bindings/dma/bcm6328-dma.h>
 #include <dt-bindings/gpio/gpio.h>
 #include <dt-bindings/power-domain/bcm6328-power-domain.h>
 #include <dt-bindings/reset/bcm6328-reset.h>

@@ -187,5 +188,17 @@
 			reg = <0x10003000 0x864>;
 			u-boot,dm-pre-reloc;
 		};
+
+		iudma: dma-controller at 1000d800 {
+			compatible = "brcm,bcm6368-iudma";
+			reg = <0x1000d800 0x80>,
+			      <0x1000da00 0x80>,
+			      <0x1000dc00 0x80>;
+			reg-names = "dma",
+				    "dma-channels",
+				    "dma-sram";
+			#dma-cells = <1>;
+			dma-channels = <8>;
+		};
 	};
 };

include/dt-bindings/dma/bcm6328-dma.h new file +15 -0

new file mode 100644
index 0000000000..508a5dc523
@@ -0,0 +1,15 @@
+/*
+ * Copyright (C) 2018 Álvaro Fernández Rojas <[email protected]>
+ *
+ * Derived from linux/drivers/net/ethernet/broadcom/bcm63xx_enet.c
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#ifndef __DT_BINDINGS_DMA_BCM6328_H
+#define __DT_BINDINGS_DMA_BCM6328_H
+
+#define BCM6328_DMA_ENETSW_RX	0
+#define BCM6328_DMA_ENETSW_TX	1
+
+#endif /* __DT_BINDINGS_DMA_BCM6328_H */

Signature · 1 line

2.11.0

Álvaro Fernández Rojas

2018-11-28 18:23 UTC #58 lore raw

PATCH v9 7/28 bmips: bcm6362: add bcm6348-iudma support

In reply to Álvaro Fernández Rojas

Signed-off-by Álvaro Fernández Rojas <[email protected]>

---
v9: no changes
v8: introduce bcm6368-enet driver

 arch/mips/dts/brcm,bcm6362.dtsi       | 13 +++++++++++++
 include/dt-bindings/dma/bcm6362-dma.h | 15 +++++++++++++++
 2 files changed, 28 insertions(+)
 create mode 100644 include/dt-bindings/dma/bcm6362-dma.h

arch/mips/dts/brcm,bcm6362.dtsi +13 -0

index 3047b82b21..94e7de096d 100644
@@ -4,6 +4,7 @@
  */
 
 #include <dt-bindings/clock/bcm6362-clock.h>
+#include <dt-bindings/dma/bcm6362-dma.h>
 #include <dt-bindings/gpio/gpio.h>
 #include <dt-bindings/power-domain/bcm6362-power-domain.h>
 #include <dt-bindings/reset/bcm6362-reset.h>

@@ -211,5 +212,17 @@
 			reg = <0x10003000 0x864>;
 			u-boot,dm-pre-reloc;
 		};
+
+		iudma: dma-controller at 1000d800 {
+			compatible = "brcm,bcm6368-iudma";
+			reg = <0x1000d800 0x80>,
+			      <0x1000da00 0x80>,
+			      <0x1000dc00 0x80>;
+			reg-names = "dma",
+				    "dma-channels",
+				    "dma-sram";
+			#dma-cells = <1>;
+			dma-channels = <8>;
+		};
 	};
 };

include/dt-bindings/dma/bcm6362-dma.h new file +15 -0

new file mode 100644
index 0000000000..b90b3ffeb6
@@ -0,0 +1,15 @@
+/*
+ * Copyright (C) 2018 Álvaro Fernández Rojas <[email protected]>
+ *
+ * Derived from linux/drivers/net/ethernet/broadcom/bcm63xx_enet.c
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#ifndef __DT_BINDINGS_DMA_BCM6362_H
+#define __DT_BINDINGS_DMA_BCM6362_H
+
+#define BCM6362_DMA_ENETSW_RX	0
+#define BCM6362_DMA_ENETSW_TX	1
+
+#endif /* __DT_BINDINGS_DMA_BCM6362_H */

Signature · 1 line

2.11.0

Álvaro Fernández Rojas

2018-11-28 18:23 UTC #59 lore raw

PATCH v9 8/28 bmips: bcm63268: add bcm6348-iudma support

In reply to Álvaro Fernández Rojas

Signed-off-by Álvaro Fernández Rojas <[email protected]>

---
v9: no changes
v8: introduce bcm6368-enet driver

 arch/mips/dts/brcm,bcm63268.dtsi       | 13 +++++++++++++
 include/dt-bindings/dma/bcm63268-dma.h | 15 +++++++++++++++
 2 files changed, 28 insertions(+)
 create mode 100644 include/dt-bindings/dma/bcm63268-dma.h

arch/mips/dts/brcm,bcm63268.dtsi +13 -0

index 62c440e675..c7ad83c306 100644
@@ -4,6 +4,7 @@
  */
 
 #include <dt-bindings/clock/bcm63268-clock.h>
+#include <dt-bindings/dma/bcm63268-dma.h>
 #include <dt-bindings/gpio/gpio.h>
 #include <dt-bindings/power-domain/bcm63268-power-domain.h>
 #include <dt-bindings/reset/bcm63268-reset.h>

@@ -217,5 +218,17 @@
 			reg = <0x10003000 0x894>;
 			u-boot,dm-pre-reloc;
 		};
+
+		iudma: dma-controller at 1000d800 {
+			compatible = "brcm,bcm6368-iudma";
+			reg = <0x1000d800 0x80>,
+			      <0x1000da00 0x80>,
+			      <0x1000dc00 0x80>;
+			reg-names = "dma",
+				    "dma-channels",
+				    "dma-sram";
+			#dma-cells = <1>;
+			dma-channels = <8>;
+		};
 	};
 };

include/dt-bindings/dma/bcm63268-dma.h new file +15 -0

new file mode 100644
index 0000000000..d5d7453be1
@@ -0,0 +1,15 @@
+/*
+ * Copyright (C) 2018 Álvaro Fernández Rojas <[email protected]>
+ *
+ * Derived from linux/drivers/net/ethernet/broadcom/bcm63xx_enet.c
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#ifndef __DT_BINDINGS_DMA_BCM63268_H
+#define __DT_BINDINGS_DMA_BCM63268_H
+
+#define BCM63268_DMA_ENETSW_RX	0
+#define BCM63268_DMA_ENETSW_TX	1
+
+#endif /* __DT_BINDINGS_DMA_BCM63268_H */

Signature · 1 line

2.11.0

Álvaro Fernández Rojas

2018-11-28 18:23 UTC #60 lore raw

PATCH v9 9/28 bmips: bcm6318: add bcm6348-iudma support

In reply to Álvaro Fernández Rojas

Signed-off-by Álvaro Fernández Rojas <[email protected]>

---
v9: no changes
v8: introduce bcm6368-enet driver

 arch/mips/dts/brcm,bcm6318.dtsi       | 19 +++++++++++++++++++
 include/dt-bindings/dma/bcm6318-dma.h | 15 +++++++++++++++
 2 files changed, 34 insertions(+)
 create mode 100644 include/dt-bindings/dma/bcm6318-dma.h

arch/mips/dts/brcm,bcm6318.dtsi +19 -0

index f75988be12..d04b7cbb01 100644
@@ -4,6 +4,7 @@
  */
 
 #include <dt-bindings/clock/bcm6318-clock.h>
+#include <dt-bindings/dma/bcm6318-dma.h>
 #include <dt-bindings/gpio/gpio.h>
 #include <dt-bindings/power-domain/bcm6318-power-domain.h>
 #include <dt-bindings/reset/bcm6318-reset.h>

@@ -54,6 +55,12 @@
 			reg = <0x10000004 0x4>;
 			#clock-cells = <1>;
 		};
+
+		ubus_clk: ubus-clk {
+			compatible = "brcm,bcm6345-clk";
+			reg = <0x10000008 0x4>;
+			#clock-cells = <1>;
+		};
 	};
 
 	ubus {

@@ -182,5 +189,17 @@
 
 			status = "disabled";
 		};
+
+		iudma: dma-controller at 10088000 {
+			compatible = "brcm,bcm6368-iudma";
+			reg = <0x10088000 0x80>,
+			      <0x10088200 0x80>,
+			      <0x10088400 0x80>;
+			reg-names = "dma",
+				    "dma-channels",
+				    "dma-sram";
+			#dma-cells = <1>;
+			dma-channels = <8>;
+		};
 	};
 };

include/dt-bindings/dma/bcm6318-dma.h new file +15 -0

new file mode 100644
index 0000000000..c039391395
@@ -0,0 +1,15 @@
+/*
+ * Copyright (C) 2018 Álvaro Fernández Rojas <[email protected]>
+ *
+ * Derived from linux/drivers/net/ethernet/broadcom/bcm63xx_enet.c
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#ifndef __DT_BINDINGS_DMA_BCM6318_H
+#define __DT_BINDINGS_DMA_BCM6318_H
+
+#define BCM6318_DMA_ENETSW_RX	0
+#define BCM6318_DMA_ENETSW_TX	1
+
+#endif /* __DT_BINDINGS_DMA_BCM6318_H */

Signature · 1 line

2.11.0

Álvaro Fernández Rojas

2018-11-28 18:23 UTC #61 lore raw

PATCH v9 10/28 net: add support for bcm6348-enet

In reply to Álvaro Fernández Rojas

Signed-off-by Álvaro Fernández Rojas <[email protected]>

---
v9: use dma_prepare_rcv_buf and remove dma rx channel reset:
- bcm6348_eth_recv: clear dirty dma descriptors only when packets are copied from rx dma.
- bcm6348_eth_send: remove dma rx channel reset when sending packet.
v8: Introduce changes from Grygorii Strashko
v5: Receive as much packets as possible from bcm6348-eth and cache them in net_rx_packets. This is needed in order to fix flow control issues.
v4: Fix issues reported by Grygorii Strashko and other fixes:
- Copy received dma buffer to net_rx_packets in order to avoid possible dma overwrites.
- Reset dma rx channel when sending a new packet to prevent flow control issues.
- Fix packet casting on bcm6348_eth_recv/send.
v3: no changes
v2: select DMA_CHANNELS.

 drivers/net/Kconfig            |  10 +
 drivers/net/Makefile           |   1 +
 drivers/net/bcm6348-eth.c      | 576 +++++++++++++++++++++++++++++++++++++++++
 include/configs/bmips_common.h |   5 +-
 4 files changed, 591 insertions(+), 1 deletion(-)
 create mode 100644 drivers/net/bcm6348-eth.c

drivers/net/Kconfig +10 -0

index 8fb365fc5d..2b7cec8804 100644
@@ -72,6 +72,16 @@ config BCM_SF2_ETH_GMAC
 	  by the BCM_SF2_ETH driver.
 	  Say Y to any bcmcygnus based platforms.
 
+config BCM6348_ETH
+	bool "BCM6348 EMAC support"
+	depends on DM_ETH && ARCH_BMIPS
+	select DMA
+	select DMA_CHANNELS
+	select MII
+	select PHYLIB
+	help
+	  This driver supports the BCM6348 Ethernet MAC.
+
 config DWC_ETH_QOS
 	bool "Synopsys DWC Ethernet QOS device support"
 	depends on DM_ETH

drivers/net/Makefile +1 -0

index 99056aa041..2647d4dd23 100644
@@ -6,6 +6,7 @@
 obj-$(CONFIG_ALTERA_TSE) += altera_tse.o
 obj-$(CONFIG_AG7XXX) += ag7xxx.o
 obj-$(CONFIG_ARMADA100_FEC) += armada100_fec.o
+obj-$(CONFIG_BCM6348_ETH) += bcm6348-eth.o
 obj-$(CONFIG_DRIVER_AT91EMAC) += at91_emac.o
 obj-$(CONFIG_DRIVER_AX88180) += ax88180.o
 obj-$(CONFIG_BCM_SF2_ETH) += bcm-sf2-eth.o

drivers/net/bcm6348-eth.c new file +576 -0

576 lines not on this page · raw message

include/configs/bmips_common.h +4 -1

index 39ca2e0bf3..65aa9c77cc 100644
@@ -6,6 +6,9 @@
 #ifndef __CONFIG_BMIPS_COMMON_H
 #define __CONFIG_BMIPS_COMMON_H
 
+/* ETH */
+#define CONFIG_PHY_RESET_DELAY		20
+
 /* UART */
 #define CONFIG_SYS_BAUDRATE_TABLE	{ 9600, 19200, 38400, 57600, 115200, \
 					  230400, 500000, 1500000 }

@@ -16,7 +19,7 @@
 
 /* Memory usage */
 #define CONFIG_SYS_MAXARGS		24
-#define CONFIG_SYS_MALLOC_LEN		(1024 * 1024)
+#define CONFIG_SYS_MALLOC_LEN		(2 * 1024 * 1024)
 #define CONFIG_SYS_BOOTPARAMS_LEN	(128 * 1024)
 #define CONFIG_SYS_CBSIZE		512

Signature · 1 line

2.11.0

Daniel Schwierzeck

2018-11-28 23:58 UTC #62 lore raw

PATCH v9 10/28 net: add support for bcm6348-enet

Am 28.11.18 um 19:23 schrieb Álvaro Fernández Rojas:

Quoted 528 lines

Signed-off-by Álvaro Fernández Rojas <[email protected]>

 drivers/net/Kconfig            |  10 +
 drivers/net/Makefile           |   1 +
 drivers/net/bcm6348-eth.c      | 576 +++++++++++++++++++++++++++++++++++++++++
 include/configs/bmips_common.h |   5 +-
 4 files changed, 591 insertions(+), 1 deletion(-)
 create mode 100644 drivers/net/bcm6348-eth.c

drivers/net/Kconfig +10 -0

index 8fb365fc5d..2b7cec8804 100644
@@ -72,6 +72,16 @@ config BCM_SF2_ETH_GMAC
 	  by the BCM_SF2_ETH driver.
 	  Say Y to any bcmcygnus based platforms.
 
+config BCM6348_ETH
+	bool "BCM6348 EMAC support"
+	depends on DM_ETH && ARCH_BMIPS
+	select DMA
+	select DMA_CHANNELS
+	select MII
+	select PHYLIB
+	help
+	  This driver supports the BCM6348 Ethernet MAC.
+
 config DWC_ETH_QOS
 	bool "Synopsys DWC Ethernet QOS device support"
 	depends on DM_ETH

drivers/net/Makefile +1 -0

index 99056aa041..2647d4dd23 100644
@@ -6,6 +6,7 @@
 obj-$(CONFIG_ALTERA_TSE) += altera_tse.o
 obj-$(CONFIG_AG7XXX) += ag7xxx.o
 obj-$(CONFIG_ARMADA100_FEC) += armada100_fec.o
+obj-$(CONFIG_BCM6348_ETH) += bcm6348-eth.o
 obj-$(CONFIG_DRIVER_AT91EMAC) += at91_emac.o
 obj-$(CONFIG_DRIVER_AX88180) += ax88180.o
 obj-$(CONFIG_BCM_SF2_ETH) += bcm-sf2-eth.o

drivers/net/bcm6348-eth.c new file +464 -0

new file mode 100644
index 0000000000..24a44d83cb
@@ -0,0 +1,576 @@
+/*
+ * Copyright (C) 2018 Álvaro Fernández Rojas <[email protected]>
+ *
+ * Derived from linux/drivers/net/ethernet/broadcom/bcm63xx_enet.c:
+ *	Copyright (C) 2008 Maxime Bizon <[email protected]>
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include <common.h>
+#include <clk.h>
+#include <dm.h>
+#include <dma.h>
+#include <miiphy.h>
+#include <net.h>
+#include <phy.h>
+#include <reset.h>
+#include <wait_bit.h>
+#include <asm/io.h>
+
+#define ETH_RX_DESC			PKTBUFSRX
+#define ETH_MAX_MTU_SIZE		1518
+#define ETH_TIMEOUT			100
+#define ETH_TX_WATERMARK		32
+
+/* ETH Receiver Configuration register */
+#define ETH_RXCFG_REG			0x00
+#define ETH_RXCFG_ENFLOW_SHIFT		5
+#define ETH_RXCFG_ENFLOW_MASK		(1 << ETH_RXCFG_ENFLOW_SHIFT)
+
+/* ETH Receive Maximum Length register */
+#define ETH_RXMAXLEN_REG		0x04
+#define ETH_RXMAXLEN_SHIFT		0
+#define ETH_RXMAXLEN_MASK		(0x7ff << ETH_RXMAXLEN_SHIFT)
+
+/* ETH Transmit Maximum Length register */
+#define ETH_TXMAXLEN_REG		0x08
+#define ETH_TXMAXLEN_SHIFT		0
+#define ETH_TXMAXLEN_MASK		(0x7ff << ETH_TXMAXLEN_SHIFT)
+
+/* MII Status/Control register */
+#define MII_SC_REG			0x10
+#define MII_SC_MDCFREQDIV_SHIFT		0
+#define MII_SC_MDCFREQDIV_MASK		(0x7f << MII_SC_MDCFREQDIV_SHIFT)
+#define MII_SC_PREAMBLE_EN_SHIFT	7
+#define MII_SC_PREAMBLE_EN_MASK		(1 << MII_SC_PREAMBLE_EN_SHIFT)
+
+/* MII Data register */
+#define MII_DAT_REG			0x14
+#define MII_DAT_DATA_SHIFT		0
+#define MII_DAT_DATA_MASK		(0xffff << MII_DAT_DATA_SHIFT)
+#define MII_DAT_TA_SHIFT		16
+#define MII_DAT_TA_MASK			(0x3 << MII_DAT_TA_SHIFT)
+#define MII_DAT_REG_SHIFT		18
+#define MII_DAT_REG_MASK		(0x1f << MII_DAT_REG_SHIFT)
+#define MII_DAT_PHY_SHIFT		23
+#define MII_DAT_PHY_MASK		(0x1f << MII_DAT_PHY_SHIFT)
+#define MII_DAT_OP_SHIFT		28
+#define MII_DAT_OP_WRITE		(0x5 << MII_DAT_OP_SHIFT)
+#define MII_DAT_OP_READ			(0x6 << MII_DAT_OP_SHIFT)
+
+/* ETH Interrupts Mask register */
+#define ETH_IRMASK_REG			0x18
+
+/* ETH Interrupts register */
+#define ETH_IR_REG			0x1c
+#define ETH_IR_MII_SHIFT		0
+#define ETH_IR_MII_MASK			(1 << ETH_IR_MII_SHIFT)
+
+/* ETH Control register */
+#define ETH_CTL_REG			0x2c
+#define ETH_CTL_ENABLE_SHIFT		0
+#define ETH_CTL_ENABLE_MASK		(1 << ETH_CTL_ENABLE_SHIFT)
+#define ETH_CTL_DISABLE_SHIFT		1
+#define ETH_CTL_DISABLE_MASK		(1 << ETH_CTL_DISABLE_SHIFT)
+#define ETH_CTL_RESET_SHIFT		2
+#define ETH_CTL_RESET_MASK		(1 << ETH_CTL_RESET_SHIFT)
+#define ETH_CTL_EPHY_SHIFT		3
+#define ETH_CTL_EPHY_MASK		(1 << ETH_CTL_EPHY_SHIFT)
+
+/* ETH Transmit Control register */
+#define ETH_TXCTL_REG			0x30
+#define ETH_TXCTL_FD_SHIFT		0
+#define ETH_TXCTL_FD_MASK		(1 << ETH_TXCTL_FD_SHIFT)
+
+/* ETH Transmit Watermask register */
+#define ETH_TXWMARK_REG			0x34
+#define ETH_TXWMARK_WM_SHIFT		0
+#define ETH_TXWMARK_WM_MASK		(0x3f << ETH_TXWMARK_WM_SHIFT)
+
+/* MIB Control register */
+#define MIB_CTL_REG			0x38
+#define MIB_CTL_RDCLEAR_SHIFT		0
+#define MIB_CTL_RDCLEAR_MASK		(1 << MIB_CTL_RDCLEAR_SHIFT)
+
+/* ETH Perfect Match registers */
+#define ETH_PM_CNT			4
+#define ETH_PML_REG(x)			(0x58 + (x) * 0x8)
+#define ETH_PMH_REG(x)			(0x5c + (x) * 0x8)
+#define ETH_PMH_VALID_SHIFT		16
+#define ETH_PMH_VALID_MASK		(1 << ETH_PMH_VALID_SHIFT)
+
+/* MIB Counters registers */
+#define MIB_REG_CNT			55
+#define MIB_REG(x)			(0x200 + (x) * 4)
+
+/* ETH data */
+struct bcm6348_eth_priv {
+	void __iomem *base;
+	/* RX */
+	uint8_t rx_desc;
+	uint8_t rx_pend;
+	int rx_ret[ETH_RX_DESC];
+	/* DMA */
+	struct dma rx_dma;
+	struct dma tx_dma;
+	/* PHY */
+	int phy_id;
+	struct phy_device *phy_dev;
+};
+
+DECLARE_GLOBAL_DATA_PTR;
+
+static void bcm6348_eth_mac_disable(struct bcm6348_eth_priv *priv)
+{
+	/* disable emac */
+	clrsetbits_be32(priv->base + ETH_CTL_REG, ETH_CTL_ENABLE_MASK,
+			ETH_CTL_DISABLE_MASK);
+
+	/* wait until emac is disabled */
+	if (wait_for_bit_be32(priv->base + ETH_CTL_REG,
+			      ETH_CTL_DISABLE_MASK, false,
+			      ETH_TIMEOUT, false))
+		pr_err("error disabling emac\n");
+}
+
+static void bcm6348_eth_mac_enable(struct bcm6348_eth_priv *priv)
+{
+	setbits_be32(priv->base + ETH_CTL_REG, ETH_CTL_ENABLE_MASK);
+}
+
+static void bcm6348_eth_mac_reset(struct bcm6348_eth_priv *priv)
+{
+	/* reset emac */
+	writel_be(ETH_CTL_RESET_MASK, priv->base + ETH_CTL_REG);
+	wmb();
+
+	/* wait until emac is reset */
+	if (wait_for_bit_be32(priv->base + ETH_CTL_REG,
+			      ETH_CTL_RESET_MASK, false,
+			      ETH_TIMEOUT, false))
+		pr_err("error resetting emac\n");
+}
+
+static int bcm6348_eth_free_pkt(struct udevice *dev, uchar *packet, int len)
+{
+	struct bcm6348_eth_priv *priv = dev_get_priv(dev);
+
+	/* sanity check */
+	if (packet != net_rx_packets[priv->rx_pend]) {
+		pr_err("rx_pend %d: packet is not matched,\n", priv->rx_pend);
+		return -EAGAIN;
+	}
+
+	/* free pending packet */
+	priv->rx_ret[priv->rx_pend] = 0;
+	priv->rx_pend = (priv->rx_pend + 1) % ETH_RX_DESC;
+
+	return 0;
+}
+
+static int _bcm6348_eth_recv(struct bcm6348_eth_priv *priv)
+{
+	uint8_t pkt = priv->rx_desc;
+
+	/* check if packet is free */
+	if (priv->rx_ret[pkt] > 0)
+		return -EAGAIN;
+
+	/* try to receive a new packet */
+	priv->rx_ret[pkt] = dma_receive(&priv->rx_dma,
+					(void **)&net_rx_packets[pkt],
+					NULL);
+	if (priv->rx_ret[pkt] > 0)
+		priv->rx_desc = (priv->rx_desc + 1) % ETH_RX_DESC;
+
+	return priv->rx_ret[pkt];
+}
+
+static int bcm6348_eth_recv(struct udevice *dev, int flags, uchar **packetp)
+{
+	struct bcm6348_eth_priv *priv = dev_get_priv(dev);
+
+	/* receive packets if queue is empty */
+	if (priv->rx_ret[priv->rx_pend] <= 0) {
+		uint8_t pkt_cnt = 0;
+
+		/* try to receive packets */
+		while (_bcm6348_eth_recv(priv) > 0)
+			pkt_cnt++;
+
+		dma_prepare_rcv_buf(&priv->rx_dma, NULL, 0);
+
+		if (pkt_cnt)
+			debug("%s: received %u packet(s)\n", __func__, pkt_cnt);
+	}
+
+	/* return current packet */
+	if (priv->rx_ret[priv->rx_pend] > 0)
+		*packetp = net_rx_packets[priv->rx_pend];
+
+	return priv->rx_ret[priv->rx_pend];
+}
+
+static int bcm6348_eth_send(struct udevice *dev, void *packet, int length)
+{
+	struct bcm6348_eth_priv *priv = dev_get_priv(dev);
+
+	return dma_send(&priv->tx_dma, packet, length, NULL);
+}
+
+static int bcm6348_eth_adjust_link(struct udevice *dev,
+				   struct phy_device *phydev)
+{
+	struct bcm6348_eth_priv *priv = dev_get_priv(dev);
+
+	/* mac duplex parameters */
+	if (phydev->duplex)
+		setbits_be32(priv->base + ETH_TXCTL_REG, ETH_TXCTL_FD_MASK);
+	else
+		clrbits_be32(priv->base + ETH_TXCTL_REG, ETH_TXCTL_FD_MASK);
+
+	/* rx flow control (pause frame handling) */
+	if (phydev->pause)
+		setbits_be32(priv->base + ETH_RXCFG_REG,
+			     ETH_RXCFG_ENFLOW_MASK);
+	else
+		clrbits_be32(priv->base + ETH_RXCFG_REG,
+			     ETH_RXCFG_ENFLOW_MASK);
+
+	return 0;
+}
+
+static int bcm6348_eth_start(struct udevice *dev)
+{
+	struct bcm6348_eth_priv *priv = dev_get_priv(dev);
+	int ret, i;
+
+	priv->rx_desc = 0;
+	priv->rx_pend = 0;
+	for (i = 0; i < ETH_RX_DESC; i++)
+		priv->rx_ret[i] = 0;
+
+	/* enable dma rx channel */
+	dma_enable(&priv->rx_dma);
+
+	/* enable dma tx channel */
+	dma_enable(&priv->tx_dma);
+
+	ret = phy_startup(priv->phy_dev);
+	if (ret) {
+		pr_err("could not initialize phy\n");
+		return ret;
+	}
+
+	if (!priv->phy_dev->link) {
+		pr_err("no phy link\n");
+		return -EIO;
+	}
+
+	bcm6348_eth_adjust_link(dev, priv->phy_dev);
+
+	/* zero mib counters */
+	for (i = 0; i < MIB_REG_CNT; i++)
+		writel_be(0, MIB_REG(i));
+
+	/* enable rx flow control */
+	setbits_be32(priv->base + ETH_RXCFG_REG, ETH_RXCFG_ENFLOW_MASK);
+
+	/* set max rx/tx length */
+	writel_be((ETH_MAX_MTU_SIZE << ETH_RXMAXLEN_SHIFT) &
+		  ETH_RXMAXLEN_MASK, priv->base + ETH_RXMAXLEN_REG);
+	writel_be((ETH_MAX_MTU_SIZE << ETH_TXMAXLEN_SHIFT) &
+		   ETH_TXMAXLEN_MASK, priv->base + ETH_TXMAXLEN_REG);
+
+	/* set correct transmit fifo watermark */
+	writel_be((ETH_TX_WATERMARK << ETH_TXWMARK_WM_SHIFT) &
+		  ETH_TXWMARK_WM_MASK, priv->base + ETH_TXWMARK_REG);
+
+	/* enable emac */
+	bcm6348_eth_mac_enable(priv);
+
+	/* clear interrupts */
+	writel_be(0, priv->base + ETH_IRMASK_REG);
+
+	return 0;
+}
+
+static void bcm6348_eth_stop(struct udevice *dev)
+{
+	struct bcm6348_eth_priv *priv = dev_get_priv(dev);
+
+	/* disable dma rx channel */
+	dma_disable(&priv->rx_dma);
+
+	/* disable dma tx channel */
+	dma_disable(&priv->tx_dma);
+
+	/* disable emac */
+	bcm6348_eth_mac_disable(priv);
+}
+
+static int bcm6348_eth_write_hwaddr(struct udevice *dev)
+{
+	struct eth_pdata *pdata = dev_get_platdata(dev);
+	struct bcm6348_eth_priv *priv = dev_get_priv(dev);
+	bool running = false;
+
+	/* check if emac is running */
+	if (readl_be(priv->base + ETH_CTL_REG) & ETH_CTL_ENABLE_MASK)
+		running = true;
+
+	/* disable emac */
+	if (running)
+		bcm6348_eth_mac_disable(priv);
+
+	/* set mac address */
+	writel_be((pdata->enetaddr[2] << 24) | (pdata->enetaddr[3]) << 16 |
+		  (pdata->enetaddr[4]) << 8 | (pdata->enetaddr[5]),
+		  priv->base + ETH_PML_REG(0));
+	writel_be((pdata->enetaddr[1]) | (pdata->enetaddr[0] << 8) |
+		  ETH_PMH_VALID_MASK, priv->base + ETH_PMH_REG(0));
+
+	/* enable emac */
+	if (running)
+		bcm6348_eth_mac_enable(priv);
+
+	return 0;
+}
+
+static const struct eth_ops bcm6348_eth_ops = {
+	.free_pkt = bcm6348_eth_free_pkt,
+	.recv = bcm6348_eth_recv,
+	.send = bcm6348_eth_send,
+	.start = bcm6348_eth_start,
+	.stop = bcm6348_eth_stop,
+	.write_hwaddr = bcm6348_eth_write_hwaddr,
+};
+
+static const struct udevice_id bcm6348_eth_ids[] = {
+	{ .compatible = "brcm,bcm6348-enet", },
+	{ /* sentinel */ }
+};
+
+static int bcm6348_mdio_op(void __iomem *base, uint32_t data)
+{
+	/* make sure mii interrupt status is cleared */
+	writel_be(ETH_IR_MII_MASK, base + ETH_IR_REG);
+
+	/* issue mii op */
+	writel_be(data, base + MII_DAT_REG);
+
+	/* wait until emac is disabled */
+	return wait_for_bit_be32(base + ETH_IR_REG,
+				 ETH_IR_MII_MASK, true,
+				 ETH_TIMEOUT, false);
+}
+
+static int bcm6348_mdio_read(struct mii_dev *bus, int addr, int devaddr,
+			     int reg)
+{
+	void __iomem *base = bus->priv;
+	uint32_t val;
+
+	val = MII_DAT_OP_READ;
+	val |= (reg << MII_DAT_REG_SHIFT) & MII_DAT_REG_MASK;
+	val |= (0x2 << MII_DAT_TA_SHIFT) & MII_DAT_TA_MASK;
+	val |= (addr << MII_DAT_PHY_SHIFT) & MII_DAT_PHY_MASK;
+
+	if (bcm6348_mdio_op(base, val)) {
+		pr_err("%s: timeout\n", __func__);
+		return -EINVAL;
+	}
+
+	val = readl_be(base + MII_DAT_REG) & MII_DAT_DATA_MASK;
+	val >>= MII_DAT_DATA_SHIFT;
+
+	return val;
+}
+
+static int bcm6348_mdio_write(struct mii_dev *bus, int addr, int dev_addr,
+			      int reg, u16 value)
+{
+	void __iomem *base = bus->priv;
+	uint32_t val;
+
+	val = MII_DAT_OP_WRITE;
+	val |= (reg << MII_DAT_REG_SHIFT) & MII_DAT_REG_MASK;
+	val |= (0x2 << MII_DAT_TA_SHIFT) & MII_DAT_TA_MASK;
+	val |= (addr << MII_DAT_PHY_SHIFT) & MII_DAT_PHY_MASK;
+	val |= (value << MII_DAT_DATA_SHIFT) & MII_DAT_DATA_MASK;
+
+	if (bcm6348_mdio_op(base, val)) {
+		pr_err("%s: timeout\n", __func__);
+		return -EINVAL;
+	}
+
+	return 0;
+}
+
+static int bcm6348_mdio_init(const char *name, void __iomem *base)
+{
+	struct mii_dev *bus;
+
+	bus = mdio_alloc();
+	if (!bus) {
+		pr_err("%s: failed to allocate MDIO bus\n", __func__);
+		return -ENOMEM;
+	}
+
+	bus->read = bcm6348_mdio_read;
+	bus->write = bcm6348_mdio_write;
+	bus->priv = base;
+	snprintf(bus->name, sizeof(bus->name), "%s", name);
+
+	return mdio_register(bus);
+}
+
+static int bcm6348_phy_init(struct udevice *dev)
+{
+	struct eth_pdata *pdata = dev_get_platdata(dev);
+	struct bcm6348_eth_priv *priv = dev_get_priv(dev);
+	struct mii_dev *bus;
+
+	/* get mii bus */
+	bus = miiphy_get_dev_by_name(dev->name);
+
+	/* phy connect */
+	priv->phy_dev = phy_connect(bus, priv->phy_id, dev,
+				    pdata->phy_interface);
+	if (!priv->phy_dev) {
+		pr_err("%s: no phy device\n", __func__);
+		return -ENODEV;
+	}
+
+	priv->phy_dev->supported = (SUPPORTED_10baseT_Half |
+				    SUPPORTED_10baseT_Full |
+				    SUPPORTED_100baseT_Half |
+				    SUPPORTED_100baseT_Full |
+				    SUPPORTED_Autoneg |
+				    SUPPORTED_Pause |
+				    SUPPORTED_MII);
+	priv->phy_dev->advertising = priv->phy_dev->supported;
+
+	/* phy config */
+	phy_config(priv->phy_dev);
+
+	return 0;
+}
+
+static int bcm6348_eth_probe(struct udevice *dev)
+{
+	struct eth_pdata *pdata = dev_get_platdata(dev);
+	struct bcm6348_eth_priv *priv = dev_get_priv(dev);

drivers/net/bcm6348-eth.c line 474

Quoted 10 lines

drivers/net/bcm6348-eth.c new file +10 -0

+	void *blob = (void *)gd->fdt_blob;
+	int node = dev_of_offset(dev);
+	const char *phy_mode;
+	fdt_addr_t addr;
+	int phy_node, ret, i;
+
+	/* get base address */
+	addr = devfdt_get_addr(dev);
+	if (addr == FDT_ADDR_T_NONE)
+		return -EINVAL;

dev_remap_addr() ?

drivers/net/bcm6348-eth.c line 478

Quoted 4 lines

drivers/net/bcm6348-eth.c new file +4 -0

+
+	/* get phy mode */
+	pdata->phy_interface = PHY_INTERFACE_MODE_NONE;
+	phy_mode = fdt_getprop(blob, node, "phy-mode", NULL);

dev_read_string() ?

drivers/net/bcm6348-eth.c line 489

Quoted 11 lines

drivers/net/bcm6348-eth.c new file +11 -0

+	if (phy_mode)
+		pdata->phy_interface = phy_get_interface_by_name(phy_mode);
+	if (pdata->phy_interface == PHY_INTERFACE_MODE_NONE)
+		return -ENODEV;
+
+	/* get phy */
+	phy_node = fdtdec_lookup_phandle(blob, node, "phy");
+	if (phy_node >= 0)
+		priv->phy_id = fdtdec_get_int(blob, phy_node, "reg", -1);
+	else
+		return -EINVAL;

dev_read_phandle_with_args() ?

Quoted 111 lines

drivers/net/bcm6348-eth.c new file +87 -0

+
+	/* get dma channels */
+	ret = dma_get_by_name(dev, "tx", &priv->tx_dma);
+	if (ret)
+		return -EINVAL;
+
+	ret = dma_get_by_name(dev, "rx", &priv->rx_dma);
+	if (ret)
+		return -EINVAL;
+
+	/* try to enable clocks */
+	for (i = 0; ; i++) {
+		struct clk clk;
+		int ret;
+
+		ret = clk_get_by_index(dev, i, &clk);
+		if (ret < 0)
+			break;
+		if (clk_enable(&clk))
+			pr_err("failed to enable clock %d\n", i);
+		clk_free(&clk);
+	}
+
+	/* try to perform resets */
+	for (i = 0; ; i++) {
+		struct reset_ctl reset;
+		int ret;
+
+		ret = reset_get_by_index(dev, i, &reset);
+		if (ret < 0)
+			break;
+		if (reset_deassert(&reset))
+			pr_err("failed to deassert reset %d\n", i);
+		reset_free(&reset);
+	}
+
+	/* get base addr */
+	priv->base = ioremap(addr, 0);
+	pdata->iobase = (phys_addr_t) priv->base;
+
+	/* disable emac */
+	bcm6348_eth_mac_disable(priv);
+
+	/* reset emac */
+	bcm6348_eth_mac_reset(priv);
+
+	/* select correct mii interface */
+	if (pdata->phy_interface == PHY_INTERFACE_MODE_INTERNAL)
+		clrbits_be32(priv->base + ETH_CTL_REG, ETH_CTL_EPHY_MASK);
+	else
+		setbits_be32(priv->base + ETH_CTL_REG, ETH_CTL_EPHY_MASK);
+
+	/* turn on mdc clock */
+	writel_be((0x1f << MII_SC_MDCFREQDIV_SHIFT) |
+		  MII_SC_PREAMBLE_EN_MASK, priv->base + MII_SC_REG);
+
+	/* set mib counters to not clear when read */
+	clrbits_be32(priv->base + MIB_CTL_REG, MIB_CTL_RDCLEAR_MASK);
+
+	/* initialize perfect match registers */
+	for (i = 0; i < ETH_PM_CNT; i++) {
+		writel_be(0, priv->base + ETH_PML_REG(i));
+		writel_be(0, priv->base + ETH_PMH_REG(i));
+	}
+
+	/* init mii bus */
+	ret = bcm6348_mdio_init(dev->name, priv->base);
+	if (ret)
+		return ret;
+
+	/* init phy */
+	ret = bcm6348_phy_init(dev);
+	if (ret)
+		return ret;
+
+	return 0;
+}
+
+U_BOOT_DRIVER(bcm6348_eth) = {
+	.name = "bcm6348_eth",
+	.id = UCLASS_ETH,
+	.of_match = bcm6348_eth_ids,
+	.ops = &bcm6348_eth_ops,
+	.platdata_auto_alloc_size = sizeof(struct eth_pdata),
+	.priv_auto_alloc_size = sizeof(struct bcm6348_eth_priv),
+	.probe = bcm6348_eth_probe,
+};

include/configs/bmips_common.h +4 -1

index 39ca2e0bf3..65aa9c77cc 100644
@@ -6,6 +6,9 @@
 #ifndef __CONFIG_BMIPS_COMMON_H
 #define __CONFIG_BMIPS_COMMON_H
 
+/* ETH */
+#define CONFIG_PHY_RESET_DELAY		20
+
 /* UART */
 #define CONFIG_SYS_BAUDRATE_TABLE	{ 9600, 19200, 38400, 57600, 115200, \
 					  230400, 500000, 1500000 }

@@ -16,7 +19,7 @@
 
 /* Memory usage */
 #define CONFIG_SYS_MAXARGS		24
-#define CONFIG_SYS_MALLOC_LEN		(1024 * 1024)
+#define CONFIG_SYS_MALLOC_LEN		(2 * 1024 * 1024)
 #define CONFIG_SYS_BOOTPARAMS_LEN	(128 * 1024)
 #define CONFIG_SYS_CBSIZE		512

Signature · 9 lines

- Daniel

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Álvaro Fernández Rojas

2018-11-28 18:23 UTC #63 lore raw

PATCH v9 11/28 bmips: bcm6338: add support for bcm6348-enet

In reply to Álvaro Fernández Rojas

Signed-off-by Álvaro Fernández Rojas <[email protected]>

---
v9: no changes
v8: no changes
v5: no changes
v4: no changes
v3: no changes
v2: no changes

 arch/mips/dts/brcm,bcm6338.dtsi | 15 +++++++++++++++
 1 file changed, 15 insertions(+)

arch/mips/dts/brcm,bcm6338.dtsi +15 -0

index 990355481c..c547e949dd 100644
@@ -144,5 +144,20 @@
 			dma-channels = <6>;
 			resets = <&periph_rst BCM6338_RST_DMAMEM>;
 		};
+
+		enet: ethernet at fffe2800 {
+			compatible = "brcm,bcm6348-enet";
+			#address-cells = <1>;
+			#size-cells = <0>;
+			reg = <0xfffe2800 0x2dc>;
+			clocks = <&periph_clk BCM6338_CLK_ENET>;
+			resets = <&periph_rst BCM6338_RST_ENET>;
+			dmas = <&iudma BCM6338_DMA_ENET_RX>,
+			       <&iudma BCM6338_DMA_ENET_TX>;
+			dma-names = "rx",
+				    "tx";
+
+			status = "disabled";
+		};
 	};
 };

Signature · 1 line

2.11.0

Álvaro Fernández Rojas

2018-11-28 18:23 UTC #64 lore raw

PATCH v9 12/28 bmips: enable f@st1704 enet support

In reply to Álvaro Fernández Rojas

Signed-off-by Álvaro Fernández Rojas <[email protected]>

---
v9: no changes
v8: no changes
v5: no changes
v4: no changes
v3: no changes
v2: no changes

 arch/mips/dts/sagem,f at st1704.dts     | 12 ++++++++++++
 configs/sagem_f at st1704_ram_defconfig |  8 +++++++-
 2 files changed, 19 insertions(+), 1 deletion(-)

arch/mips/dts/sagem,f at st1704.dts +12 -0

index 5300f8b6df..ec6846dd9f 100644
@@ -39,6 +39,18 @@
 	};
 };
 
+&enet {
+	status = "okay";
+	phy = <&enetphy>;
+	phy-mode = "mii";
+
+	enetphy: fixed-link {
+		reg = <1>;
+		speed = <100>;
+		full-duplex;
+	};
+};
+
 &gpio {
 	status = "okay";
 };

configs/sagem_f at st1704_ram_defconfig +7 -1

index 91a966327a..8c36f5dbf8 100644
@@ -27,11 +27,14 @@ CONFIG_CMD_MEMINFO=y
 # CONFIG_CMD_LOADS is not set
 CONFIG_CMD_SF=y
 CONFIG_CMD_SPI=y
+CONFIG_CMD_MII=y
+CONFIG_CMD_PING=y
 # CONFIG_CMD_MISC is not set
 CONFIG_OF_EMBED=y
 CONFIG_DEFAULT_DEVICE_TREE="sagem,f at st1704"
-# CONFIG_NET is not set
+CONFIG_NET_RANDOM_ETHADDR=y
 # CONFIG_DM_DEVICE_REMOVE is not set
+CONFIG_BCM6348_IUDMA=y
 CONFIG_DM_GPIO=y
 CONFIG_BCM6345_GPIO=y
 CONFIG_LED=y

@@ -40,6 +43,9 @@ CONFIG_DM_SPI_FLASH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_WINBOND=y
 CONFIG_SPI_FLASH_MTD=y
+CONFIG_PHY_FIXED=y
+CONFIG_DM_ETH=y
+CONFIG_BCM6348_ETH=y
 CONFIG_DM_RESET=y
 CONFIG_RESET_BCM6345=y
 # CONFIG_SPL_SERIAL_PRESENT is not set

Signature · 1 line

2.11.0

Álvaro Fernández Rojas

2018-11-28 18:23 UTC #65 lore raw

PATCH v9 13/28 bmips: bcm6348: add support for bcm6348-enet

In reply to Álvaro Fernández Rojas

Signed-off-by Álvaro Fernández Rojas <[email protected]>

---
v9: no changes
v8: no changes
v5: no changes
v4: no changes
v3: no changes
v2: no changes

 arch/mips/dts/brcm,bcm6348.dtsi | 26 ++++++++++++++++++++++++++
 1 file changed, 26 insertions(+)

arch/mips/dts/brcm,bcm6348.dtsi +26 -0

index 875de232ca..79e7bd892b 100644
@@ -161,6 +161,32 @@
 			u-boot,dm-pre-reloc;
 		};
 
+		enet0: ethernet at fffe6000 {
+			compatible = "brcm,bcm6348-enet";
+			#address-cells = <1>;
+			#size-cells = <0>;
+			reg = <0xfffe6000 0x2dc>;
+			dmas = <&iudma BCM6348_DMA_ENET0_RX>,
+			       <&iudma BCM6348_DMA_ENET0_TX>;
+			dma-names = "rx",
+				    "tx";
+
+			status = "disabled";
+		};
+
+		enet1: ethernet at fffe6800 {
+			compatible = "brcm,bcm6348-enet";
+			#address-cells = <1>;
+			#size-cells = <0>;
+			reg = <0xfffe6800 0x2dc>;
+			dmas = <&iudma BCM6348_DMA_ENET1_RX>,
+			       <&iudma BCM6348_DMA_ENET1_TX>;
+			dma-names = "rx",
+				    "tx";
+
+			status = "disabled";
+		};
+
 		iudma: dma-controller at fffe7000 {
 			compatible = "brcm,bcm6348-iudma";
 			reg = <0xfffe7000 0x1c>,

Signature · 1 line

2.11.0

Álvaro Fernández Rojas

2018-11-28 18:23 UTC #66 lore raw

PATCH v9 14/28 bmips: enable ct-5361 enet support

In reply to Álvaro Fernández Rojas

Signed-off-by Álvaro Fernández Rojas <[email protected]>

---
v9: no changes
v8: no changes
v5: no changes
v4: no changes
v3: no changes
v2: no changes

 arch/mips/dts/comtrend,ct-5361.dts    | 12 ++++++++++++
 configs/comtrend_ct5361_ram_defconfig |  8 +++++++-
 2 files changed, 19 insertions(+), 1 deletion(-)

arch/mips/dts/comtrend,ct-5361.dts +12 -0

index 25747ca95d..f6b8a94e25 100644
@@ -34,6 +34,18 @@
 	};
 };
 
+&enet1 {
+	status = "okay";
+	phy = <&enet1phy>;
+	phy-mode = "mii";
+
+	enet1phy: fixed-link {
+		reg = <1>;
+		speed = <100>;
+		full-duplex;
+	};
+};
+
 &gpio0 {
 	status = "okay";
 };

configs/comtrend_ct5361_ram_defconfig +7 -1

index 82f2070713..6297e78fd9 100644
@@ -25,11 +25,14 @@ CONFIG_CMD_LICENSE=y
 CONFIG_CMD_MEMINFO=y
 # CONFIG_CMD_LOADS is not set
 CONFIG_CMD_USB=y
+CONFIG_CMD_MII=y
+CONFIG_CMD_PING=y
 # CONFIG_CMD_MISC is not set
 CONFIG_OF_EMBED=y
 CONFIG_DEFAULT_DEVICE_TREE="comtrend,ct-5361"
-# CONFIG_NET is not set
+CONFIG_NET_RANDOM_ETHADDR=y
 # CONFIG_DM_DEVICE_REMOVE is not set
+CONFIG_BCM6348_IUDMA=y
 CONFIG_DM_GPIO=y
 CONFIG_BCM6345_GPIO=y
 CONFIG_LED=y

@@ -40,6 +43,9 @@ CONFIG_FLASH_CFI_DRIVER=y
 CONFIG_CFI_FLASH=y
 CONFIG_SYS_FLASH_PROTECTION=y
 CONFIG_SYS_FLASH_CFI=y
+CONFIG_PHY_FIXED=y
+CONFIG_DM_ETH=y
+CONFIG_BCM6348_ETH=y
 CONFIG_PHY=y
 CONFIG_BCM6348_USBH_PHY=y
 CONFIG_DM_RESET=y

Signature · 1 line

2.11.0

Álvaro Fernández Rojas

2018-11-28 18:23 UTC #67 lore raw

PATCH v9 15/28 bmips: bcm6358: add support for bcm6348-enet

In reply to Álvaro Fernández Rojas

Signed-off-by Álvaro Fernández Rojas <[email protected]>

---
v9: no changes
v8: no changes
v5: no changes
v4: no changes
v3: no changes
v2: no changes

 arch/mips/dts/brcm,bcm6358.dtsi | 28 ++++++++++++++++++++++++++++
 1 file changed, 28 insertions(+)

arch/mips/dts/brcm,bcm6358.dtsi +28 -0

index 5605723e83..5e9c9ad769 100644
@@ -192,6 +192,34 @@
 			status = "disabled";
 		};
 
+		enet0: ethernet at fffe4000 {
+			compatible = "brcm,bcm6348-enet";
+			#address-cells = <1>;
+			#size-cells = <0>;
+			reg = <0xfffe4000 0x2dc>;
+			clocks = <&periph_clk BCM6358_CLK_ENET0>;
+			dmas = <&iudma BCM6358_DMA_ENET0_RX>,
+			       <&iudma BCM6358_DMA_ENET0_TX>;
+			dma-names = "rx",
+				    "tx";
+
+			status = "disabled";
+		};
+
+		enet1: ethernet at fffe4800 {
+			compatible = "brcm,bcm6348-enet";
+			#address-cells = <1>;
+			#size-cells = <0>;
+			reg = <0xfffe4800 0x2dc>;
+			clocks = <&periph_clk BCM6358_CLK_ENET1>;
+			dmas = <&iudma BCM6358_DMA_ENET1_RX>,
+			       <&iudma BCM6358_DMA_ENET1_TX>;
+			dma-names = "rx",
+				    "tx";
+
+			status = "disabled";
+		};
+
 		iudma: dma-controller at fffe5000 {
 			compatible = "brcm,bcm6348-iudma";
 			reg = <0xfffe5000 0x24>,

Signature · 1 line

2.11.0

Álvaro Fernández Rojas

2018-11-28 18:23 UTC #68 lore raw

PATCH v9 16/28 bmips: enable hg556a enet support

In reply to Álvaro Fernández Rojas

Signed-off-by Álvaro Fernández Rojas <[email protected]>

---
v9: no changes
v8: no changes
v5: no changes
v4: no changes
v3: no changes
v2: no changes

 arch/mips/dts/huawei,hg556a.dts     | 12 ++++++++++++
 configs/huawei_hg556a_ram_defconfig |  8 +++++++-
 2 files changed, 19 insertions(+), 1 deletion(-)

arch/mips/dts/huawei,hg556a.dts +12 -0

index 60455c2ff8..6a7fc1df4b 100644
@@ -93,6 +93,18 @@
 	status = "okay";
 };
 
+&enet1 {
+	status = "okay";
+	phy = <&enet1phy>;
+	phy-mode = "mii";
+
+	enet1phy: fixed-link {
+		reg = <1>;
+		speed = <100>;
+		full-duplex;
+	};
+};
+
 &gpio0 {
 	status = "okay";
 };

configs/huawei_hg556a_ram_defconfig +7 -1

index 6bb14ba736..d4e6144319 100644
@@ -25,11 +25,14 @@ CONFIG_CMD_LICENSE=y
 CONFIG_CMD_MEMINFO=y
 # CONFIG_CMD_LOADS is not set
 CONFIG_CMD_USB=y
+CONFIG_CMD_MII=y
+CONFIG_CMD_PING=y
 # CONFIG_CMD_MISC is not set
 CONFIG_OF_EMBED=y
 CONFIG_DEFAULT_DEVICE_TREE="huawei,hg556a"
-# CONFIG_NET is not set
+CONFIG_NET_RANDOM_ETHADDR=y
 # CONFIG_DM_DEVICE_REMOVE is not set
+CONFIG_BCM6348_IUDMA=y
 CONFIG_DM_GPIO=y
 CONFIG_BCM6345_GPIO=y
 CONFIG_LED=y

@@ -40,6 +43,9 @@ CONFIG_FLASH_CFI_DRIVER=y
 CONFIG_CFI_FLASH=y
 CONFIG_SYS_FLASH_PROTECTION=y
 CONFIG_SYS_FLASH_CFI=y
+CONFIG_PHY_FIXED=y
+CONFIG_DM_ETH=y
+CONFIG_BCM6348_ETH=y
 CONFIG_PHY=y
 CONFIG_BCM6358_USBH_PHY=y
 CONFIG_DM_RESET=y

Signature · 1 line

2.11.0

Álvaro Fernández Rojas

2018-11-28 18:23 UTC #69 lore raw

PATCH v9 17/28 bmips: enable nb4-ser enet support

In reply to Álvaro Fernández Rojas

Signed-off-by Álvaro Fernández Rojas <[email protected]>

---
v9: no changes
v8: no changes
v5: no changes
v4: no changes
v3: no changes
v2: no changes

 arch/mips/dts/sfr,nb4-ser.dts     | 24 ++++++++++++++++++++++++
 configs/sfr_nb4-ser_ram_defconfig |  8 +++++++-
 2 files changed, 31 insertions(+), 1 deletion(-)

arch/mips/dts/sfr,nb4-ser.dts +24 -0

index bdc6f8ae45..dfbc4148dc 100644
@@ -53,6 +53,30 @@
 	status = "okay";
 };
 
+&enet0 {
+	status = "okay";
+	phy = <&enet0phy>;
+	phy-mode = "internal";
+
+	enet0phy: fixed-link {
+		reg = <1>;
+		speed = <100>;
+		full-duplex;
+	};
+};
+
+&enet1 {
+	status = "okay";
+	phy = <&enet1phy>;
+	phy-mode = "mii";
+
+	enet1phy: fixed-link {
+		reg = <1>;
+		speed = <100>;
+		full-duplex;
+	};
+};
+
 &gpio0 {
 	status = "okay";
 };

configs/sfr_nb4-ser_ram_defconfig +7 -1

index 12adfb01e7..39622875b1 100644
@@ -26,11 +26,14 @@ CONFIG_CMD_LICENSE=y
 CONFIG_CMD_MEMINFO=y
 # CONFIG_CMD_LOADS is not set
 CONFIG_CMD_USB=y
+CONFIG_CMD_MII=y
+CONFIG_CMD_PING=y
 # CONFIG_CMD_MISC is not set
 CONFIG_OF_EMBED=y
 CONFIG_DEFAULT_DEVICE_TREE="sfr,nb4-ser"
-# CONFIG_NET is not set
+CONFIG_NET_RANDOM_ETHADDR=y
 # CONFIG_DM_DEVICE_REMOVE is not set
+CONFIG_BCM6348_IUDMA=y
 CONFIG_DM_GPIO=y
 CONFIG_BCM6345_GPIO=y
 CONFIG_LED=y

@@ -42,6 +45,9 @@ CONFIG_FLASH_CFI_DRIVER=y
 CONFIG_CFI_FLASH=y
 CONFIG_SYS_FLASH_PROTECTION=y
 CONFIG_SYS_FLASH_CFI=y
+CONFIG_PHY_FIXED=y
+CONFIG_DM_ETH=y
+CONFIG_BCM6348_ETH=y
 CONFIG_PHY=y
 CONFIG_BCM6358_USBH_PHY=y
 CONFIG_DM_RESET=y

Signature · 1 line

2.11.0

Álvaro Fernández Rojas

2018-11-28 18:23 UTC #70 lore raw

PATCH v9 18/28 net: add support for bcm6368-enet

In reply to Álvaro Fernández Rojas

Signed-off-by Álvaro Fernández Rojas <[email protected]>

---
v9: introduce flow control improvements from bcm6348-eth:
- introduce rx packets caching functionality from bcm6348-eth to fix flow control issues.
- code style fixes.
v8: introduce bcm6368-enet driver

 drivers/net/Kconfig       |   8 +
 drivers/net/Makefile      |   1 +
 drivers/net/bcm6368-eth.c | 670 ++++++++++++++++++++++++++++++++++++++++++++++
 3 files changed, 679 insertions(+)
 create mode 100644 drivers/net/bcm6368-eth.c

drivers/net/Kconfig +8 -0

index 2b7cec8804..7044c6adf3 100644
@@ -82,6 +82,14 @@ config BCM6348_ETH
 	help
 	  This driver supports the BCM6348 Ethernet MAC.
 
+config BCM6368_ETH
+	bool "BCM6368 EMAC support"
+	depends on DM_ETH && ARCH_BMIPS
+	select DMA
+	select MII
+	help
+	  This driver supports the BCM6368 Ethernet MAC.
+
 config DWC_ETH_QOS
 	bool "Synopsys DWC Ethernet QOS device support"
 	depends on DM_ETH

drivers/net/Makefile +1 -0

index 2647d4dd23..0dbfa03306 100644
@@ -7,6 +7,7 @@ obj-$(CONFIG_ALTERA_TSE) += altera_tse.o
 obj-$(CONFIG_AG7XXX) += ag7xxx.o
 obj-$(CONFIG_ARMADA100_FEC) += armada100_fec.o
 obj-$(CONFIG_BCM6348_ETH) += bcm6348-eth.o
+obj-$(CONFIG_BCM6368_ETH) += bcm6368-eth.o
 obj-$(CONFIG_DRIVER_AT91EMAC) += at91_emac.o
 obj-$(CONFIG_DRIVER_AX88180) += ax88180.o
 obj-$(CONFIG_BCM_SF2_ETH) += bcm-sf2-eth.o

drivers/net/bcm6368-eth.c new file +670 -0

670 lines not on this page · raw message

Signature · 1 line

2.11.0

Daniel Schwierzeck

2018-11-29 00:44 UTC #71 lore raw

PATCH v9 18/28 net: add support for bcm6368-enet

Am 28.11.18 um 19:23 schrieb Álvaro Fernández Rojas:

Quoted 288 lines

Signed-off-by Álvaro Fernández Rojas <[email protected]>

 drivers/net/Kconfig       |   8 +
 drivers/net/Makefile      |   1 +
 drivers/net/bcm6368-eth.c | 670 ++++++++++++++++++++++++++++++++++++++++++++++
 3 files changed, 679 insertions(+)
 create mode 100644 drivers/net/bcm6368-eth.c

drivers/net/Kconfig +8 -0

index 2b7cec8804..7044c6adf3 100644
@@ -82,6 +82,14 @@ config BCM6348_ETH
 	help
 	  This driver supports the BCM6348 Ethernet MAC.
 
+config BCM6368_ETH
+	bool "BCM6368 EMAC support"
+	depends on DM_ETH && ARCH_BMIPS
+	select DMA
+	select MII
+	help
+	  This driver supports the BCM6368 Ethernet MAC.
+
 config DWC_ETH_QOS
 	bool "Synopsys DWC Ethernet QOS device support"
 	depends on DM_ETH

drivers/net/Makefile +1 -0

index 2647d4dd23..0dbfa03306 100644
@@ -7,6 +7,7 @@ obj-$(CONFIG_ALTERA_TSE) += altera_tse.o
 obj-$(CONFIG_AG7XXX) += ag7xxx.o
 obj-$(CONFIG_ARMADA100_FEC) += armada100_fec.o
 obj-$(CONFIG_BCM6348_ETH) += bcm6348-eth.o
+obj-$(CONFIG_BCM6368_ETH) += bcm6368-eth.o
 obj-$(CONFIG_DRIVER_AT91EMAC) += at91_emac.o
 obj-$(CONFIG_DRIVER_AX88180) += ax88180.o
 obj-$(CONFIG_BCM_SF2_ETH) += bcm-sf2-eth.o

drivers/net/bcm6368-eth.c new file +237 -0

new file mode 100644
index 0000000000..f0c2ada3e2
@@ -0,0 +1,670 @@
+/*
+ * Copyright (C) 2018 Álvaro Fernández Rojas <[email protected]>
+ *
+ * Derived from linux/drivers/net/ethernet/broadcom/bcm63xx_enet.c:
+ *	Copyright (C) 2008 Maxime Bizon <[email protected]>
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include <common.h>
+#include <clk.h>
+#include <dm.h>
+#include <dma.h>
+#include <miiphy.h>
+#include <net.h>
+#include <reset.h>
+#include <wait_bit.h>
+#include <asm/io.h>
+
+#define ETH_PORT_STR			"brcm,enetsw-port"
+
+#define ETH_RX_DESC			PKTBUFSRX
+#define ETH_ZLEN			60
+#define ETH_TIMEOUT			100
+
+#define ETH_MAX_PORT			8
+#define ETH_RGMII_PORT0			4
+
+/* Port traffic control */
+#define ETH_PTCTRL_REG(x)		(0x0 + (x))
+#define ETH_PTCTRL_RXDIS_SHIFT		0
+#define ETH_PTCTRL_RXDIS_MASK		(1 << ETH_PTCTRL_RXDIS_SHIFT)
+#define ETH_PTCTRL_TXDIS_SHIFT		1
+#define ETH_PTCTRL_TXDIS_MASK		(1 << ETH_PTCTRL_TXDIS_SHIFT)
+
+/* Switch mode register */
+#define ETH_SWMODE_REG			0xb
+#define ETH_SWMODE_FWD_EN_SHIFT		1
+#define ETH_SWMODE_FWD_EN_MASK		(1 << ETH_SWMODE_FWD_EN_SHIFT)
+
+/* IMP override Register */
+#define ETH_IMPOV_REG			0xe
+#define ETH_IMPOV_LINKUP_SHIFT		0
+#define ETH_IMPOV_LINKUP_MASK		(1 << ETH_IMPOV_LINKUP_SHIFT)
+#define ETH_IMPOV_FDX_SHIFT		1
+#define ETH_IMPOV_FDX_MASK		(1 << ETH_IMPOV_FDX_SHIFT)
+#define ETH_IMPOV_100_SHIFT		2
+#define ETH_IMPOV_100_MASK		(1 << ETH_IMPOV_100_SHIFT)
+#define ETH_IMPOV_1000_SHIFT		3
+#define ETH_IMPOV_1000_MASK		(1 << ETH_IMPOV_1000_SHIFT)
+#define ETH_IMPOV_RXFLOW_SHIFT		4
+#define ETH_IMPOV_RXFLOW_MASK		(1 << ETH_IMPOV_RXFLOW_SHIFT)
+#define ETH_IMPOV_TXFLOW_SHIFT		5
+#define ETH_IMPOV_TXFLOW_MASK		(1 << ETH_IMPOV_TXFLOW_SHIFT)
+#define ETH_IMPOV_FORCE_SHIFT		7
+#define ETH_IMPOV_FORCE_MASK		(1 << ETH_IMPOV_FORCE_SHIFT)
+
+/* Port override Register */
+#define ETH_PORTOV_REG(x)		(0x58 + (x))
+#define ETH_PORTOV_LINKUP_SHIFT		0
+#define ETH_PORTOV_LINKUP_MASK		(1 << ETH_PORTOV_LINKUP_SHIFT)
+#define ETH_PORTOV_FDX_SHIFT		1
+#define ETH_PORTOV_FDX_MASK		(1 << ETH_PORTOV_FDX_SHIFT)
+#define ETH_PORTOV_100_SHIFT		2
+#define ETH_PORTOV_100_MASK		(1 << ETH_PORTOV_100_SHIFT)
+#define ETH_PORTOV_1000_SHIFT		3
+#define ETH_PORTOV_1000_MASK		(1 << ETH_PORTOV_1000_SHIFT)
+#define ETH_PORTOV_RXFLOW_SHIFT		4
+#define ETH_PORTOV_RXFLOW_MASK		(1 << ETH_PORTOV_RXFLOW_SHIFT)
+#define ETH_PORTOV_TXFLOW_SHIFT		5
+#define ETH_PORTOV_TXFLOW_MASK		(1 << ETH_PORTOV_TXFLOW_SHIFT)
+#define ETH_PORTOV_ENABLE_SHIFT		6
+#define ETH_PORTOV_ENABLE_MASK		(1 << ETH_PORTOV_ENABLE_SHIFT)
+
+/* Port RGMII control register */
+#define ETH_RGMII_CTRL_REG(x)		(0x60 + (x))
+#define ETH_RGMII_CTRL_GMII_CLK_EN	(1 << 7)
+#define ETH_RGMII_CTRL_MII_OVERRIDE_EN	(1 << 6)
+#define ETH_RGMII_CTRL_MII_MODE_MASK	(3 << 4)
+#define ETH_RGMII_CTRL_RGMII_MODE	(0 << 4)
+#define ETH_RGMII_CTRL_MII_MODE		(1 << 4)
+#define ETH_RGMII_CTRL_RVMII_MODE	(2 << 4)
+#define ETH_RGMII_CTRL_TIMING_SEL_EN	(1 << 0)
+
+/* Port RGMII timing register */
+#define ENETSW_RGMII_TIMING_REG(x)	(0x68 + (x))
+
+/* MDIO control register */
+#define MII_SC_REG			0xb0
+#define MII_SC_EXT_SHIFT		16
+#define MII_SC_EXT_MASK			(1 << MII_SC_EXT_SHIFT)
+#define MII_SC_REG_SHIFT		20
+#define MII_SC_PHYID_SHIFT		25
+#define MII_SC_RD_SHIFT			30
+#define MII_SC_RD_MASK			(1 << MII_SC_RD_SHIFT)
+#define MII_SC_WR_SHIFT			31
+#define MII_SC_WR_MASK			(1 << MII_SC_WR_SHIFT)
+
+/* MDIO data register */
+#define MII_DAT_REG			0xb4
+
+/* MDIO 1000BASE-T control/status */
+#define MII_ADVERTISE_1000		(ADVERTISE_1000HALF |\
+					 ADVERTISE_1000FULL)
+#define MII_LPA_1000			(LPA_1000HALF | LPA_1000FULL)
+
+/* Global Management Configuration Register */
+#define ETH_GMCR_REG			0x200
+#define ETH_GMCR_RST_MIB_SHIFT		0
+#define ETH_GMCR_RST_MIB_MASK		(1 << ETH_GMCR_RST_MIB_SHIFT)
+
+/* Jumbo control register port mask register */
+#define ETH_JMBCTL_PORT_REG		0x4004
+
+/* Jumbo control mib good frame register */
+#define ETH_JMBCTL_MAXSIZE_REG		0x4008
+
+/* ETH port data */
+struct bcm_enetsw_port {
+	bool used;
+	const char *name;
+	/* Config */
+	bool bypass_link;
+	int force_speed;
+	bool force_duplex_full;
+	/* PHY */
+	int phy_id;
+};
+
+/* ETH data */
+struct bcm6368_eth_priv {
+	struct udevice *dev;
+	void __iomem *base;
+	/* RX */
+	uint8_t rx_desc;
+	uint8_t rx_pend;
+	int rx_ret[ETH_RX_DESC];
+	/* DMA */
+	struct dma rx_dma;
+	struct dma tx_dma;
+	/* Ports */
+	uint8_t num_ports;
+	struct bcm_enetsw_port used_ports[ETH_MAX_PORT];
+	int sw_port_link[ETH_MAX_PORT];
+	bool rgmii_override;
+	bool rgmii_timing;
+	/* PHY */
+	int phy_id;
+};
+
+DECLARE_GLOBAL_DATA_PTR;
+
+static inline bool bcm_enet_port_is_rgmii(int portid)
+{
+	return portid >= ETH_RGMII_PORT0;
+}
+
+static int bcm6368_mdio_read(struct bcm6368_eth_priv *priv, uint8_t ext,
+			     int phy_id, int reg)
+{
+	uint32_t val;
+
+	writel_be(0, priv->base + MII_SC_REG);
+
+	val = MII_SC_RD_MASK |
+	      (phy_id << MII_SC_PHYID_SHIFT) |
+	      (reg << MII_SC_REG_SHIFT);
+
+	if (ext)
+		val |= MII_SC_EXT_MASK;
+
+	writel_be(val, priv->base + MII_SC_REG);
+	udelay(50);
+
+	return readw_be(priv->base + MII_DAT_REG);
+}
+
+static int bcm6368_mdio_write(struct bcm6368_eth_priv *priv, uint8_t ext,
+			      int phy_id, int reg, u16 data)
+{
+	uint32_t val;
+
+	writel_be(0, priv->base + MII_SC_REG);
+
+	val = MII_SC_WR_MASK |
+	      (phy_id << MII_SC_PHYID_SHIFT) |
+	      (reg << MII_SC_REG_SHIFT);
+
+	if (ext)
+		val |= MII_SC_EXT_MASK;
+
+	val |= data;
+
+	writel_be(val, priv->base + MII_SC_REG);
+	udelay(50);
+
+	return 0;
+}
+
+static int bcm6368_eth_free_pkt(struct udevice *dev, uchar *packet, int len)
+{
+	struct bcm6368_eth_priv *priv = dev_get_priv(dev);
+
+	/* sanity check */
+	if (packet != net_rx_packets[priv->rx_pend]) {
+		pr_err("rx_pend %d: packet is not matched,\n", priv->rx_pend);
+		return -EAGAIN;
+	}
+
+	/* free pending packet */
+	priv->rx_ret[priv->rx_pend] = 0;
+	priv->rx_pend = (priv->rx_pend + 1) % ETH_RX_DESC;
+
+	return 0;
+}
+
+static int _bcm6368_eth_recv(struct bcm6368_eth_priv *priv)
+{
+	uint8_t pkt = priv->rx_desc;
+
+	/* check if packet is free */
+	if (priv->rx_ret[pkt] > 0)
+		return -EAGAIN;
+
+	/* try to receive a new packet */
+	priv->rx_ret[pkt] = dma_receive(&priv->rx_dma,
+					(void **)&net_rx_packets[pkt],
+					NULL);
+	if (priv->rx_ret[pkt] > 0)
+		priv->rx_desc = (priv->rx_desc + 1) % ETH_RX_DESC;
+
+	return priv->rx_ret[pkt];
+}
+
+static int bcm6368_eth_recv(struct udevice *dev, int flags, uchar **packetp)
+{
+	struct bcm6368_eth_priv *priv = dev_get_priv(dev);

drivers/net/bcm6368-eth.c line 247

Quoted 10 lines

drivers/net/bcm6368-eth.c new file +10 -0

+
+	/* receive packets if queue is empty */
+	if (priv->rx_ret[priv->rx_pend] <= 0) {
+		uint8_t pkt_cnt = 0;
+
+		/* try to receive packets */
+		while (_bcm6368_eth_recv(priv) > 0)
+			pkt_cnt++;
+
+		dma_prepare_rcv_buf(&priv->rx_dma, NULL, 0);

I forgot to mention this in your other ethernet driver but why do you have your own packet queue? eth_recv() is supposed to receive one packet from HW or return -EAGAIN. Also I think dma_prepare_rcv_buf should go to eth_free_pkt() and pass net_rx_packets[]. eth_recv should only call dma_receive() to check if packets are available.

Quoted 9 lines

drivers/net/bcm6368-eth.c new file +9 -0

+
+		if (pkt_cnt)
+			debug("%s: received %u packet(s)\n", __func__, pkt_cnt);
+	}
+
+	/* return current packet */
+	if (priv->rx_ret[priv->rx_pend] > 0)
+		*packetp = net_rx_packets[priv->rx_pend];
+

drivers/net/bcm6368-eth.c line 266

Quoted 10 lines

drivers/net/bcm6368-eth.c new file +10 -0

+	return priv->rx_ret[priv->rx_pend];
+}
+
+static int bcm6368_eth_send(struct udevice *dev, void *packet, int length)
+{
+	struct bcm6368_eth_priv *priv = dev_get_priv(dev);
+
+	length = max(length, ETH_ZLEN);
+
+	return dma_send(&priv->tx_dma, packet, length, NULL);

does the HW do the actual padding? Otherwise you should set the padding bytes to zero to avoid sending random memory content on the wire.

Quoted 281 lines

drivers/net/bcm6368-eth.c new file +281 -0

+}
+
+static int bcm6368_eth_adjust_link(struct bcm6368_eth_priv *priv)
+{
+	unsigned int i;
+
+	for (i = 0; i < priv->num_ports; i++) {
+		struct bcm_enetsw_port *port;
+		int val, j, up, advertise, lpa, speed, duplex, media;
+		int external_phy = bcm_enet_port_is_rgmii(i);
+		u8 override;
+
+		port = &priv->used_ports[i];
+		if (!port->used)
+			continue;
+
+		if (port->bypass_link)
+			continue;
+
+		/* dummy read to clear */
+		for (j = 0; j < 2; j++)
+			val = bcm6368_mdio_read(priv, external_phy,
+						port->phy_id, MII_BMSR);
+
+		if (val == 0xffff)
+			continue;
+
+		up = (val & BMSR_LSTATUS) ? 1 : 0;
+		if (!(up ^ priv->sw_port_link[i]))
+			continue;
+
+		priv->sw_port_link[i] = up;
+
+		/* link changed */
+		if (!up) {
+			dev_info(&priv->pdev->dev, "link DOWN on %s\n",
+				 port->name);
+			writeb_be(ETH_PORTOV_ENABLE_MASK,
+				  priv->base + ETH_PORTOV_REG(i));
+			writeb_be(ETH_PTCTRL_RXDIS_MASK |
+				  ETH_PTCTRL_TXDIS_MASK,
+				  priv->base + ETH_PTCTRL_REG(i));
+			continue;
+		}
+
+		advertise = bcm6368_mdio_read(priv, external_phy, port->phy_id,
+					      MII_ADVERTISE);
+
+		lpa = bcm6368_mdio_read(priv, external_phy, port->phy_id,
+					MII_LPA);
+
+		/* figure out media and duplex from advertise and LPA values */
+		media = mii_nway_result(lpa & advertise);
+		duplex = (media & ADVERTISE_FULL) ? 1 : 0;
+
+		if (media & (ADVERTISE_100FULL | ADVERTISE_100HALF))
+			speed = 100;
+		else
+			speed = 10;
+
+		if (val & BMSR_ESTATEN) {
+			advertise = bcm6368_mdio_read(priv, external_phy,
+						port->phy_id, MII_CTRL1000);
+
+			lpa = bcm6368_mdio_read(priv, external_phy,
+						port->phy_id, MII_STAT1000);
+
+			if ((advertise & MII_ADVERTISE_1000) &&
+			    (lpa & MII_LPA_1000)) {
+				speed = 1000;
+				duplex = (lpa & LPA_1000FULL);
+			}
+		}
+
+		pr_alert("link UP on %s, %dMbps, %s-duplex\n",
+			 port->name, speed, duplex ? "full" : "half");
+
+		override = ETH_PORTOV_ENABLE_MASK |
+			   ETH_PORTOV_LINKUP_MASK;
+
+		if (speed == 1000)
+			override |= ETH_PORTOV_1000_MASK;
+		else if (speed == 100)
+			override |= ETH_PORTOV_100_MASK;
+		if (duplex)
+			override |= ETH_PORTOV_FDX_MASK;
+
+		writeb_be(override, priv->base + ETH_PORTOV_REG(i));
+		writeb_be(0, priv->base + ETH_PTCTRL_REG(i));
+	}
+
+	return 0;
+}
+
+static int bcm6368_eth_start(struct udevice *dev)
+{
+	struct bcm6368_eth_priv *priv = dev_get_priv(dev);
+	int i;
+	u32 val;
+
+	priv->rx_desc = 0;
+	priv->rx_pend = 0;
+	for (i = 0; i < ETH_RX_DESC; i++)
+		priv->rx_ret[i] = 0;
+
+	/* disable all ports */
+	for (i = 0; i < priv->num_ports; i++) {
+		writeb_be(ETH_PORTOV_ENABLE_MASK,
+			  priv->base + ETH_PORTOV_REG(i));
+		writeb_be(ETH_PTCTRL_RXDIS_MASK |
+			  ETH_PTCTRL_TXDIS_MASK,
+			  priv->base + ETH_PTCTRL_REG(i));
+
+		priv->sw_port_link[i] = 0;
+	}
+
+	/* enable external ports */
+	for (i = ETH_RGMII_PORT0; i < priv->num_ports; i++) {
+		u8 rgmii_ctrl;
+
+		if (!priv->used_ports[i].used)
+			continue;
+
+		rgmii_ctrl = readb_be(priv->base + ETH_RGMII_CTRL_REG(i));
+		rgmii_ctrl |= ETH_RGMII_CTRL_GMII_CLK_EN;
+		if (priv->rgmii_override)
+			rgmii_ctrl |= ETH_RGMII_CTRL_MII_OVERRIDE_EN;
+		if (priv->rgmii_timing)
+			rgmii_ctrl |= ETH_RGMII_CTRL_TIMING_SEL_EN;
+		writeb_be(rgmii_ctrl, priv->base + ETH_RGMII_CTRL_REG(i));
+	}
+
+	/* reset mib */
+	val = readb_be(priv->base + ETH_GMCR_REG);
+	val |= ETH_GMCR_RST_MIB_MASK;
+	writeb_be(val, priv->base + ETH_GMCR_REG);
+	mdelay(1);
+	val &= ~ETH_GMCR_RST_MIB_MASK;
+	writeb_be(val, priv->base + ETH_GMCR_REG);
+	mdelay(1);
+
+	/* force CPU port state */
+	val = readb_be(priv->base + ETH_IMPOV_REG);
+	val |= ETH_IMPOV_FORCE_MASK | ETH_IMPOV_LINKUP_MASK;
+	writeb_be(val, priv->base + ETH_IMPOV_REG);
+
+	/* enable switch forward engine */
+	val = readb_be(priv->base + ETH_SWMODE_REG);
+	val |= ETH_SWMODE_FWD_EN_MASK;
+	writeb_be(val, priv->base + ETH_SWMODE_REG);
+
+	/* enable jumbo on all ports */
+	writel_be(0x1ff, priv->base + ETH_JMBCTL_PORT_REG);
+	writew_be(9728, priv->base + ETH_JMBCTL_MAXSIZE_REG);
+
+	/* enable dma rx channel */
+	dma_enable(&priv->rx_dma);
+
+	/* enable dma tx channel */
+	dma_enable(&priv->tx_dma);
+
+	/* apply override config for bypass_link ports here. */
+	for (i = 0; i < priv->num_ports; i++) {
+		struct bcm_enetsw_port *port;
+		u8 override;
+		port = &priv->used_ports[i];
+		if (!port->used)
+			continue;
+
+		if (!port->bypass_link)
+			continue;
+
+		override = ETH_PORTOV_ENABLE_MASK |
+			ETH_PORTOV_LINKUP_MASK;
+
+		switch (port->force_speed) {
+		case 1000:
+			override |= ETH_PORTOV_1000_MASK;
+			break;
+		case 100:
+			override |= ETH_PORTOV_100_MASK;
+			break;
+		case 10:
+			break;
+		default:
+			pr_warn("invalid forced speed on port %s: assume 10\n",
+				port->name);
+			break;
+		}
+
+		if (port->force_duplex_full)
+			override |= ETH_PORTOV_FDX_MASK;
+
+		writeb_be(override, priv->base + ETH_PORTOV_REG(i));
+		writeb_be(0, priv->base + ETH_PTCTRL_REG(i));
+	}
+
+	bcm6368_eth_adjust_link(priv);
+
+	return 0;
+}
+
+static void bcm6368_eth_stop(struct udevice *dev)
+{
+	struct bcm6368_eth_priv *priv = dev_get_priv(dev);
+
+	/* disable dma rx channel */
+	dma_disable(&priv->rx_dma);
+
+	/* disable dma tx channel */
+	dma_disable(&priv->tx_dma);
+}
+
+static const struct eth_ops bcm6368_eth_ops = {
+	.free_pkt = bcm6368_eth_free_pkt,
+	.recv = bcm6368_eth_recv,
+	.send = bcm6368_eth_send,
+	.start = bcm6368_eth_start,
+	.stop = bcm6368_eth_stop,
+};
+
+static const struct udevice_id bcm6368_eth_ids[] = {
+	{ .compatible = "brcm,bcm6368-enet", },
+	{ /* sentinel */ }
+};
+
+static bool bcm6368_phy_is_external(struct bcm6368_eth_priv *priv,
+				       int phy_id)
+{
+	uint8_t i;
+
+	for (i = 0; i < priv->num_ports; ++i) {
+		if (!priv->used_ports[i].used)
+			continue;
+		if (priv->used_ports[i].phy_id == phy_id)
+			return bcm_enet_port_is_rgmii(i);
+	}
+
+	return true;
+}
+
+static int bcm6368_mii_mdio_read(struct mii_dev *bus, int addr, int devaddr,
+				 int reg)
+{
+	struct bcm6368_eth_priv *priv = bus->priv;
+	bool ext = bcm6368_phy_is_external(priv, addr);
+
+	return bcm6368_mdio_read(priv, ext, addr, reg);
+}
+
+static int bcm6368_mii_mdio_write(struct mii_dev *bus, int addr, int devaddr,
+				  int reg, u16 data)
+{
+	struct bcm6368_eth_priv *priv = bus->priv;
+	bool ext = bcm6368_phy_is_external(priv, addr);
+
+	return bcm6368_mdio_write(priv, ext, addr, reg, data);
+}
+
+static int bcm6368_mdio_init(const char *name, struct bcm6368_eth_priv *priv)
+{
+	struct mii_dev *bus;
+
+	bus = mdio_alloc();
+	if (!bus) {
+		pr_err("%s: failed to allocate MDIO bus\n", __func__);
+		return -ENOMEM;
+	}
+
+	bus->read = bcm6368_mii_mdio_read;
+	bus->write = bcm6368_mii_mdio_write;
+	bus->priv = priv;
+	snprintf(bus->name, sizeof(bus->name), "%s", name);
+
+	return mdio_register(bus);
+}
+
+static int bcm6368_eth_probe(struct udevice *dev)
+{
+	struct eth_pdata *pdata = dev_get_platdata(dev);
+	struct bcm6368_eth_priv *priv = dev_get_priv(dev);

drivers/net/bcm6368-eth.c line 557

Quoted 10 lines

drivers/net/bcm6368-eth.c new file +10 -0

+	void *blob = (void *)gd->fdt_blob;
+	fdt_addr_t addr;
+	int node = dev_of_offset(dev);
+	int ret, i;
+	unsigned int num_ports;
+
+	/* get base address */
+	addr = devfdt_get_addr(dev);
+	if (addr == FDT_ADDR_T_NONE)
+		return -EINVAL;

dev_remap_addr() ?

drivers/net/bcm6368-eth.c line 563

Quoted 6 lines

drivers/net/bcm6368-eth.c new file +6 -0

+
+	/* get number of ports */
+	num_ports = fdtdec_get_uint(gd->fdt_blob, node, "brcm,num-ports",
+				    ETH_MAX_PORT);
+	if (!num_ports || num_ports > ETH_MAX_PORT)
+		return -EINVAL;

dev_read_u32() ?

Quoted 38 lines

drivers/net/bcm6368-eth.c new file +38 -0

+
+	/* get dma channels */
+	ret = dma_get_by_name(dev, "tx", &priv->tx_dma);
+	if (ret)
+		return -EINVAL;
+
+	ret = dma_get_by_name(dev, "rx", &priv->rx_dma);
+	if (ret)
+		return -EINVAL;
+
+	/* try to enable clocks */
+	for (i = 0; ; i++) {
+		struct clk clk;
+		int ret;
+
+		ret = clk_get_by_index(dev, i, &clk);
+		if (ret < 0)
+			break;
+		if (clk_enable(&clk))
+			pr_err("failed to enable clock %d\n", i);
+		clk_free(&clk);
+	}
+
+	/* try to perform resets */
+	for (i = 0; ; i++) {
+		struct reset_ctl reset;
+		int ret;
+
+		ret = reset_get_by_index(dev, i, &reset);
+		if (ret < 0)
+			break;
+		if (reset_deassert(&reset))
+			pr_err("failed to deassert reset %d\n", i);
+		reset_free(&reset);
+	}
+
+	/* set priv data */
+	priv->dev = dev;

drivers/net/bcm6368-eth.c line 611

Quoted 10 lines

drivers/net/bcm6368-eth.c new file +10 -0

+
+	priv->base = ioremap(addr, 0);
+	pdata->iobase = (phys_addr_t) priv->base;
+
+	priv->num_ports = num_ports;
+
+	if (fdtdec_get_bool(gd->fdt_blob, i, "brcm,rgmii-override"))
+		priv->rgmii_override = true;
+	if (fdtdec_get_bool(gd->fdt_blob, i, "brcm,rgmii-timing"))
+		priv->rgmii_timing = true;

dev_read_bool() ?

drivers/net/bcm6368-eth.c line 616

Quoted 5 lines

drivers/net/bcm6368-eth.c new file +5 -0

+
+	/* get ports */
+	for (i = fdt_first_subnode(blob, node);
+	     i > 0;
+	     i = fdt_next_subnode(blob, i)) {

dev_read_first_subnode(), dev_read_next_subnode() and dev_read_*() in the loop body?

Quoted 55 lines

drivers/net/bcm6368-eth.c new file +54 -0

+		const char *comp;
+		const char *label;
+		unsigned int p;
+		int phy_id;
+		int speed;
+
+		comp = fdt_getprop(blob, i, "compatible", NULL);
+		if (!comp || memcmp(comp, ETH_PORT_STR, sizeof(ETH_PORT_STR)))
+			continue;
+
+		p = fdtdec_get_uint(gd->fdt_blob, i, "reg",
+				      ETH_MAX_PORT);
+		if (p >= num_ports)
+			return -EINVAL;
+
+		label = fdt_getprop(blob, i, "label", NULL);
+		if (!label) {
+			debug("%s: node %s has no label\n", __func__,
+			      fdt_get_name(blob, i, NULL));
+			return -EINVAL;
+		}
+
+		phy_id = fdtdec_get_int(gd->fdt_blob, i, "brcm,phy-id", -1);
+
+		priv->used_ports[p].used = true;
+		priv->used_ports[p].name = label;
+		priv->used_ports[p].phy_id = phy_id;
+
+		if (fdtdec_get_bool(gd->fdt_blob, i, "full-duplex"))
+			priv->used_ports[p].force_duplex_full = true;
+		if (fdtdec_get_bool(gd->fdt_blob, i, "bypass-link"))
+			priv->used_ports[p].bypass_link = true;
+		speed = fdtdec_get_int(gd->fdt_blob, i, "speed", 0);
+		if (speed)
+			priv->used_ports[p].force_speed = speed;
+	}
+
+	/* init mii bus */
+	ret = bcm6368_mdio_init(dev->name, priv);
+	if (ret)
+		return ret;
+
+	return 0;
+}
+
+U_BOOT_DRIVER(bcm6368_eth) = {
+	.name = "bcm6368_eth",
+	.id = UCLASS_ETH,
+	.of_match = bcm6368_eth_ids,
+	.ops = &bcm6368_eth_ops,
+	.platdata_auto_alloc_size = sizeof(struct eth_pdata),
+	.priv_auto_alloc_size = sizeof(struct bcm6368_eth_priv),
+	.probe = bcm6368_eth_probe,
+};

Signature · 9 lines

- Daniel

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Álvaro Fernández Rojas

2018-11-28 18:23 UTC #72 lore raw

PATCH v9 19/28 bmips: bcm6368: add support for bcm6368-enet

In reply to Álvaro Fernández Rojas

Signed-off-by Álvaro Fernández Rojas <[email protected]>

---
v9: no changes
v8: introduce bcm6368-enet driver

 arch/mips/dts/brcm,bcm6368.dtsi | 19 +++++++++++++++++++
 1 file changed, 19 insertions(+)

arch/mips/dts/brcm,bcm6368.dtsi +19 -0

index 30047f6360..89590d6ff9 100644
@@ -205,5 +205,24 @@
 			#dma-cells = <1>;
 			dma-channels = <8>;
 		};
+
+		enet: ethernet at 10f00000 {
+			compatible = "brcm,bcm6368-enet";
+			#address-cells = <1>;
+			#size-cells = <0>;
+			reg = <0x10f00000 0x10000>;
+			clocks = <&periph_clk BCM6368_CLK_SWPKT_USB>,
+				 <&periph_clk BCM6368_CLK_SWPKT_SAR>,
+				 <&periph_clk BCM6368_CLK_ROBOSW>;
+			resets = <&periph_rst BCM6368_RST_SWITCH>,
+				 <&periph_rst BCM6368_RST_EPHY>;
+			dmas = <&iudma BCM6368_DMA_ENETSW_RX>,
+			       <&iudma BCM6368_DMA_ENETSW_TX>;
+			dma-names = "rx",
+				    "tx";
+			brcm,num-ports = <6>;
+
+			status = "disabled";
+		};
 	};
 };

Signature · 1 line

2.11.0

Álvaro Fernández Rojas

2018-11-28 18:23 UTC #73 lore raw

PATCH v9 20/28 bmips: enable wap-5813n enet support

In reply to Álvaro Fernández Rojas

Signed-off-by Álvaro Fernández Rojas <[email protected]>

---
v9: no changes
v8: introduce bcm6368-enet driver

 arch/mips/dts/comtrend,wap-5813n.dts    | 14 ++++++++++++++
 configs/comtrend_wap5813n_ram_defconfig |  8 +++++++-
 2 files changed, 21 insertions(+), 1 deletion(-)

arch/mips/dts/comtrend,wap-5813n.dts +14 -0

index bd41dab9f8..7e835b28d2 100644
@@ -54,6 +54,20 @@
 	status = "okay";
 };
 
+&enet {
+	status = "okay";
+
+	port at 4 {
+		compatible = "brcm,enetsw-port";
+		reg = <4>;
+		label = "rgmii";
+		brcm,phy-id = <0xff>;
+		speed = <1000>;
+		full-duplex;
+		bypass-link;
+	};
+};
+
 &gpio0 {
 	status = "okay";
 };

configs/comtrend_wap5813n_ram_defconfig +7 -1

index 987e4c3fbc..fd5107bb7d 100644
@@ -25,11 +25,14 @@ CONFIG_CMD_LICENSE=y
 CONFIG_CMD_MEMINFO=y
 # CONFIG_CMD_LOADS is not set
 CONFIG_CMD_USB=y
+CONFIG_CMD_MII=y
+CONFIG_CMD_PING=y
 # CONFIG_CMD_MISC is not set
 CONFIG_OF_EMBED=y
 CONFIG_DEFAULT_DEVICE_TREE="comtrend,wap-5813n"
-# CONFIG_NET is not set
+CONFIG_NET_RANDOM_ETHADDR=y
 # CONFIG_DM_DEVICE_REMOVE is not set
+CONFIG_BCM6348_IUDMA=y
 CONFIG_DM_GPIO=y
 CONFIG_BCM6345_GPIO=y
 CONFIG_LED=y

@@ -40,6 +43,9 @@ CONFIG_FLASH_CFI_DRIVER=y
 CONFIG_CFI_FLASH=y
 CONFIG_SYS_FLASH_PROTECTION=y
 CONFIG_SYS_FLASH_CFI=y
+CONFIG_DM_ETH=y
+CONFIG_PHY_GIGE=y
+CONFIG_BCM6368_ETH=y
 CONFIG_PHY=y
 CONFIG_BCM6368_USBH_PHY=y
 CONFIG_DM_RESET=y

Signature · 1 line

2.11.0

Álvaro Fernández Rojas

2018-11-28 18:23 UTC #74 lore raw

PATCH v9 21/28 bmips: bcm6328: add support for bcm6368-enet

In reply to Álvaro Fernández Rojas

Signed-off-by Álvaro Fernández Rojas <[email protected]>

---
v9: no changes
v8: introduce bcm6368-enet driver

 arch/mips/dts/brcm,bcm6328.dtsi | 17 +++++++++++++++++
 1 file changed, 17 insertions(+)

arch/mips/dts/brcm,bcm6328.dtsi +17 -0

index 6fa49e22bb..50beed4171 100644
@@ -200,5 +200,22 @@
 			#dma-cells = <1>;
 			dma-channels = <8>;
 		};
+
+		enet: ethernet at 10e00000 {
+			compatible = "brcm,bcm6368-enet";
+			#address-cells = <1>;
+			#size-cells = <0>;
+			reg = <0x10e00000 0x10000>;
+			clocks = <&periph_clk BCM6328_CLK_ROBOSW>;
+			resets = <&periph_rst BCM6328_RST_ENETSW>,
+				 <&periph_rst BCM6328_RST_EPHY>;
+			dmas = <&iudma BCM6328_DMA_ENETSW_RX>,
+			       <&iudma BCM6328_DMA_ENETSW_TX>;
+			dma-names = "rx",
+				    "tx";
+			brcm,num-ports = <5>;
+
+			status = "disabled";
+		};
 	};
 };

Signature · 1 line

2.11.0

Álvaro Fernández Rojas

2018-11-28 18:23 UTC #75 lore raw

PATCH v9 22/28 bmips: enable ar-5387un enet support

In reply to Álvaro Fernández Rojas

Signed-off-by Álvaro Fernández Rojas <[email protected]>

---
v9: no changes
v8: introduce bcm6368-enet driver

 arch/mips/dts/comtrend,ar-5387un.dts    | 32 ++++++++++++++++++++++++++++++++
 configs/comtrend_ar5387un_ram_defconfig |  7 ++++++-
 2 files changed, 38 insertions(+), 1 deletion(-)

arch/mips/dts/comtrend,ar-5387un.dts +32 -0

index e993b5cd89..03e3851ab1 100644
@@ -24,6 +24,38 @@
 	status = "okay";
 };
 
+&enet {
+	status = "okay";
+
+	port at 0 {
+		compatible = "brcm,enetsw-port";
+		reg = <0>;
+		label = "fe1";
+		brcm,phy-id = <1>;
+	};
+
+	port at 1 {
+		compatible = "brcm,enetsw-port";
+		reg = <1>;
+		label = "fe2";
+		brcm,phy-id = <2>;
+	};
+
+	port at 2 {
+		compatible = "brcm,enetsw-port";
+		reg = <2>;
+		label = "fe3";
+		brcm,phy-id = <3>;
+	};
+
+	port at 3 {
+		compatible = "brcm,enetsw-port";
+		reg = <3>;
+		label = "fe4";
+		brcm,phy-id = <4>;
+	};
+};
+
 &leds {
 	status = "okay";

configs/comtrend_ar5387un_ram_defconfig +6 -1

index f129870ca0..5ba401a441 100644
@@ -28,11 +28,14 @@ CONFIG_CMD_MEMINFO=y
 CONFIG_CMD_SF=y
 CONFIG_CMD_SPI=y
 CONFIG_CMD_USB=y
+CONFIG_CMD_MII=y
+CONFIG_CMD_PING=y
 # CONFIG_CMD_MISC is not set
 CONFIG_OF_EMBED=y
 CONFIG_DEFAULT_DEVICE_TREE="comtrend,ar-5387un"
-# CONFIG_NET is not set
+CONFIG_NET_RANDOM_ETHADDR=y
 # CONFIG_DM_DEVICE_REMOVE is not set
+CONFIG_BCM6348_IUDMA=y
 CONFIG_DM_GPIO=y
 CONFIG_LED=y
 CONFIG_LED_BCM6328=y

@@ -41,6 +44,8 @@ CONFIG_DM_SPI_FLASH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_MACRONIX=y
 CONFIG_SPI_FLASH_MTD=y
+CONFIG_DM_ETH=y
+CONFIG_BCM6368_ETH=y
 CONFIG_PHY=y
 CONFIG_BCM6368_USBH_PHY=y
 CONFIG_POWER_DOMAIN=y

Signature · 1 line

2.11.0

Álvaro Fernández Rojas

2018-11-28 18:23 UTC #76 lore raw

PATCH v9 23/28 bmips: bcm6362: add support for bcm6368-enet

In reply to Álvaro Fernández Rojas

Signed-off-by Álvaro Fernández Rojas <[email protected]>

---
v9: no changes
v8: introduce bcm6368-enet driver

 arch/mips/dts/brcm,bcm6362.dtsi | 19 +++++++++++++++++++
 1 file changed, 19 insertions(+)

arch/mips/dts/brcm,bcm6362.dtsi +19 -0

index 94e7de096d..c77b80a4cc 100644
@@ -224,5 +224,24 @@
 			#dma-cells = <1>;
 			dma-channels = <8>;
 		};
+
+		enet: ethernet at 10e00000 {
+			compatible = "brcm,bcm6368-enet";
+			#address-cells = <1>;
+			#size-cells = <0>;
+			reg = <0x10e00000 0x10000>;
+			clocks = <&periph_clk BCM6362_CLK_SWPKT_USB>,
+				 <&periph_clk BCM6362_CLK_SWPKT_SAR>,
+				 <&periph_clk BCM6362_CLK_ROBOSW>;
+			resets = <&periph_rst BCM6362_RST_ENETSW>,
+				 <&periph_rst BCM6362_RST_EPHY>;
+			dmas = <&iudma BCM6362_DMA_ENETSW_RX>,
+			       <&iudma BCM6362_DMA_ENETSW_TX>;
+			dma-names = "rx",
+				    "tx";
+			brcm,num-ports = <6>;
+
+			status = "disabled";
+		};
 	};
 };

Signature · 1 line

2.11.0

Álvaro Fernández Rojas

2018-11-28 18:23 UTC #77 lore raw

PATCH v9 24/28 bmips: enable dgnd3700v2 enet support

In reply to Álvaro Fernández Rojas

Signed-off-by Álvaro Fernández Rojas <[email protected]>

---
v9: no changes
v8: introduce bcm6368-enet driver

 arch/mips/dts/netgear,dgnd3700v2.dts     | 14 ++++++++++++++
 configs/netgear_dgnd3700v2_ram_defconfig |  8 +++++++-
 2 files changed, 21 insertions(+), 1 deletion(-)

arch/mips/dts/netgear,dgnd3700v2.dts +14 -0

index 322d1567ff..2b72491f0b 100644
@@ -43,6 +43,20 @@
 	status = "okay";
 };
 
+&enet {
+	status = "okay";
+
+	port at 4 {
+		compatible = "brcm,enetsw-port";
+		reg = <4>;
+		label = "rgmii";
+		brcm,phy-id = <0xff>;
+		speed = <1000>;
+		full-duplex;
+		bypass-link;
+	};
+};
+
 &gpio0 {
 	status = "okay";
 };

configs/netgear_dgnd3700v2_ram_defconfig +7 -1

index 1abc869856..0f3914fe7e 100644
@@ -27,17 +27,23 @@ CONFIG_CMD_MEMINFO=y
 # CONFIG_CMD_FLASH is not set
 # CONFIG_CMD_LOADS is not set
 CONFIG_CMD_USB=y
-# CONFIG_CMD_NET is not set
+CONFIG_CMD_MII=y
+CONFIG_CMD_PING=y
 # CONFIG_CMD_MISC is not set
 CONFIG_OF_EMBED=y
 CONFIG_DEFAULT_DEVICE_TREE="netgear,dgnd3700v2"
+CONFIG_NET_RANDOM_ETHADDR=y
 # CONFIG_DM_DEVICE_REMOVE is not set
+CONFIG_BCM6348_IUDMA=y
 CONFIG_DM_GPIO=y
 CONFIG_BCM6345_GPIO=y
 CONFIG_LED=y
 CONFIG_LED_BCM6328=y
 CONFIG_LED_BLINK=y
 CONFIG_LED_GPIO=y
+CONFIG_DM_ETH=y
+CONFIG_PHY_GIGE=y
+CONFIG_BCM6368_ETH=y
 CONFIG_PHY=y
 CONFIG_BCM6368_USBH_PHY=y
 CONFIG_POWER_DOMAIN=y

Signature · 1 line

2.11.0

Álvaro Fernández Rojas

2018-11-28 18:23 UTC #78 lore raw

PATCH v9 25/28 bmips: bcm63268: add support for bcm6368-enet

In reply to Álvaro Fernández Rojas

Signed-off-by Álvaro Fernández Rojas <[email protected]>

---
v9: no changes
v8: introduce bcm6368-enet driver

 arch/mips/dts/brcm,bcm63268.dtsi | 25 +++++++++++++++++++++++++
 1 file changed, 25 insertions(+)

arch/mips/dts/brcm,bcm63268.dtsi +25 -0

index c7ad83c306..f8a72ef535 100644
@@ -230,5 +230,30 @@
 			#dma-cells = <1>;
 			dma-channels = <8>;
 		};
+
+		enet: ethernet at 10700000 {
+			compatible = "brcm,bcm6368-enet";
+			#address-cells = <1>;
+			#size-cells = <0>;
+			reg = <0x10700000 0x10000>;
+			clocks = <&periph_clk BCM63268_CLK_GMAC>,
+				 <&periph_clk BCM63268_CLK_ROBOSW>,
+				 <&periph_clk BCM63268_CLK_ROBOSW250>,
+				 <&timer_clk BCM63268_TCLK_EPHY1>,
+				 <&timer_clk BCM63268_TCLK_EPHY2>,
+				 <&timer_clk BCM63268_TCLK_EPHY3>,
+				 <&timer_clk BCM63268_TCLK_GPHY>;
+			resets = <&periph_rst BCM63268_RST_ENETSW>,
+				 <&periph_rst BCM63268_RST_EPHY>,
+				 <&periph_rst BCM63268_RST_GPHY>;
+			dmas = <&iudma BCM63268_DMA_ENETSW_RX>,
+			       <&iudma BCM63268_DMA_ENETSW_TX>;
+			dma-names = "rx",
+				    "tx";
+			brcm,rgmii-override;
+			brcm,rgmii-timing;
+
+			status = "disabled";
+		};
 	};
 };

Signature · 1 line

2.11.0

Álvaro Fernández Rojas

2018-11-28 18:23 UTC #79 lore raw

PATCH v9 26/28 bmips: enable vr-3032u enet support

In reply to Álvaro Fernández Rojas

Signed-off-by Álvaro Fernández Rojas <[email protected]>

---
v9: no changes
v8: introduce bcm6368-enet driver

 arch/mips/dts/comtrend,vr-3032u.dts    | 32 ++++++++++++++++++++++++++++++++
 configs/comtrend_vr3032u_ram_defconfig |  7 ++++++-
 2 files changed, 38 insertions(+), 1 deletion(-)

arch/mips/dts/comtrend,vr-3032u.dts +32 -0

index 8c6a4a1eac..512cb52de3 100644
@@ -24,6 +24,38 @@
 	status = "okay";
 };
 
+&enet {
+	status = "okay";
+
+	port at 0 {
+		compatible = "brcm,enetsw-port";
+		reg = <0>;
+		label = "fe2";
+		brcm,phy-id = <1>;
+	};
+
+	port at 1 {
+		compatible = "brcm,enetsw-port";
+		reg = <1>;
+		label = "fe3";
+		brcm,phy-id = <2>;
+	};
+
+	port at 2 {
+		compatible = "brcm,enetsw-port";
+		reg = <2>;
+		label = "fe4";
+		brcm,phy-id = <3>;
+	};
+
+	port at 3 {
+		compatible = "brcm,enetsw-port";
+		reg = <3>;
+		label = "fe1";
+		brcm,phy-id = <4>;
+	};
+};
+
 &leds {
 	status = "okay";
 	brcm,serial-leds;

configs/comtrend_vr3032u_ram_defconfig +6 -1

index 1689eecec1..47f53998e1 100644
@@ -26,15 +26,20 @@ CONFIG_CMD_MEMINFO=y
 # CONFIG_CMD_FLASH is not set
 # CONFIG_CMD_LOADS is not set
 CONFIG_CMD_USB=y
+CONFIG_CMD_MII=y
+CONFIG_CMD_PING=y
 # CONFIG_CMD_MISC is not set
 CONFIG_OF_EMBED=y
 CONFIG_DEFAULT_DEVICE_TREE="comtrend,vr-3032u"
-# CONFIG_NET is not set
+CONFIG_NET_RANDOM_ETHADDR=y
 # CONFIG_DM_DEVICE_REMOVE is not set
+CONFIG_BCM6348_IUDMA=y
 CONFIG_DM_GPIO=y
 CONFIG_LED=y
 CONFIG_LED_BCM6328=y
 CONFIG_LED_BLINK=y
+CONFIG_DM_ETH=y
+CONFIG_BCM6368_ETH=y
 CONFIG_PHY=y
 CONFIG_BCM6368_USBH_PHY=y
 CONFIG_POWER_DOMAIN=y

Signature · 1 line

2.11.0

Álvaro Fernández Rojas

2018-11-28 18:23 UTC #80 lore raw

PATCH v9 27/28 bmips: bcm6318: add support for bcm6368-enet

In reply to Álvaro Fernández Rojas

Signed-off-by Álvaro Fernández Rojas <[email protected]>

---
v9: no changes
v8: introduce bcm6368-enet driver

 arch/mips/dts/brcm,bcm6318.dtsi           | 19 +++++++++++++++++++
 include/dt-bindings/clock/bcm6318-clock.h | 11 +++++++++++
 2 files changed, 30 insertions(+)

arch/mips/dts/brcm,bcm6318.dtsi +19 -0

index d04b7cbb01..d678dab242 100644
@@ -190,6 +190,25 @@
 			status = "disabled";
 		};
 
+		enet: ethernet at 10080000 {
+			compatible = "brcm,bcm6368-enet";
+			#address-cells = <1>;
+			#size-cells = <0>;
+			reg = <0x10080000 0x8000>;
+			clocks = <&periph_clk BCM6318_CLK_ROBOSW250>,
+				 <&periph_clk BCM6318_CLK_ROBOSW025>,
+				 <&ubus_clk BCM6318_UCLK_ROBOSW>;
+			resets = <&periph_rst BCM6318_RST_ENETSW>,
+				 <&periph_rst BCM6318_RST_EPHY>;
+			dmas = <&iudma BCM6318_DMA_ENETSW_RX>,
+			       <&iudma BCM6318_DMA_ENETSW_TX>;
+			dma-names = "rx",
+				    "tx";
+			brcm,num-ports = <5>;
+
+			status = "disabled";
+		};
+
 		iudma: dma-controller at 10088000 {
 			compatible = "brcm,bcm6368-iudma";
 			reg = <0x10088000 0x80>,

include/dt-bindings/clock/bcm6318-clock.h +11 -0

index d5e13c5c2d..3f10448cef 100644
@@ -33,4 +33,15 @@
 #define BCM6318_CLK_AFE		29
 #define BCM6318_CLK_QPROC	30
 
+#define BCM6318_UCLK_ADSL	0
+#define BCM6318_UCLK_ARB	1
+#define BCM6318_UCLK_MIPS	2
+#define BCM6318_UCLK_PCIE	3
+#define BCM6318_UCLK_PERIPH	4
+#define BCM6318_UCLK_PHYMIPS	5
+#define BCM6318_UCLK_ROBOSW	6
+#define BCM6318_UCLK_SAR	7
+#define BCM6318_UCLK_SDR	8
+#define BCM6318_UCLK_USB	9
+
 #endif /* __DT_BINDINGS_CLOCK_BCM6318_H */

Signature · 1 line

2.11.0

Álvaro Fernández Rojas

2018-11-28 18:23 UTC #81 lore raw

PATCH v9 28/28 bmips: enable ar-5315u enet support

In reply to Álvaro Fernández Rojas

Signed-off-by Álvaro Fernández Rojas <[email protected]>

---
v9: no changes
v8: introduce bcm6368-enet driver

 arch/mips/dts/comtrend,ar-5315u.dts    | 32 ++++++++++++++++++++++++++++++++
 configs/comtrend_ar5315u_ram_defconfig |  7 ++++++-
 2 files changed, 38 insertions(+), 1 deletion(-)

arch/mips/dts/comtrend,ar-5315u.dts +32 -0

index 45570189d0..eb60aaa8d5 100644
@@ -24,6 +24,38 @@
 	status = "okay";
 };
 
+&enet {
+	status = "okay";
+
+	port at 0 {
+		compatible = "brcm,enetsw-port";
+		reg = <0>;
+		label = "fe4";
+		brcm,phy-id = <1>;
+	};
+
+	port at 1 {
+		compatible = "brcm,enetsw-port";
+		reg = <1>;
+		label = "fe3";
+		brcm,phy-id = <2>;
+	};
+
+	port at 2 {
+		compatible = "brcm,enetsw-port";
+		reg = <2>;
+		label = "fe2";
+		brcm,phy-id = <3>;
+	};
+
+	port at 3 {
+		compatible = "brcm,enetsw-port";
+		reg = <3>;
+		label = "fe1";
+		brcm,phy-id = <4>;
+	};
+};
+
 &leds {
 	status = "okay";

configs/comtrend_ar5315u_ram_defconfig +6 -1

index d9ef52e68d..1b8e4e43c4 100644
@@ -28,11 +28,14 @@ CONFIG_CMD_MEMINFO=y
 CONFIG_CMD_SF=y
 CONFIG_CMD_SPI=y
 CONFIG_CMD_USB=y
+CONFIG_CMD_MII=y
+CONFIG_CMD_PING=y
 # CONFIG_CMD_MISC is not set
 CONFIG_OF_EMBED=y
 CONFIG_DEFAULT_DEVICE_TREE="comtrend,ar-5315u"
-# CONFIG_NET is not set
+CONFIG_NET_RANDOM_ETHADDR=y
 # CONFIG_DM_DEVICE_REMOVE is not set
+CONFIG_BCM6348_IUDMA=y
 CONFIG_DM_GPIO=y
 CONFIG_LED=y
 CONFIG_LED_BCM6328=y

@@ -41,6 +44,8 @@ CONFIG_DM_SPI_FLASH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_WINBOND=y
 CONFIG_SPI_FLASH_MTD=y
+CONFIG_DM_ETH=y
+CONFIG_BCM6368_ETH=y
 CONFIG_PHY=y
 CONFIG_BCM6318_USBH_PHY=y
 CONFIG_BCM6328_POWER_DOMAIN=y

Signature · 1 line

2.11.0

Álvaro Fernández Rojas

2018-11-29 22:25 UTC #82 lore raw

v10 cover bmips: add iudma/enet support

In reply to Álvaro Fernández Rojas

In order to add bcm6348-enet support, dma-uclass must be extended to support dma channels and reworked to operate like the other dm uclass (clk, reset...).

v10: Introduce changes suggested by Daniel Schwierzeck:
- Fix license identifiers.
bcm6348-iudma:
- Move DMAD_ST defines out of dma desc struct definition.
- Remove unneded aigned attribute from dma desc struct definition.
- Fill dma ring from consumer driver instead of allocating a new buffer.
- Correctly check clock/reset errors while probing.
- Switch to live DM live tree.
bcm6348-enet:
- Remove packet queue.
- Move dma_prepare_rcv_buf to free_pkt.
- Switch to live DM live tree.
bcm6368-enet:
- Remove packet queue.
- Move dma_prepare_rcv_buf to free_pkt.
- Pad packets smaller than ETH_ZLEN.
- Switch to live DM live tree.
v9: Separate generic dma channels support from bmips enet support
bcm6348-iudma:
- bcm6348_iudma_chan_stop: switch to mdelay when resetting channel.
- bcm6348_iudma_receive: track dirty dma descriptors and no longer trigger dma rx channel.
- bcm6348_iudma_send: reorder to properly flush cache and set dma descriptor config.
- bcm6348_iudma_prepare_rcv_buf: implemented to clear dirty dma descriptors.
bcm6348-enet:
- bcm6348_eth_recv: clear dirty dma descriptors only when packets are copied from rx dma.
- bcm6348_eth_send: remove dma rx channel reset when sending packet.
bcm6368-enet:
- introduce rx packets caching functionality from bcm6348-eth to fix flow control issues.
- code style fixes.
v8: Introduce bcm6368-enet driver support.
v5: Fix issues reported by Grygorii Strashko and other fixes:
- Remove unused bcm6348-iudma defines.
- Increment bcm6348-iudma rx descriptors.
- Fix bcm6348-iudma flow control issues.
- bcm6348-iudma error checking now depends on hw.
- Remove unneeded bcm6348-iudma interrupts.
- Receive as much packets as possible from bcm6348-eth and cache them in net_rx_packets. This is needed in order to fix flow control issues.
v4: Fix issues reported by Grygorii Strashko and other fixes:
- Remove usage of net_rx_packets as buffer from bcm6348-iudma.
- Allocate dynamic rx buffer on bcm6348-iudma.
- Copy received dma buffer to net_rx_packets in order to avoid possible dma overwrites.
- Check dma errors and discard invalid packets.
- Reset dma rx channel when sending a new packet to prevent flow control issues.
- Fix packet casting on bcm6348_eth_recv/send.
v3: Switch to live tree API.
v2: Fix bcm6348-iudma rx burst config.

 arch/mips/dts/brcm,bcm6318.dtsi           |  38 ++
 arch/mips/dts/brcm,bcm63268.dtsi          |  38 ++
 arch/mips/dts/brcm,bcm6328.dtsi           |  30 ++
 arch/mips/dts/brcm,bcm6338.dtsi           |  29 ++
 arch/mips/dts/brcm,bcm6348.dtsi           |  42 ++
 arch/mips/dts/brcm,bcm6358.dtsi           |  46 +++
 arch/mips/dts/brcm,bcm6362.dtsi           |  32 ++
 arch/mips/dts/brcm,bcm6368.dtsi           |  32 ++
 arch/mips/dts/comtrend,ar-5315u.dts       |  32 ++
 arch/mips/dts/comtrend,ar-5387un.dts      |  32 ++
 arch/mips/dts/comtrend,ct-5361.dts        |  12 +
 arch/mips/dts/comtrend,vr-3032u.dts       |  32 ++
 arch/mips/dts/comtrend,wap-5813n.dts      |  14 +
 arch/mips/dts/huawei,hg556a.dts           |  12 +
 arch/mips/dts/netgear,dgnd3700v2.dts      |  14 +
 arch/mips/dts/sagem,f at st1704.dts          |  12 +
 arch/mips/dts/sfr,nb4-ser.dts             |  24 ++
 configs/comtrend_ar5315u_ram_defconfig    |   7 +-
 configs/comtrend_ar5387un_ram_defconfig   |   7 +-
 configs/comtrend_ct5361_ram_defconfig     |   8 +-
 configs/comtrend_vr3032u_ram_defconfig    |   7 +-
 configs/comtrend_wap5813n_ram_defconfig   |   8 +-
 configs/huawei_hg556a_ram_defconfig       |   8 +-
 configs/netgear_dgnd3700v2_ram_defconfig  |   8 +-
 configs/sagem_f at st1704_ram_defconfig      |   8 +-
 configs/sfr_nb4-ser_ram_defconfig         |   8 +-
 drivers/dma/Kconfig                       |   9 +
 drivers/dma/Makefile                      |   1 +
 drivers/dma/bcm6348-iudma.c               | 642 ++++++++++++++++++++++++++++++
 drivers/net/Kconfig                       |  18 +
 drivers/net/Makefile                      |   2 +
 drivers/net/bcm6348-eth.c                 | 537 +++++++++++++++++++++++++
 drivers/net/bcm6368-eth.c                 | 625 +++++++++++++++++++++++++++++
 include/configs/bmips_common.h            |   6 +-
 include/dt-bindings/clock/bcm6318-clock.h |  11 +
 include/dt-bindings/dma/bcm6318-dma.h     |  14 +
 include/dt-bindings/dma/bcm63268-dma.h    |  14 +
 include/dt-bindings/dma/bcm6328-dma.h     |  14 +
 include/dt-bindings/dma/bcm6338-dma.h     |  14 +
 include/dt-bindings/dma/bcm6348-dma.h     |  16 +
 include/dt-bindings/dma/bcm6358-dma.h     |  16 +
 include/dt-bindings/dma/bcm6362-dma.h     |  14 +
 include/dt-bindings/dma/bcm6368-dma.h     |  14 +
 43 files changed, 2497 insertions(+), 10 deletions(-)
 create mode 100644 drivers/dma/bcm6348-iudma.c
 create mode 100644 drivers/net/bcm6348-eth.c
 create mode 100644 drivers/net/bcm6368-eth.c
 create mode 100644 include/dt-bindings/dma/bcm6318-dma.h
 create mode 100644 include/dt-bindings/dma/bcm63268-dma.h
 create mode 100644 include/dt-bindings/dma/bcm6328-dma.h
 create mode 100644 include/dt-bindings/dma/bcm6338-dma.h
 create mode 100644 include/dt-bindings/dma/bcm6348-dma.h
 create mode 100644 include/dt-bindings/dma/bcm6358-dma.h
 create mode 100644 include/dt-bindings/dma/bcm6362-dma.h
 create mode 100644 include/dt-bindings/dma/bcm6368-dma.h

Signature · 1 line

2.11.0

Álvaro Fernández Rojas

2018-11-29 22:25 UTC #83 lore raw

PATCH v10 1/28 dma: add bcm6348-iudma support

BCM6348 IUDMA controller is present on multiple BMIPS (BCM63xx) SoCs.

Signed-off-by Álvaro Fernández Rojas <[email protected]>

---
v10: Introduce changes suggested by Daniel Schwierzeck:
- Fix license identifiers.
- Move DMAD_ST defines out of dma desc struct definition.
- Remove unneded aigned attribute from dma desc struct definition.
- Fill dma ring from consumer driver instead of allocating a new buffer.
- Correctly check clock/reset errors while probing.
- Switch to live DM live tree.
v9: introduce dma_prepare_rcv_buf dma op:
- bcm6348_iudma_chan_stop: switch to mdelay when resetting channel.
- bcm6348_iudma_receive: track dirty dma descriptors and no longer trigger dma rx channel.
- bcm6348_iudma_send: reorder to properly flush cache and set dma descriptor config.
- bcm6348_iudma_prepare_rcv_buf: implemented to clear dirty dma descriptors.
v8: Introduce changes from Grygorii Strashko
v5: Several fixes and improvements:
- Remove unused defines.
- Increment rx descriptors.
- Fix flow control issues.
- Error checking now depends on hw.
- Remove unneeded interrupts.
v4: Fix issues reported by Grygorii Strashko and other fixes:
- Remove usage of net_rx_packets as buffer.
- Allocate dynamic rx buffer.
- Check dma errors and discard invalid packets.
v3: no changes
v2: Fix dma rx burst config and select DMA_CHANNELS.

 drivers/dma/Kconfig         |   9 +
 drivers/dma/Makefile        |   1 +
 drivers/dma/bcm6348-iudma.c | 642 ++++++++++++++++++++++++++++++++++++++++++++
 3 files changed, 652 insertions(+)
 create mode 100644 drivers/dma/bcm6348-iudma.c

drivers/dma/Kconfig +9 -0

index 8a4162eccd..1820676d7a 100644
@@ -26,6 +26,15 @@ config SANDBOX_DMA
 	  Enable support for a test DMA uclass implementation. It stimulates
 	  DMA transfer by simple copying data between channels.
 
+config BCM6348_IUDMA
+	bool "BCM6348 IUDMA driver"
+	depends on ARCH_BMIPS
+	select DMA_CHANNELS
+	help
+	  Enable the BCM6348 IUDMA driver.
+	  This driver support data transfer from devices to
+	  memory and from memory to devices.
+
 config TI_EDMA3
 	bool "TI EDMA3 driver"
 	help

drivers/dma/Makefile +1 -0

index aff31f986a..b5f9147e0a 100644
@@ -7,6 +7,7 @@ obj-$(CONFIG_DMA) += dma-uclass.o
 
 obj-$(CONFIG_FSLDMAFEC) += MCD_tasksInit.o MCD_dmaApi.o MCD_tasks.o
 obj-$(CONFIG_APBH_DMA) += apbh_dma.o
+obj-$(CONFIG_BCM6348_IUDMA) += bcm6348-iudma.o
 obj-$(CONFIG_FSL_DMA) += fsl_dma.o
 obj-$(CONFIG_SANDBOX_DMA) += sandbox-dma-test.o
 obj-$(CONFIG_TI_KSNAV) += keystone_nav.o keystone_nav_cfg.o

drivers/dma/bcm6348-iudma.c new file +642 -0

642 lines not on this page · raw message

Signature · 1 line

2.11.0

Daniel Schwierzeck

2018-11-30 13:46 UTC #84 lore raw

PATCH v10 1/28 dma: add bcm6348-iudma support

Am 29.11.18 um 23:25 schrieb Álvaro Fernández Rojas:

Quoted 32 lines

BCM6348 IUDMA controller is present on multiple BMIPS (BCM63xx) SoCs.
Signed-off-by Álvaro Fernández Rojas <[email protected]>
---
v10: Introduce changes suggested by Daniel Schwierzeck:
- Fix license identifiers.
- Move DMAD_ST defines out of dma desc struct definition.
- Remove unneded aigned attribute from dma desc struct definition.
- Fill dma ring from consumer driver instead of allocating a new buffer.
- Correctly check clock/reset errors while probing.
- Switch to live DM live tree.
v9: introduce dma_prepare_rcv_buf dma op:
- bcm6348_iudma_chan_stop: switch to mdelay when resetting channel.
- bcm6348_iudma_receive: track dirty dma descriptors and no longer trigger dma rx channel.
- bcm6348_iudma_send: reorder to properly flush cache and set dma descriptor config.
- bcm6348_iudma_prepare_rcv_buf: implemented to clear dirty dma descriptors.
v8: Introduce changes from Grygorii Strashko
v5: Several fixes and improvements:
- Remove unused defines.
- Increment rx descriptors.
- Fix flow control issues.
- Error checking now depends on hw.
- Remove unneeded interrupts.
v4: Fix issues reported by Grygorii Strashko and other fixes:
- Remove usage of net_rx_packets as buffer.
- Allocate dynamic rx buffer.
- Check dma errors and discard invalid packets.
v3: no changes
v2: Fix dma rx burst config and select DMA_CHANNELS.

Quoted 5 lines

 drivers/dma/Kconfig         |   9 +
 drivers/dma/Makefile        |   1 +
 drivers/dma/bcm6348-iudma.c | 642 ++++++++++++++++++++++++++++++++++++++++++++
 3 files changed, 652 insertions(+)
 create mode 100644 drivers/dma/bcm6348-iudma.c

Reviewed-by Daniel Schwierzeck <[email protected]>

only one nit left

Quoted 381 lines

drivers/dma/Kconfig +9 -0

index 8a4162eccd..1820676d7a 100644
@@ -26,6 +26,15 @@ config SANDBOX_DMA
 	  Enable support for a test DMA uclass implementation. It stimulates
 	  DMA transfer by simple copying data between channels.
 
+config BCM6348_IUDMA
+	bool "BCM6348 IUDMA driver"
+	depends on ARCH_BMIPS
+	select DMA_CHANNELS
+	help
+	  Enable the BCM6348 IUDMA driver.
+	  This driver support data transfer from devices to
+	  memory and from memory to devices.
+
 config TI_EDMA3
 	bool "TI EDMA3 driver"
 	help

drivers/dma/Makefile +1 -0

index aff31f986a..b5f9147e0a 100644
@@ -7,6 +7,7 @@ obj-$(CONFIG_DMA) += dma-uclass.o
 
 obj-$(CONFIG_FSLDMAFEC) += MCD_tasksInit.o MCD_dmaApi.o MCD_tasks.o
 obj-$(CONFIG_APBH_DMA) += apbh_dma.o
+obj-$(CONFIG_BCM6348_IUDMA) += bcm6348-iudma.o
 obj-$(CONFIG_FSL_DMA) += fsl_dma.o
 obj-$(CONFIG_SANDBOX_DMA) += sandbox-dma-test.o
 obj-$(CONFIG_TI_KSNAV) += keystone_nav.o keystone_nav_cfg.o

drivers/dma/bcm6348-iudma.c new file +342 -0

new file mode 100644
index 0000000000..699f1a6754
@@ -0,0 +1,642 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (C) 2018 Álvaro Fernández Rojas <[email protected]>
+ *
+ * Derived from linux/drivers/dma/bcm63xx-iudma.c:
+ *	Copyright (C) 2015 Simon Arlott <[email protected]>
+ *
+ * Derived from linux/drivers/net/ethernet/broadcom/bcm63xx_enet.c:
+ *	Copyright (C) 2008 Maxime Bizon <[email protected]>
+ *
+ * Derived from bcm963xx_4.12L.06B_consumer/shared/opensource/include/bcm963xx/63268_map_part.h:
+ *	Copyright (C) 2000-2010 Broadcom Corporation
+ *
+ * Derived from bcm963xx_4.12L.06B_consumer/bcmdrivers/opensource/net/enet/impl4/bcmenet.c:
+ *	Copyright (C) 2010 Broadcom Corporation
+ */
+
+#include <common.h>
+#include <clk.h>
+#include <dm.h>
+#include <dma-uclass.h>
+#include <memalign.h>
+#include <reset.h>
+#include <asm/io.h>
+
+#define DMA_RX_DESC	6
+#define DMA_TX_DESC	1
+
+/* DMA Channels */
+#define DMA_CHAN_FLOWC(x)		((x) >> 1)
+#define DMA_CHAN_MAX			16
+#define DMA_CHAN_SIZE			0x10
+#define DMA_CHAN_TOUT			500
+
+/* DMA Global Configuration register */
+#define DMA_CFG_REG			0x00
+#define  DMA_CFG_ENABLE_SHIFT		0
+#define  DMA_CFG_ENABLE_MASK		(1 << DMA_CFG_ENABLE_SHIFT)
+#define  DMA_CFG_FLOWC_ENABLE(x)	BIT(DMA_CHAN_FLOWC(x) + 1)
+#define  DMA_CFG_NCHANS_SHIFT		24
+#define  DMA_CFG_NCHANS_MASK		(0xf << DMA_CFG_NCHANS_SHIFT)
+
+/* DMA Global Flow Control registers */
+#define DMA_FLOWC_THR_LO_REG(x)		(0x04 + DMA_CHAN_FLOWC(x) * 0x0c)
+#define DMA_FLOWC_THR_HI_REG(x)		(0x08 + DMA_CHAN_FLOWC(x) * 0x0c)
+#define DMA_FLOWC_ALLOC_REG(x)		(0x0c + DMA_CHAN_FLOWC(x) * 0x0c)
+#define  DMA_FLOWC_ALLOC_FORCE_SHIFT	31
+#define  DMA_FLOWC_ALLOC_FORCE_MASK	(1 << DMA_FLOWC_ALLOC_FORCE_SHIFT)
+
+/* DMA Global Reset register */
+#define DMA_RST_REG			0x34
+#define  DMA_RST_CHAN_SHIFT		0
+#define  DMA_RST_CHAN_MASK(x)		(1 << x)
+
+/* DMA Channel Configuration register */
+#define DMAC_CFG_REG(x)			(DMA_CHAN_SIZE * (x) + 0x00)
+#define  DMAC_CFG_ENABLE_SHIFT		0
+#define  DMAC_CFG_ENABLE_MASK		(1 << DMAC_CFG_ENABLE_SHIFT)
+#define  DMAC_CFG_PKT_HALT_SHIFT	1
+#define  DMAC_CFG_PKT_HALT_MASK		(1 << DMAC_CFG_PKT_HALT_SHIFT)
+#define  DMAC_CFG_BRST_HALT_SHIFT	2
+#define  DMAC_CFG_BRST_HALT_MASK	(1 << DMAC_CFG_BRST_HALT_SHIFT)
+
+/* DMA Channel Max Burst Length register */
+#define DMAC_BURST_REG(x)		(DMA_CHAN_SIZE * (x) + 0x0c)
+
+/* DMA SRAM Descriptor Ring Start register */
+#define DMAS_RSTART_REG(x)		(DMA_CHAN_SIZE * (x) + 0x00)
+
+/* DMA SRAM State/Bytes done/ring offset register */
+#define DMAS_STATE_DATA_REG(x)		(DMA_CHAN_SIZE * (x) + 0x04)
+
+/* DMA SRAM Buffer Descriptor status and length register */
+#define DMAS_DESC_LEN_STATUS_REG(x)	(DMA_CHAN_SIZE * (x) + 0x08)
+
+/* DMA SRAM Buffer Descriptor status and length register */
+#define DMAS_DESC_BASE_BUFPTR_REG(x)	(DMA_CHAN_SIZE * (x) + 0x0c)
+
+/* DMA Descriptor Status */
+#define DMAD_ST_CRC_SHIFT		8
+#define DMAD_ST_CRC_MASK		(1 << DMAD_ST_CRC_SHIFT)
+#define DMAD_ST_WRAP_SHIFT		12
+#define DMAD_ST_WRAP_MASK		(1 << DMAD_ST_WRAP_SHIFT)
+#define DMAD_ST_SOP_SHIFT		13
+#define DMAD_ST_SOP_MASK		(1 << DMAD_ST_SOP_SHIFT)
+#define DMAD_ST_EOP_SHIFT		14
+#define DMAD_ST_EOP_MASK		(1 << DMAD_ST_EOP_SHIFT)
+#define DMAD_ST_OWN_SHIFT		15
+#define DMAD_ST_OWN_MASK		(1 << DMAD_ST_OWN_SHIFT)
+
+#define DMAD6348_ST_OV_ERR_SHIFT	0
+#define DMAD6348_ST_OV_ERR_MASK		(1 << DMAD6348_ST_OV_ERR_SHIFT)
+#define DMAD6348_ST_CRC_ERR_SHIFT	1
+#define DMAD6348_ST_CRC_ERR_MASK	(1 << DMAD6348_ST_CRC_ERR_SHIFT)
+#define DMAD6348_ST_RX_ERR_SHIFT	2
+#define DMAD6348_ST_RX_ERR_MASK		(1 << DMAD6348_ST_RX_ERR_SHIFT)
+#define DMAD6348_ST_OS_ERR_SHIFT	4
+#define DMAD6348_ST_OS_ERR_MASK		(1 << DMAD6348_ST_OS_ERR_SHIFT)
+#define DMAD6348_ST_UN_ERR_SHIFT	9
+#define DMAD6348_ST_UN_ERR_MASK		(1 << DMAD6348_ST_UN_ERR_SHIFT)
+
+struct bcm6348_dma_desc {
+	uint16_t length;
+	uint16_t status;
+	uint32_t address;
+};
+
+struct bcm6348_chan_priv {
+	void __iomem *dma_ring;
+	uint8_t dma_ring_size;
+	uint8_t desc_id;
+	uint8_t desc_cnt;
+	bool *busy_desc;
+	bool running;
+};
+
+struct bcm6348_iudma_hw {
+	uint16_t err_mask;
+};
+
+struct bcm6348_iudma_priv {
+	const struct bcm6348_iudma_hw *hw;
+	void __iomem *base;
+	void __iomem *chan;
+	void __iomem *sram;
+	struct bcm6348_chan_priv **ch_priv;
+	uint8_t n_channels;
+};
+
+static inline bool bcm6348_iudma_chan_is_rx(uint8_t ch)
+{
+	return !(ch & 1);
+}
+
+static inline void bcm6348_iudma_fdc(void *ptr, ulong size)
+{
+	ulong start = (ulong) ptr;
+
+	flush_dcache_range(start, start + size);
+}
+
+static inline void bcm6348_iudma_idc(void *ptr, ulong size)
+{
+	ulong start = (ulong) ptr;
+
+	invalidate_dcache_range(start, start + size);
+}
+
+static void bcm6348_iudma_chan_stop(struct bcm6348_iudma_priv *priv,
+				    uint8_t ch)
+{
+	unsigned int timeout = DMA_CHAN_TOUT;
+
+	do {
+		uint32_t cfg, halt;
+
+		if (timeout > DMA_CHAN_TOUT / 2)
+			halt = DMAC_CFG_PKT_HALT_MASK;
+		else
+			halt = DMAC_CFG_BRST_HALT_MASK;
+
+		/* try to stop dma channel */
+		writel_be(halt, priv->chan + DMAC_CFG_REG(ch));
+		mb();
+
+		/* check if channel was stopped */
+		cfg = readl_be(priv->chan + DMAC_CFG_REG(ch));
+		if (!(cfg & DMAC_CFG_ENABLE_MASK))
+			break;
+
+		udelay(1);
+	} while (--timeout);
+
+	if (!timeout)
+		pr_err("unable to stop channel %u\n", ch);
+
+	/* reset dma channel */
+	setbits_be32(priv->base + DMA_RST_REG, DMA_RST_CHAN_MASK(ch));
+	mb();
+	clrbits_be32(priv->base + DMA_RST_REG, DMA_RST_CHAN_MASK(ch));
+}
+
+static int bcm6348_iudma_disable(struct dma *dma)
+{
+	struct bcm6348_iudma_priv *priv = dev_get_priv(dma->dev);
+	struct bcm6348_chan_priv *ch_priv = priv->ch_priv[dma->id];
+
+	/* stop dma channel */
+	bcm6348_iudma_chan_stop(priv, dma->id);
+
+	/* dma flow control */
+	if (bcm6348_iudma_chan_is_rx(dma->id))
+		writel_be(DMA_FLOWC_ALLOC_FORCE_MASK,
+			  DMA_FLOWC_ALLOC_REG(dma->id));
+
+	/* init channel config */
+	ch_priv->running = false;
+	ch_priv->desc_id = 0;
+	if (bcm6348_iudma_chan_is_rx(dma->id))
+		ch_priv->desc_cnt = 0;
+	else
+		ch_priv->desc_cnt = ch_priv->dma_ring_size;
+
+	return 0;
+}
+
+static int bcm6348_iudma_enable(struct dma *dma)
+{
+	const struct bcm6348_iudma_priv *priv = dev_get_priv(dma->dev);
+	struct bcm6348_chan_priv *ch_priv = priv->ch_priv[dma->id];
+	struct bcm6348_dma_desc *dma_desc = ch_priv->dma_ring;
+	uint8_t i;
+
+	/* dma ring init */
+	for (i = 0; i < ch_priv->desc_cnt; i++) {
+		if (bcm6348_iudma_chan_is_rx(dma->id)) {
+			ch_priv->busy_desc[i] = false;
+			dma_desc->status |= DMAD_ST_OWN_MASK;
+		} else {
+			dma_desc->status = 0;
+			dma_desc->length = 0;
+			dma_desc->address = 0;
+		}
+
+		if (i == ch_priv->desc_cnt - 1)
+			dma_desc->status |= DMAD_ST_WRAP_MASK;
+
+		dma_desc++;
+	}
+
+	/* init to first descriptor */
+	ch_priv->desc_id = 0;
+
+	/* force cache writeback */
+	bcm6348_iudma_fdc(ch_priv->dma_ring,
+			  sizeof(*dma_desc) * ch_priv->desc_cnt);
+
+	/* clear sram */
+	writel_be(0, priv->sram + DMAS_STATE_DATA_REG(dma->id));
+	writel_be(0, priv->sram + DMAS_DESC_LEN_STATUS_REG(dma->id));
+	writel_be(0, priv->sram + DMAS_DESC_BASE_BUFPTR_REG(dma->id));
+
+	/* set dma ring start */
+	writel_be(virt_to_phys(ch_priv->dma_ring),
+		  priv->sram + DMAS_RSTART_REG(dma->id));
+
+	/* set flow control */
+	if (bcm6348_iudma_chan_is_rx(dma->id)) {
+		u32 val;
+
+		setbits_be32(priv->base + DMA_CFG_REG,
+			     DMA_CFG_FLOWC_ENABLE(dma->id));
+
+		val = ch_priv->desc_cnt / 3;
+		writel_be(val, priv->base + DMA_FLOWC_THR_LO_REG(dma->id));
+
+		val = (ch_priv->desc_cnt * 2) / 3;
+		writel_be(val, priv->base + DMA_FLOWC_THR_HI_REG(dma->id));
+
+		writel_be(0, priv->base + DMA_FLOWC_ALLOC_REG(dma->id));
+	}
+
+	/* set dma max burst */
+	writel_be(ch_priv->desc_cnt,
+		  priv->chan + DMAC_BURST_REG(dma->id));
+
+	/* kick rx dma channel */
+	if (bcm6348_iudma_chan_is_rx(dma->id))
+		setbits_be32(priv->chan + DMAC_CFG_REG(dma->id),
+			     DMAC_CFG_ENABLE_MASK);
+
+	/* channel is now enabled */
+	ch_priv->running = true;
+
+	return 0;
+}
+
+static int bcm6348_iudma_request(struct dma *dma)
+{
+	const struct bcm6348_iudma_priv *priv = dev_get_priv(dma->dev);
+	struct bcm6348_chan_priv *ch_priv;
+
+	/* check if channel is valid */
+	if (dma->id >= priv->n_channels)
+		return -ENODEV;
+
+	/* alloc channel private data */
+	priv->ch_priv[dma->id] = calloc(1, sizeof(struct bcm6348_chan_priv));
+	if (!priv->ch_priv[dma->id])
+		return -ENOMEM;
+	ch_priv = priv->ch_priv[dma->id];
+
+	/* alloc dma ring */
+	if (bcm6348_iudma_chan_is_rx(dma->id))
+		ch_priv->dma_ring_size = DMA_RX_DESC;
+	else
+		ch_priv->dma_ring_size = DMA_TX_DESC;
+
+	ch_priv->dma_ring =
+		malloc_cache_aligned(sizeof(struct bcm6348_dma_desc) *
+				     ch_priv->dma_ring_size);
+	if (!ch_priv->dma_ring)
+		return -ENOMEM;
+
+	/* init channel config */
+	ch_priv->running = false;
+	ch_priv->desc_id = 0;
+	if (bcm6348_iudma_chan_is_rx(dma->id)) {
+		ch_priv->desc_cnt = 0;
+		ch_priv->busy_desc = calloc(ch_priv->desc_cnt, sizeof(bool));
+	} else {
+		ch_priv->desc_cnt = ch_priv->dma_ring_size;
+		ch_priv->busy_desc = NULL;
+	}
+
+	return 0;
+}
+
+static int bcm6348_iudma_receive(struct dma *dma, void **dst, void *metadata)
+{
+	const struct bcm6348_iudma_priv *priv = dev_get_priv(dma->dev);
+	const struct bcm6348_iudma_hw *hw = priv->hw;
+	struct bcm6348_chan_priv *ch_priv = priv->ch_priv[dma->id];
+	struct bcm6348_dma_desc *dma_desc = dma_desc = ch_priv->dma_ring;
+	int ret;
+
+	/* get dma ring descriptor address */
+	dma_desc += ch_priv->desc_id;
+
+	/* invalidate cache data */
+	bcm6348_iudma_idc(dma_desc, sizeof(*dma_desc));
+
+	/* check dma own */
+	if (dma_desc->status & DMAD_ST_OWN_MASK)
+		return -EAGAIN;
+
+	/* check pkt */
+	if (!(dma_desc->status & DMAD_ST_EOP_MASK) ||
+	    !(dma_desc->status & DMAD_ST_SOP_MASK) ||
+	    (dma_desc->status & hw->err_mask)) {
+		pr_err("invalid pkt received (ch=%ld desc=%u) (st=%04x)\n",
+		       dma->id, ch_priv->desc_id, dma_desc->status);

drivers/dma/bcm6348-iudma.c line 352

Quoted 10 lines

drivers/dma/bcm6348-iudma.c new file +10 -0

+		ret = -EAGAIN;
+	} else {
+		/* set dma buffer address */
+		*dst = phys_to_virt(dma_desc->address);
+
+		/* invalidate cache data */
+		bcm6348_iudma_idc(*dst, dma_desc->length);
+
+		/* remove crc */
+		ret = dma_desc->length - 4;

is CRC a feature of the DMA engine or does this belong to the ethernet driver?

Quoted 291 lines

drivers/dma/bcm6348-iudma.c new file +290 -0

+	}
+
+	/* busy dma descriptor */
+	ch_priv->busy_desc[ch_priv->desc_id] = true;
+
+	/* increment dma descriptor */
+	ch_priv->desc_id = (ch_priv->desc_id + 1) % ch_priv->desc_cnt;
+
+	return ret;
+}
+
+static int bcm6348_iudma_send(struct dma *dma, void *src, size_t len,
+			      void *metadata)
+{
+	const struct bcm6348_iudma_priv *priv = dev_get_priv(dma->dev);
+	struct bcm6348_chan_priv *ch_priv = priv->ch_priv[dma->id];
+	struct bcm6348_dma_desc *dma_desc;
+	uint16_t status;
+
+	/* flush cache */
+	bcm6348_iudma_fdc(src, len);
+
+	/* get dma ring descriptor address */
+	dma_desc = ch_priv->dma_ring;
+	dma_desc += ch_priv->desc_id;
+
+	/* config dma descriptor */
+	status = (DMAD_ST_OWN_MASK |
+		  DMAD_ST_EOP_MASK |
+		  DMAD_ST_CRC_MASK |
+		  DMAD_ST_SOP_MASK);
+	if (ch_priv->desc_id == ch_priv->desc_cnt - 1)
+		status |= DMAD_ST_WRAP_MASK;
+
+	/* set dma descriptor */
+	dma_desc->address = virt_to_phys(src);
+	dma_desc->length = len;
+	dma_desc->status = status;
+
+	/* flush cache */
+	bcm6348_iudma_fdc(dma_desc, sizeof(*dma_desc));
+
+	/* kick tx dma channel */
+	setbits_be32(priv->chan + DMAC_CFG_REG(dma->id), DMAC_CFG_ENABLE_MASK);
+
+	/* poll dma status */
+	do {
+		/* invalidate cache */
+		bcm6348_iudma_idc(dma_desc, sizeof(*dma_desc));
+
+		if (!(dma_desc->status & DMAD_ST_OWN_MASK))
+			break;
+	} while(1);
+
+	/* increment dma descriptor */
+	ch_priv->desc_id = (ch_priv->desc_id + 1) % ch_priv->desc_cnt;
+
+	return 0;
+}
+
+static int bcm6348_iudma_free_rcv_buf(struct dma *dma, void *dst, size_t size)
+{
+	const struct bcm6348_iudma_priv *priv = dev_get_priv(dma->dev);
+	struct bcm6348_chan_priv *ch_priv = priv->ch_priv[dma->id];
+	struct bcm6348_dma_desc *dma_desc = ch_priv->dma_ring;
+	uint16_t status;
+	uint8_t i;
+	u32 cfg;
+
+	/* get dirty dma descriptor */
+	for (i = 0; i < ch_priv->desc_cnt; i++) {
+		if (phys_to_virt(dma_desc->address) == dst)
+			break;
+
+		dma_desc++;
+	}
+
+	/* dma descriptor not found */
+	if (i == ch_priv->desc_cnt) {
+		pr_err("dirty dma descriptor not found\n");
+		return -ENOENT;
+	}
+
+	/* invalidate cache */
+	bcm6348_iudma_idc(ch_priv->dma_ring,
+			  sizeof(*dma_desc) * ch_priv->desc_cnt);
+
+	/* free dma descriptor */
+	ch_priv->busy_desc[i] = false;
+
+	status = DMAD_ST_OWN_MASK;
+	if (i == ch_priv->desc_cnt - 1)
+		status |= DMAD_ST_WRAP_MASK;
+
+	dma_desc->status |= status;
+	dma_desc->length = PKTSIZE_ALIGN;
+
+	/* tell dma we allocated one buffer */
+	writel_be(1, DMA_FLOWC_ALLOC_REG(dma->id));
+
+	/* flush cache */
+	bcm6348_iudma_fdc(ch_priv->dma_ring,
+			  sizeof(*dma_desc) * ch_priv->desc_cnt);
+
+	/* kick rx dma channel if disabled */
+	cfg = readl_be(priv->chan + DMAC_CFG_REG(dma->id));
+	if (!(cfg & DMAC_CFG_ENABLE_MASK))
+		setbits_be32(priv->chan + DMAC_CFG_REG(dma->id),
+			     DMAC_CFG_ENABLE_MASK);
+
+	return 0;
+}
+
+static int bcm6348_iudma_add_rcv_buf(struct dma *dma, void *dst, size_t size)
+{
+	const struct bcm6348_iudma_priv *priv = dev_get_priv(dma->dev);
+	struct bcm6348_chan_priv *ch_priv = priv->ch_priv[dma->id];
+	struct bcm6348_dma_desc *dma_desc = ch_priv->dma_ring;
+
+	/* no more dma descriptors available */
+	if (ch_priv->desc_cnt == ch_priv->dma_ring_size) {
+		pr_err("max number of buffers reached\n");
+		return -EINVAL;
+	}
+
+	/* get next dma descriptor */
+	dma_desc += ch_priv->desc_cnt;
+
+	/* init dma descriptor */
+	dma_desc->address = virt_to_phys(dst);
+	dma_desc->length = size;
+	dma_desc->status = 0;
+
+	/* flush cache */
+	bcm6348_iudma_fdc(dma_desc, sizeof(*dma_desc));
+
+	/* increment dma descriptors */
+	ch_priv->desc_cnt++;
+
+	return 0;
+}
+
+static int bcm6348_iudma_prepare_rcv_buf(struct dma *dma, void *dst,
+					 size_t size)
+{
+	const struct bcm6348_iudma_priv *priv = dev_get_priv(dma->dev);
+	struct bcm6348_chan_priv *ch_priv = priv->ch_priv[dma->id];
+
+	/* only add new rx buffers if channel isn't running */
+	if (ch_priv->running)
+		return bcm6348_iudma_free_rcv_buf(dma, dst, size);
+	else
+		return bcm6348_iudma_add_rcv_buf(dma, dst, size);
+}
+
+static const struct dma_ops bcm6348_iudma_ops = {
+	.disable = bcm6348_iudma_disable,
+	.enable = bcm6348_iudma_enable,
+	.prepare_rcv_buf = bcm6348_iudma_prepare_rcv_buf,
+	.request = bcm6348_iudma_request,
+	.receive = bcm6348_iudma_receive,
+	.send = bcm6348_iudma_send,
+};
+
+static const struct bcm6348_iudma_hw bcm6348_hw = {
+	.err_mask = (DMAD6348_ST_OV_ERR_MASK |
+		     DMAD6348_ST_CRC_ERR_MASK |
+		     DMAD6348_ST_RX_ERR_MASK |
+		     DMAD6348_ST_OS_ERR_MASK |
+		     DMAD6348_ST_UN_ERR_MASK),
+};
+
+static const struct bcm6348_iudma_hw bcm6368_hw = {
+	.err_mask = 0,
+};
+
+static const struct udevice_id bcm6348_iudma_ids[] = {
+	{
+		.compatible = "brcm,bcm6348-iudma",
+		.data = (ulong)&bcm6348_hw,
+	}, {
+		.compatible = "brcm,bcm6368-iudma",
+		.data = (ulong)&bcm6368_hw,
+	}, { /* sentinel */ }
+};
+
+static int bcm6348_iudma_probe(struct udevice *dev)
+{
+	struct dma_dev_priv *uc_priv = dev_get_uclass_priv(dev);
+	struct bcm6348_iudma_priv *priv = dev_get_priv(dev);
+	const struct bcm6348_iudma_hw *hw =
+		(const struct bcm6348_iudma_hw *)dev_get_driver_data(dev);
+	uint8_t ch;
+	int i;
+
+	uc_priv->supported = (DMA_SUPPORTS_DEV_TO_MEM |
+			      DMA_SUPPORTS_MEM_TO_DEV);
+	priv->hw = hw;
+
+	/* dma global base address */
+	priv->base = dev_remap_addr_name(dev, "dma");
+	if (!priv->base)
+		return -EINVAL;
+
+	/* dma channels base address */
+	priv->chan = dev_remap_addr_name(dev, "dma-channels");
+	if (!priv->chan)
+		return -EINVAL;
+
+	/* dma sram base address */
+	priv->sram = dev_remap_addr_name(dev, "dma-sram");
+	if (!priv->sram)
+		return -EINVAL;
+
+	/* get number of channels */
+	priv->n_channels = dev_read_u32_default(dev, "dma-channels", 8);
+	if (priv->n_channels > DMA_CHAN_MAX)
+		return -EINVAL;
+
+	/* try to enable clocks */
+	for (i = 0; ; i++) {
+		struct clk clk;
+		int ret;
+
+		ret = clk_get_by_index(dev, i, &clk);
+		if (ret < 0)
+			break;
+
+		ret = clk_enable(&clk);
+		if (ret < 0) {
+			pr_err("error enabling clock %d\n", i);
+			return ret;
+		}
+
+		ret = clk_free(&clk);
+		if (ret < 0) {
+			pr_err("error freeing clock %d\n", i);
+			return ret;
+		}
+	}
+
+	/* try to perform resets */
+	for (i = 0; ; i++) {
+		struct reset_ctl reset;
+		int ret;
+
+		ret = reset_get_by_index(dev, i, &reset);
+		if (ret < 0)
+			break;
+
+		ret = reset_deassert(&reset);
+		if (ret < 0) {
+			pr_err("error deasserting reset %d\n", i);
+			return ret;
+		}
+
+		ret = reset_free(&reset);
+		if (ret < 0) {
+			pr_err("error freeing reset %d\n", i);
+			return ret;
+		}
+	}
+
+	/* disable dma controller */
+	clrbits_be32(priv->base + DMA_CFG_REG, DMA_CFG_ENABLE_MASK);
+
+	/* alloc channel private data pointers */
+	priv->ch_priv = calloc(priv->n_channels,
+			       sizeof(struct bcm6348_chan_priv*));
+	if (!priv->ch_priv)
+		return -ENOMEM;
+
+	/* stop dma channels */
+	for (ch = 0; ch < priv->n_channels; ch++)
+		bcm6348_iudma_chan_stop(priv, ch);
+
+	/* enable dma controller */
+	setbits_be32(priv->base + DMA_CFG_REG, DMA_CFG_ENABLE_MASK);
+
+	return 0;
+}
+
+U_BOOT_DRIVER(bcm6348_iudma) = {
+	.name = "bcm6348_iudma",
+	.id = UCLASS_DMA,
+	.of_match = bcm6348_iudma_ids,
+	.ops = &bcm6348_iudma_ops,
+	.priv_auto_alloc_size = sizeof(struct bcm6348_iudma_priv),
+	.probe = bcm6348_iudma_probe,
+};

Signature · 9 lines

- Daniel

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Álvaro Fernández Rojas

2018-11-30 17:13 UTC #85 lore raw

PATCH v10 1/28 dma: add bcm6348-iudma support

Hi Daniel,

Quoted 427 lines · Daniel Schwierzeck

Am 29.11.18 um 23:25 schrieb Álvaro Fernández Rojas:

Quoted 32 lines

BCM6348 IUDMA controller is present on multiple BMIPS (BCM63xx) SoCs.
Signed-off-by Álvaro Fernández Rojas <[email protected]>
---
v10: Introduce changes suggested by Daniel Schwierzeck:
- Fix license identifiers.
- Move DMAD_ST defines out of dma desc struct definition.
- Remove unneded aigned attribute from dma desc struct definition.
- Fill dma ring from consumer driver instead of allocating a new buffer.
- Correctly check clock/reset errors while probing.
- Switch to live DM live tree.
v9: introduce dma_prepare_rcv_buf dma op:
- bcm6348_iudma_chan_stop: switch to mdelay when resetting channel.
- bcm6348_iudma_receive: track dirty dma descriptors and no longer trigger dma rx channel.
- bcm6348_iudma_send: reorder to properly flush cache and set dma descriptor config.
- bcm6348_iudma_prepare_rcv_buf: implemented to clear dirty dma descriptors.
v8: Introduce changes from Grygorii Strashko
v5: Several fixes and improvements:
- Remove unused defines.
- Increment rx descriptors.
- Fix flow control issues.
- Error checking now depends on hw.
- Remove unneeded interrupts.
v4: Fix issues reported by Grygorii Strashko and other fixes:
- Remove usage of net_rx_packets as buffer.
- Allocate dynamic rx buffer.
- Check dma errors and discard invalid packets.
v3: no changes
v2: Fix dma rx burst config and select DMA_CHANNELS.

Quoted 5 lines

  drivers/dma/Kconfig         |   9 +
  drivers/dma/Makefile        |   1 +
  drivers/dma/bcm6348-iudma.c | 642 ++++++++++++++++++++++++++++++++++++++++++++
  3 files changed, 652 insertions(+)

create mode 100644 drivers/dma/bcm6348-iudma.c

Reviewed-by Daniel Schwierzeck <[email protected]>

only one nit left

Quoted 384 lines

drivers/dma/Kconfig +9 -0

index 8a4162eccd..1820676d7a 100644
@@ -26,6 +26,15 @@ config SANDBOX_DMA
  	  Enable support for a test DMA uclass implementation. It stimulates
  	  DMA transfer by simple copying data between channels.
 
+config BCM6348_IUDMA
+	bool "BCM6348 IUDMA driver"
+	depends on ARCH_BMIPS
+	select DMA_CHANNELS
+	help
+	  Enable the BCM6348 IUDMA driver.
+	  This driver support data transfer from devices to
+	  memory and from memory to devices.
+
  config TI_EDMA3
  	bool "TI EDMA3 driver"
  	help

drivers/dma/Makefile +1 -0

index aff31f986a..b5f9147e0a 100644
@@ -7,6 +7,7 @@ obj-$(CONFIG_DMA) += dma-uclass.o
 
  obj-$(CONFIG_FSLDMAFEC) += MCD_tasksInit.o MCD_dmaApi.o MCD_tasks.o
  obj-$(CONFIG_APBH_DMA) += apbh_dma.o
+obj-$(CONFIG_BCM6348_IUDMA) += bcm6348-iudma.o
  obj-$(CONFIG_FSL_DMA) += fsl_dma.o
  obj-$(CONFIG_SANDBOX_DMA) += sandbox-dma-test.o
  obj-$(CONFIG_TI_KSNAV) += keystone_nav.o keystone_nav_cfg.o

drivers/dma/bcm6348-iudma.c new file +346 -0

new file mode 100644
index 0000000000..699f1a6754
@@ -0,0 +1,642 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (C) 2018 Álvaro Fernández Rojas <[email protected]>
+ *
+ * Derived from linux/drivers/dma/bcm63xx-iudma.c:
+ *	Copyright (C) 2015 Simon Arlott <[email protected]>
+ *
+ * Derived from linux/drivers/net/ethernet/broadcom/bcm63xx_enet.c:
+ *	Copyright (C) 2008 Maxime Bizon <[email protected]>
+ *
+ * Derived from bcm963xx_4.12L.06B_consumer/shared/opensource/include/bcm963xx/63268_map_part.h:
+ *	Copyright (C) 2000-2010 Broadcom Corporation
+ *
+ * Derived from bcm963xx_4.12L.06B_consumer/bcmdrivers/opensource/net/enet/impl4/bcmenet.c:
+ *	Copyright (C) 2010 Broadcom Corporation
+ */
+
+#include <common.h>
+#include <clk.h>
+#include <dm.h>
+#include <dma-uclass.h>
+#include <memalign.h>
+#include <reset.h>
+#include <asm/io.h>
+
+#define DMA_RX_DESC	6
+#define DMA_TX_DESC	1
+
+/* DMA Channels */
+#define DMA_CHAN_FLOWC(x)		((x) >> 1)
+#define DMA_CHAN_MAX			16
+#define DMA_CHAN_SIZE			0x10
+#define DMA_CHAN_TOUT			500
+
+/* DMA Global Configuration register */
+#define DMA_CFG_REG			0x00
+#define  DMA_CFG_ENABLE_SHIFT		0
+#define  DMA_CFG_ENABLE_MASK		(1 << DMA_CFG_ENABLE_SHIFT)
+#define  DMA_CFG_FLOWC_ENABLE(x)	BIT(DMA_CHAN_FLOWC(x) + 1)
+#define  DMA_CFG_NCHANS_SHIFT		24
+#define  DMA_CFG_NCHANS_MASK		(0xf << DMA_CFG_NCHANS_SHIFT)
+
+/* DMA Global Flow Control registers */
+#define DMA_FLOWC_THR_LO_REG(x)		(0x04 + DMA_CHAN_FLOWC(x) * 0x0c)
+#define DMA_FLOWC_THR_HI_REG(x)		(0x08 + DMA_CHAN_FLOWC(x) * 0x0c)
+#define DMA_FLOWC_ALLOC_REG(x)		(0x0c + DMA_CHAN_FLOWC(x) * 0x0c)
+#define  DMA_FLOWC_ALLOC_FORCE_SHIFT	31
+#define  DMA_FLOWC_ALLOC_FORCE_MASK	(1 << DMA_FLOWC_ALLOC_FORCE_SHIFT)
+
+/* DMA Global Reset register */
+#define DMA_RST_REG			0x34
+#define  DMA_RST_CHAN_SHIFT		0
+#define  DMA_RST_CHAN_MASK(x)		(1 << x)
+
+/* DMA Channel Configuration register */
+#define DMAC_CFG_REG(x)			(DMA_CHAN_SIZE * (x) + 0x00)
+#define  DMAC_CFG_ENABLE_SHIFT		0
+#define  DMAC_CFG_ENABLE_MASK		(1 << DMAC_CFG_ENABLE_SHIFT)
+#define  DMAC_CFG_PKT_HALT_SHIFT	1
+#define  DMAC_CFG_PKT_HALT_MASK		(1 << DMAC_CFG_PKT_HALT_SHIFT)
+#define  DMAC_CFG_BRST_HALT_SHIFT	2
+#define  DMAC_CFG_BRST_HALT_MASK	(1 << DMAC_CFG_BRST_HALT_SHIFT)
+
+/* DMA Channel Max Burst Length register */
+#define DMAC_BURST_REG(x)		(DMA_CHAN_SIZE * (x) + 0x0c)
+
+/* DMA SRAM Descriptor Ring Start register */
+#define DMAS_RSTART_REG(x)		(DMA_CHAN_SIZE * (x) + 0x00)
+
+/* DMA SRAM State/Bytes done/ring offset register */
+#define DMAS_STATE_DATA_REG(x)		(DMA_CHAN_SIZE * (x) + 0x04)
+
+/* DMA SRAM Buffer Descriptor status and length register */
+#define DMAS_DESC_LEN_STATUS_REG(x)	(DMA_CHAN_SIZE * (x) + 0x08)
+
+/* DMA SRAM Buffer Descriptor status and length register */
+#define DMAS_DESC_BASE_BUFPTR_REG(x)	(DMA_CHAN_SIZE * (x) + 0x0c)
+
+/* DMA Descriptor Status */
+#define DMAD_ST_CRC_SHIFT		8
+#define DMAD_ST_CRC_MASK		(1 << DMAD_ST_CRC_SHIFT)
+#define DMAD_ST_WRAP_SHIFT		12
+#define DMAD_ST_WRAP_MASK		(1 << DMAD_ST_WRAP_SHIFT)
+#define DMAD_ST_SOP_SHIFT		13
+#define DMAD_ST_SOP_MASK		(1 << DMAD_ST_SOP_SHIFT)
+#define DMAD_ST_EOP_SHIFT		14
+#define DMAD_ST_EOP_MASK		(1 << DMAD_ST_EOP_SHIFT)
+#define DMAD_ST_OWN_SHIFT		15
+#define DMAD_ST_OWN_MASK		(1 << DMAD_ST_OWN_SHIFT)
+
+#define DMAD6348_ST_OV_ERR_SHIFT	0
+#define DMAD6348_ST_OV_ERR_MASK		(1 << DMAD6348_ST_OV_ERR_SHIFT)
+#define DMAD6348_ST_CRC_ERR_SHIFT	1
+#define DMAD6348_ST_CRC_ERR_MASK	(1 << DMAD6348_ST_CRC_ERR_SHIFT)
+#define DMAD6348_ST_RX_ERR_SHIFT	2
+#define DMAD6348_ST_RX_ERR_MASK		(1 << DMAD6348_ST_RX_ERR_SHIFT)
+#define DMAD6348_ST_OS_ERR_SHIFT	4
+#define DMAD6348_ST_OS_ERR_MASK		(1 << DMAD6348_ST_OS_ERR_SHIFT)
+#define DMAD6348_ST_UN_ERR_SHIFT	9
+#define DMAD6348_ST_UN_ERR_MASK		(1 << DMAD6348_ST_UN_ERR_SHIFT)
+
+struct bcm6348_dma_desc {
+	uint16_t length;
+	uint16_t status;
+	uint32_t address;
+};
+
+struct bcm6348_chan_priv {
+	void __iomem *dma_ring;
+	uint8_t dma_ring_size;
+	uint8_t desc_id;
+	uint8_t desc_cnt;
+	bool *busy_desc;
+	bool running;
+};
+
+struct bcm6348_iudma_hw {
+	uint16_t err_mask;
+};
+
+struct bcm6348_iudma_priv {
+	const struct bcm6348_iudma_hw *hw;
+	void __iomem *base;
+	void __iomem *chan;
+	void __iomem *sram;
+	struct bcm6348_chan_priv **ch_priv;
+	uint8_t n_channels;
+};
+
+static inline bool bcm6348_iudma_chan_is_rx(uint8_t ch)
+{
+	return !(ch & 1);
+}
+
+static inline void bcm6348_iudma_fdc(void *ptr, ulong size)
+{
+	ulong start = (ulong) ptr;
+
+	flush_dcache_range(start, start + size);
+}
+
+static inline void bcm6348_iudma_idc(void *ptr, ulong size)
+{
+	ulong start = (ulong) ptr;
+
+	invalidate_dcache_range(start, start + size);
+}
+
+static void bcm6348_iudma_chan_stop(struct bcm6348_iudma_priv *priv,
+				    uint8_t ch)
+{
+	unsigned int timeout = DMA_CHAN_TOUT;
+
+	do {
+		uint32_t cfg, halt;
+
+		if (timeout > DMA_CHAN_TOUT / 2)
+			halt = DMAC_CFG_PKT_HALT_MASK;
+		else
+			halt = DMAC_CFG_BRST_HALT_MASK;
+
+		/* try to stop dma channel */
+		writel_be(halt, priv->chan + DMAC_CFG_REG(ch));
+		mb();
+
+		/* check if channel was stopped */
+		cfg = readl_be(priv->chan + DMAC_CFG_REG(ch));
+		if (!(cfg & DMAC_CFG_ENABLE_MASK))
+			break;
+
+		udelay(1);
+	} while (--timeout);
+
+	if (!timeout)
+		pr_err("unable to stop channel %u\n", ch);
+
+	/* reset dma channel */
+	setbits_be32(priv->base + DMA_RST_REG, DMA_RST_CHAN_MASK(ch));
+	mb();
+	clrbits_be32(priv->base + DMA_RST_REG, DMA_RST_CHAN_MASK(ch));
+}
+
+static int bcm6348_iudma_disable(struct dma *dma)
+{
+	struct bcm6348_iudma_priv *priv = dev_get_priv(dma->dev);
+	struct bcm6348_chan_priv *ch_priv = priv->ch_priv[dma->id];
+
+	/* stop dma channel */
+	bcm6348_iudma_chan_stop(priv, dma->id);
+
+	/* dma flow control */
+	if (bcm6348_iudma_chan_is_rx(dma->id))
+		writel_be(DMA_FLOWC_ALLOC_FORCE_MASK,
+			  DMA_FLOWC_ALLOC_REG(dma->id));
+
+	/* init channel config */
+	ch_priv->running = false;
+	ch_priv->desc_id = 0;
+	if (bcm6348_iudma_chan_is_rx(dma->id))
+		ch_priv->desc_cnt = 0;
+	else
+		ch_priv->desc_cnt = ch_priv->dma_ring_size;
+
+	return 0;
+}
+
+static int bcm6348_iudma_enable(struct dma *dma)
+{
+	const struct bcm6348_iudma_priv *priv = dev_get_priv(dma->dev);
+	struct bcm6348_chan_priv *ch_priv = priv->ch_priv[dma->id];
+	struct bcm6348_dma_desc *dma_desc = ch_priv->dma_ring;
+	uint8_t i;
+
+	/* dma ring init */
+	for (i = 0; i < ch_priv->desc_cnt; i++) {
+		if (bcm6348_iudma_chan_is_rx(dma->id)) {
+			ch_priv->busy_desc[i] = false;
+			dma_desc->status |= DMAD_ST_OWN_MASK;
+		} else {
+			dma_desc->status = 0;
+			dma_desc->length = 0;
+			dma_desc->address = 0;
+		}
+
+		if (i == ch_priv->desc_cnt - 1)
+			dma_desc->status |= DMAD_ST_WRAP_MASK;
+
+		dma_desc++;
+	}
+
+	/* init to first descriptor */
+	ch_priv->desc_id = 0;
+
+	/* force cache writeback */
+	bcm6348_iudma_fdc(ch_priv->dma_ring,
+			  sizeof(*dma_desc) * ch_priv->desc_cnt);
+
+	/* clear sram */
+	writel_be(0, priv->sram + DMAS_STATE_DATA_REG(dma->id));
+	writel_be(0, priv->sram + DMAS_DESC_LEN_STATUS_REG(dma->id));
+	writel_be(0, priv->sram + DMAS_DESC_BASE_BUFPTR_REG(dma->id));
+
+	/* set dma ring start */
+	writel_be(virt_to_phys(ch_priv->dma_ring),
+		  priv->sram + DMAS_RSTART_REG(dma->id));
+
+	/* set flow control */
+	if (bcm6348_iudma_chan_is_rx(dma->id)) {
+		u32 val;
+
+		setbits_be32(priv->base + DMA_CFG_REG,
+			     DMA_CFG_FLOWC_ENABLE(dma->id));
+
+		val = ch_priv->desc_cnt / 3;
+		writel_be(val, priv->base + DMA_FLOWC_THR_LO_REG(dma->id));
+
+		val = (ch_priv->desc_cnt * 2) / 3;
+		writel_be(val, priv->base + DMA_FLOWC_THR_HI_REG(dma->id));
+
+		writel_be(0, priv->base + DMA_FLOWC_ALLOC_REG(dma->id));
+	}
+
+	/* set dma max burst */
+	writel_be(ch_priv->desc_cnt,
+		  priv->chan + DMAC_BURST_REG(dma->id));
+
+	/* kick rx dma channel */
+	if (bcm6348_iudma_chan_is_rx(dma->id))
+		setbits_be32(priv->chan + DMAC_CFG_REG(dma->id),
+			     DMAC_CFG_ENABLE_MASK);
+
+	/* channel is now enabled */
+	ch_priv->running = true;
+
+	return 0;
+}
+
+static int bcm6348_iudma_request(struct dma *dma)
+{
+	const struct bcm6348_iudma_priv *priv = dev_get_priv(dma->dev);
+	struct bcm6348_chan_priv *ch_priv;
+
+	/* check if channel is valid */
+	if (dma->id >= priv->n_channels)
+		return -ENODEV;
+
+	/* alloc channel private data */
+	priv->ch_priv[dma->id] = calloc(1, sizeof(struct bcm6348_chan_priv));
+	if (!priv->ch_priv[dma->id])
+		return -ENOMEM;
+	ch_priv = priv->ch_priv[dma->id];
+
+	/* alloc dma ring */
+	if (bcm6348_iudma_chan_is_rx(dma->id))
+		ch_priv->dma_ring_size = DMA_RX_DESC;
+	else
+		ch_priv->dma_ring_size = DMA_TX_DESC;
+
+	ch_priv->dma_ring =
+		malloc_cache_aligned(sizeof(struct bcm6348_dma_desc) *
+				     ch_priv->dma_ring_size);
+	if (!ch_priv->dma_ring)
+		return -ENOMEM;
+
+	/* init channel config */
+	ch_priv->running = false;
+	ch_priv->desc_id = 0;
+	if (bcm6348_iudma_chan_is_rx(dma->id)) {
+		ch_priv->desc_cnt = 0;
+		ch_priv->busy_desc = calloc(ch_priv->desc_cnt, sizeof(bool));
+	} else {
+		ch_priv->desc_cnt = ch_priv->dma_ring_size;
+		ch_priv->busy_desc = NULL;
+	}
+
+	return 0;
+}
+
+static int bcm6348_iudma_receive(struct dma *dma, void **dst, void *metadata)
+{
+	const struct bcm6348_iudma_priv *priv = dev_get_priv(dma->dev);
+	const struct bcm6348_iudma_hw *hw = priv->hw;
+	struct bcm6348_chan_priv *ch_priv = priv->ch_priv[dma->id];
+	struct bcm6348_dma_desc *dma_desc = dma_desc = ch_priv->dma_ring;
+	int ret;
+
+	/* get dma ring descriptor address */
+	dma_desc += ch_priv->desc_id;
+
+	/* invalidate cache data */
+	bcm6348_iudma_idc(dma_desc, sizeof(*dma_desc));
+
+	/* check dma own */
+	if (dma_desc->status & DMAD_ST_OWN_MASK)
+		return -EAGAIN;
+
+	/* check pkt */
+	if (!(dma_desc->status & DMAD_ST_EOP_MASK) ||
+	    !(dma_desc->status & DMAD_ST_SOP_MASK) ||
+	    (dma_desc->status & hw->err_mask)) {
+		pr_err("invalid pkt received (ch=%ld desc=%u) (st=%04x)\n",
+		       dma->id, ch_priv->desc_id, dma_desc->status);
+		ret = -EAGAIN;
+	} else {
+		/* set dma buffer address */
+		*dst = phys_to_virt(dma_desc->address);

Quoted 8 lines

drivers/dma/bcm6348-iudma.c line 352
Quoted 6 lines
drivers/dma/bcm6348-iudma.c new file +6 -0
+
+		/* invalidate cache data */
+		bcm6348_iudma_idc(*dst, dma_desc->length);
+
+		/* remove crc */
+		ret = dma_desc->length - 4;
is CRC a feature of the DMA engine or does this belong to the ethernet driver?

I would say it belongs to ethernet, since I copied that from linux:

https://github.com/Noltari/linux/blob/master/drivers/net/ethernet/broadcom/bcm63xx_enet.c#L379

However, I just did one version without removing FCS and it worked, so I will remove it in the next version.

Quoted 292 lines

drivers/dma/bcm6348-iudma.c new file +290 -0

+	}
+
+	/* busy dma descriptor */
+	ch_priv->busy_desc[ch_priv->desc_id] = true;
+
+	/* increment dma descriptor */
+	ch_priv->desc_id = (ch_priv->desc_id + 1) % ch_priv->desc_cnt;
+
+	return ret;
+}
+
+static int bcm6348_iudma_send(struct dma *dma, void *src, size_t len,
+			      void *metadata)
+{
+	const struct bcm6348_iudma_priv *priv = dev_get_priv(dma->dev);
+	struct bcm6348_chan_priv *ch_priv = priv->ch_priv[dma->id];
+	struct bcm6348_dma_desc *dma_desc;
+	uint16_t status;
+
+	/* flush cache */
+	bcm6348_iudma_fdc(src, len);
+
+	/* get dma ring descriptor address */
+	dma_desc = ch_priv->dma_ring;
+	dma_desc += ch_priv->desc_id;
+
+	/* config dma descriptor */
+	status = (DMAD_ST_OWN_MASK |
+		  DMAD_ST_EOP_MASK |
+		  DMAD_ST_CRC_MASK |
+		  DMAD_ST_SOP_MASK);
+	if (ch_priv->desc_id == ch_priv->desc_cnt - 1)
+		status |= DMAD_ST_WRAP_MASK;
+
+	/* set dma descriptor */
+	dma_desc->address = virt_to_phys(src);
+	dma_desc->length = len;
+	dma_desc->status = status;
+
+	/* flush cache */
+	bcm6348_iudma_fdc(dma_desc, sizeof(*dma_desc));
+
+	/* kick tx dma channel */
+	setbits_be32(priv->chan + DMAC_CFG_REG(dma->id), DMAC_CFG_ENABLE_MASK);
+
+	/* poll dma status */
+	do {
+		/* invalidate cache */
+		bcm6348_iudma_idc(dma_desc, sizeof(*dma_desc));
+
+		if (!(dma_desc->status & DMAD_ST_OWN_MASK))
+			break;
+	} while(1);
+
+	/* increment dma descriptor */
+	ch_priv->desc_id = (ch_priv->desc_id + 1) % ch_priv->desc_cnt;
+
+	return 0;
+}
+
+static int bcm6348_iudma_free_rcv_buf(struct dma *dma, void *dst, size_t size)
+{
+	const struct bcm6348_iudma_priv *priv = dev_get_priv(dma->dev);
+	struct bcm6348_chan_priv *ch_priv = priv->ch_priv[dma->id];
+	struct bcm6348_dma_desc *dma_desc = ch_priv->dma_ring;
+	uint16_t status;
+	uint8_t i;
+	u32 cfg;
+
+	/* get dirty dma descriptor */
+	for (i = 0; i < ch_priv->desc_cnt; i++) {
+		if (phys_to_virt(dma_desc->address) == dst)
+			break;
+
+		dma_desc++;
+	}
+
+	/* dma descriptor not found */
+	if (i == ch_priv->desc_cnt) {
+		pr_err("dirty dma descriptor not found\n");
+		return -ENOENT;
+	}
+
+	/* invalidate cache */
+	bcm6348_iudma_idc(ch_priv->dma_ring,
+			  sizeof(*dma_desc) * ch_priv->desc_cnt);
+
+	/* free dma descriptor */
+	ch_priv->busy_desc[i] = false;
+
+	status = DMAD_ST_OWN_MASK;
+	if (i == ch_priv->desc_cnt - 1)
+		status |= DMAD_ST_WRAP_MASK;
+
+	dma_desc->status |= status;
+	dma_desc->length = PKTSIZE_ALIGN;
+
+	/* tell dma we allocated one buffer */
+	writel_be(1, DMA_FLOWC_ALLOC_REG(dma->id));
+
+	/* flush cache */
+	bcm6348_iudma_fdc(ch_priv->dma_ring,
+			  sizeof(*dma_desc) * ch_priv->desc_cnt);
+
+	/* kick rx dma channel if disabled */
+	cfg = readl_be(priv->chan + DMAC_CFG_REG(dma->id));
+	if (!(cfg & DMAC_CFG_ENABLE_MASK))
+		setbits_be32(priv->chan + DMAC_CFG_REG(dma->id),
+			     DMAC_CFG_ENABLE_MASK);
+
+	return 0;
+}
+
+static int bcm6348_iudma_add_rcv_buf(struct dma *dma, void *dst, size_t size)
+{
+	const struct bcm6348_iudma_priv *priv = dev_get_priv(dma->dev);
+	struct bcm6348_chan_priv *ch_priv = priv->ch_priv[dma->id];
+	struct bcm6348_dma_desc *dma_desc = ch_priv->dma_ring;
+
+	/* no more dma descriptors available */
+	if (ch_priv->desc_cnt == ch_priv->dma_ring_size) {
+		pr_err("max number of buffers reached\n");
+		return -EINVAL;
+	}
+
+	/* get next dma descriptor */
+	dma_desc += ch_priv->desc_cnt;
+
+	/* init dma descriptor */
+	dma_desc->address = virt_to_phys(dst);
+	dma_desc->length = size;
+	dma_desc->status = 0;
+
+	/* flush cache */
+	bcm6348_iudma_fdc(dma_desc, sizeof(*dma_desc));
+
+	/* increment dma descriptors */
+	ch_priv->desc_cnt++;
+
+	return 0;
+}
+
+static int bcm6348_iudma_prepare_rcv_buf(struct dma *dma, void *dst,
+					 size_t size)
+{
+	const struct bcm6348_iudma_priv *priv = dev_get_priv(dma->dev);
+	struct bcm6348_chan_priv *ch_priv = priv->ch_priv[dma->id];
+
+	/* only add new rx buffers if channel isn't running */
+	if (ch_priv->running)
+		return bcm6348_iudma_free_rcv_buf(dma, dst, size);
+	else
+		return bcm6348_iudma_add_rcv_buf(dma, dst, size);
+}
+
+static const struct dma_ops bcm6348_iudma_ops = {
+	.disable = bcm6348_iudma_disable,
+	.enable = bcm6348_iudma_enable,
+	.prepare_rcv_buf = bcm6348_iudma_prepare_rcv_buf,
+	.request = bcm6348_iudma_request,
+	.receive = bcm6348_iudma_receive,
+	.send = bcm6348_iudma_send,
+};
+
+static const struct bcm6348_iudma_hw bcm6348_hw = {
+	.err_mask = (DMAD6348_ST_OV_ERR_MASK |
+		     DMAD6348_ST_CRC_ERR_MASK |
+		     DMAD6348_ST_RX_ERR_MASK |
+		     DMAD6348_ST_OS_ERR_MASK |
+		     DMAD6348_ST_UN_ERR_MASK),
+};
+
+static const struct bcm6348_iudma_hw bcm6368_hw = {
+	.err_mask = 0,
+};
+
+static const struct udevice_id bcm6348_iudma_ids[] = {
+	{
+		.compatible = "brcm,bcm6348-iudma",
+		.data = (ulong)&bcm6348_hw,
+	}, {
+		.compatible = "brcm,bcm6368-iudma",
+		.data = (ulong)&bcm6368_hw,
+	}, { /* sentinel */ }
+};
+
+static int bcm6348_iudma_probe(struct udevice *dev)
+{
+	struct dma_dev_priv *uc_priv = dev_get_uclass_priv(dev);
+	struct bcm6348_iudma_priv *priv = dev_get_priv(dev);
+	const struct bcm6348_iudma_hw *hw =
+		(const struct bcm6348_iudma_hw *)dev_get_driver_data(dev);
+	uint8_t ch;
+	int i;
+
+	uc_priv->supported = (DMA_SUPPORTS_DEV_TO_MEM |
+			      DMA_SUPPORTS_MEM_TO_DEV);
+	priv->hw = hw;
+
+	/* dma global base address */
+	priv->base = dev_remap_addr_name(dev, "dma");
+	if (!priv->base)
+		return -EINVAL;
+
+	/* dma channels base address */
+	priv->chan = dev_remap_addr_name(dev, "dma-channels");
+	if (!priv->chan)
+		return -EINVAL;
+
+	/* dma sram base address */
+	priv->sram = dev_remap_addr_name(dev, "dma-sram");
+	if (!priv->sram)
+		return -EINVAL;
+
+	/* get number of channels */
+	priv->n_channels = dev_read_u32_default(dev, "dma-channels", 8);
+	if (priv->n_channels > DMA_CHAN_MAX)
+		return -EINVAL;
+
+	/* try to enable clocks */
+	for (i = 0; ; i++) {
+		struct clk clk;
+		int ret;
+
+		ret = clk_get_by_index(dev, i, &clk);
+		if (ret < 0)
+			break;
+
+		ret = clk_enable(&clk);
+		if (ret < 0) {
+			pr_err("error enabling clock %d\n", i);
+			return ret;
+		}
+
+		ret = clk_free(&clk);
+		if (ret < 0) {
+			pr_err("error freeing clock %d\n", i);
+			return ret;
+		}
+	}
+
+	/* try to perform resets */
+	for (i = 0; ; i++) {
+		struct reset_ctl reset;
+		int ret;
+
+		ret = reset_get_by_index(dev, i, &reset);
+		if (ret < 0)
+			break;
+
+		ret = reset_deassert(&reset);
+		if (ret < 0) {
+			pr_err("error deasserting reset %d\n", i);
+			return ret;
+		}
+
+		ret = reset_free(&reset);
+		if (ret < 0) {
+			pr_err("error freeing reset %d\n", i);
+			return ret;
+		}
+	}
+
+	/* disable dma controller */
+	clrbits_be32(priv->base + DMA_CFG_REG, DMA_CFG_ENABLE_MASK);
+
+	/* alloc channel private data pointers */
+	priv->ch_priv = calloc(priv->n_channels,
+			       sizeof(struct bcm6348_chan_priv*));
+	if (!priv->ch_priv)
+		return -ENOMEM;
+
+	/* stop dma channels */
+	for (ch = 0; ch < priv->n_channels; ch++)
+		bcm6348_iudma_chan_stop(priv, ch);
+
+	/* enable dma controller */
+	setbits_be32(priv->base + DMA_CFG_REG, DMA_CFG_ENABLE_MASK);
+
+	return 0;
+}
+
+U_BOOT_DRIVER(bcm6348_iudma) = {
+	.name = "bcm6348_iudma",
+	.id = UCLASS_DMA,
+	.of_match = bcm6348_iudma_ids,
+	.ops = &bcm6348_iudma_ops,
+	.priv_auto_alloc_size = sizeof(struct bcm6348_iudma_priv),
+	.probe = bcm6348_iudma_probe,
+};

Álvaro Fernández Rojas

2018-11-29 22:25 UTC #86 lore raw

PATCH v10 2/28 bmips: bcm6338: add bcm6348-iudma support

In reply to Álvaro Fernández Rojas

Signed-off-by Álvaro Fernández Rojas <[email protected]>

---
v10: fix license identifiers
v9: no changes
v8: no changes
v5: no changes
v4: no changes
v3: no changes
v2: no changes

 arch/mips/dts/brcm,bcm6338.dtsi       | 14 ++++++++++++++
 include/dt-bindings/dma/bcm6338-dma.h | 14 ++++++++++++++
 2 files changed, 28 insertions(+)
 create mode 100644 include/dt-bindings/dma/bcm6338-dma.h

arch/mips/dts/brcm,bcm6338.dtsi +14 -0

index bbd58cf803..990355481c 100644
@@ -4,6 +4,7 @@
  */
 
 #include <dt-bindings/clock/bcm6338-clock.h>
+#include <dt-bindings/dma/bcm6338-dma.h>
 #include <dt-bindings/gpio/gpio.h>
 #include <dt-bindings/reset/bcm6338-reset.h>
 #include "skeleton.dtsi"

@@ -130,5 +131,18 @@
 			reg = <0xfffe3100 0x38>;
 			u-boot,dm-pre-reloc;
 		};
+
+		iudma: dma-controller at fffe2400 {
+			compatible = "brcm,bcm6348-iudma";
+			reg = <0xfffe2400 0x1c>,
+			      <0xfffe2500 0x60>,
+			      <0xfffe2600 0x60>;
+			reg-names = "dma",
+				    "dma-channels",
+				    "dma-sram";
+			#dma-cells = <1>;
+			dma-channels = <6>;
+			resets = <&periph_rst BCM6338_RST_DMAMEM>;
+		};
 	};
 };

include/dt-bindings/dma/bcm6338-dma.h new file +14 -0

new file mode 100644
index 0000000000..f2e0b20444
@@ -0,0 +1,14 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (C) 2018 Álvaro Fernández Rojas <[email protected]>
+ *
+ * Derived from linux/drivers/net/ethernet/broadcom/bcm63xx_enet.c
+ */
+
+#ifndef __DT_BINDINGS_DMA_BCM6338_H
+#define __DT_BINDINGS_DMA_BCM6338_H
+
+#define BCM6338_DMA_ENET_RX	0
+#define BCM6338_DMA_ENET_TX	1
+
+#endif /* __DT_BINDINGS_DMA_BCM6338_H */

Signature · 1 line

2.11.0

Álvaro Fernández Rojas

2018-11-29 22:25 UTC #87 lore raw

PATCH v10 3/28 bmips: bcm6348: add bcm6348-iudma support

In reply to Álvaro Fernández Rojas

Signed-off-by Álvaro Fernández Rojas <[email protected]>

---
v10: fix license identifiers
v9: no changes
v8: no changes
v5: no changes
v4: no changes
v3: no changes
v2: no changes

 arch/mips/dts/brcm,bcm6348.dtsi       | 16 ++++++++++++++++
 include/dt-bindings/dma/bcm6348-dma.h | 16 ++++++++++++++++
 2 files changed, 32 insertions(+)
 create mode 100644 include/dt-bindings/dma/bcm6348-dma.h

arch/mips/dts/brcm,bcm6348.dtsi +16 -0

index cc80bbc808..875de232ca 100644
@@ -4,6 +4,7 @@
  */
 
 #include <dt-bindings/clock/bcm6348-clock.h>
+#include <dt-bindings/dma/bcm6348-dma.h>
 #include <dt-bindings/gpio/gpio.h>
 #include <dt-bindings/reset/bcm6348-reset.h>
 #include "skeleton.dtsi"

@@ -159,5 +160,20 @@
 			reg = <0xfffe2300 0x38>;
 			u-boot,dm-pre-reloc;
 		};
+
+		iudma: dma-controller at fffe7000 {
+			compatible = "brcm,bcm6348-iudma";
+			reg = <0xfffe7000 0x1c>,
+			      <0xfffe7100 0x40>,
+			      <0xfffe7200 0x40>;
+			reg-names = "dma",
+				    "dma-channels",
+				    "dma-sram";
+			#dma-cells = <1>;
+			dma-channels = <4>;
+			clocks = <&periph_clk BCM6348_CLK_ENET>;
+			resets = <&periph_rst BCM6348_RST_ENET>,
+				 <&periph_rst BCM6348_RST_DMAMEM>;
+		};
 	};
 };

include/dt-bindings/dma/bcm6348-dma.h new file +16 -0

new file mode 100644
index 0000000000..36c2ffd412
@@ -0,0 +1,16 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (C) 2018 Álvaro Fernández Rojas <[email protected]>
+ *
+ * Derived from linux/drivers/net/ethernet/broadcom/bcm63xx_enet.c
+ */
+
+#ifndef __DT_BINDINGS_DMA_BCM6348_H
+#define __DT_BINDINGS_DMA_BCM6348_H
+
+#define BCM6348_DMA_ENET0_RX	0
+#define BCM6348_DMA_ENET0_TX	1
+#define BCM6348_DMA_ENET1_RX	2
+#define BCM6348_DMA_ENET1_TX	3
+
+#endif /* __DT_BINDINGS_DMA_BCM6348_H */

Signature · 1 line

2.11.0

Álvaro Fernández Rojas

2018-11-29 22:25 UTC #88 lore raw

PATCH v10 4/28 bmips: bcm6358: add bcm6348-iudma support

In reply to Álvaro Fernández Rojas

Signed-off-by Álvaro Fernández Rojas <[email protected]>

---
v10: fix license identifiers
v9: no changes
v8: no changes
v5: no changes
v4: no changes
v3: no changes
v2: no changes

 arch/mips/dts/brcm,bcm6358.dtsi       | 18 ++++++++++++++++++
 include/dt-bindings/dma/bcm6358-dma.h | 16 ++++++++++++++++
 2 files changed, 34 insertions(+)
 create mode 100644 include/dt-bindings/dma/bcm6358-dma.h

arch/mips/dts/brcm,bcm6358.dtsi +18 -0

index 0617b46e92..5605723e83 100644
@@ -4,6 +4,7 @@
  */
 
 #include <dt-bindings/clock/bcm6358-clock.h>
+#include <dt-bindings/dma/bcm6358-dma.h>
 #include <dt-bindings/gpio/gpio.h>
 #include <dt-bindings/reset/bcm6358-reset.h>
 #include "skeleton.dtsi"

@@ -190,5 +191,22 @@
 
 			status = "disabled";
 		};
+
+		iudma: dma-controller at fffe5000 {
+			compatible = "brcm,bcm6348-iudma";
+			reg = <0xfffe5000 0x24>,
+			      <0xfffe5100 0x80>,
+			      <0xfffe5200 0x80>;
+			reg-names = "dma",
+				    "dma-channels",
+				    "dma-sram";
+			#dma-cells = <1>;
+			dma-channels = <8>;
+			clocks = <&periph_clk BCM6358_CLK_EMUSB>,
+				 <&periph_clk BCM6358_CLK_USBSU>,
+				 <&periph_clk BCM6358_CLK_EPHY>;
+			resets = <&periph_rst BCM6358_RST_ENET>,
+				 <&periph_rst BCM6358_RST_EPHY>;
+		};
 	};
 };

include/dt-bindings/dma/bcm6358-dma.h new file +16 -0

new file mode 100644
index 0000000000..3118b9da0a
@@ -0,0 +1,16 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (C) 2018 Álvaro Fernández Rojas <[email protected]>
+ *
+ * Derived from linux/drivers/net/ethernet/broadcom/bcm63xx_enet.c
+ */
+
+#ifndef __DT_BINDINGS_DMA_BCM6358_H
+#define __DT_BINDINGS_DMA_BCM6358_H
+
+#define BCM6358_DMA_ENET0_RX	0
+#define BCM6358_DMA_ENET0_TX	1
+#define BCM6358_DMA_ENET1_RX	2
+#define BCM6358_DMA_ENET1_TX	3
+
+#endif /* __DT_BINDINGS_DMA_BCM6358_H */

Signature · 1 line

2.11.0

Álvaro Fernández Rojas

2018-11-29 22:25 UTC #89 lore raw

PATCH v10 5/28 bmips: bcm6368: add bcm6348-iudma support

In reply to Álvaro Fernández Rojas

Signed-off-by Álvaro Fernández Rojas <[email protected]>

---
v10: fix license identifiers
v9: no changes
v8: no changes
v5: no changes
v4: no changes
v3: no changes
v2: no changes

 arch/mips/dts/brcm,bcm6368.dtsi       | 13 +++++++++++++
 include/dt-bindings/dma/bcm6368-dma.h | 14 ++++++++++++++
 2 files changed, 27 insertions(+)
 create mode 100644 include/dt-bindings/dma/bcm6368-dma.h

arch/mips/dts/brcm,bcm6368.dtsi +13 -0

index 65d769ab4f..30047f6360 100644
@@ -4,6 +4,7 @@
  */
 
 #include <dt-bindings/clock/bcm6368-clock.h>
+#include <dt-bindings/dma/bcm6368-dma.h>
 #include <dt-bindings/gpio/gpio.h>
 #include <dt-bindings/reset/bcm6368-reset.h>
 #include "skeleton.dtsi"

@@ -192,5 +193,17 @@
 
 			status = "disabled";
 		};
+
+		iudma: dma-controller at 10006800 {
+			compatible = "brcm,bcm6368-iudma";
+			reg = <0x10006800 0x80>,
+			      <0x10006a00 0x80>,
+			      <0x10006c00 0x80>;
+			reg-names = "dma",
+				    "dma-channels",
+				    "dma-sram";
+			#dma-cells = <1>;
+			dma-channels = <8>;
+		};
 	};
 };

include/dt-bindings/dma/bcm6368-dma.h new file +14 -0

new file mode 100644
index 0000000000..36c6caa0e1
@@ -0,0 +1,14 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (C) 2018 Álvaro Fernández Rojas <[email protected]>
+ *
+ * Derived from linux/drivers/net/ethernet/broadcom/bcm63xx_enet.c
+ */
+
+#ifndef __DT_BINDINGS_DMA_BCM6368_H
+#define __DT_BINDINGS_DMA_BCM6368_H
+
+#define BCM6368_DMA_ENETSW_RX	0
+#define BCM6368_DMA_ENETSW_TX	1
+
+#endif /* __DT_BINDINGS_DMA_BCM6368_H */

Signature · 1 line

2.11.0

Álvaro Fernández Rojas

2018-11-29 22:25 UTC #90 lore raw

PATCH v10 6/28 bmips: bcm6328: add bcm6348-iudma support

In reply to Álvaro Fernández Rojas

Signed-off-by Álvaro Fernández Rojas <[email protected]>

---
v10: fix license identifiers
v9: no changes
v8: no changes
v5: no changes
v4: no changes
v3: no changes
v2: no changes

 arch/mips/dts/brcm,bcm6328.dtsi       | 13 +++++++++++++
 include/dt-bindings/dma/bcm6328-dma.h | 14 ++++++++++++++
 2 files changed, 27 insertions(+)
 create mode 100644 include/dt-bindings/dma/bcm6328-dma.h

arch/mips/dts/brcm,bcm6328.dtsi +13 -0

index e00a2950e2..6fa49e22bb 100644
@@ -4,6 +4,7 @@
  */
 
 #include <dt-bindings/clock/bcm6328-clock.h>
+#include <dt-bindings/dma/bcm6328-dma.h>
 #include <dt-bindings/gpio/gpio.h>
 #include <dt-bindings/power-domain/bcm6328-power-domain.h>
 #include <dt-bindings/reset/bcm6328-reset.h>

@@ -187,5 +188,17 @@
 			reg = <0x10003000 0x864>;
 			u-boot,dm-pre-reloc;
 		};
+
+		iudma: dma-controller at 1000d800 {
+			compatible = "brcm,bcm6368-iudma";
+			reg = <0x1000d800 0x80>,
+			      <0x1000da00 0x80>,
+			      <0x1000dc00 0x80>;
+			reg-names = "dma",
+				    "dma-channels",
+				    "dma-sram";
+			#dma-cells = <1>;
+			dma-channels = <8>;
+		};
 	};
 };

include/dt-bindings/dma/bcm6328-dma.h new file +14 -0

new file mode 100644
index 0000000000..7494df2feb
@@ -0,0 +1,14 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (C) 2018 Álvaro Fernández Rojas <[email protected]>
+ *
+ * Derived from linux/drivers/net/ethernet/broadcom/bcm63xx_enet.c
+ */
+
+#ifndef __DT_BINDINGS_DMA_BCM6328_H
+#define __DT_BINDINGS_DMA_BCM6328_H
+
+#define BCM6328_DMA_ENETSW_RX	0
+#define BCM6328_DMA_ENETSW_TX	1
+
+#endif /* __DT_BINDINGS_DMA_BCM6328_H */

Signature · 1 line

2.11.0

Álvaro Fernández Rojas

2018-11-29 22:25 UTC #91 lore raw

PATCH v10 7/28 bmips: bcm6362: add bcm6348-iudma support

In reply to Álvaro Fernández Rojas

Signed-off-by Álvaro Fernández Rojas <[email protected]>

---
v10: fix license identifiers
v9: no changes
v8: no changes
v5: no changes
v4: no changes
v3: no changes
v2: no changes

 arch/mips/dts/brcm,bcm6362.dtsi       | 13 +++++++++++++
 include/dt-bindings/dma/bcm6362-dma.h | 14 ++++++++++++++
 2 files changed, 27 insertions(+)
 create mode 100644 include/dt-bindings/dma/bcm6362-dma.h

arch/mips/dts/brcm,bcm6362.dtsi +13 -0

index 3047b82b21..94e7de096d 100644
@@ -4,6 +4,7 @@
  */
 
 #include <dt-bindings/clock/bcm6362-clock.h>
+#include <dt-bindings/dma/bcm6362-dma.h>
 #include <dt-bindings/gpio/gpio.h>
 #include <dt-bindings/power-domain/bcm6362-power-domain.h>
 #include <dt-bindings/reset/bcm6362-reset.h>

@@ -211,5 +212,17 @@
 			reg = <0x10003000 0x864>;
 			u-boot,dm-pre-reloc;
 		};
+
+		iudma: dma-controller at 1000d800 {
+			compatible = "brcm,bcm6368-iudma";
+			reg = <0x1000d800 0x80>,
+			      <0x1000da00 0x80>,
+			      <0x1000dc00 0x80>;
+			reg-names = "dma",
+				    "dma-channels",
+				    "dma-sram";
+			#dma-cells = <1>;
+			dma-channels = <8>;
+		};
 	};
 };

include/dt-bindings/dma/bcm6362-dma.h new file +14 -0

new file mode 100644
index 0000000000..1e62236daa
@@ -0,0 +1,14 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (C) 2018 Álvaro Fernández Rojas <[email protected]>
+ *
+ * Derived from linux/drivers/net/ethernet/broadcom/bcm63xx_enet.c
+ */
+
+#ifndef __DT_BINDINGS_DMA_BCM6362_H
+#define __DT_BINDINGS_DMA_BCM6362_H
+
+#define BCM6362_DMA_ENETSW_RX	0
+#define BCM6362_DMA_ENETSW_TX	1
+
+#endif /* __DT_BINDINGS_DMA_BCM6362_H */

Signature · 1 line

2.11.0

Álvaro Fernández Rojas

2018-11-29 22:25 UTC #92 lore raw

PATCH v10 8/28 bmips: bcm63268: add bcm6348-iudma support

In reply to Álvaro Fernández Rojas

Signed-off-by Álvaro Fernández Rojas <[email protected]>

---
v10: fix license identifiers
v9: no changes
v8: no changes
v5: no changes
v4: no changes
v3: no changes
v2: no changes

 arch/mips/dts/brcm,bcm63268.dtsi       | 13 +++++++++++++
 include/dt-bindings/dma/bcm63268-dma.h | 14 ++++++++++++++
 2 files changed, 27 insertions(+)
 create mode 100644 include/dt-bindings/dma/bcm63268-dma.h

arch/mips/dts/brcm,bcm63268.dtsi +13 -0

index 62c440e675..c7ad83c306 100644
@@ -4,6 +4,7 @@
  */
 
 #include <dt-bindings/clock/bcm63268-clock.h>
+#include <dt-bindings/dma/bcm63268-dma.h>
 #include <dt-bindings/gpio/gpio.h>
 #include <dt-bindings/power-domain/bcm63268-power-domain.h>
 #include <dt-bindings/reset/bcm63268-reset.h>

@@ -217,5 +218,17 @@
 			reg = <0x10003000 0x894>;
 			u-boot,dm-pre-reloc;
 		};
+
+		iudma: dma-controller at 1000d800 {
+			compatible = "brcm,bcm6368-iudma";
+			reg = <0x1000d800 0x80>,
+			      <0x1000da00 0x80>,
+			      <0x1000dc00 0x80>;
+			reg-names = "dma",
+				    "dma-channels",
+				    "dma-sram";
+			#dma-cells = <1>;
+			dma-channels = <8>;
+		};
 	};
 };

include/dt-bindings/dma/bcm63268-dma.h new file +14 -0

new file mode 100644
index 0000000000..7d027119e6
@@ -0,0 +1,14 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (C) 2018 Álvaro Fernández Rojas <[email protected]>
+ *
+ * Derived from linux/drivers/net/ethernet/broadcom/bcm63xx_enet.c
+ */
+
+#ifndef __DT_BINDINGS_DMA_BCM63268_H
+#define __DT_BINDINGS_DMA_BCM63268_H
+
+#define BCM63268_DMA_ENETSW_RX	0
+#define BCM63268_DMA_ENETSW_TX	1
+
+#endif /* __DT_BINDINGS_DMA_BCM63268_H */

Signature · 1 line

2.11.0

Álvaro Fernández Rojas

2018-11-29 22:25 UTC #93 lore raw

PATCH v10 9/28 bmips: bcm6318: add bcm6348-iudma support

In reply to Álvaro Fernández Rojas

Signed-off-by Álvaro Fernández Rojas <[email protected]>

---
v10: fix license identifiers
v9: no changes
v8: no changes
v5: no changes
v4: no changes
v3: no changes
v2: no changes

 arch/mips/dts/brcm,bcm6318.dtsi       | 19 +++++++++++++++++++
 include/dt-bindings/dma/bcm6318-dma.h | 14 ++++++++++++++
 2 files changed, 33 insertions(+)
 create mode 100644 include/dt-bindings/dma/bcm6318-dma.h

arch/mips/dts/brcm,bcm6318.dtsi +19 -0

index f75988be12..d04b7cbb01 100644
@@ -4,6 +4,7 @@
  */
 
 #include <dt-bindings/clock/bcm6318-clock.h>
+#include <dt-bindings/dma/bcm6318-dma.h>
 #include <dt-bindings/gpio/gpio.h>
 #include <dt-bindings/power-domain/bcm6318-power-domain.h>
 #include <dt-bindings/reset/bcm6318-reset.h>

@@ -54,6 +55,12 @@
 			reg = <0x10000004 0x4>;
 			#clock-cells = <1>;
 		};
+
+		ubus_clk: ubus-clk {
+			compatible = "brcm,bcm6345-clk";
+			reg = <0x10000008 0x4>;
+			#clock-cells = <1>;
+		};
 	};
 
 	ubus {

@@ -182,5 +189,17 @@
 
 			status = "disabled";
 		};
+
+		iudma: dma-controller at 10088000 {
+			compatible = "brcm,bcm6368-iudma";
+			reg = <0x10088000 0x80>,
+			      <0x10088200 0x80>,
+			      <0x10088400 0x80>;
+			reg-names = "dma",
+				    "dma-channels",
+				    "dma-sram";
+			#dma-cells = <1>;
+			dma-channels = <8>;
+		};
 	};
 };

include/dt-bindings/dma/bcm6318-dma.h new file +14 -0

new file mode 100644
index 0000000000..ad7c5ac2df
@@ -0,0 +1,14 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (C) 2018 Álvaro Fernández Rojas <[email protected]>
+ *
+ * Derived from linux/drivers/net/ethernet/broadcom/bcm63xx_enet.c
+ */
+
+#ifndef __DT_BINDINGS_DMA_BCM6318_H
+#define __DT_BINDINGS_DMA_BCM6318_H
+
+#define BCM6318_DMA_ENETSW_RX	0
+#define BCM6318_DMA_ENETSW_TX	1
+
+#endif /* __DT_BINDINGS_DMA_BCM6318_H */

Signature · 1 line

2.11.0

Álvaro Fernández Rojas

2018-11-29 22:25 UTC #94 lore raw

PATCH v10 10/28 net: add support for bcm6348-enet

In reply to Álvaro Fernández Rojas

Signed-off-by Álvaro Fernández Rojas <[email protected]>

---
v10: Introduce changes suggested by Daniel Schwierzeck:
- Fix license identifiers.
- Remove packet queue.
- Move dma_prepare_rcv_buf to free_pkt.
- Switch to live DM live tree.
v9: use dma_prepare_rcv_buf and remove dma rx channel reset:
- bcm6348_eth_recv: clear dirty dma descriptors only when packets are copied from rx dma.
- bcm6348_eth_send: remove dma rx channel reset when sending packet.
v8: Introduce changes from Grygorii Strashko
v5: Receive as much packets as possible from bcm6348-eth and cache them in net_rx_packets. This is needed in order to fix flow control issues.
v4: Fix issues reported by Grygorii Strashko and other fixes:
- Copy received dma buffer to net_rx_packets in order to avoid possible dma overwrites.
- Reset dma rx channel when sending a new packet to prevent flow control issues.
- Fix packet casting on bcm6348_eth_recv/send.
v3: no changes
v2: select DMA_CHANNELS.

 drivers/net/Kconfig            |  10 +
 drivers/net/Makefile           |   1 +
 drivers/net/bcm6348-eth.c      | 537 +++++++++++++++++++++++++++++++++++++++++
 include/configs/bmips_common.h |   6 +-
 4 files changed, 553 insertions(+), 1 deletion(-)
 create mode 100644 drivers/net/bcm6348-eth.c

drivers/net/Kconfig +10 -0

index 8fb365fc5d..2b7cec8804 100644
@@ -72,6 +72,16 @@ config BCM_SF2_ETH_GMAC
 	  by the BCM_SF2_ETH driver.
 	  Say Y to any bcmcygnus based platforms.
 
+config BCM6348_ETH
+	bool "BCM6348 EMAC support"
+	depends on DM_ETH && ARCH_BMIPS
+	select DMA
+	select DMA_CHANNELS
+	select MII
+	select PHYLIB
+	help
+	  This driver supports the BCM6348 Ethernet MAC.
+
 config DWC_ETH_QOS
 	bool "Synopsys DWC Ethernet QOS device support"
 	depends on DM_ETH

drivers/net/Makefile +1 -0

index 99056aa041..2647d4dd23 100644
@@ -6,6 +6,7 @@
 obj-$(CONFIG_ALTERA_TSE) += altera_tse.o
 obj-$(CONFIG_AG7XXX) += ag7xxx.o
 obj-$(CONFIG_ARMADA100_FEC) += armada100_fec.o
+obj-$(CONFIG_BCM6348_ETH) += bcm6348-eth.o
 obj-$(CONFIG_DRIVER_AT91EMAC) += at91_emac.o
 obj-$(CONFIG_DRIVER_AX88180) += ax88180.o
 obj-$(CONFIG_BCM_SF2_ETH) += bcm-sf2-eth.o

drivers/net/bcm6348-eth.c new file +537 -0

537 lines not on this page · raw message

include/configs/bmips_common.h +5 -1

index 39ca2e0bf3..788f4af70d 100644
@@ -6,6 +6,10 @@
 #ifndef __CONFIG_BMIPS_COMMON_H
 #define __CONFIG_BMIPS_COMMON_H
 
+/* ETH */
+#define CONFIG_PHY_RESET_DELAY		20
+#define CONFIG_SYS_RX_ETH_BUFFER	6
+
 /* UART */
 #define CONFIG_SYS_BAUDRATE_TABLE	{ 9600, 19200, 38400, 57600, 115200, \
 					  230400, 500000, 1500000 }

@@ -16,7 +20,7 @@
 
 /* Memory usage */
 #define CONFIG_SYS_MAXARGS		24
-#define CONFIG_SYS_MALLOC_LEN		(1024 * 1024)
+#define CONFIG_SYS_MALLOC_LEN		(2 * 1024 * 1024)
 #define CONFIG_SYS_BOOTPARAMS_LEN	(128 * 1024)
 #define CONFIG_SYS_CBSIZE		512

Signature · 1 line

2.11.0

Daniel Schwierzeck

2018-11-30 16:54 UTC #95 lore raw

PATCH v10 10/28 net: add support for bcm6348-enet

Am 29.11.18 um 23:25 schrieb Álvaro Fernández Rojas:

Quoted 23 lines

Signed-off-by Álvaro Fernández Rojas <[email protected]>
---
v10: Introduce changes suggested by Daniel Schwierzeck:
- Fix license identifiers.
- Remove packet queue.
- Move dma_prepare_rcv_buf to free_pkt.
- Switch to live DM live tree.
v9: use dma_prepare_rcv_buf and remove dma rx channel reset:
- bcm6348_eth_recv: clear dirty dma descriptors only when packets are copied from rx dma.
- bcm6348_eth_send: remove dma rx channel reset when sending packet.
v8: Introduce changes from Grygorii Strashko
v5: Receive as much packets as possible from bcm6348-eth and cache them in net_rx_packets. This is needed in order to fix flow control issues.
v4: Fix issues reported by Grygorii Strashko and other fixes:
- Copy received dma buffer to net_rx_packets in order to avoid possible dma overwrites.
- Reset dma rx channel when sending a new packet to prevent flow control issues.
- Fix packet casting on bcm6348_eth_recv/send.
v3: no changes
v2: select DMA_CHANNELS.

Quoted 7 lines

 drivers/net/Kconfig            |  10 +
 drivers/net/Makefile           |   1 +
 drivers/net/bcm6348-eth.c      | 537 +++++++++++++++++++++++++++++++++++++++++
 include/configs/bmips_common.h |   6 +-
 4 files changed, 553 insertions(+), 1 deletion(-)
 create mode 100644 drivers/net/bcm6348-eth.c

Reviewed-by Daniel Schwierzeck <[email protected]>

Signature · 9 lines

- Daniel

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Álvaro Fernández Rojas

2018-11-29 22:25 UTC #96 lore raw

PATCH v10 11/28 bmips: bcm6338: add support for bcm6348-enet

In reply to Álvaro Fernández Rojas

Signed-off-by Álvaro Fernández Rojas <[email protected]>

---
v10: no changes
v9: no changes
v8: no changes
v5: no changes
v4: no changes
v3: no changes
v2: no changes

v10: no changes
v9: no changes
v8: no changes
v5: no changes
v4: no changes
v3: no changes
v2: no changes

 arch/mips/dts/brcm,bcm6338.dtsi | 15 +++++++++++++++
 1 file changed, 15 insertions(+)

arch/mips/dts/brcm,bcm6338.dtsi +15 -0

index 990355481c..c547e949dd 100644
@@ -144,5 +144,20 @@
 			dma-channels = <6>;
 			resets = <&periph_rst BCM6338_RST_DMAMEM>;
 		};
+
+		enet: ethernet at fffe2800 {
+			compatible = "brcm,bcm6348-enet";
+			#address-cells = <1>;
+			#size-cells = <0>;
+			reg = <0xfffe2800 0x2dc>;
+			clocks = <&periph_clk BCM6338_CLK_ENET>;
+			resets = <&periph_rst BCM6338_RST_ENET>;
+			dmas = <&iudma BCM6338_DMA_ENET_RX>,
+			       <&iudma BCM6338_DMA_ENET_TX>;
+			dma-names = "rx",
+				    "tx";
+
+			status = "disabled";
+		};
 	};
 };

Signature · 1 line

2.11.0

Álvaro Fernández Rojas

2018-11-29 22:25 UTC #97 lore raw

PATCH v10 12/28 bmips: enable f@st1704 enet support

In reply to Álvaro Fernández Rojas

Signed-off-by Álvaro Fernández Rojas <[email protected]>

---
v10: no changes
v9: no changes
v8: no changes
v5: no changes
v4: no changes
v3: no changes
v2: no changes

 arch/mips/dts/sagem,f at st1704.dts     | 12 ++++++++++++
 configs/sagem_f at st1704_ram_defconfig |  8 +++++++-
 2 files changed, 19 insertions(+), 1 deletion(-)

arch/mips/dts/sagem,f at st1704.dts +12 -0

index 5300f8b6df..ec6846dd9f 100644
@@ -39,6 +39,18 @@
 	};
 };
 
+&enet {
+	status = "okay";
+	phy = <&enetphy>;
+	phy-mode = "mii";
+
+	enetphy: fixed-link {
+		reg = <1>;
+		speed = <100>;
+		full-duplex;
+	};
+};
+
 &gpio {
 	status = "okay";
 };

configs/sagem_f at st1704_ram_defconfig +7 -1

index 91a966327a..8c36f5dbf8 100644
@@ -27,11 +27,14 @@ CONFIG_CMD_MEMINFO=y
 # CONFIG_CMD_LOADS is not set
 CONFIG_CMD_SF=y
 CONFIG_CMD_SPI=y
+CONFIG_CMD_MII=y
+CONFIG_CMD_PING=y
 # CONFIG_CMD_MISC is not set
 CONFIG_OF_EMBED=y
 CONFIG_DEFAULT_DEVICE_TREE="sagem,f at st1704"
-# CONFIG_NET is not set
+CONFIG_NET_RANDOM_ETHADDR=y
 # CONFIG_DM_DEVICE_REMOVE is not set
+CONFIG_BCM6348_IUDMA=y
 CONFIG_DM_GPIO=y
 CONFIG_BCM6345_GPIO=y
 CONFIG_LED=y

@@ -40,6 +43,9 @@ CONFIG_DM_SPI_FLASH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_WINBOND=y
 CONFIG_SPI_FLASH_MTD=y
+CONFIG_PHY_FIXED=y
+CONFIG_DM_ETH=y
+CONFIG_BCM6348_ETH=y
 CONFIG_DM_RESET=y
 CONFIG_RESET_BCM6345=y
 # CONFIG_SPL_SERIAL_PRESENT is not set

Signature · 1 line

2.11.0

Álvaro Fernández Rojas

2018-11-29 22:25 UTC #98 lore raw

PATCH v10 13/28 bmips: bcm6348: add support for bcm6348-enet

In reply to Álvaro Fernández Rojas

Signed-off-by Álvaro Fernández Rojas <[email protected]>

---
v10: no changes
v9: no changes
v8: no changes
v5: no changes
v4: no changes
v3: no changes
v2: no changes

 arch/mips/dts/brcm,bcm6348.dtsi | 26 ++++++++++++++++++++++++++
 1 file changed, 26 insertions(+)

arch/mips/dts/brcm,bcm6348.dtsi +26 -0

index 875de232ca..79e7bd892b 100644
@@ -161,6 +161,32 @@
 			u-boot,dm-pre-reloc;
 		};
 
+		enet0: ethernet at fffe6000 {
+			compatible = "brcm,bcm6348-enet";
+			#address-cells = <1>;
+			#size-cells = <0>;
+			reg = <0xfffe6000 0x2dc>;
+			dmas = <&iudma BCM6348_DMA_ENET0_RX>,
+			       <&iudma BCM6348_DMA_ENET0_TX>;
+			dma-names = "rx",
+				    "tx";
+
+			status = "disabled";
+		};
+
+		enet1: ethernet at fffe6800 {
+			compatible = "brcm,bcm6348-enet";
+			#address-cells = <1>;
+			#size-cells = <0>;
+			reg = <0xfffe6800 0x2dc>;
+			dmas = <&iudma BCM6348_DMA_ENET1_RX>,
+			       <&iudma BCM6348_DMA_ENET1_TX>;
+			dma-names = "rx",
+				    "tx";
+
+			status = "disabled";
+		};
+
 		iudma: dma-controller at fffe7000 {
 			compatible = "brcm,bcm6348-iudma";
 			reg = <0xfffe7000 0x1c>,

Signature · 1 line

2.11.0

Álvaro Fernández Rojas

2018-11-29 22:25 UTC #99 lore raw

PATCH v10 14/28 bmips: enable ct-5361 enet support

In reply to Álvaro Fernández Rojas

Signed-off-by Álvaro Fernández Rojas <[email protected]>

---
v10: no changes
v9: no changes
v8: no changes
v5: no changes
v4: no changes
v3: no changes
v2: no changes

 arch/mips/dts/comtrend,ct-5361.dts    | 12 ++++++++++++
 configs/comtrend_ct5361_ram_defconfig |  8 +++++++-
 2 files changed, 19 insertions(+), 1 deletion(-)

arch/mips/dts/comtrend,ct-5361.dts +12 -0

index 25747ca95d..f6b8a94e25 100644
@@ -34,6 +34,18 @@
 	};
 };
 
+&enet1 {
+	status = "okay";
+	phy = <&enet1phy>;
+	phy-mode = "mii";
+
+	enet1phy: fixed-link {
+		reg = <1>;
+		speed = <100>;
+		full-duplex;
+	};
+};
+
 &gpio0 {
 	status = "okay";
 };

configs/comtrend_ct5361_ram_defconfig +7 -1

index 82f2070713..6297e78fd9 100644
@@ -25,11 +25,14 @@ CONFIG_CMD_LICENSE=y
 CONFIG_CMD_MEMINFO=y
 # CONFIG_CMD_LOADS is not set
 CONFIG_CMD_USB=y
+CONFIG_CMD_MII=y
+CONFIG_CMD_PING=y
 # CONFIG_CMD_MISC is not set
 CONFIG_OF_EMBED=y
 CONFIG_DEFAULT_DEVICE_TREE="comtrend,ct-5361"
-# CONFIG_NET is not set
+CONFIG_NET_RANDOM_ETHADDR=y
 # CONFIG_DM_DEVICE_REMOVE is not set
+CONFIG_BCM6348_IUDMA=y
 CONFIG_DM_GPIO=y
 CONFIG_BCM6345_GPIO=y
 CONFIG_LED=y

@@ -40,6 +43,9 @@ CONFIG_FLASH_CFI_DRIVER=y
 CONFIG_CFI_FLASH=y
 CONFIG_SYS_FLASH_PROTECTION=y
 CONFIG_SYS_FLASH_CFI=y
+CONFIG_PHY_FIXED=y
+CONFIG_DM_ETH=y
+CONFIG_BCM6348_ETH=y
 CONFIG_PHY=y
 CONFIG_BCM6348_USBH_PHY=y
 CONFIG_DM_RESET=y

Signature · 1 line

2.11.0

Álvaro Fernández Rojas

2018-11-29 22:25 UTC #100 lore raw

PATCH v10 15/28 bmips: bcm6358: add support for bcm6348-enet

In reply to Álvaro Fernández Rojas

Signed-off-by Álvaro Fernández Rojas <[email protected]>

---
v10: no changes
v9: no changes
v8: no changes
v5: no changes
v4: no changes
v3: no changes
v2: no changes

 arch/mips/dts/brcm,bcm6358.dtsi | 28 ++++++++++++++++++++++++++++
 1 file changed, 28 insertions(+)

arch/mips/dts/brcm,bcm6358.dtsi +28 -0

index 5605723e83..5e9c9ad769 100644
@@ -192,6 +192,34 @@
 			status = "disabled";
 		};
 
+		enet0: ethernet at fffe4000 {
+			compatible = "brcm,bcm6348-enet";
+			#address-cells = <1>;
+			#size-cells = <0>;
+			reg = <0xfffe4000 0x2dc>;
+			clocks = <&periph_clk BCM6358_CLK_ENET0>;
+			dmas = <&iudma BCM6358_DMA_ENET0_RX>,
+			       <&iudma BCM6358_DMA_ENET0_TX>;
+			dma-names = "rx",
+				    "tx";
+
+			status = "disabled";
+		};
+
+		enet1: ethernet at fffe4800 {
+			compatible = "brcm,bcm6348-enet";
+			#address-cells = <1>;
+			#size-cells = <0>;
+			reg = <0xfffe4800 0x2dc>;
+			clocks = <&periph_clk BCM6358_CLK_ENET1>;
+			dmas = <&iudma BCM6358_DMA_ENET1_RX>,
+			       <&iudma BCM6358_DMA_ENET1_TX>;
+			dma-names = "rx",
+				    "tx";
+
+			status = "disabled";
+		};
+
 		iudma: dma-controller at fffe5000 {
 			compatible = "brcm,bcm6348-iudma";
 			reg = <0xfffe5000 0x24>,

Signature · 1 line

2.11.0

Álvaro Fernández Rojas

2018-11-29 22:25 UTC #101 lore raw

PATCH v10 16/28 bmips: enable hg556a enet support

In reply to Álvaro Fernández Rojas

Signed-off-by Álvaro Fernández Rojas <[email protected]>

---
v10: no changes
v9: no changes
v8: no changes
v5: no changes
v4: no changes
v3: no changes
v2: no changes

 arch/mips/dts/huawei,hg556a.dts     | 12 ++++++++++++
 configs/huawei_hg556a_ram_defconfig |  8 +++++++-
 2 files changed, 19 insertions(+), 1 deletion(-)

arch/mips/dts/huawei,hg556a.dts +12 -0

index 60455c2ff8..6a7fc1df4b 100644
@@ -93,6 +93,18 @@
 	status = "okay";
 };
 
+&enet1 {
+	status = "okay";
+	phy = <&enet1phy>;
+	phy-mode = "mii";
+
+	enet1phy: fixed-link {
+		reg = <1>;
+		speed = <100>;
+		full-duplex;
+	};
+};
+
 &gpio0 {
 	status = "okay";
 };

configs/huawei_hg556a_ram_defconfig +7 -1

index 6bb14ba736..d4e6144319 100644
@@ -25,11 +25,14 @@ CONFIG_CMD_LICENSE=y
 CONFIG_CMD_MEMINFO=y
 # CONFIG_CMD_LOADS is not set
 CONFIG_CMD_USB=y
+CONFIG_CMD_MII=y
+CONFIG_CMD_PING=y
 # CONFIG_CMD_MISC is not set
 CONFIG_OF_EMBED=y
 CONFIG_DEFAULT_DEVICE_TREE="huawei,hg556a"
-# CONFIG_NET is not set
+CONFIG_NET_RANDOM_ETHADDR=y
 # CONFIG_DM_DEVICE_REMOVE is not set
+CONFIG_BCM6348_IUDMA=y
 CONFIG_DM_GPIO=y
 CONFIG_BCM6345_GPIO=y
 CONFIG_LED=y

@@ -40,6 +43,9 @@ CONFIG_FLASH_CFI_DRIVER=y
 CONFIG_CFI_FLASH=y
 CONFIG_SYS_FLASH_PROTECTION=y
 CONFIG_SYS_FLASH_CFI=y
+CONFIG_PHY_FIXED=y
+CONFIG_DM_ETH=y
+CONFIG_BCM6348_ETH=y
 CONFIG_PHY=y
 CONFIG_BCM6358_USBH_PHY=y
 CONFIG_DM_RESET=y

Signature · 1 line

2.11.0

Álvaro Fernández Rojas

2018-11-29 22:25 UTC #102 lore raw

PATCH v10 17/28 bmips: enable nb4-ser enet support

In reply to Álvaro Fernández Rojas

Signed-off-by Álvaro Fernández Rojas <[email protected]>

---
v10: no changes
v9: no changes
v8: no changes
v5: no changes
v4: no changes
v3: no changes
v2: no changes

 arch/mips/dts/sfr,nb4-ser.dts     | 24 ++++++++++++++++++++++++
 configs/sfr_nb4-ser_ram_defconfig |  8 +++++++-
 2 files changed, 31 insertions(+), 1 deletion(-)

arch/mips/dts/sfr,nb4-ser.dts +24 -0

index bdc6f8ae45..dfbc4148dc 100644
@@ -53,6 +53,30 @@
 	status = "okay";
 };
 
+&enet0 {
+	status = "okay";
+	phy = <&enet0phy>;
+	phy-mode = "internal";
+
+	enet0phy: fixed-link {
+		reg = <1>;
+		speed = <100>;
+		full-duplex;
+	};
+};
+
+&enet1 {
+	status = "okay";
+	phy = <&enet1phy>;
+	phy-mode = "mii";
+
+	enet1phy: fixed-link {
+		reg = <1>;
+		speed = <100>;
+		full-duplex;
+	};
+};
+
 &gpio0 {
 	status = "okay";
 };

configs/sfr_nb4-ser_ram_defconfig +7 -1

index 12adfb01e7..39622875b1 100644
@@ -26,11 +26,14 @@ CONFIG_CMD_LICENSE=y
 CONFIG_CMD_MEMINFO=y
 # CONFIG_CMD_LOADS is not set
 CONFIG_CMD_USB=y
+CONFIG_CMD_MII=y
+CONFIG_CMD_PING=y
 # CONFIG_CMD_MISC is not set
 CONFIG_OF_EMBED=y
 CONFIG_DEFAULT_DEVICE_TREE="sfr,nb4-ser"
-# CONFIG_NET is not set
+CONFIG_NET_RANDOM_ETHADDR=y
 # CONFIG_DM_DEVICE_REMOVE is not set
+CONFIG_BCM6348_IUDMA=y
 CONFIG_DM_GPIO=y
 CONFIG_BCM6345_GPIO=y
 CONFIG_LED=y

@@ -42,6 +45,9 @@ CONFIG_FLASH_CFI_DRIVER=y
 CONFIG_CFI_FLASH=y
 CONFIG_SYS_FLASH_PROTECTION=y
 CONFIG_SYS_FLASH_CFI=y
+CONFIG_PHY_FIXED=y
+CONFIG_DM_ETH=y
+CONFIG_BCM6348_ETH=y
 CONFIG_PHY=y
 CONFIG_BCM6358_USBH_PHY=y
 CONFIG_DM_RESET=y

Signature · 1 line

2.11.0

Álvaro Fernández Rojas

2018-11-29 22:25 UTC #103 lore raw

PATCH v10 18/28 net: add support for bcm6368-enet

In reply to Álvaro Fernández Rojas

Signed-off-by Álvaro Fernández Rojas <[email protected]>

---
v10: Introduce changes suggested by Daniel Schwierzeck:
- Fix license identifiers.
- Remove packet queue.
- Move dma_prepare_rcv_buf to free_pkt.
- Pad packets smaller than ETH_ZLEN.
- Switch to live DM live tree.
v9: introduce flow control improvements from bcm6348-eth:
- introduce rx packets caching functionality from bcm6348-eth to fix flow control issues.
- code style fixes.
v8: introduce bcm6368-enet driver

 drivers/net/Kconfig       |   8 +
 drivers/net/Makefile      |   1 +
 drivers/net/bcm6368-eth.c | 625 ++++++++++++++++++++++++++++++++++++++++++++++
 3 files changed, 634 insertions(+)
 create mode 100644 drivers/net/bcm6368-eth.c

drivers/net/Kconfig +8 -0

index 2b7cec8804..7044c6adf3 100644
@@ -82,6 +82,14 @@ config BCM6348_ETH
 	help
 	  This driver supports the BCM6348 Ethernet MAC.
 
+config BCM6368_ETH
+	bool "BCM6368 EMAC support"
+	depends on DM_ETH && ARCH_BMIPS
+	select DMA
+	select MII
+	help
+	  This driver supports the BCM6368 Ethernet MAC.
+
 config DWC_ETH_QOS
 	bool "Synopsys DWC Ethernet QOS device support"
 	depends on DM_ETH

drivers/net/Makefile +1 -0

index 2647d4dd23..0dbfa03306 100644
@@ -7,6 +7,7 @@ obj-$(CONFIG_ALTERA_TSE) += altera_tse.o
 obj-$(CONFIG_AG7XXX) += ag7xxx.o
 obj-$(CONFIG_ARMADA100_FEC) += armada100_fec.o
 obj-$(CONFIG_BCM6348_ETH) += bcm6348-eth.o
+obj-$(CONFIG_BCM6368_ETH) += bcm6368-eth.o
 obj-$(CONFIG_DRIVER_AT91EMAC) += at91_emac.o
 obj-$(CONFIG_DRIVER_AX88180) += ax88180.o
 obj-$(CONFIG_BCM_SF2_ETH) += bcm-sf2-eth.o

drivers/net/bcm6368-eth.c new file +625 -0

625 lines not on this page · raw message

Signature · 1 line

2.11.0

Daniel Schwierzeck

2018-11-30 16:58 UTC #104 lore raw

PATCH v10 18/28 net: add support for bcm6368-enet

Am 29.11.18 um 23:25 schrieb Álvaro Fernández Rojas:

Quoted 14 lines

Signed-off-by Álvaro Fernández Rojas <[email protected]>
---
v10: Introduce changes suggested by Daniel Schwierzeck:
- Fix license identifiers.
- Remove packet queue.
- Move dma_prepare_rcv_buf to free_pkt.
- Pad packets smaller than ETH_ZLEN.
- Switch to live DM live tree.
v9: introduce flow control improvements from bcm6348-eth:
- introduce rx packets caching functionality from bcm6348-eth to fix flow control issues.
- code style fixes.
v8: introduce bcm6368-enet driver

Quoted 6 lines

 drivers/net/Kconfig       |   8 +
 drivers/net/Makefile      |   1 +
 drivers/net/bcm6368-eth.c | 625 ++++++++++++++++++++++++++++++++++++++++++++++
 3 files changed, 634 insertions(+)
 create mode 100644 drivers/net/bcm6368-eth.c

Reviewed-by Daniel Schwierzeck <[email protected]>

Signature · 9 lines

- Daniel

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Álvaro Fernández Rojas

2018-11-29 22:25 UTC #105 lore raw

PATCH v10 19/28 bmips: bcm6368: add support for bcm6368-enet

In reply to Álvaro Fernández Rojas

Signed-off-by Álvaro Fernández Rojas <[email protected]>

---
v10: no changes
v9: no changes
v8: introduce bcm6368-enet driver

 arch/mips/dts/brcm,bcm6368.dtsi | 19 +++++++++++++++++++
 1 file changed, 19 insertions(+)

arch/mips/dts/brcm,bcm6368.dtsi +19 -0

index 30047f6360..89590d6ff9 100644
@@ -205,5 +205,24 @@
 			#dma-cells = <1>;
 			dma-channels = <8>;
 		};
+
+		enet: ethernet at 10f00000 {
+			compatible = "brcm,bcm6368-enet";
+			#address-cells = <1>;
+			#size-cells = <0>;
+			reg = <0x10f00000 0x10000>;
+			clocks = <&periph_clk BCM6368_CLK_SWPKT_USB>,
+				 <&periph_clk BCM6368_CLK_SWPKT_SAR>,
+				 <&periph_clk BCM6368_CLK_ROBOSW>;
+			resets = <&periph_rst BCM6368_RST_SWITCH>,
+				 <&periph_rst BCM6368_RST_EPHY>;
+			dmas = <&iudma BCM6368_DMA_ENETSW_RX>,
+			       <&iudma BCM6368_DMA_ENETSW_TX>;
+			dma-names = "rx",
+				    "tx";
+			brcm,num-ports = <6>;
+
+			status = "disabled";
+		};
 	};
 };

Signature · 1 line

2.11.0

Álvaro Fernández Rojas

2018-11-29 22:25 UTC #106 lore raw

PATCH v10 20/28 bmips: enable wap-5813n enet support

In reply to Álvaro Fernández Rojas

Signed-off-by Álvaro Fernández Rojas <[email protected]>

---
v10: no changes
v9: no changes
v8: introduce bcm6368-enet driver

 arch/mips/dts/comtrend,wap-5813n.dts    | 14 ++++++++++++++
 configs/comtrend_wap5813n_ram_defconfig |  8 +++++++-
 2 files changed, 21 insertions(+), 1 deletion(-)

arch/mips/dts/comtrend,wap-5813n.dts +14 -0

index bd41dab9f8..7e835b28d2 100644
@@ -54,6 +54,20 @@
 	status = "okay";
 };
 
+&enet {
+	status = "okay";
+
+	port at 4 {
+		compatible = "brcm,enetsw-port";
+		reg = <4>;
+		label = "rgmii";
+		brcm,phy-id = <0xff>;
+		speed = <1000>;
+		full-duplex;
+		bypass-link;
+	};
+};
+
 &gpio0 {
 	status = "okay";
 };

configs/comtrend_wap5813n_ram_defconfig +7 -1

index 987e4c3fbc..fd5107bb7d 100644
@@ -25,11 +25,14 @@ CONFIG_CMD_LICENSE=y
 CONFIG_CMD_MEMINFO=y
 # CONFIG_CMD_LOADS is not set
 CONFIG_CMD_USB=y
+CONFIG_CMD_MII=y
+CONFIG_CMD_PING=y
 # CONFIG_CMD_MISC is not set
 CONFIG_OF_EMBED=y
 CONFIG_DEFAULT_DEVICE_TREE="comtrend,wap-5813n"
-# CONFIG_NET is not set
+CONFIG_NET_RANDOM_ETHADDR=y
 # CONFIG_DM_DEVICE_REMOVE is not set
+CONFIG_BCM6348_IUDMA=y
 CONFIG_DM_GPIO=y
 CONFIG_BCM6345_GPIO=y
 CONFIG_LED=y

@@ -40,6 +43,9 @@ CONFIG_FLASH_CFI_DRIVER=y
 CONFIG_CFI_FLASH=y
 CONFIG_SYS_FLASH_PROTECTION=y
 CONFIG_SYS_FLASH_CFI=y
+CONFIG_DM_ETH=y
+CONFIG_PHY_GIGE=y
+CONFIG_BCM6368_ETH=y
 CONFIG_PHY=y
 CONFIG_BCM6368_USBH_PHY=y
 CONFIG_DM_RESET=y

Signature · 1 line

2.11.0

Álvaro Fernández Rojas

2018-11-29 22:25 UTC #107 lore raw

PATCH v10 21/28 bmips: bcm6328: add support for bcm6368-enet

In reply to Álvaro Fernández Rojas

Signed-off-by Álvaro Fernández Rojas <[email protected]>

---
v10: no changes
v9: no changes
v8: introduce bcm6368-enet driver

 arch/mips/dts/brcm,bcm6328.dtsi | 17 +++++++++++++++++
 1 file changed, 17 insertions(+)

arch/mips/dts/brcm,bcm6328.dtsi +17 -0

index 6fa49e22bb..50beed4171 100644
@@ -200,5 +200,22 @@
 			#dma-cells = <1>;
 			dma-channels = <8>;
 		};
+
+		enet: ethernet at 10e00000 {
+			compatible = "brcm,bcm6368-enet";
+			#address-cells = <1>;
+			#size-cells = <0>;
+			reg = <0x10e00000 0x10000>;
+			clocks = <&periph_clk BCM6328_CLK_ROBOSW>;
+			resets = <&periph_rst BCM6328_RST_ENETSW>,
+				 <&periph_rst BCM6328_RST_EPHY>;
+			dmas = <&iudma BCM6328_DMA_ENETSW_RX>,
+			       <&iudma BCM6328_DMA_ENETSW_TX>;
+			dma-names = "rx",
+				    "tx";
+			brcm,num-ports = <5>;
+
+			status = "disabled";
+		};
 	};
 };

Signature · 1 line

2.11.0

Álvaro Fernández Rojas

2018-11-29 22:25 UTC #108 lore raw

PATCH v10 22/28 bmips: enable ar-5387un enet support

In reply to Álvaro Fernández Rojas

Signed-off-by Álvaro Fernández Rojas <[email protected]>

---
v10: no changes
v9: no changes
v8: introduce bcm6368-enet driver

 arch/mips/dts/comtrend,ar-5387un.dts    | 32 ++++++++++++++++++++++++++++++++
 configs/comtrend_ar5387un_ram_defconfig |  7 ++++++-
 2 files changed, 38 insertions(+), 1 deletion(-)

arch/mips/dts/comtrend,ar-5387un.dts +32 -0

index e993b5cd89..03e3851ab1 100644
@@ -24,6 +24,38 @@
 	status = "okay";
 };
 
+&enet {
+	status = "okay";
+
+	port at 0 {
+		compatible = "brcm,enetsw-port";
+		reg = <0>;
+		label = "fe1";
+		brcm,phy-id = <1>;
+	};
+
+	port at 1 {
+		compatible = "brcm,enetsw-port";
+		reg = <1>;
+		label = "fe2";
+		brcm,phy-id = <2>;
+	};
+
+	port at 2 {
+		compatible = "brcm,enetsw-port";
+		reg = <2>;
+		label = "fe3";
+		brcm,phy-id = <3>;
+	};
+
+	port at 3 {
+		compatible = "brcm,enetsw-port";
+		reg = <3>;
+		label = "fe4";
+		brcm,phy-id = <4>;
+	};
+};
+
 &leds {
 	status = "okay";

configs/comtrend_ar5387un_ram_defconfig +6 -1

index f129870ca0..5ba401a441 100644
@@ -28,11 +28,14 @@ CONFIG_CMD_MEMINFO=y
 CONFIG_CMD_SF=y
 CONFIG_CMD_SPI=y
 CONFIG_CMD_USB=y
+CONFIG_CMD_MII=y
+CONFIG_CMD_PING=y
 # CONFIG_CMD_MISC is not set
 CONFIG_OF_EMBED=y
 CONFIG_DEFAULT_DEVICE_TREE="comtrend,ar-5387un"
-# CONFIG_NET is not set
+CONFIG_NET_RANDOM_ETHADDR=y
 # CONFIG_DM_DEVICE_REMOVE is not set
+CONFIG_BCM6348_IUDMA=y
 CONFIG_DM_GPIO=y
 CONFIG_LED=y
 CONFIG_LED_BCM6328=y

@@ -41,6 +44,8 @@ CONFIG_DM_SPI_FLASH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_MACRONIX=y
 CONFIG_SPI_FLASH_MTD=y
+CONFIG_DM_ETH=y
+CONFIG_BCM6368_ETH=y
 CONFIG_PHY=y
 CONFIG_BCM6368_USBH_PHY=y
 CONFIG_POWER_DOMAIN=y

Signature · 1 line

2.11.0

Álvaro Fernández Rojas

2018-11-29 22:25 UTC #109 lore raw

PATCH v10 23/28 bmips: bcm6362: add support for bcm6368-enet

In reply to Álvaro Fernández Rojas

Signed-off-by Álvaro Fernández Rojas <[email protected]>

---
v10: no changes
v9: no changes
v8: introduce bcm6368-enet driver

 arch/mips/dts/brcm,bcm6362.dtsi | 19 +++++++++++++++++++
 1 file changed, 19 insertions(+)

arch/mips/dts/brcm,bcm6362.dtsi +19 -0

index 94e7de096d..c77b80a4cc 100644
@@ -224,5 +224,24 @@
 			#dma-cells = <1>;
 			dma-channels = <8>;
 		};
+
+		enet: ethernet at 10e00000 {
+			compatible = "brcm,bcm6368-enet";
+			#address-cells = <1>;
+			#size-cells = <0>;
+			reg = <0x10e00000 0x10000>;
+			clocks = <&periph_clk BCM6362_CLK_SWPKT_USB>,
+				 <&periph_clk BCM6362_CLK_SWPKT_SAR>,
+				 <&periph_clk BCM6362_CLK_ROBOSW>;
+			resets = <&periph_rst BCM6362_RST_ENETSW>,
+				 <&periph_rst BCM6362_RST_EPHY>;
+			dmas = <&iudma BCM6362_DMA_ENETSW_RX>,
+			       <&iudma BCM6362_DMA_ENETSW_TX>;
+			dma-names = "rx",
+				    "tx";
+			brcm,num-ports = <6>;
+
+			status = "disabled";
+		};
 	};
 };

Signature · 1 line

2.11.0

Álvaro Fernández Rojas

2018-11-29 22:25 UTC #110 lore raw

PATCH v10 24/28 bmips: enable dgnd3700v2 enet support

In reply to Álvaro Fernández Rojas

Signed-off-by Álvaro Fernández Rojas <[email protected]>

---
v10: no changes
v9: no changes
v8: introduce bcm6368-enet driver

 arch/mips/dts/netgear,dgnd3700v2.dts     | 14 ++++++++++++++
 configs/netgear_dgnd3700v2_ram_defconfig |  8 +++++++-
 2 files changed, 21 insertions(+), 1 deletion(-)

arch/mips/dts/netgear,dgnd3700v2.dts +14 -0

index 322d1567ff..2b72491f0b 100644
@@ -43,6 +43,20 @@
 	status = "okay";
 };
 
+&enet {
+	status = "okay";
+
+	port at 4 {
+		compatible = "brcm,enetsw-port";
+		reg = <4>;
+		label = "rgmii";
+		brcm,phy-id = <0xff>;
+		speed = <1000>;
+		full-duplex;
+		bypass-link;
+	};
+};
+
 &gpio0 {
 	status = "okay";
 };

configs/netgear_dgnd3700v2_ram_defconfig +7 -1

index 1abc869856..0f3914fe7e 100644
@@ -27,17 +27,23 @@ CONFIG_CMD_MEMINFO=y
 # CONFIG_CMD_FLASH is not set
 # CONFIG_CMD_LOADS is not set
 CONFIG_CMD_USB=y
-# CONFIG_CMD_NET is not set
+CONFIG_CMD_MII=y
+CONFIG_CMD_PING=y
 # CONFIG_CMD_MISC is not set
 CONFIG_OF_EMBED=y
 CONFIG_DEFAULT_DEVICE_TREE="netgear,dgnd3700v2"
+CONFIG_NET_RANDOM_ETHADDR=y
 # CONFIG_DM_DEVICE_REMOVE is not set
+CONFIG_BCM6348_IUDMA=y
 CONFIG_DM_GPIO=y
 CONFIG_BCM6345_GPIO=y
 CONFIG_LED=y
 CONFIG_LED_BCM6328=y
 CONFIG_LED_BLINK=y
 CONFIG_LED_GPIO=y
+CONFIG_DM_ETH=y
+CONFIG_PHY_GIGE=y
+CONFIG_BCM6368_ETH=y
 CONFIG_PHY=y
 CONFIG_BCM6368_USBH_PHY=y
 CONFIG_POWER_DOMAIN=y

Signature · 1 line

2.11.0

Álvaro Fernández Rojas

2018-11-29 22:25 UTC #111 lore raw

PATCH v10 25/28 bmips: bcm63268: add support for bcm6368-enet

In reply to Álvaro Fernández Rojas

Signed-off-by Álvaro Fernández Rojas <[email protected]>

---
v10: no changes
v9: no changes
v8: introduce bcm6368-enet driver

 arch/mips/dts/brcm,bcm63268.dtsi | 25 +++++++++++++++++++++++++
 1 file changed, 25 insertions(+)

arch/mips/dts/brcm,bcm63268.dtsi +25 -0

index c7ad83c306..f8a72ef535 100644
@@ -230,5 +230,30 @@
 			#dma-cells = <1>;
 			dma-channels = <8>;
 		};
+
+		enet: ethernet at 10700000 {
+			compatible = "brcm,bcm6368-enet";
+			#address-cells = <1>;
+			#size-cells = <0>;
+			reg = <0x10700000 0x10000>;
+			clocks = <&periph_clk BCM63268_CLK_GMAC>,
+				 <&periph_clk BCM63268_CLK_ROBOSW>,
+				 <&periph_clk BCM63268_CLK_ROBOSW250>,
+				 <&timer_clk BCM63268_TCLK_EPHY1>,
+				 <&timer_clk BCM63268_TCLK_EPHY2>,
+				 <&timer_clk BCM63268_TCLK_EPHY3>,
+				 <&timer_clk BCM63268_TCLK_GPHY>;
+			resets = <&periph_rst BCM63268_RST_ENETSW>,
+				 <&periph_rst BCM63268_RST_EPHY>,
+				 <&periph_rst BCM63268_RST_GPHY>;
+			dmas = <&iudma BCM63268_DMA_ENETSW_RX>,
+			       <&iudma BCM63268_DMA_ENETSW_TX>;
+			dma-names = "rx",
+				    "tx";
+			brcm,rgmii-override;
+			brcm,rgmii-timing;
+
+			status = "disabled";
+		};
 	};
 };

Signature · 1 line

2.11.0

Álvaro Fernández Rojas

2018-11-29 22:25 UTC #112 lore raw

PATCH v10 26/28 bmips: enable vr-3032u enet support

In reply to Álvaro Fernández Rojas

Signed-off-by Álvaro Fernández Rojas <[email protected]>

---
v10: no changes
v9: no changes
v8: introduce bcm6368-enet driver

 arch/mips/dts/comtrend,vr-3032u.dts    | 32 ++++++++++++++++++++++++++++++++
 configs/comtrend_vr3032u_ram_defconfig |  7 ++++++-
 2 files changed, 38 insertions(+), 1 deletion(-)

arch/mips/dts/comtrend,vr-3032u.dts +32 -0

index 8c6a4a1eac..512cb52de3 100644
@@ -24,6 +24,38 @@
 	status = "okay";
 };
 
+&enet {
+	status = "okay";
+
+	port at 0 {
+		compatible = "brcm,enetsw-port";
+		reg = <0>;
+		label = "fe2";
+		brcm,phy-id = <1>;
+	};
+
+	port at 1 {
+		compatible = "brcm,enetsw-port";
+		reg = <1>;
+		label = "fe3";
+		brcm,phy-id = <2>;
+	};
+
+	port at 2 {
+		compatible = "brcm,enetsw-port";
+		reg = <2>;
+		label = "fe4";
+		brcm,phy-id = <3>;
+	};
+
+	port at 3 {
+		compatible = "brcm,enetsw-port";
+		reg = <3>;
+		label = "fe1";
+		brcm,phy-id = <4>;
+	};
+};
+
 &leds {
 	status = "okay";
 	brcm,serial-leds;

configs/comtrend_vr3032u_ram_defconfig +6 -1

index 1689eecec1..47f53998e1 100644
@@ -26,15 +26,20 @@ CONFIG_CMD_MEMINFO=y
 # CONFIG_CMD_FLASH is not set
 # CONFIG_CMD_LOADS is not set
 CONFIG_CMD_USB=y
+CONFIG_CMD_MII=y
+CONFIG_CMD_PING=y
 # CONFIG_CMD_MISC is not set
 CONFIG_OF_EMBED=y
 CONFIG_DEFAULT_DEVICE_TREE="comtrend,vr-3032u"
-# CONFIG_NET is not set
+CONFIG_NET_RANDOM_ETHADDR=y
 # CONFIG_DM_DEVICE_REMOVE is not set
+CONFIG_BCM6348_IUDMA=y
 CONFIG_DM_GPIO=y
 CONFIG_LED=y
 CONFIG_LED_BCM6328=y
 CONFIG_LED_BLINK=y
+CONFIG_DM_ETH=y
+CONFIG_BCM6368_ETH=y
 CONFIG_PHY=y
 CONFIG_BCM6368_USBH_PHY=y
 CONFIG_POWER_DOMAIN=y

Signature · 1 line

2.11.0

Álvaro Fernández Rojas

2018-11-29 22:25 UTC #113 lore raw

PATCH v10 27/28 bmips: bcm6318: add support for bcm6368-enet

In reply to Álvaro Fernández Rojas

Signed-off-by Álvaro Fernández Rojas <[email protected]>

---
v10: no changes
v9: no changes
v8: introduce bcm6368-enet driver

 arch/mips/dts/brcm,bcm6318.dtsi           | 19 +++++++++++++++++++
 include/dt-bindings/clock/bcm6318-clock.h | 11 +++++++++++
 2 files changed, 30 insertions(+)

arch/mips/dts/brcm,bcm6318.dtsi +19 -0

index d04b7cbb01..d678dab242 100644
@@ -190,6 +190,25 @@
 			status = "disabled";
 		};
 
+		enet: ethernet at 10080000 {
+			compatible = "brcm,bcm6368-enet";
+			#address-cells = <1>;
+			#size-cells = <0>;
+			reg = <0x10080000 0x8000>;
+			clocks = <&periph_clk BCM6318_CLK_ROBOSW250>,
+				 <&periph_clk BCM6318_CLK_ROBOSW025>,
+				 <&ubus_clk BCM6318_UCLK_ROBOSW>;
+			resets = <&periph_rst BCM6318_RST_ENETSW>,
+				 <&periph_rst BCM6318_RST_EPHY>;
+			dmas = <&iudma BCM6318_DMA_ENETSW_RX>,
+			       <&iudma BCM6318_DMA_ENETSW_TX>;
+			dma-names = "rx",
+				    "tx";
+			brcm,num-ports = <5>;
+
+			status = "disabled";
+		};
+
 		iudma: dma-controller at 10088000 {
 			compatible = "brcm,bcm6368-iudma";
 			reg = <0x10088000 0x80>,

include/dt-bindings/clock/bcm6318-clock.h +11 -0

index d5e13c5c2d..3f10448cef 100644
@@ -33,4 +33,15 @@
 #define BCM6318_CLK_AFE		29
 #define BCM6318_CLK_QPROC	30
 
+#define BCM6318_UCLK_ADSL	0
+#define BCM6318_UCLK_ARB	1
+#define BCM6318_UCLK_MIPS	2
+#define BCM6318_UCLK_PCIE	3
+#define BCM6318_UCLK_PERIPH	4
+#define BCM6318_UCLK_PHYMIPS	5
+#define BCM6318_UCLK_ROBOSW	6
+#define BCM6318_UCLK_SAR	7
+#define BCM6318_UCLK_SDR	8
+#define BCM6318_UCLK_USB	9
+
 #endif /* __DT_BINDINGS_CLOCK_BCM6318_H */

Signature · 1 line

2.11.0

Álvaro Fernández Rojas

2018-11-29 22:25 UTC #114 lore raw

PATCH v10 28/28 bmips: enable ar-5315u enet support

In reply to Álvaro Fernández Rojas

Signed-off-by Álvaro Fernández Rojas <[email protected]>

---
v10: no changes
v9: no changes
v8: introduce bcm6368-enet driver

 arch/mips/dts/comtrend,ar-5315u.dts    | 32 ++++++++++++++++++++++++++++++++
 configs/comtrend_ar5315u_ram_defconfig |  7 ++++++-
 2 files changed, 38 insertions(+), 1 deletion(-)

arch/mips/dts/comtrend,ar-5315u.dts +32 -0

index 45570189d0..eb60aaa8d5 100644
@@ -24,6 +24,38 @@
 	status = "okay";
 };
 
+&enet {
+	status = "okay";
+
+	port at 0 {
+		compatible = "brcm,enetsw-port";
+		reg = <0>;
+		label = "fe4";
+		brcm,phy-id = <1>;
+	};
+
+	port at 1 {
+		compatible = "brcm,enetsw-port";
+		reg = <1>;
+		label = "fe3";
+		brcm,phy-id = <2>;
+	};
+
+	port at 2 {
+		compatible = "brcm,enetsw-port";
+		reg = <2>;
+		label = "fe2";
+		brcm,phy-id = <3>;
+	};
+
+	port at 3 {
+		compatible = "brcm,enetsw-port";
+		reg = <3>;
+		label = "fe1";
+		brcm,phy-id = <4>;
+	};
+};
+
 &leds {
 	status = "okay";

configs/comtrend_ar5315u_ram_defconfig +6 -1

index d9ef52e68d..1b8e4e43c4 100644
@@ -28,11 +28,14 @@ CONFIG_CMD_MEMINFO=y
 CONFIG_CMD_SF=y
 CONFIG_CMD_SPI=y
 CONFIG_CMD_USB=y
+CONFIG_CMD_MII=y
+CONFIG_CMD_PING=y
 # CONFIG_CMD_MISC is not set
 CONFIG_OF_EMBED=y
 CONFIG_DEFAULT_DEVICE_TREE="comtrend,ar-5315u"
-# CONFIG_NET is not set
+CONFIG_NET_RANDOM_ETHADDR=y
 # CONFIG_DM_DEVICE_REMOVE is not set
+CONFIG_BCM6348_IUDMA=y
 CONFIG_DM_GPIO=y
 CONFIG_LED=y
 CONFIG_LED_BCM6328=y

@@ -41,6 +44,8 @@ CONFIG_DM_SPI_FLASH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_WINBOND=y
 CONFIG_SPI_FLASH_MTD=y
+CONFIG_DM_ETH=y
+CONFIG_BCM6368_ETH=y
 CONFIG_PHY=y
 CONFIG_BCM6318_USBH_PHY=y
 CONFIG_BCM6328_POWER_DOMAIN=y

Signature · 1 line

2.11.0

Álvaro Fernández Rojas

2018-12-01 18:00 UTC #115 lore raw

v11 cover bmips: add iudma/enet support

In reply to Álvaro Fernández Rojas

In order to add bcm6348-enet support, dma-uclass must be extended to support dma channels and reworked to operate like the other dm uclass (clk, reset...).

v11: Introduce change suggested by Daniel Schwierzeck:
- Avoid trimming ethernet FCS from DMA driver.
v10: Introduce changes suggested by Daniel Schwierzeck:
- Fix license identifiers.
bcm6348-iudma:
- Move DMAD_ST defines out of dma desc struct definition.
- Remove unneded aigned attribute from dma desc struct definition.
- Fill dma ring from consumer driver instead of allocating a new buffer.
- Correctly check clock/reset errors while probing.
- Switch to live DM live tree.
bcm6348-enet:
- Remove packet queue.
- Move dma_prepare_rcv_buf to free_pkt.
- Switch to live DM live tree.
bcm6368-enet:
- Remove packet queue.
- Move dma_prepare_rcv_buf to free_pkt.
- Pad packets smaller than ETH_ZLEN.
- Switch to live DM live tree.
v9: Separate generic dma channels support from bmips enet support
bcm6348-iudma:
- bcm6348_iudma_chan_stop: switch to mdelay when resetting channel.
- bcm6348_iudma_receive: track dirty dma descriptors and no longer trigger dma rx channel.
- bcm6348_iudma_send: reorder to properly flush cache and set dma descriptor config.
- bcm6348_iudma_prepare_rcv_buf: implemented to clear dirty dma descriptors.
bcm6348-enet:
- bcm6348_eth_recv: clear dirty dma descriptors only when packets are copied from rx dma.
- bcm6348_eth_send: remove dma rx channel reset when sending packet.
bcm6368-enet:
- introduce rx packets caching functionality from bcm6348-eth to fix flow control issues.
- code style fixes.
v8: Introduce bcm6368-enet driver support.
v5: Fix issues reported by Grygorii Strashko and other fixes:
- Remove unused bcm6348-iudma defines.
- Increment bcm6348-iudma rx descriptors.
- Fix bcm6348-iudma flow control issues.
- bcm6348-iudma error checking now depends on hw.
- Remove unneeded bcm6348-iudma interrupts.
- Receive as much packets as possible from bcm6348-eth and cache them in net_rx_packets. This is needed in order to fix flow control issues.
v4: Fix issues reported by Grygorii Strashko and other fixes:
- Remove usage of net_rx_packets as buffer from bcm6348-iudma.
- Allocate dynamic rx buffer on bcm6348-iudma.
- Copy received dma buffer to net_rx_packets in order to avoid possible dma overwrites.
- Check dma errors and discard invalid packets.
- Reset dma rx channel when sending a new packet to prevent flow control issues.
- Fix packet casting on bcm6348_eth_recv/send.
v3: Switch to live tree API.
v2: Fix bcm6348-iudma rx burst config.

 arch/mips/dts/brcm,bcm6318.dtsi           |  38 ++
 arch/mips/dts/brcm,bcm63268.dtsi          |  38 ++
 arch/mips/dts/brcm,bcm6328.dtsi           |  30 ++
 arch/mips/dts/brcm,bcm6338.dtsi           |  29 ++
 arch/mips/dts/brcm,bcm6348.dtsi           |  42 ++
 arch/mips/dts/brcm,bcm6358.dtsi           |  46 +++
 arch/mips/dts/brcm,bcm6362.dtsi           |  32 ++
 arch/mips/dts/brcm,bcm6368.dtsi           |  32 ++
 arch/mips/dts/comtrend,ar-5315u.dts       |  32 ++
 arch/mips/dts/comtrend,ar-5387un.dts      |  32 ++
 arch/mips/dts/comtrend,ct-5361.dts        |  12 +
 arch/mips/dts/comtrend,vr-3032u.dts       |  32 ++
 arch/mips/dts/comtrend,wap-5813n.dts      |  14 +
 arch/mips/dts/huawei,hg556a.dts           |  12 +
 arch/mips/dts/netgear,dgnd3700v2.dts      |  14 +
 arch/mips/dts/sagem,f at st1704.dts          |  12 +
 arch/mips/dts/sfr,nb4-ser.dts             |  24 ++
 configs/comtrend_ar5315u_ram_defconfig    |   7 +-
 configs/comtrend_ar5387un_ram_defconfig   |   7 +-
 configs/comtrend_ct5361_ram_defconfig     |   8 +-
 configs/comtrend_vr3032u_ram_defconfig    |   7 +-
 configs/comtrend_wap5813n_ram_defconfig   |   8 +-
 configs/huawei_hg556a_ram_defconfig       |   8 +-
 configs/netgear_dgnd3700v2_ram_defconfig  |   8 +-
 configs/sagem_f at st1704_ram_defconfig      |   8 +-
 configs/sfr_nb4-ser_ram_defconfig         |   8 +-
 drivers/dma/Kconfig                       |   9 +
 drivers/dma/Makefile                      |   1 +
 drivers/dma/bcm6348-iudma.c               | 642 ++++++++++++++++++++++++++++++
 drivers/net/Kconfig                       |  18 +
 drivers/net/Makefile                      |   2 +
 drivers/net/bcm6348-eth.c                 | 537 +++++++++++++++++++++++++
 drivers/net/bcm6368-eth.c                 | 625 +++++++++++++++++++++++++++++
 include/configs/bmips_common.h            |   6 +-
 include/dt-bindings/clock/bcm6318-clock.h |  11 +
 include/dt-bindings/dma/bcm6318-dma.h     |  14 +
 include/dt-bindings/dma/bcm63268-dma.h    |  14 +
 include/dt-bindings/dma/bcm6328-dma.h     |  14 +
 include/dt-bindings/dma/bcm6338-dma.h     |  14 +
 include/dt-bindings/dma/bcm6348-dma.h     |  16 +
 include/dt-bindings/dma/bcm6358-dma.h     |  16 +
 include/dt-bindings/dma/bcm6362-dma.h     |  14 +
 include/dt-bindings/dma/bcm6368-dma.h     |  14 +
 43 files changed, 2497 insertions(+), 10 deletions(-)
 create mode 100644 drivers/dma/bcm6348-iudma.c
 create mode 100644 drivers/net/bcm6348-eth.c
 create mode 100644 drivers/net/bcm6368-eth.c
 create mode 100644 include/dt-bindings/dma/bcm6318-dma.h
 create mode 100644 include/dt-bindings/dma/bcm63268-dma.h
 create mode 100644 include/dt-bindings/dma/bcm6328-dma.h
 create mode 100644 include/dt-bindings/dma/bcm6338-dma.h
 create mode 100644 include/dt-bindings/dma/bcm6348-dma.h
 create mode 100644 include/dt-bindings/dma/bcm6358-dma.h
 create mode 100644 include/dt-bindings/dma/bcm6362-dma.h
 create mode 100644 include/dt-bindings/dma/bcm6368-dma.h

Signature · 1 line

2.11.0

Álvaro Fernández Rojas

2018-12-01 18:00 UTC #116 lore raw

PATCH v11 1/28 dma: add bcm6348-iudma support

BCM6348 IUDMA controller is present on multiple BMIPS (BCM63xx) SoCs.

Signed-off-by Álvaro Fernández Rojas <[email protected]>

Reviewed-by Daniel Schwierzeck <[email protected]>

---
v11: Introduce change suggested by Daniel Schwierzeck:
- Avoid trimming ethernet FCS from DMA driver.
v10: Introduce changes suggested by Daniel Schwierzeck:
- Fix license identifiers.
- Move DMAD_ST defines out of dma desc struct definition.
- Remove unneded aigned attribute from dma desc struct definition.
- Fill dma ring from consumer driver instead of allocating a new buffer.
- Correctly check clock/reset errors while probing.
- Switch to live DM live tree.
v9: introduce dma_prepare_rcv_buf dma op:
- bcm6348_iudma_chan_stop: switch to mdelay when resetting channel.
- bcm6348_iudma_receive: track dirty dma descriptors and no longer trigger dma rx channel.
- bcm6348_iudma_send: reorder to properly flush cache and set dma descriptor config.
- bcm6348_iudma_prepare_rcv_buf: implemented to clear dirty dma descriptors.
v8: Introduce changes from Grygorii Strashko
v5: Several fixes and improvements:
- Remove unused defines.
- Increment rx descriptors.
- Fix flow control issues.
- Error checking now depends on hw.
- Remove unneeded interrupts.
v4: Fix issues reported by Grygorii Strashko and other fixes:
- Remove usage of net_rx_packets as buffer.
- Allocate dynamic rx buffer.
- Check dma errors and discard invalid packets.
v3: no changes
v2: Fix dma rx burst config and select DMA_CHANNELS.

 drivers/dma/Kconfig         |   9 +
 drivers/dma/Makefile        |   1 +
 drivers/dma/bcm6348-iudma.c | 642 ++++++++++++++++++++++++++++++++++++++++++++
 3 files changed, 652 insertions(+)
 create mode 100644 drivers/dma/bcm6348-iudma.c

drivers/dma/Kconfig +9 -0

index 8a4162eccd..1820676d7a 100644
@@ -26,6 +26,15 @@ config SANDBOX_DMA
 	  Enable support for a test DMA uclass implementation. It stimulates
 	  DMA transfer by simple copying data between channels.
 
+config BCM6348_IUDMA
+	bool "BCM6348 IUDMA driver"
+	depends on ARCH_BMIPS
+	select DMA_CHANNELS
+	help
+	  Enable the BCM6348 IUDMA driver.
+	  This driver support data transfer from devices to
+	  memory and from memory to devices.
+
 config TI_EDMA3
 	bool "TI EDMA3 driver"
 	help

drivers/dma/Makefile +1 -0

index aff31f986a..b5f9147e0a 100644
@@ -7,6 +7,7 @@ obj-$(CONFIG_DMA) += dma-uclass.o
 
 obj-$(CONFIG_FSLDMAFEC) += MCD_tasksInit.o MCD_dmaApi.o MCD_tasks.o
 obj-$(CONFIG_APBH_DMA) += apbh_dma.o
+obj-$(CONFIG_BCM6348_IUDMA) += bcm6348-iudma.o
 obj-$(CONFIG_FSL_DMA) += fsl_dma.o
 obj-$(CONFIG_SANDBOX_DMA) += sandbox-dma-test.o
 obj-$(CONFIG_TI_KSNAV) += keystone_nav.o keystone_nav_cfg.o

drivers/dma/bcm6348-iudma.c new file +642 -0

642 lines not on this page · raw message

Signature · 1 line

2.11.0

Álvaro Fernández Rojas

2018-12-01 18:00 UTC #117 lore raw

PATCH v11 2/28 bmips: bcm6338: add bcm6348-iudma support

In reply to Álvaro Fernández Rojas

Signed-off-by Álvaro Fernández Rojas <[email protected]>

---
v11: no changes
v10: fix license identifiers
v9: no changes
v8: no changes
v5: no changes
v4: no changes
v3: no changes
v2: no changes

 arch/mips/dts/brcm,bcm6338.dtsi       | 14 ++++++++++++++
 include/dt-bindings/dma/bcm6338-dma.h | 14 ++++++++++++++
 2 files changed, 28 insertions(+)
 create mode 100644 include/dt-bindings/dma/bcm6338-dma.h

arch/mips/dts/brcm,bcm6338.dtsi +14 -0

index bbd58cf803..990355481c 100644
@@ -4,6 +4,7 @@
  */
 
 #include <dt-bindings/clock/bcm6338-clock.h>
+#include <dt-bindings/dma/bcm6338-dma.h>
 #include <dt-bindings/gpio/gpio.h>
 #include <dt-bindings/reset/bcm6338-reset.h>
 #include "skeleton.dtsi"

@@ -130,5 +131,18 @@
 			reg = <0xfffe3100 0x38>;
 			u-boot,dm-pre-reloc;
 		};
+
+		iudma: dma-controller at fffe2400 {
+			compatible = "brcm,bcm6348-iudma";
+			reg = <0xfffe2400 0x1c>,
+			      <0xfffe2500 0x60>,
+			      <0xfffe2600 0x60>;
+			reg-names = "dma",
+				    "dma-channels",
+				    "dma-sram";
+			#dma-cells = <1>;
+			dma-channels = <6>;
+			resets = <&periph_rst BCM6338_RST_DMAMEM>;
+		};
 	};
 };

include/dt-bindings/dma/bcm6338-dma.h new file +14 -0

new file mode 100644
index 0000000000..f2e0b20444
@@ -0,0 +1,14 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (C) 2018 Álvaro Fernández Rojas <[email protected]>
+ *
+ * Derived from linux/drivers/net/ethernet/broadcom/bcm63xx_enet.c
+ */
+
+#ifndef __DT_BINDINGS_DMA_BCM6338_H
+#define __DT_BINDINGS_DMA_BCM6338_H
+
+#define BCM6338_DMA_ENET_RX	0
+#define BCM6338_DMA_ENET_TX	1
+
+#endif /* __DT_BINDINGS_DMA_BCM6338_H */

Signature · 1 line

2.11.0

Álvaro Fernández Rojas

2018-12-01 18:00 UTC #118 lore raw

PATCH v11 3/28 bmips: bcm6348: add bcm6348-iudma support

In reply to Álvaro Fernández Rojas

Signed-off-by Álvaro Fernández Rojas <[email protected]>

---
v11: no changes
v10: fix license identifiers
v9: no changes
v8: no changes
v5: no changes
v4: no changes
v3: no changes
v2: no changes

 arch/mips/dts/brcm,bcm6348.dtsi       | 16 ++++++++++++++++
 include/dt-bindings/dma/bcm6348-dma.h | 16 ++++++++++++++++
 2 files changed, 32 insertions(+)
 create mode 100644 include/dt-bindings/dma/bcm6348-dma.h

arch/mips/dts/brcm,bcm6348.dtsi +16 -0

index cc80bbc808..875de232ca 100644
@@ -4,6 +4,7 @@
  */
 
 #include <dt-bindings/clock/bcm6348-clock.h>
+#include <dt-bindings/dma/bcm6348-dma.h>
 #include <dt-bindings/gpio/gpio.h>
 #include <dt-bindings/reset/bcm6348-reset.h>
 #include "skeleton.dtsi"

@@ -159,5 +160,20 @@
 			reg = <0xfffe2300 0x38>;
 			u-boot,dm-pre-reloc;
 		};
+
+		iudma: dma-controller at fffe7000 {
+			compatible = "brcm,bcm6348-iudma";
+			reg = <0xfffe7000 0x1c>,
+			      <0xfffe7100 0x40>,
+			      <0xfffe7200 0x40>;
+			reg-names = "dma",
+				    "dma-channels",
+				    "dma-sram";
+			#dma-cells = <1>;
+			dma-channels = <4>;
+			clocks = <&periph_clk BCM6348_CLK_ENET>;
+			resets = <&periph_rst BCM6348_RST_ENET>,
+				 <&periph_rst BCM6348_RST_DMAMEM>;
+		};
 	};
 };

include/dt-bindings/dma/bcm6348-dma.h new file +16 -0

new file mode 100644
index 0000000000..36c2ffd412
@@ -0,0 +1,16 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (C) 2018 Álvaro Fernández Rojas <[email protected]>
+ *
+ * Derived from linux/drivers/net/ethernet/broadcom/bcm63xx_enet.c
+ */
+
+#ifndef __DT_BINDINGS_DMA_BCM6348_H
+#define __DT_BINDINGS_DMA_BCM6348_H
+
+#define BCM6348_DMA_ENET0_RX	0
+#define BCM6348_DMA_ENET0_TX	1
+#define BCM6348_DMA_ENET1_RX	2
+#define BCM6348_DMA_ENET1_TX	3
+
+#endif /* __DT_BINDINGS_DMA_BCM6348_H */

Signature · 1 line

2.11.0

Álvaro Fernández Rojas

2018-12-01 18:00 UTC #119 lore raw

PATCH v11 4/28 bmips: bcm6358: add bcm6348-iudma support

In reply to Álvaro Fernández Rojas

Signed-off-by Álvaro Fernández Rojas <[email protected]>

---
v11: no changes
v10: fix license identifiers
v9: no changes
v8: no changes
v5: no changes
v4: no changes
v3: no changes
v2: no changes

 arch/mips/dts/brcm,bcm6358.dtsi       | 18 ++++++++++++++++++
 include/dt-bindings/dma/bcm6358-dma.h | 16 ++++++++++++++++
 2 files changed, 34 insertions(+)
 create mode 100644 include/dt-bindings/dma/bcm6358-dma.h

arch/mips/dts/brcm,bcm6358.dtsi +18 -0

index 0617b46e92..5605723e83 100644
@@ -4,6 +4,7 @@
  */
 
 #include <dt-bindings/clock/bcm6358-clock.h>
+#include <dt-bindings/dma/bcm6358-dma.h>
 #include <dt-bindings/gpio/gpio.h>
 #include <dt-bindings/reset/bcm6358-reset.h>
 #include "skeleton.dtsi"

@@ -190,5 +191,22 @@
 
 			status = "disabled";
 		};
+
+		iudma: dma-controller at fffe5000 {
+			compatible = "brcm,bcm6348-iudma";
+			reg = <0xfffe5000 0x24>,
+			      <0xfffe5100 0x80>,
+			      <0xfffe5200 0x80>;
+			reg-names = "dma",
+				    "dma-channels",
+				    "dma-sram";
+			#dma-cells = <1>;
+			dma-channels = <8>;
+			clocks = <&periph_clk BCM6358_CLK_EMUSB>,
+				 <&periph_clk BCM6358_CLK_USBSU>,
+				 <&periph_clk BCM6358_CLK_EPHY>;
+			resets = <&periph_rst BCM6358_RST_ENET>,
+				 <&periph_rst BCM6358_RST_EPHY>;
+		};
 	};
 };

include/dt-bindings/dma/bcm6358-dma.h new file +16 -0

new file mode 100644
index 0000000000..3118b9da0a
@@ -0,0 +1,16 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (C) 2018 Álvaro Fernández Rojas <[email protected]>
+ *
+ * Derived from linux/drivers/net/ethernet/broadcom/bcm63xx_enet.c
+ */
+
+#ifndef __DT_BINDINGS_DMA_BCM6358_H
+#define __DT_BINDINGS_DMA_BCM6358_H
+
+#define BCM6358_DMA_ENET0_RX	0
+#define BCM6358_DMA_ENET0_TX	1
+#define BCM6358_DMA_ENET1_RX	2
+#define BCM6358_DMA_ENET1_TX	3
+
+#endif /* __DT_BINDINGS_DMA_BCM6358_H */

Signature · 1 line

2.11.0

Álvaro Fernández Rojas

2018-12-01 18:00 UTC #120 lore raw

PATCH v11 5/28 bmips: bcm6368: add bcm6348-iudma support

In reply to Álvaro Fernández Rojas

Signed-off-by Álvaro Fernández Rojas <[email protected]>

---
v11: no changes
v10: fix license identifiers
v9: no changes
v8: introduce bcm6368-enet driver

 arch/mips/dts/brcm,bcm6368.dtsi       | 13 +++++++++++++
 include/dt-bindings/dma/bcm6368-dma.h | 14 ++++++++++++++
 2 files changed, 27 insertions(+)
 create mode 100644 include/dt-bindings/dma/bcm6368-dma.h

arch/mips/dts/brcm,bcm6368.dtsi +13 -0

index 65d769ab4f..30047f6360 100644
@@ -4,6 +4,7 @@
  */
 
 #include <dt-bindings/clock/bcm6368-clock.h>
+#include <dt-bindings/dma/bcm6368-dma.h>
 #include <dt-bindings/gpio/gpio.h>
 #include <dt-bindings/reset/bcm6368-reset.h>
 #include "skeleton.dtsi"

@@ -192,5 +193,17 @@
 
 			status = "disabled";
 		};
+
+		iudma: dma-controller at 10006800 {
+			compatible = "brcm,bcm6368-iudma";
+			reg = <0x10006800 0x80>,
+			      <0x10006a00 0x80>,
+			      <0x10006c00 0x80>;
+			reg-names = "dma",
+				    "dma-channels",
+				    "dma-sram";
+			#dma-cells = <1>;
+			dma-channels = <8>;
+		};
 	};
 };

include/dt-bindings/dma/bcm6368-dma.h new file +14 -0

new file mode 100644
index 0000000000..36c6caa0e1
@@ -0,0 +1,14 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (C) 2018 Álvaro Fernández Rojas <[email protected]>
+ *
+ * Derived from linux/drivers/net/ethernet/broadcom/bcm63xx_enet.c
+ */
+
+#ifndef __DT_BINDINGS_DMA_BCM6368_H
+#define __DT_BINDINGS_DMA_BCM6368_H
+
+#define BCM6368_DMA_ENETSW_RX	0
+#define BCM6368_DMA_ENETSW_TX	1
+
+#endif /* __DT_BINDINGS_DMA_BCM6368_H */

Signature · 1 line

2.11.0

Álvaro Fernández Rojas

2018-12-01 18:00 UTC #121 lore raw

PATCH v11 6/28 bmips: bcm6328: add bcm6348-iudma support

In reply to Álvaro Fernández Rojas

Signed-off-by Álvaro Fernández Rojas <[email protected]>

---
v11: no changes
v10: fix license identifiers
v9: no changes
v8: introduce bcm6368-enet driver

 arch/mips/dts/brcm,bcm6328.dtsi       | 13 +++++++++++++
 include/dt-bindings/dma/bcm6328-dma.h | 14 ++++++++++++++
 2 files changed, 27 insertions(+)
 create mode 100644 include/dt-bindings/dma/bcm6328-dma.h

arch/mips/dts/brcm,bcm6328.dtsi +13 -0

index e00a2950e2..6fa49e22bb 100644
@@ -4,6 +4,7 @@
  */
 
 #include <dt-bindings/clock/bcm6328-clock.h>
+#include <dt-bindings/dma/bcm6328-dma.h>
 #include <dt-bindings/gpio/gpio.h>
 #include <dt-bindings/power-domain/bcm6328-power-domain.h>
 #include <dt-bindings/reset/bcm6328-reset.h>

@@ -187,5 +188,17 @@
 			reg = <0x10003000 0x864>;
 			u-boot,dm-pre-reloc;
 		};
+
+		iudma: dma-controller at 1000d800 {
+			compatible = "brcm,bcm6368-iudma";
+			reg = <0x1000d800 0x80>,
+			      <0x1000da00 0x80>,
+			      <0x1000dc00 0x80>;
+			reg-names = "dma",
+				    "dma-channels",
+				    "dma-sram";
+			#dma-cells = <1>;
+			dma-channels = <8>;
+		};
 	};
 };

include/dt-bindings/dma/bcm6328-dma.h new file +14 -0

new file mode 100644
index 0000000000..7494df2feb
@@ -0,0 +1,14 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (C) 2018 Álvaro Fernández Rojas <[email protected]>
+ *
+ * Derived from linux/drivers/net/ethernet/broadcom/bcm63xx_enet.c
+ */
+
+#ifndef __DT_BINDINGS_DMA_BCM6328_H
+#define __DT_BINDINGS_DMA_BCM6328_H
+
+#define BCM6328_DMA_ENETSW_RX	0
+#define BCM6328_DMA_ENETSW_TX	1
+
+#endif /* __DT_BINDINGS_DMA_BCM6328_H */

Signature · 1 line

2.11.0

Álvaro Fernández Rojas

2018-12-01 18:00 UTC #122 lore raw

PATCH v11 7/28 bmips: bcm6362: add bcm6348-iudma support

In reply to Álvaro Fernández Rojas

Signed-off-by Álvaro Fernández Rojas <[email protected]>

---
v11: no changes
v10: fix license identifiers
v9: no changes
v8: introduce bcm6368-enet driver

 arch/mips/dts/brcm,bcm6362.dtsi       | 13 +++++++++++++
 include/dt-bindings/dma/bcm6362-dma.h | 14 ++++++++++++++
 2 files changed, 27 insertions(+)
 create mode 100644 include/dt-bindings/dma/bcm6362-dma.h

arch/mips/dts/brcm,bcm6362.dtsi +13 -0

index 3047b82b21..94e7de096d 100644
@@ -4,6 +4,7 @@
  */
 
 #include <dt-bindings/clock/bcm6362-clock.h>
+#include <dt-bindings/dma/bcm6362-dma.h>
 #include <dt-bindings/gpio/gpio.h>
 #include <dt-bindings/power-domain/bcm6362-power-domain.h>
 #include <dt-bindings/reset/bcm6362-reset.h>

@@ -211,5 +212,17 @@
 			reg = <0x10003000 0x864>;
 			u-boot,dm-pre-reloc;
 		};
+
+		iudma: dma-controller at 1000d800 {
+			compatible = "brcm,bcm6368-iudma";
+			reg = <0x1000d800 0x80>,
+			      <0x1000da00 0x80>,
+			      <0x1000dc00 0x80>;
+			reg-names = "dma",
+				    "dma-channels",
+				    "dma-sram";
+			#dma-cells = <1>;
+			dma-channels = <8>;
+		};
 	};
 };

include/dt-bindings/dma/bcm6362-dma.h new file +14 -0

new file mode 100644
index 0000000000..1e62236daa
@@ -0,0 +1,14 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (C) 2018 Álvaro Fernández Rojas <[email protected]>
+ *
+ * Derived from linux/drivers/net/ethernet/broadcom/bcm63xx_enet.c
+ */
+
+#ifndef __DT_BINDINGS_DMA_BCM6362_H
+#define __DT_BINDINGS_DMA_BCM6362_H
+
+#define BCM6362_DMA_ENETSW_RX	0
+#define BCM6362_DMA_ENETSW_TX	1
+
+#endif /* __DT_BINDINGS_DMA_BCM6362_H */

Signature · 1 line

2.11.0

Álvaro Fernández Rojas

2018-12-01 18:00 UTC #123 lore raw

PATCH v11 8/28 bmips: bcm63268: add bcm6348-iudma support

In reply to Álvaro Fernández Rojas

Signed-off-by Álvaro Fernández Rojas <[email protected]>

---
v11: no changes
v10: fix license identifiers
v9: no changes
v8: introduce bcm6368-enet driver

 arch/mips/dts/brcm,bcm63268.dtsi       | 13 +++++++++++++
 include/dt-bindings/dma/bcm63268-dma.h | 14 ++++++++++++++
 2 files changed, 27 insertions(+)
 create mode 100644 include/dt-bindings/dma/bcm63268-dma.h

arch/mips/dts/brcm,bcm63268.dtsi +13 -0

index 62c440e675..c7ad83c306 100644
@@ -4,6 +4,7 @@
  */
 
 #include <dt-bindings/clock/bcm63268-clock.h>
+#include <dt-bindings/dma/bcm63268-dma.h>
 #include <dt-bindings/gpio/gpio.h>
 #include <dt-bindings/power-domain/bcm63268-power-domain.h>
 #include <dt-bindings/reset/bcm63268-reset.h>

@@ -217,5 +218,17 @@
 			reg = <0x10003000 0x894>;
 			u-boot,dm-pre-reloc;
 		};
+
+		iudma: dma-controller at 1000d800 {
+			compatible = "brcm,bcm6368-iudma";
+			reg = <0x1000d800 0x80>,
+			      <0x1000da00 0x80>,
+			      <0x1000dc00 0x80>;
+			reg-names = "dma",
+				    "dma-channels",
+				    "dma-sram";
+			#dma-cells = <1>;
+			dma-channels = <8>;
+		};
 	};
 };

include/dt-bindings/dma/bcm63268-dma.h new file +14 -0

new file mode 100644
index 0000000000..7d027119e6
@@ -0,0 +1,14 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (C) 2018 Álvaro Fernández Rojas <[email protected]>
+ *
+ * Derived from linux/drivers/net/ethernet/broadcom/bcm63xx_enet.c
+ */
+
+#ifndef __DT_BINDINGS_DMA_BCM63268_H
+#define __DT_BINDINGS_DMA_BCM63268_H
+
+#define BCM63268_DMA_ENETSW_RX	0
+#define BCM63268_DMA_ENETSW_TX	1
+
+#endif /* __DT_BINDINGS_DMA_BCM63268_H */

Signature · 1 line

2.11.0

Álvaro Fernández Rojas

2018-12-01 18:00 UTC #124 lore raw

PATCH v11 9/28 bmips: bcm6318: add bcm6348-iudma support

In reply to Álvaro Fernández Rojas

Signed-off-by Álvaro Fernández Rojas <[email protected]>

---
v11: no changes
v10: fix license identifiers
v9: no changes
v8: introduce bcm6368-enet driver

 arch/mips/dts/brcm,bcm6318.dtsi       | 19 +++++++++++++++++++
 include/dt-bindings/dma/bcm6318-dma.h | 14 ++++++++++++++
 2 files changed, 33 insertions(+)
 create mode 100644 include/dt-bindings/dma/bcm6318-dma.h

arch/mips/dts/brcm,bcm6318.dtsi +19 -0

index f75988be12..d04b7cbb01 100644
@@ -4,6 +4,7 @@
  */
 
 #include <dt-bindings/clock/bcm6318-clock.h>
+#include <dt-bindings/dma/bcm6318-dma.h>
 #include <dt-bindings/gpio/gpio.h>
 #include <dt-bindings/power-domain/bcm6318-power-domain.h>
 #include <dt-bindings/reset/bcm6318-reset.h>

@@ -54,6 +55,12 @@
 			reg = <0x10000004 0x4>;
 			#clock-cells = <1>;
 		};
+
+		ubus_clk: ubus-clk {
+			compatible = "brcm,bcm6345-clk";
+			reg = <0x10000008 0x4>;
+			#clock-cells = <1>;
+		};
 	};
 
 	ubus {

@@ -182,5 +189,17 @@
 
 			status = "disabled";
 		};
+
+		iudma: dma-controller at 10088000 {
+			compatible = "brcm,bcm6368-iudma";
+			reg = <0x10088000 0x80>,
+			      <0x10088200 0x80>,
+			      <0x10088400 0x80>;
+			reg-names = "dma",
+				    "dma-channels",
+				    "dma-sram";
+			#dma-cells = <1>;
+			dma-channels = <8>;
+		};
 	};
 };

include/dt-bindings/dma/bcm6318-dma.h new file +14 -0

new file mode 100644
index 0000000000..ad7c5ac2df
@@ -0,0 +1,14 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (C) 2018 Álvaro Fernández Rojas <[email protected]>
+ *
+ * Derived from linux/drivers/net/ethernet/broadcom/bcm63xx_enet.c
+ */
+
+#ifndef __DT_BINDINGS_DMA_BCM6318_H
+#define __DT_BINDINGS_DMA_BCM6318_H
+
+#define BCM6318_DMA_ENETSW_RX	0
+#define BCM6318_DMA_ENETSW_TX	1
+
+#endif /* __DT_BINDINGS_DMA_BCM6318_H */

Signature · 1 line

2.11.0

Álvaro Fernández Rojas

2018-12-01 18:00 UTC #125 lore raw

PATCH v11 10/28 net: add support for bcm6348-enet

In reply to Álvaro Fernández Rojas

Signed-off-by Álvaro Fernández Rojas <[email protected]>

Reviewed-by Daniel Schwierzeck <[email protected]>

---
v11: no changes
v10: Introduce changes suggested by Daniel Schwierzeck:
- Fix license identifiers.
- Remove packet queue.
- Move dma_prepare_rcv_buf to free_pkt.
- Switch to live DM live tree.
v9: use dma_prepare_rcv_buf and remove dma rx channel reset:
- bcm6348_eth_recv: clear dirty dma descriptors only when packets are copied from rx dma.
- bcm6348_eth_send: remove dma rx channel reset when sending packet.
v8: Introduce changes from Grygorii Strashko
v5: Receive as much packets as possible from bcm6348-eth and cache them in net_rx_packets. This is needed in order to fix flow control issues.
v4: Fix issues reported by Grygorii Strashko and other fixes:
- Copy received dma buffer to net_rx_packets in order to avoid possible dma overwrites.
- Reset dma rx channel when sending a new packet to prevent flow control issues.
- Fix packet casting on bcm6348_eth_recv/send.
v3: no changes
v2: select DMA_CHANNELS.

 drivers/net/Kconfig            |  10 +
 drivers/net/Makefile           |   1 +
 drivers/net/bcm6348-eth.c      | 537 +++++++++++++++++++++++++++++++++++++++++
 include/configs/bmips_common.h |   6 +-
 4 files changed, 553 insertions(+), 1 deletion(-)
 create mode 100644 drivers/net/bcm6348-eth.c

drivers/net/Kconfig +10 -0

index 8fb365fc5d..2b7cec8804 100644
@@ -72,6 +72,16 @@ config BCM_SF2_ETH_GMAC
 	  by the BCM_SF2_ETH driver.
 	  Say Y to any bcmcygnus based platforms.
 
+config BCM6348_ETH
+	bool "BCM6348 EMAC support"
+	depends on DM_ETH && ARCH_BMIPS
+	select DMA
+	select DMA_CHANNELS
+	select MII
+	select PHYLIB
+	help
+	  This driver supports the BCM6348 Ethernet MAC.
+
 config DWC_ETH_QOS
 	bool "Synopsys DWC Ethernet QOS device support"
 	depends on DM_ETH

drivers/net/Makefile +1 -0

index 99056aa041..2647d4dd23 100644
@@ -6,6 +6,7 @@
 obj-$(CONFIG_ALTERA_TSE) += altera_tse.o
 obj-$(CONFIG_AG7XXX) += ag7xxx.o
 obj-$(CONFIG_ARMADA100_FEC) += armada100_fec.o
+obj-$(CONFIG_BCM6348_ETH) += bcm6348-eth.o
 obj-$(CONFIG_DRIVER_AT91EMAC) += at91_emac.o
 obj-$(CONFIG_DRIVER_AX88180) += ax88180.o
 obj-$(CONFIG_BCM_SF2_ETH) += bcm-sf2-eth.o

drivers/net/bcm6348-eth.c new file +537 -0

537 lines not on this page · raw message

include/configs/bmips_common.h +5 -1

index 39ca2e0bf3..788f4af70d 100644
@@ -6,6 +6,10 @@
 #ifndef __CONFIG_BMIPS_COMMON_H
 #define __CONFIG_BMIPS_COMMON_H
 
+/* ETH */
+#define CONFIG_PHY_RESET_DELAY		20
+#define CONFIG_SYS_RX_ETH_BUFFER	6
+
 /* UART */
 #define CONFIG_SYS_BAUDRATE_TABLE	{ 9600, 19200, 38400, 57600, 115200, \
 					  230400, 500000, 1500000 }

@@ -16,7 +20,7 @@
 
 /* Memory usage */
 #define CONFIG_SYS_MAXARGS		24
-#define CONFIG_SYS_MALLOC_LEN		(1024 * 1024)
+#define CONFIG_SYS_MALLOC_LEN		(2 * 1024 * 1024)
 #define CONFIG_SYS_BOOTPARAMS_LEN	(128 * 1024)
 #define CONFIG_SYS_CBSIZE		512

Signature · 1 line

2.11.0

Álvaro Fernández Rojas

2018-12-01 18:00 UTC #126 lore raw

PATCH v11 11/28 bmips: bcm6338: add support for bcm6348-enet

In reply to Álvaro Fernández Rojas

Signed-off-by Álvaro Fernández Rojas <[email protected]>

---
v11: no changes
v10: no changes
v9: no changes
v8: no changes
v5: no changes
v4: no changes
v3: no changes
v2: no changes

 arch/mips/dts/brcm,bcm6338.dtsi | 15 +++++++++++++++
 1 file changed, 15 insertions(+)

arch/mips/dts/brcm,bcm6338.dtsi +15 -0

index 990355481c..c547e949dd 100644
@@ -144,5 +144,20 @@
 			dma-channels = <6>;
 			resets = <&periph_rst BCM6338_RST_DMAMEM>;
 		};
+
+		enet: ethernet at fffe2800 {
+			compatible = "brcm,bcm6348-enet";
+			#address-cells = <1>;
+			#size-cells = <0>;
+			reg = <0xfffe2800 0x2dc>;
+			clocks = <&periph_clk BCM6338_CLK_ENET>;
+			resets = <&periph_rst BCM6338_RST_ENET>;
+			dmas = <&iudma BCM6338_DMA_ENET_RX>,
+			       <&iudma BCM6338_DMA_ENET_TX>;
+			dma-names = "rx",
+				    "tx";
+
+			status = "disabled";
+		};
 	};
 };

Signature · 1 line

2.11.0

Álvaro Fernández Rojas

2018-12-01 18:00 UTC #127 lore raw

PATCH v11 12/28 bmips: enable f@st1704 enet support

In reply to Álvaro Fernández Rojas

Signed-off-by Álvaro Fernández Rojas <[email protected]>

---
v11: no changes
v10: no changes
v9: no changes
v8: no changes
v5: no changes
v4: no changes
v3: no changes
v2: no changes

 arch/mips/dts/sagem,f at st1704.dts     | 12 ++++++++++++
 configs/sagem_f at st1704_ram_defconfig |  8 +++++++-
 2 files changed, 19 insertions(+), 1 deletion(-)

arch/mips/dts/sagem,f at st1704.dts +12 -0

index 5300f8b6df..ec6846dd9f 100644
@@ -39,6 +39,18 @@
 	};
 };
 
+&enet {
+	status = "okay";
+	phy = <&enetphy>;
+	phy-mode = "mii";
+
+	enetphy: fixed-link {
+		reg = <1>;
+		speed = <100>;
+		full-duplex;
+	};
+};
+
 &gpio {
 	status = "okay";
 };

configs/sagem_f at st1704_ram_defconfig +7 -1

index 91a966327a..8c36f5dbf8 100644
@@ -27,11 +27,14 @@ CONFIG_CMD_MEMINFO=y
 # CONFIG_CMD_LOADS is not set
 CONFIG_CMD_SF=y
 CONFIG_CMD_SPI=y
+CONFIG_CMD_MII=y
+CONFIG_CMD_PING=y
 # CONFIG_CMD_MISC is not set
 CONFIG_OF_EMBED=y
 CONFIG_DEFAULT_DEVICE_TREE="sagem,f at st1704"
-# CONFIG_NET is not set
+CONFIG_NET_RANDOM_ETHADDR=y
 # CONFIG_DM_DEVICE_REMOVE is not set
+CONFIG_BCM6348_IUDMA=y
 CONFIG_DM_GPIO=y
 CONFIG_BCM6345_GPIO=y
 CONFIG_LED=y

@@ -40,6 +43,9 @@ CONFIG_DM_SPI_FLASH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_WINBOND=y
 CONFIG_SPI_FLASH_MTD=y
+CONFIG_PHY_FIXED=y
+CONFIG_DM_ETH=y
+CONFIG_BCM6348_ETH=y
 CONFIG_DM_RESET=y
 CONFIG_RESET_BCM6345=y
 # CONFIG_SPL_SERIAL_PRESENT is not set

Signature · 1 line

2.11.0

Álvaro Fernández Rojas

2018-12-01 18:00 UTC #128 lore raw

PATCH v11 13/28 bmips: bcm6348: add support for bcm6348-enet

In reply to Álvaro Fernández Rojas

Signed-off-by Álvaro Fernández Rojas <[email protected]>

---
v11: no changes
v10: no changes
v9: no changes
v8: no changes
v5: no changes
v4: no changes
v3: no changes
v2: no changes

 arch/mips/dts/brcm,bcm6348.dtsi | 26 ++++++++++++++++++++++++++
 1 file changed, 26 insertions(+)

arch/mips/dts/brcm,bcm6348.dtsi +26 -0

index 875de232ca..79e7bd892b 100644
@@ -161,6 +161,32 @@
 			u-boot,dm-pre-reloc;
 		};
 
+		enet0: ethernet at fffe6000 {
+			compatible = "brcm,bcm6348-enet";
+			#address-cells = <1>;
+			#size-cells = <0>;
+			reg = <0xfffe6000 0x2dc>;
+			dmas = <&iudma BCM6348_DMA_ENET0_RX>,
+			       <&iudma BCM6348_DMA_ENET0_TX>;
+			dma-names = "rx",
+				    "tx";
+
+			status = "disabled";
+		};
+
+		enet1: ethernet at fffe6800 {
+			compatible = "brcm,bcm6348-enet";
+			#address-cells = <1>;
+			#size-cells = <0>;
+			reg = <0xfffe6800 0x2dc>;
+			dmas = <&iudma BCM6348_DMA_ENET1_RX>,
+			       <&iudma BCM6348_DMA_ENET1_TX>;
+			dma-names = "rx",
+				    "tx";
+
+			status = "disabled";
+		};
+
 		iudma: dma-controller at fffe7000 {
 			compatible = "brcm,bcm6348-iudma";
 			reg = <0xfffe7000 0x1c>,

Signature · 1 line

2.11.0

Álvaro Fernández Rojas

2018-12-01 18:00 UTC #129 lore raw

PATCH v11 14/28 bmips: enable ct-5361 enet support

In reply to Álvaro Fernández Rojas

Signed-off-by Álvaro Fernández Rojas <[email protected]>

---
v11: no changes
v10: no changes
v9: no changes
v8: no changes
v5: no changes
v4: no changes
v3: no changes
v2: no changes

 arch/mips/dts/comtrend,ct-5361.dts    | 12 ++++++++++++
 configs/comtrend_ct5361_ram_defconfig |  8 +++++++-
 2 files changed, 19 insertions(+), 1 deletion(-)

arch/mips/dts/comtrend,ct-5361.dts +12 -0

index 25747ca95d..f6b8a94e25 100644
@@ -34,6 +34,18 @@
 	};
 };
 
+&enet1 {
+	status = "okay";
+	phy = <&enet1phy>;
+	phy-mode = "mii";
+
+	enet1phy: fixed-link {
+		reg = <1>;
+		speed = <100>;
+		full-duplex;
+	};
+};
+
 &gpio0 {
 	status = "okay";
 };

configs/comtrend_ct5361_ram_defconfig +7 -1

index 82f2070713..6297e78fd9 100644
@@ -25,11 +25,14 @@ CONFIG_CMD_LICENSE=y
 CONFIG_CMD_MEMINFO=y
 # CONFIG_CMD_LOADS is not set
 CONFIG_CMD_USB=y
+CONFIG_CMD_MII=y
+CONFIG_CMD_PING=y
 # CONFIG_CMD_MISC is not set
 CONFIG_OF_EMBED=y
 CONFIG_DEFAULT_DEVICE_TREE="comtrend,ct-5361"
-# CONFIG_NET is not set
+CONFIG_NET_RANDOM_ETHADDR=y
 # CONFIG_DM_DEVICE_REMOVE is not set
+CONFIG_BCM6348_IUDMA=y
 CONFIG_DM_GPIO=y
 CONFIG_BCM6345_GPIO=y
 CONFIG_LED=y

@@ -40,6 +43,9 @@ CONFIG_FLASH_CFI_DRIVER=y
 CONFIG_CFI_FLASH=y
 CONFIG_SYS_FLASH_PROTECTION=y
 CONFIG_SYS_FLASH_CFI=y
+CONFIG_PHY_FIXED=y
+CONFIG_DM_ETH=y
+CONFIG_BCM6348_ETH=y
 CONFIG_PHY=y
 CONFIG_BCM6348_USBH_PHY=y
 CONFIG_DM_RESET=y

Signature · 1 line

2.11.0

Álvaro Fernández Rojas

2018-12-01 18:00 UTC #130 lore raw

PATCH v11 15/28 bmips: bcm6358: add support for bcm6348-enet

In reply to Álvaro Fernández Rojas

Signed-off-by Álvaro Fernández Rojas <[email protected]>

---
v11: no changes
v10: no changes
v9: no changes
v8: no changes
v5: no changes
v4: no changes
v3: no changes
v2: no changes

 arch/mips/dts/brcm,bcm6358.dtsi | 28 ++++++++++++++++++++++++++++
 1 file changed, 28 insertions(+)

arch/mips/dts/brcm,bcm6358.dtsi +28 -0

index 5605723e83..5e9c9ad769 100644
@@ -192,6 +192,34 @@
 			status = "disabled";
 		};
 
+		enet0: ethernet at fffe4000 {
+			compatible = "brcm,bcm6348-enet";
+			#address-cells = <1>;
+			#size-cells = <0>;
+			reg = <0xfffe4000 0x2dc>;
+			clocks = <&periph_clk BCM6358_CLK_ENET0>;
+			dmas = <&iudma BCM6358_DMA_ENET0_RX>,
+			       <&iudma BCM6358_DMA_ENET0_TX>;
+			dma-names = "rx",
+				    "tx";
+
+			status = "disabled";
+		};
+
+		enet1: ethernet at fffe4800 {
+			compatible = "brcm,bcm6348-enet";
+			#address-cells = <1>;
+			#size-cells = <0>;
+			reg = <0xfffe4800 0x2dc>;
+			clocks = <&periph_clk BCM6358_CLK_ENET1>;
+			dmas = <&iudma BCM6358_DMA_ENET1_RX>,
+			       <&iudma BCM6358_DMA_ENET1_TX>;
+			dma-names = "rx",
+				    "tx";
+
+			status = "disabled";
+		};
+
 		iudma: dma-controller at fffe5000 {
 			compatible = "brcm,bcm6348-iudma";
 			reg = <0xfffe5000 0x24>,

Signature · 1 line

2.11.0

Álvaro Fernández Rojas

2018-12-01 18:00 UTC #131 lore raw

PATCH v11 16/28 bmips: enable hg556a enet support

In reply to Álvaro Fernández Rojas

Signed-off-by Álvaro Fernández Rojas <[email protected]>

---
v11: no changes
v10: no changes
v9: no changes
v8: no changes
v5: no changes
v4: no changes
v3: no changes
v2: no changes

 arch/mips/dts/huawei,hg556a.dts     | 12 ++++++++++++
 configs/huawei_hg556a_ram_defconfig |  8 +++++++-
 2 files changed, 19 insertions(+), 1 deletion(-)

arch/mips/dts/huawei,hg556a.dts +12 -0

index 60455c2ff8..6a7fc1df4b 100644
@@ -93,6 +93,18 @@
 	status = "okay";
 };
 
+&enet1 {
+	status = "okay";
+	phy = <&enet1phy>;
+	phy-mode = "mii";
+
+	enet1phy: fixed-link {
+		reg = <1>;
+		speed = <100>;
+		full-duplex;
+	};
+};
+
 &gpio0 {
 	status = "okay";
 };

configs/huawei_hg556a_ram_defconfig +7 -1

index 6bb14ba736..d4e6144319 100644
@@ -25,11 +25,14 @@ CONFIG_CMD_LICENSE=y
 CONFIG_CMD_MEMINFO=y
 # CONFIG_CMD_LOADS is not set
 CONFIG_CMD_USB=y
+CONFIG_CMD_MII=y
+CONFIG_CMD_PING=y
 # CONFIG_CMD_MISC is not set
 CONFIG_OF_EMBED=y
 CONFIG_DEFAULT_DEVICE_TREE="huawei,hg556a"
-# CONFIG_NET is not set
+CONFIG_NET_RANDOM_ETHADDR=y
 # CONFIG_DM_DEVICE_REMOVE is not set
+CONFIG_BCM6348_IUDMA=y
 CONFIG_DM_GPIO=y
 CONFIG_BCM6345_GPIO=y
 CONFIG_LED=y

@@ -40,6 +43,9 @@ CONFIG_FLASH_CFI_DRIVER=y
 CONFIG_CFI_FLASH=y
 CONFIG_SYS_FLASH_PROTECTION=y
 CONFIG_SYS_FLASH_CFI=y
+CONFIG_PHY_FIXED=y
+CONFIG_DM_ETH=y
+CONFIG_BCM6348_ETH=y
 CONFIG_PHY=y
 CONFIG_BCM6358_USBH_PHY=y
 CONFIG_DM_RESET=y

Signature · 1 line

2.11.0

Álvaro Fernández Rojas

2018-12-01 18:00 UTC #132 lore raw

PATCH v11 17/28 bmips: enable nb4-ser enet support

In reply to Álvaro Fernández Rojas

Signed-off-by Álvaro Fernández Rojas <[email protected]>

---
v11: no changes
v10: no changes
v9: no changes
v8: no changes
v5: no changes
v4: no changes
v3: no changes
v2: no changes

 arch/mips/dts/sfr,nb4-ser.dts     | 24 ++++++++++++++++++++++++
 configs/sfr_nb4-ser_ram_defconfig |  8 +++++++-
 2 files changed, 31 insertions(+), 1 deletion(-)

arch/mips/dts/sfr,nb4-ser.dts +24 -0

index bdc6f8ae45..dfbc4148dc 100644
@@ -53,6 +53,30 @@
 	status = "okay";
 };
 
+&enet0 {
+	status = "okay";
+	phy = <&enet0phy>;
+	phy-mode = "internal";
+
+	enet0phy: fixed-link {
+		reg = <1>;
+		speed = <100>;
+		full-duplex;
+	};
+};
+
+&enet1 {
+	status = "okay";
+	phy = <&enet1phy>;
+	phy-mode = "mii";
+
+	enet1phy: fixed-link {
+		reg = <1>;
+		speed = <100>;
+		full-duplex;
+	};
+};
+
 &gpio0 {
 	status = "okay";
 };

configs/sfr_nb4-ser_ram_defconfig +7 -1

index 12adfb01e7..39622875b1 100644
@@ -26,11 +26,14 @@ CONFIG_CMD_LICENSE=y
 CONFIG_CMD_MEMINFO=y
 # CONFIG_CMD_LOADS is not set
 CONFIG_CMD_USB=y
+CONFIG_CMD_MII=y
+CONFIG_CMD_PING=y
 # CONFIG_CMD_MISC is not set
 CONFIG_OF_EMBED=y
 CONFIG_DEFAULT_DEVICE_TREE="sfr,nb4-ser"
-# CONFIG_NET is not set
+CONFIG_NET_RANDOM_ETHADDR=y
 # CONFIG_DM_DEVICE_REMOVE is not set
+CONFIG_BCM6348_IUDMA=y
 CONFIG_DM_GPIO=y
 CONFIG_BCM6345_GPIO=y
 CONFIG_LED=y

@@ -42,6 +45,9 @@ CONFIG_FLASH_CFI_DRIVER=y
 CONFIG_CFI_FLASH=y
 CONFIG_SYS_FLASH_PROTECTION=y
 CONFIG_SYS_FLASH_CFI=y
+CONFIG_PHY_FIXED=y
+CONFIG_DM_ETH=y
+CONFIG_BCM6348_ETH=y
 CONFIG_PHY=y
 CONFIG_BCM6358_USBH_PHY=y
 CONFIG_DM_RESET=y

Signature · 1 line

2.11.0

Álvaro Fernández Rojas

2018-12-01 18:00 UTC #133 lore raw

PATCH v11 18/28 net: add support for bcm6368-enet

In reply to Álvaro Fernández Rojas

Signed-off-by Álvaro Fernández Rojas <[email protected]>

Reviewed-by Daniel Schwierzeck <[email protected]>

---
v11: no changes
v10: Introduce changes suggested by Daniel Schwierzeck:
- Fix license identifiers.
- Remove packet queue.
- Move dma_prepare_rcv_buf to free_pkt.
- Pad packets smaller than ETH_ZLEN.
- Switch to live DM live tree.
v9: introduce flow control improvements from bcm6348-eth:
- introduce rx packets caching functionality from bcm6348-eth to fix flow control issues.
- code style fixes.
v8: introduce bcm6368-enet driver

 drivers/net/Kconfig       |   8 +
 drivers/net/Makefile      |   1 +
 drivers/net/bcm6368-eth.c | 625 ++++++++++++++++++++++++++++++++++++++++++++++
 3 files changed, 634 insertions(+)
 create mode 100644 drivers/net/bcm6368-eth.c

drivers/net/Kconfig +8 -0

index 2b7cec8804..7044c6adf3 100644
@@ -82,6 +82,14 @@ config BCM6348_ETH
 	help
 	  This driver supports the BCM6348 Ethernet MAC.
 
+config BCM6368_ETH
+	bool "BCM6368 EMAC support"
+	depends on DM_ETH && ARCH_BMIPS
+	select DMA
+	select MII
+	help
+	  This driver supports the BCM6368 Ethernet MAC.
+
 config DWC_ETH_QOS
 	bool "Synopsys DWC Ethernet QOS device support"
 	depends on DM_ETH

drivers/net/Makefile +1 -0

index 2647d4dd23..0dbfa03306 100644
@@ -7,6 +7,7 @@ obj-$(CONFIG_ALTERA_TSE) += altera_tse.o
 obj-$(CONFIG_AG7XXX) += ag7xxx.o
 obj-$(CONFIG_ARMADA100_FEC) += armada100_fec.o
 obj-$(CONFIG_BCM6348_ETH) += bcm6348-eth.o
+obj-$(CONFIG_BCM6368_ETH) += bcm6368-eth.o
 obj-$(CONFIG_DRIVER_AT91EMAC) += at91_emac.o
 obj-$(CONFIG_DRIVER_AX88180) += ax88180.o
 obj-$(CONFIG_BCM_SF2_ETH) += bcm-sf2-eth.o

drivers/net/bcm6368-eth.c new file +625 -0

625 lines not on this page · raw message

Signature · 1 line

2.11.0

Álvaro Fernández Rojas

2018-12-01 18:00 UTC #134 lore raw

PATCH v11 19/28 bmips: bcm6368: add support for bcm6368-enet

In reply to Álvaro Fernández Rojas

Signed-off-by Álvaro Fernández Rojas <[email protected]>

---
v11: no changes
v10: no changes
v9: no changes
v8: introduce bcm6368-enet driver

 arch/mips/dts/brcm,bcm6368.dtsi | 19 +++++++++++++++++++
 1 file changed, 19 insertions(+)

arch/mips/dts/brcm,bcm6368.dtsi +19 -0

index 30047f6360..89590d6ff9 100644
@@ -205,5 +205,24 @@
 			#dma-cells = <1>;
 			dma-channels = <8>;
 		};
+
+		enet: ethernet at 10f00000 {
+			compatible = "brcm,bcm6368-enet";
+			#address-cells = <1>;
+			#size-cells = <0>;
+			reg = <0x10f00000 0x10000>;
+			clocks = <&periph_clk BCM6368_CLK_SWPKT_USB>,
+				 <&periph_clk BCM6368_CLK_SWPKT_SAR>,
+				 <&periph_clk BCM6368_CLK_ROBOSW>;
+			resets = <&periph_rst BCM6368_RST_SWITCH>,
+				 <&periph_rst BCM6368_RST_EPHY>;
+			dmas = <&iudma BCM6368_DMA_ENETSW_RX>,
+			       <&iudma BCM6368_DMA_ENETSW_TX>;
+			dma-names = "rx",
+				    "tx";
+			brcm,num-ports = <6>;
+
+			status = "disabled";
+		};
 	};
 };

Signature · 1 line

2.11.0

Álvaro Fernández Rojas

2018-12-01 18:00 UTC #135 lore raw

PATCH v11 20/28 bmips: enable wap-5813n enet support

In reply to Álvaro Fernández Rojas

Signed-off-by Álvaro Fernández Rojas <[email protected]>

---
v11: no changes
v10: no changes
v9: no changes
v8: introduce bcm6368-enet driver

 arch/mips/dts/comtrend,wap-5813n.dts    | 14 ++++++++++++++
 configs/comtrend_wap5813n_ram_defconfig |  8 +++++++-
 2 files changed, 21 insertions(+), 1 deletion(-)

arch/mips/dts/comtrend,wap-5813n.dts +14 -0

index bd41dab9f8..7e835b28d2 100644
@@ -54,6 +54,20 @@
 	status = "okay";
 };
 
+&enet {
+	status = "okay";
+
+	port at 4 {
+		compatible = "brcm,enetsw-port";
+		reg = <4>;
+		label = "rgmii";
+		brcm,phy-id = <0xff>;
+		speed = <1000>;
+		full-duplex;
+		bypass-link;
+	};
+};
+
 &gpio0 {
 	status = "okay";
 };

configs/comtrend_wap5813n_ram_defconfig +7 -1

index 987e4c3fbc..fd5107bb7d 100644
@@ -25,11 +25,14 @@ CONFIG_CMD_LICENSE=y
 CONFIG_CMD_MEMINFO=y
 # CONFIG_CMD_LOADS is not set
 CONFIG_CMD_USB=y
+CONFIG_CMD_MII=y
+CONFIG_CMD_PING=y
 # CONFIG_CMD_MISC is not set
 CONFIG_OF_EMBED=y
 CONFIG_DEFAULT_DEVICE_TREE="comtrend,wap-5813n"
-# CONFIG_NET is not set
+CONFIG_NET_RANDOM_ETHADDR=y
 # CONFIG_DM_DEVICE_REMOVE is not set
+CONFIG_BCM6348_IUDMA=y
 CONFIG_DM_GPIO=y
 CONFIG_BCM6345_GPIO=y
 CONFIG_LED=y

@@ -40,6 +43,9 @@ CONFIG_FLASH_CFI_DRIVER=y
 CONFIG_CFI_FLASH=y
 CONFIG_SYS_FLASH_PROTECTION=y
 CONFIG_SYS_FLASH_CFI=y
+CONFIG_DM_ETH=y
+CONFIG_PHY_GIGE=y
+CONFIG_BCM6368_ETH=y
 CONFIG_PHY=y
 CONFIG_BCM6368_USBH_PHY=y
 CONFIG_DM_RESET=y

Signature · 1 line

2.11.0

Álvaro Fernández Rojas

2018-12-01 18:00 UTC #136 lore raw

PATCH v11 21/28 bmips: bcm6328: add support for bcm6368-enet

In reply to Álvaro Fernández Rojas

Signed-off-by Álvaro Fernández Rojas <[email protected]>

---
v11: no changes
v10: no changes
v9: no changes
v8: introduce bcm6368-enet driver

 arch/mips/dts/brcm,bcm6328.dtsi | 17 +++++++++++++++++
 1 file changed, 17 insertions(+)

arch/mips/dts/brcm,bcm6328.dtsi +17 -0

index 6fa49e22bb..50beed4171 100644
@@ -200,5 +200,22 @@
 			#dma-cells = <1>;
 			dma-channels = <8>;
 		};
+
+		enet: ethernet at 10e00000 {
+			compatible = "brcm,bcm6368-enet";
+			#address-cells = <1>;
+			#size-cells = <0>;
+			reg = <0x10e00000 0x10000>;
+			clocks = <&periph_clk BCM6328_CLK_ROBOSW>;
+			resets = <&periph_rst BCM6328_RST_ENETSW>,
+				 <&periph_rst BCM6328_RST_EPHY>;
+			dmas = <&iudma BCM6328_DMA_ENETSW_RX>,
+			       <&iudma BCM6328_DMA_ENETSW_TX>;
+			dma-names = "rx",
+				    "tx";
+			brcm,num-ports = <5>;
+
+			status = "disabled";
+		};
 	};
 };

Signature · 1 line

2.11.0

Álvaro Fernández Rojas

2018-12-01 18:00 UTC #137 lore raw

PATCH v11 22/28 bmips: enable ar-5387un enet support

In reply to Álvaro Fernández Rojas

Signed-off-by Álvaro Fernández Rojas <[email protected]>

---
v11: no changes
v10: no changes
v9: no changes
v8: introduce bcm6368-enet driver

 arch/mips/dts/comtrend,ar-5387un.dts    | 32 ++++++++++++++++++++++++++++++++
 configs/comtrend_ar5387un_ram_defconfig |  7 ++++++-
 2 files changed, 38 insertions(+), 1 deletion(-)

arch/mips/dts/comtrend,ar-5387un.dts +32 -0

index e993b5cd89..03e3851ab1 100644
@@ -24,6 +24,38 @@
 	status = "okay";
 };
 
+&enet {
+	status = "okay";
+
+	port at 0 {
+		compatible = "brcm,enetsw-port";
+		reg = <0>;
+		label = "fe1";
+		brcm,phy-id = <1>;
+	};
+
+	port at 1 {
+		compatible = "brcm,enetsw-port";
+		reg = <1>;
+		label = "fe2";
+		brcm,phy-id = <2>;
+	};
+
+	port at 2 {
+		compatible = "brcm,enetsw-port";
+		reg = <2>;
+		label = "fe3";
+		brcm,phy-id = <3>;
+	};
+
+	port at 3 {
+		compatible = "brcm,enetsw-port";
+		reg = <3>;
+		label = "fe4";
+		brcm,phy-id = <4>;
+	};
+};
+
 &leds {
 	status = "okay";

configs/comtrend_ar5387un_ram_defconfig +6 -1

index f129870ca0..5ba401a441 100644
@@ -28,11 +28,14 @@ CONFIG_CMD_MEMINFO=y
 CONFIG_CMD_SF=y
 CONFIG_CMD_SPI=y
 CONFIG_CMD_USB=y
+CONFIG_CMD_MII=y
+CONFIG_CMD_PING=y
 # CONFIG_CMD_MISC is not set
 CONFIG_OF_EMBED=y
 CONFIG_DEFAULT_DEVICE_TREE="comtrend,ar-5387un"
-# CONFIG_NET is not set
+CONFIG_NET_RANDOM_ETHADDR=y
 # CONFIG_DM_DEVICE_REMOVE is not set
+CONFIG_BCM6348_IUDMA=y
 CONFIG_DM_GPIO=y
 CONFIG_LED=y
 CONFIG_LED_BCM6328=y

@@ -41,6 +44,8 @@ CONFIG_DM_SPI_FLASH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_MACRONIX=y
 CONFIG_SPI_FLASH_MTD=y
+CONFIG_DM_ETH=y
+CONFIG_BCM6368_ETH=y
 CONFIG_PHY=y
 CONFIG_BCM6368_USBH_PHY=y
 CONFIG_POWER_DOMAIN=y

Signature · 1 line

2.11.0

Álvaro Fernández Rojas

2018-12-01 18:00 UTC #138 lore raw

PATCH v11 23/28 bmips: bcm6362: add support for bcm6368-enet

In reply to Álvaro Fernández Rojas

Signed-off-by Álvaro Fernández Rojas <[email protected]>

---
v11: no changes
v10: no changes
v9: no changes
v8: introduce bcm6368-enet driver

 arch/mips/dts/brcm,bcm6362.dtsi | 19 +++++++++++++++++++
 1 file changed, 19 insertions(+)

arch/mips/dts/brcm,bcm6362.dtsi +19 -0

index 94e7de096d..c77b80a4cc 100644
@@ -224,5 +224,24 @@
 			#dma-cells = <1>;
 			dma-channels = <8>;
 		};
+
+		enet: ethernet at 10e00000 {
+			compatible = "brcm,bcm6368-enet";
+			#address-cells = <1>;
+			#size-cells = <0>;
+			reg = <0x10e00000 0x10000>;
+			clocks = <&periph_clk BCM6362_CLK_SWPKT_USB>,
+				 <&periph_clk BCM6362_CLK_SWPKT_SAR>,
+				 <&periph_clk BCM6362_CLK_ROBOSW>;
+			resets = <&periph_rst BCM6362_RST_ENETSW>,
+				 <&periph_rst BCM6362_RST_EPHY>;
+			dmas = <&iudma BCM6362_DMA_ENETSW_RX>,
+			       <&iudma BCM6362_DMA_ENETSW_TX>;
+			dma-names = "rx",
+				    "tx";
+			brcm,num-ports = <6>;
+
+			status = "disabled";
+		};
 	};
 };

Signature · 1 line

2.11.0

Álvaro Fernández Rojas

2018-12-01 18:00 UTC #139 lore raw

PATCH v11 24/28 bmips: enable dgnd3700v2 enet support

In reply to Álvaro Fernández Rojas

Signed-off-by Álvaro Fernández Rojas <[email protected]>

---
v11: no changes
v10: no changes
v9: no changes
v8: introduce bcm6368-enet driver

 arch/mips/dts/netgear,dgnd3700v2.dts     | 14 ++++++++++++++
 configs/netgear_dgnd3700v2_ram_defconfig |  8 +++++++-
 2 files changed, 21 insertions(+), 1 deletion(-)

arch/mips/dts/netgear,dgnd3700v2.dts +14 -0

index 322d1567ff..2b72491f0b 100644
@@ -43,6 +43,20 @@
 	status = "okay";
 };
 
+&enet {
+	status = "okay";
+
+	port at 4 {
+		compatible = "brcm,enetsw-port";
+		reg = <4>;
+		label = "rgmii";
+		brcm,phy-id = <0xff>;
+		speed = <1000>;
+		full-duplex;
+		bypass-link;
+	};
+};
+
 &gpio0 {
 	status = "okay";
 };

configs/netgear_dgnd3700v2_ram_defconfig +7 -1

index 1abc869856..0f3914fe7e 100644
@@ -27,17 +27,23 @@ CONFIG_CMD_MEMINFO=y
 # CONFIG_CMD_FLASH is not set
 # CONFIG_CMD_LOADS is not set
 CONFIG_CMD_USB=y
-# CONFIG_CMD_NET is not set
+CONFIG_CMD_MII=y
+CONFIG_CMD_PING=y
 # CONFIG_CMD_MISC is not set
 CONFIG_OF_EMBED=y
 CONFIG_DEFAULT_DEVICE_TREE="netgear,dgnd3700v2"
+CONFIG_NET_RANDOM_ETHADDR=y
 # CONFIG_DM_DEVICE_REMOVE is not set
+CONFIG_BCM6348_IUDMA=y
 CONFIG_DM_GPIO=y
 CONFIG_BCM6345_GPIO=y
 CONFIG_LED=y
 CONFIG_LED_BCM6328=y
 CONFIG_LED_BLINK=y
 CONFIG_LED_GPIO=y
+CONFIG_DM_ETH=y
+CONFIG_PHY_GIGE=y
+CONFIG_BCM6368_ETH=y
 CONFIG_PHY=y
 CONFIG_BCM6368_USBH_PHY=y
 CONFIG_POWER_DOMAIN=y

Signature · 1 line

2.11.0

Álvaro Fernández Rojas

2018-12-01 18:00 UTC #140 lore raw

PATCH v11 25/28 bmips: bcm63268: add support for bcm6368-enet

In reply to Álvaro Fernández Rojas

Signed-off-by Álvaro Fernández Rojas <[email protected]>

---
v11: no changes
v10: no changes
v9: no changes
v8: introduce bcm6368-enet driver

 arch/mips/dts/brcm,bcm63268.dtsi | 25 +++++++++++++++++++++++++
 1 file changed, 25 insertions(+)

arch/mips/dts/brcm,bcm63268.dtsi +25 -0

index c7ad83c306..f8a72ef535 100644
@@ -230,5 +230,30 @@
 			#dma-cells = <1>;
 			dma-channels = <8>;
 		};
+
+		enet: ethernet at 10700000 {
+			compatible = "brcm,bcm6368-enet";
+			#address-cells = <1>;
+			#size-cells = <0>;
+			reg = <0x10700000 0x10000>;
+			clocks = <&periph_clk BCM63268_CLK_GMAC>,
+				 <&periph_clk BCM63268_CLK_ROBOSW>,
+				 <&periph_clk BCM63268_CLK_ROBOSW250>,
+				 <&timer_clk BCM63268_TCLK_EPHY1>,
+				 <&timer_clk BCM63268_TCLK_EPHY2>,
+				 <&timer_clk BCM63268_TCLK_EPHY3>,
+				 <&timer_clk BCM63268_TCLK_GPHY>;
+			resets = <&periph_rst BCM63268_RST_ENETSW>,
+				 <&periph_rst BCM63268_RST_EPHY>,
+				 <&periph_rst BCM63268_RST_GPHY>;
+			dmas = <&iudma BCM63268_DMA_ENETSW_RX>,
+			       <&iudma BCM63268_DMA_ENETSW_TX>;
+			dma-names = "rx",
+				    "tx";
+			brcm,rgmii-override;
+			brcm,rgmii-timing;
+
+			status = "disabled";
+		};
 	};
 };

Signature · 1 line

2.11.0

Álvaro Fernández Rojas

2018-12-01 18:00 UTC #141 lore raw

PATCH v11 26/28 bmips: enable vr-3032u enet support

In reply to Álvaro Fernández Rojas

Signed-off-by Álvaro Fernández Rojas <[email protected]>

---
v11: no changes
v10: no changes
v9: no changes
v8: introduce bcm6368-enet driver

 arch/mips/dts/comtrend,vr-3032u.dts    | 32 ++++++++++++++++++++++++++++++++
 configs/comtrend_vr3032u_ram_defconfig |  7 ++++++-
 2 files changed, 38 insertions(+), 1 deletion(-)

arch/mips/dts/comtrend,vr-3032u.dts +32 -0

index 8c6a4a1eac..512cb52de3 100644
@@ -24,6 +24,38 @@
 	status = "okay";
 };
 
+&enet {
+	status = "okay";
+
+	port at 0 {
+		compatible = "brcm,enetsw-port";
+		reg = <0>;
+		label = "fe2";
+		brcm,phy-id = <1>;
+	};
+
+	port at 1 {
+		compatible = "brcm,enetsw-port";
+		reg = <1>;
+		label = "fe3";
+		brcm,phy-id = <2>;
+	};
+
+	port at 2 {
+		compatible = "brcm,enetsw-port";
+		reg = <2>;
+		label = "fe4";
+		brcm,phy-id = <3>;
+	};
+
+	port at 3 {
+		compatible = "brcm,enetsw-port";
+		reg = <3>;
+		label = "fe1";
+		brcm,phy-id = <4>;
+	};
+};
+
 &leds {
 	status = "okay";
 	brcm,serial-leds;

configs/comtrend_vr3032u_ram_defconfig +6 -1

index 1689eecec1..47f53998e1 100644
@@ -26,15 +26,20 @@ CONFIG_CMD_MEMINFO=y
 # CONFIG_CMD_FLASH is not set
 # CONFIG_CMD_LOADS is not set
 CONFIG_CMD_USB=y
+CONFIG_CMD_MII=y
+CONFIG_CMD_PING=y
 # CONFIG_CMD_MISC is not set
 CONFIG_OF_EMBED=y
 CONFIG_DEFAULT_DEVICE_TREE="comtrend,vr-3032u"
-# CONFIG_NET is not set
+CONFIG_NET_RANDOM_ETHADDR=y
 # CONFIG_DM_DEVICE_REMOVE is not set
+CONFIG_BCM6348_IUDMA=y
 CONFIG_DM_GPIO=y
 CONFIG_LED=y
 CONFIG_LED_BCM6328=y
 CONFIG_LED_BLINK=y
+CONFIG_DM_ETH=y
+CONFIG_BCM6368_ETH=y
 CONFIG_PHY=y
 CONFIG_BCM6368_USBH_PHY=y
 CONFIG_POWER_DOMAIN=y

Signature · 1 line

2.11.0

Álvaro Fernández Rojas

2018-12-01 18:00 UTC #142 lore raw

PATCH v11 27/28 bmips: bcm6318: add support for bcm6368-enet

In reply to Álvaro Fernández Rojas

Signed-off-by Álvaro Fernández Rojas <[email protected]>

---
v11: no changes
v10: no changes
v9: no changes
v8: introduce bcm6368-enet driver

 arch/mips/dts/brcm,bcm6318.dtsi           | 19 +++++++++++++++++++
 include/dt-bindings/clock/bcm6318-clock.h | 11 +++++++++++
 2 files changed, 30 insertions(+)

arch/mips/dts/brcm,bcm6318.dtsi +19 -0

index d04b7cbb01..d678dab242 100644
@@ -190,6 +190,25 @@
 			status = "disabled";
 		};
 
+		enet: ethernet at 10080000 {
+			compatible = "brcm,bcm6368-enet";
+			#address-cells = <1>;
+			#size-cells = <0>;
+			reg = <0x10080000 0x8000>;
+			clocks = <&periph_clk BCM6318_CLK_ROBOSW250>,
+				 <&periph_clk BCM6318_CLK_ROBOSW025>,
+				 <&ubus_clk BCM6318_UCLK_ROBOSW>;
+			resets = <&periph_rst BCM6318_RST_ENETSW>,
+				 <&periph_rst BCM6318_RST_EPHY>;
+			dmas = <&iudma BCM6318_DMA_ENETSW_RX>,
+			       <&iudma BCM6318_DMA_ENETSW_TX>;
+			dma-names = "rx",
+				    "tx";
+			brcm,num-ports = <5>;
+
+			status = "disabled";
+		};
+
 		iudma: dma-controller at 10088000 {
 			compatible = "brcm,bcm6368-iudma";
 			reg = <0x10088000 0x80>,

include/dt-bindings/clock/bcm6318-clock.h +11 -0

index d5e13c5c2d..3f10448cef 100644
@@ -33,4 +33,15 @@
 #define BCM6318_CLK_AFE		29
 #define BCM6318_CLK_QPROC	30
 
+#define BCM6318_UCLK_ADSL	0
+#define BCM6318_UCLK_ARB	1
+#define BCM6318_UCLK_MIPS	2
+#define BCM6318_UCLK_PCIE	3
+#define BCM6318_UCLK_PERIPH	4
+#define BCM6318_UCLK_PHYMIPS	5
+#define BCM6318_UCLK_ROBOSW	6
+#define BCM6318_UCLK_SAR	7
+#define BCM6318_UCLK_SDR	8
+#define BCM6318_UCLK_USB	9
+
 #endif /* __DT_BINDINGS_CLOCK_BCM6318_H */

Signature · 1 line

2.11.0

Álvaro Fernández Rojas

2018-12-01 18:00 UTC #143 lore raw

PATCH v11 28/28 bmips: enable ar-5315u enet support

In reply to Álvaro Fernández Rojas

Signed-off-by Álvaro Fernández Rojas <[email protected]>

---
v11: no changes
v10: no changes
v9: no changes
v8: introduce bcm6368-enet driver

 arch/mips/dts/comtrend,ar-5315u.dts    | 32 ++++++++++++++++++++++++++++++++
 configs/comtrend_ar5315u_ram_defconfig |  7 ++++++-
 2 files changed, 38 insertions(+), 1 deletion(-)

arch/mips/dts/comtrend,ar-5315u.dts +32 -0

index 45570189d0..eb60aaa8d5 100644
@@ -24,6 +24,38 @@
 	status = "okay";
 };
 
+&enet {
+	status = "okay";
+
+	port at 0 {
+		compatible = "brcm,enetsw-port";
+		reg = <0>;
+		label = "fe4";
+		brcm,phy-id = <1>;
+	};
+
+	port at 1 {
+		compatible = "brcm,enetsw-port";
+		reg = <1>;
+		label = "fe3";
+		brcm,phy-id = <2>;
+	};
+
+	port at 2 {
+		compatible = "brcm,enetsw-port";
+		reg = <2>;
+		label = "fe2";
+		brcm,phy-id = <3>;
+	};
+
+	port at 3 {
+		compatible = "brcm,enetsw-port";
+		reg = <3>;
+		label = "fe1";
+		brcm,phy-id = <4>;
+	};
+};
+
 &leds {
 	status = "okay";

configs/comtrend_ar5315u_ram_defconfig +6 -1

index d9ef52e68d..1b8e4e43c4 100644
@@ -28,11 +28,14 @@ CONFIG_CMD_MEMINFO=y
 CONFIG_CMD_SF=y
 CONFIG_CMD_SPI=y
 CONFIG_CMD_USB=y
+CONFIG_CMD_MII=y
+CONFIG_CMD_PING=y
 # CONFIG_CMD_MISC is not set
 CONFIG_OF_EMBED=y
 CONFIG_DEFAULT_DEVICE_TREE="comtrend,ar-5315u"
-# CONFIG_NET is not set
+CONFIG_NET_RANDOM_ETHADDR=y
 # CONFIG_DM_DEVICE_REMOVE is not set
+CONFIG_BCM6348_IUDMA=y
 CONFIG_DM_GPIO=y
 CONFIG_LED=y
 CONFIG_LED_BCM6328=y

@@ -41,6 +44,8 @@ CONFIG_DM_SPI_FLASH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_WINBOND=y
 CONFIG_SPI_FLASH_MTD=y
+CONFIG_DM_ETH=y
+CONFIG_BCM6368_ETH=y
 CONFIG_PHY=y
 CONFIG_BCM6318_USBH_PHY=y
 CONFIG_BCM6328_POWER_DOMAIN=y

Signature · 1 line

2.11.0