CPM2 cleanups

@@ -135,7 +135,6 @@
 static void __init
 mpc8560_ads_init_IRQ(void)
 {
-	int i;
 	volatile cpm2_map_t *immap = cpm2_immr;
 
 	/* Setup OpenPIC */

@@ -145,8 +144,7 @@
 	immap->im_intctl.ic_simrh = 0x0;
 	immap->im_intctl.ic_simrl = 0x0;
 
-	for (i = CPM_IRQ_OFFSET; i < (NR_CPM_INTS + CPM_IRQ_OFFSET); i++)
-		irq_desc[i].handler = &cpm2_pic;
+        cpm2_init_IRQ();
 
 	/* Initialize the default interrupt mapping priorities,
 	 * in case the boot rom changed something on us.

@@ -32,12 +32,12 @@
 #include <asm/rheap.h>
 
 static void cpm2_dpinit(void);
-cpm_cpm2_t	*cpmp;		/* Pointer to comm processor space */
+volatile cpm_cpm2_t     *cpmp;          /* Pointer to comm processor space */
 
 /* We allocate this here because it is used almost exclusively for
  * the communication processor devices.
  */
-cpm2_map_t *cpm2_immr;
+volatile cpm2_map_t *cpm2_immr;
 
 #define CPM_MAP_SIZE	(0x40000)	/* 256k - the PQ3 reserve this amount
 					   of space for CPM as it is larger

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@@ -1,7 +1,8 @@
 #ifndef _PPC_KERNEL_CPM2_H
 #define _PPC_KERNEL_CPM2_H
 
-extern struct hw_interrupt_type cpm2_pic;
 extern int cpm2_get_irq(struct pt_regs *regs);
 
+extern void cpm2_init_IRQ(void);
+
 #endif /* _PPC_KERNEL_CPM2_H */

@@ -168,10 +168,7 @@
 static void __init
 m8260_init_IRQ(void)
 {
-	int i;
-
-        for ( i = 0 ; i < NR_SIU_INTS ; i++ )
-                irq_desc[i].handler = &cpm2_pic;
+	cpm2_init_IRQ();
 
 	/* Initialize the default interrupt mapping priorities,
 	 * in case the boot rom changed something on us.

@@ -69,13 +69,14 @@
 #define CPM_CR_INIT_TX		((ushort)0x0002)
 #define CPM_CR_HUNT_MODE	((ushort)0x0003)
 #define CPM_CR_STOP_TX		((ushort)0x0004)
+#define CPM_CR_GRA_STOP_TX      ((ushort)0x0005)
 #define CPM_CR_RESTART_TX	((ushort)0x0006)
 #define CPM_CR_SET_GADDR	((ushort)0x0008)
 #define CPM_CR_START_IDMA	((ushort)0x0009)
 #define CPM_CR_STOP_IDMA	((ushort)0x000b)
 
 #define mk_cr_cmd(PG, SBC, MCN, OP) \
-	((PG << 26) | (SBC << 21) | (MCN << 6) | OP)
+	(((PG) << 26) | ((SBC) << 21) | ((MCN) << 6) | (OP))
 
 /* Dual Port RAM addresses.  The first 16K is available for almost
  * any CPM use, so we put the BDs there.  The first 128 bytes are

@@ -107,7 +108,7 @@
 /* Export the base address of the communication processor registers
  * and dual port ram.
  */
-extern		cpm_cpm2_t	*cpmp;	 /* Pointer to comm processor */
+extern volatile	cpm_cpm2_t	*cpmp;	 /* Pointer to comm processor */
 extern uint cpm_dpalloc(uint size, uint align);
 extern int cpm_dpfree(uint offset);
 extern uint cpm_dpalloc_fixed(uint offset, uint size, uint align);

@@ -115,7 +116,24 @@
 extern void *cpm_dpram_addr(uint offset);
 extern void cpm_setbrg(uint brg, uint rate);
 extern void cpm2_fastbrg(uint brg, uint rate, int div16);
+extern void cpm2_reset(void);
+
+#ifdef CONFIG_CPM2
+#define CPM_CP_FCC(line, mcn)	mk_cr_cmd(CPM_CR_FCC1_PAGE+(line),CPM_CR_FCC1_SBLOCK+(line), mcn, 0)
+#define CPM_CP_SCC(line)	mk_cr_cmd(CPM_CR_SCC1_PAGE+(line),CPM_CR_SCC1_SBLOCK+(line), 0, 0)
+#define CPM_CP_SMC(line)	mk_cr_cmd(CPM_CR_SMC1_PAGE+(line),CPM_CR_SMC1_SBLOCK+(line), 0, 0)
+#define CPM_CP_I2C		mk_cr_cmd(CPM_CR_I2C_PAGE,CPM_CR_I2C_SBLOCK, 0, 0)
 
+static inline void cpm_cp_command(uint32_t id, int op)
+{
+	cpmp->cp_cpcr = id | op | CPM_CR_FLG;
+
+	while (cpmp->cp_cpcr & CPM_CR_FLG);
+}
+#else
+#error Please define cpm_cp_command and the CPM_CP_* ids you will need.
+#endif
+
 /* Buffer descriptors used by many of the CPM protocols.
 */
 typedef struct cpm_buf_desc {

@@ -135,6 +153,7 @@
 #define BD_SC_BR	((ushort)0x0020)	/* Break received */
 #define BD_SC_FR	((ushort)0x0010)	/* Framing error */
 #define BD_SC_PR	((ushort)0x0008)	/* Parity error */
+#define BD_SC_NAK	((ushort)0x0004)	/* NAK - did not respond */
 #define BD_SC_OV	((ushort)0x0002)	/* Overrun */
 #define BD_SC_CD	((ushort)0x0001)	/* ?? */
 

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