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Reimplement huge pages without hugepd on powerpc (8xx, e500, book3s/64)

RFC PATCH Superseded Christophe Leroy 7 participants 62 messages May 17, 2024 – May 27, 2024

Subsystems (27)

v2 of 7 Superseded Latest is v7 →

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v2 cover Reimplement huge pages without hugepd on powerpc (8xx, e500, book3s/64)

This is the continuation of the RFC v1 series "Reimplement huge pages without hugepd on powerpc 8xx". It now get rid of hugepd completely after handling also e500 and book3s/64

Unlike most architectures, powerpc 8xx HW requires a two-level pagetable topology for all page sizes. So a leaf PMD-contig approach is not feasible as such.

Possible sizes are 4k, 16k, 512k and 8M.

First level (PGD/PMD) covers 4M per entry. For 8M pages, two PMD entries must point to a single entry level-2 page table. Until now that was done using hugepd. This series changes it to use standard page tables where the entry is replicated 1024 times on each of the two pagetables refered by the two associated PMD entries for that 8M page.

At the moment it has to look into each helper to know if the hugepage ptep is a PTE or a PMD in order to know it is a 8M page or a lower size. I hope this can me handled by core-mm in the future.

For e500 and book3s/64 there are less constraints because it is not tied to the HW assisted tablewalk like on 8xx, so it is easier to use leaf PMDs (and PUDs).

On e500 the supported page sizes are 4M, 16M, 64M, 256M and 1G. All at PMD level on e500/32 and mix of PMD and PUD for e500/64. We encode page size with 4 available bits in PTE entries. On e300/32 PGD entries size is increases to 64 bits in order to allow leaf-PMD entries because PTE are 64 bits on e500.

On book3s/64 only the hash-4k mode is concerned. It supports 16M pages as cont-PMD and 16G pages as cont-PUD. In other modes (radix-4k, radix-6k and hash-64k) the sizes match with PMD and PUD sizes so that's just leaf entries.

Christophe Leroy (20):
mm: Provide pagesize to pmd_populate()
mm: Provide page size to pte_alloc_huge()
mm: Provide pmd to pte_leaf_size()
mm: Provide mm_struct and address to huge_ptep_get() powerpc/mm: Allow hugepages without hugepd
powerpc/8xx: Fix size given to set_huge_pte_at() powerpc/8xx: Rework support for 8M pages using contiguous PTE entries powerpc/8xx: Simplify struct mmu_psize_def
powerpc/mm: Remove _PAGE_PSIZE
powerpc/mm: Fix __find_linux_pte() on 32 bits with PMD leaf entries powerpc/mm: Complement huge_pte_alloc() for all non HUGEPD setups powerpc/64e: Remove unneeded #ifdef CONFIG_PPC_E500 powerpc/64e: Clean up impossible setups
powerpc/e500: Remove enc field from struct mmu_psize_def powerpc/85xx: Switch to 64 bits PGD
powerpc/e500: Encode hugepage size in PTE bits powerpc/e500: Use contiguous PMD instead of hugepd powerpc/64s: Use contiguous PMD/PUD instead of HUGEPD powerpc/mm: Remove hugepd leftovers
mm: Remove CONFIG_ARCH_HAS_HUGEPD

 arch/arm/include/asm/hugetlb-3level.h         |   2 +-
 arch/arm64/include/asm/hugetlb.h              |   2 +-
 arch/arm64/include/asm/pgtable.h              |   2 +-
 arch/arm64/mm/hugetlbpage.c                   |   4 +-
 arch/parisc/mm/hugetlbpage.c                  |   2 +-
 arch/powerpc/Kconfig                          |   1 -
 arch/powerpc/include/asm/book3s/32/pgalloc.h  |   2 -
 arch/powerpc/include/asm/book3s/64/hash-4k.h  |  15 -
 arch/powerpc/include/asm/book3s/64/hash.h     |  38 +-
 arch/powerpc/include/asm/book3s/64/hugetlb.h  |  38 --
 .../include/asm/book3s/64/pgtable-4k.h        |  34 --
 .../include/asm/book3s/64/pgtable-64k.h       |  20 -
 arch/powerpc/include/asm/hugetlb.h            |  26 +-
 .../include/asm/nohash/32/hugetlb-8xx.h       |  58 +--
 arch/powerpc/include/asm/nohash/32/mmu-8xx.h  |   9 +-
 arch/powerpc/include/asm/nohash/32/pgalloc.h  |   2 +
 arch/powerpc/include/asm/nohash/32/pte-40x.h  |   3 -
 arch/powerpc/include/asm/nohash/32/pte-44x.h  |   3 -
 arch/powerpc/include/asm/nohash/32/pte-85xx.h |   3 -
 arch/powerpc/include/asm/nohash/32/pte-8xx.h  |  64 ++-
 .../powerpc/include/asm/nohash/hugetlb-e500.h |  36 +-
 arch/powerpc/include/asm/nohash/mmu-e500.h    |   4 -
 arch/powerpc/include/asm/nohash/pgalloc.h     |   2 -
 arch/powerpc/include/asm/nohash/pgtable.h     |  45 +-
 arch/powerpc/include/asm/nohash/pte-e500.h    |  22 +-
 arch/powerpc/include/asm/page.h               |  32 --
 arch/powerpc/include/asm/pgtable-be-types.h   |  10 -
 arch/powerpc/include/asm/pgtable-types.h      |  13 +-
 arch/powerpc/include/asm/pgtable.h            |   3 +
 arch/powerpc/kernel/head_85xx.S               |  33 +-
 arch/powerpc/kernel/head_8xx.S                |  10 +-
 arch/powerpc/mm/book3s64/hash_utils.c         |  11 +-
 arch/powerpc/mm/book3s64/pgtable.c            |  12 -
 arch/powerpc/mm/hugetlbpage.c                 | 450 ++----------------
 arch/powerpc/mm/init-common.c                 |   8 +-
 arch/powerpc/mm/kasan/8xx.c                   |  15 +-
 arch/powerpc/mm/nohash/8xx.c                  |  46 +-
 arch/powerpc/mm/nohash/book3e_pgtable.c       |   4 +-
 arch/powerpc/mm/nohash/tlb.c                  | 172 ++-----
 arch/powerpc/mm/nohash/tlb_low_64e.S          | 257 ++--------
 arch/powerpc/mm/pgtable.c                     |  94 ++--
 arch/powerpc/mm/pgtable_32.c                  |   2 +-
 arch/riscv/include/asm/hugetlb.h              |   2 +-
 arch/riscv/include/asm/pgtable.h              |   2 +-
 arch/riscv/mm/hugetlbpage.c                   |   4 +-
 arch/s390/include/asm/hugetlb.h               |   2 +-
 arch/s390/mm/hugetlbpage.c                    |   2 +-
 arch/sh/mm/hugetlbpage.c                      |   2 +-
 arch/sparc/include/asm/pgtable_64.h           |   2 +-
 arch/sparc/mm/hugetlbpage.c                   |   4 +-
 fs/hugetlbfs/inode.c                          |   2 +-
 fs/proc/task_mmu.c                            |   8 +-
 fs/userfaultfd.c                              |   2 +-
 include/asm-generic/hugetlb.h                 |   2 +-
 include/linux/hugetlb.h                       |  10 +-
 include/linux/mm.h                            |  12 +-
 include/linux/pgtable.h                       |   2 +-
 include/linux/swapops.h                       |   2 +-
 kernel/events/core.c                          |   2 +-
 mm/Kconfig                                    |  10 -
 mm/damon/vaddr.c                              |   6 +-
 mm/filemap.c                                  |   2 +-
 mm/gup.c                                      | 105 +---
 mm/hmm.c                                      |   2 +-
 mm/hugetlb.c                                  |  46 +-
 mm/internal.h                                 |   2 +-
 mm/memory-failure.c                           |   2 +-
 mm/memory.c                                   |  19 +-
 mm/mempolicy.c                                |   2 +-
 mm/migrate.c                                  |   4 +-
 mm/mincore.c                                  |   2 +-
 mm/pagewalk.c                                 |  57 +--
 mm/pgalloc-track.h                            |   2 +-
 mm/userfaultfd.c                              |   6 +-
 74 files changed, 494 insertions(+), 1444 deletions(-)
Signature · 1 line
2.44.0
#1 lore raw

RFC PATCH v2 1/20 mm: Provide pagesize to pmd_populate()

Unlike many architectures, powerpc 8xx hardware tablewalk requires a two level process for all page sizes, allthough second level only has one entry when pagesize is 8M.

To fit with Linux page table topology and without requiring special page directory layout like hugepd, the page entry will be replicated 1024 times in the standard page table. However for large pages it is necessary to set bits in the level-1 (PMD) entry. At the time being, for 512k pages the flag is kept in the PTE and inserted in the PMD entry at TLB miss exception, that is necessary because we can have pages of different sizes in a page table. However the 12 PTE bits are fully used and there is no room for an additional bit for page size.

For 8M pages, there will be only one page per PMD entry, it is therefore possible to flag the pagesize in the PMD entry, with the advantage that the information will already be at the right place for the hardware.

To do so, add a new helper called pmd_populate_size() which takes the page size as an additional argument, and modify __pte_alloc() to also take that argument. pte_alloc() is left unmodified in order to reduce churn on callers, and a pte_alloc_size() is added for use by pte_alloc_huge().

When an architecture doesn't provide pmd_populate_size(), pmd_populate() is used as a fallback.

---
 include/linux/mm.h | 12 +++++++-----
 mm/filemap.c       |  2 +-
 mm/internal.h      |  2 +-
 mm/memory.c        | 19 ++++++++++++-------
 mm/pgalloc-track.h |  2 +-
 mm/userfaultfd.c   |  4 ++--
 6 files changed, 24 insertions(+), 17 deletions(-)
include/linux/mm.h +7 -5
index b6bdaa18b9e9..158cb87bc604 100644
@@ -2803,8 +2803,8 @@ static inline void mm_inc_nr_ptes(struct mm_struct *mm) {}
 static inline void mm_dec_nr_ptes(struct mm_struct *mm) {}
 #endif
 
-int __pte_alloc(struct mm_struct *mm, pmd_t *pmd);
-int __pte_alloc_kernel(pmd_t *pmd);
+int __pte_alloc(struct mm_struct *mm, pmd_t *pmd, unsigned long sz);
+int __pte_alloc_kernel(pmd_t *pmd, unsigned long sz);
 
 #if defined(CONFIG_MMU)
 
@@ -2989,7 +2989,8 @@ pte_t *pte_offset_map_nolock(struct mm_struct *mm, pmd_t *pmd,
 	pte_unmap(pte);					\
 } while (0)
 
-#define pte_alloc(mm, pmd) (unlikely(pmd_none(*(pmd))) && __pte_alloc(mm, pmd))
+#define pte_alloc_size(mm, pmd, sz) (unlikely(pmd_none(*(pmd))) && __pte_alloc(mm, pmd, sz))
+#define pte_alloc(mm, pmd) pte_alloc_size(mm, pmd, PAGE_SIZE)
 
 #define pte_alloc_map(mm, pmd, address)			\
 	(pte_alloc(mm, pmd) ? NULL : pte_offset_map(pmd, address))
@@ -2998,9 +2999,10 @@ pte_t *pte_offset_map_nolock(struct mm_struct *mm, pmd_t *pmd,
 	(pte_alloc(mm, pmd) ?			\
 		 NULL : pte_offset_map_lock(mm, pmd, address, ptlp))
 
-#define pte_alloc_kernel(pmd, address)			\
-	((unlikely(pmd_none(*(pmd))) && __pte_alloc_kernel(pmd))? \
+#define pte_alloc_kernel_size(pmd, address, sz)			\
+	((unlikely(pmd_none(*(pmd))) && __pte_alloc_kernel(pmd, sz))? \
 		NULL: pte_offset_kernel(pmd, address))
+#define pte_alloc_kernel(pmd, address)	pte_alloc_kernel_size(pmd, address, PAGE_SIZE)
 
 #if USE_SPLIT_PMD_PTLOCKS
 
mm/filemap.c +1 -1
index 30de18c4fd28..5a783063d1f6 100644
@@ -3428,7 +3428,7 @@ static bool filemap_map_pmd(struct vm_fault *vmf, struct folio *folio,
 	}
 
 	if (pmd_none(*vmf->pmd) && vmf->prealloc_pte)
-		pmd_install(mm, vmf->pmd, &vmf->prealloc_pte);
+		pmd_install(mm, vmf->pmd, &vmf->prealloc_pte, PAGE_SIZE);
 
 	return false;
 }
mm/internal.h +1 -1
index 07ad2675a88b..4a01bbf55264 100644
@@ -206,7 +206,7 @@ void folio_activate(struct folio *folio);
 void free_pgtables(struct mmu_gather *tlb, struct ma_state *mas,
 		   struct vm_area_struct *start_vma, unsigned long floor,
 		   unsigned long ceiling, bool mm_wr_locked);
-void pmd_install(struct mm_struct *mm, pmd_t *pmd, pgtable_t *pte);
+void pmd_install(struct mm_struct *mm, pmd_t *pmd, pgtable_t *pte, unsigned long sz);
 
 struct zap_details;
 void unmap_page_range(struct mmu_gather *tlb,
mm/memory.c +12 -7
index d2155ced45f8..2a9eba13a95f 100644
@@ -409,7 +409,12 @@ void free_pgtables(struct mmu_gather *tlb, struct ma_state *mas,
 	} while (vma);
 }
 
-void pmd_install(struct mm_struct *mm, pmd_t *pmd, pgtable_t *pte)
+#ifndef pmd_populate_size
+#define pmd_populate_size(mm, pmdp, pte, sz) pmd_populate(mm, pmdp, pte)
+#define pmd_populate_kernel_size(mm, pmdp, pte, sz) pmd_populate_kernel(mm, pmdp, pte)
+#endif
+
+void pmd_install(struct mm_struct *mm, pmd_t *pmd, pgtable_t *pte, unsigned long sz)
 {
 	spinlock_t *ptl = pmd_lock(mm, pmd);
 
@@ -429,25 +434,25 @@ void pmd_install(struct mm_struct *mm, pmd_t *pmd, pgtable_t *pte)
 		 * smp_rmb() barriers in page table walking code.
 		 */
 		smp_wmb(); /* Could be smp_wmb__xxx(before|after)_spin_lock */
-		pmd_populate(mm, pmd, *pte);
+		pmd_populate_size(mm, pmd, *pte, sz);
 		*pte = NULL;
 	}
 	spin_unlock(ptl);
 }
 
-int __pte_alloc(struct mm_struct *mm, pmd_t *pmd)
+int __pte_alloc(struct mm_struct *mm, pmd_t *pmd, unsigned long sz)
 {
 	pgtable_t new = pte_alloc_one(mm);
 	if (!new)
 		return -ENOMEM;
 
-	pmd_install(mm, pmd, &new);
+	pmd_install(mm, pmd, &new, sz);
 	if (new)
 		pte_free(mm, new);
 	return 0;
 }
 
-int __pte_alloc_kernel(pmd_t *pmd)
+int __pte_alloc_kernel(pmd_t *pmd, unsigned long sz)
 {
 	pte_t *new = pte_alloc_one_kernel(&init_mm);
 	if (!new)
@@ -456,7 +461,7 @@ int __pte_alloc_kernel(pmd_t *pmd)
 	spin_lock(&init_mm.page_table_lock);
 	if (likely(pmd_none(*pmd))) {	/* Has another populated it ? */
 		smp_wmb(); /* See comment in pmd_install() */
-		pmd_populate_kernel(&init_mm, pmd, new);
+		pmd_populate_kernel_size(&init_mm, pmd, new, sz);
 		new = NULL;
 	}
 	spin_unlock(&init_mm.page_table_lock);
@@ -4740,7 +4745,7 @@ vm_fault_t finish_fault(struct vm_fault *vmf)
 		}
 
 		if (vmf->prealloc_pte)
-			pmd_install(vma->vm_mm, vmf->pmd, &vmf->prealloc_pte);
+			pmd_install(vma->vm_mm, vmf->pmd, &vmf->prealloc_pte, PAGE_SIZE);
 		else if (unlikely(pte_alloc(vma->vm_mm, vmf->pmd)))
 			return VM_FAULT_OOM;
 	}
mm/pgalloc-track.h +1 -1
index e9e879de8649..90e37de7ab77 100644
@@ -45,7 +45,7 @@ static inline pmd_t *pmd_alloc_track(struct mm_struct *mm, pud_t *pud,
 
 #define pte_alloc_kernel_track(pmd, address, mask)			\
 	((unlikely(pmd_none(*(pmd))) &&					\
-	  (__pte_alloc_kernel(pmd) || ({*(mask)|=PGTBL_PMD_MODIFIED;0;})))?\
+	  (__pte_alloc_kernel(pmd, PAGE_SIZE) || ({*(mask)|=PGTBL_PMD_MODIFIED;0;})))?\
 		NULL: pte_offset_kernel(pmd, address))
 
 #endif /* _LINUX_PGALLOC_TRACK_H */
mm/userfaultfd.c +2 -2
index 3c3539c573e7..0f129d5c5aa2 100644
@@ -764,7 +764,7 @@ static __always_inline ssize_t mfill_atomic(struct userfaultfd_ctx *ctx,
 			break;
 		}
 		if (unlikely(pmd_none(dst_pmdval)) &&
-		    unlikely(__pte_alloc(dst_mm, dst_pmd))) {
+		    unlikely(__pte_alloc(dst_mm, dst_pmd, PAGE_SIZE))) {
 			err = -ENOMEM;
 			break;
 		}
@@ -1687,7 +1687,7 @@ ssize_t move_pages(struct userfaultfd_ctx *ctx, unsigned long dst_start,
 					err = -ENOENT;
 					break;
 				}
-				if (unlikely(__pte_alloc(mm, src_pmd))) {
+				if (unlikely(__pte_alloc(mm, src_pmd, PAGE_SIZE))) {
 					err = -ENOMEM;
 					break;
 				}
Signature · 1 line
2.44.0
maintainer
#2 lore raw

Re: [RFC PATCH v2 01/20] mm: Provide pagesize to pmd_populate()

Quoted 3 lines · Christophe Leroy

Unlike many architectures, powerpc 8xx hardware tablewalk requires a two level process for all page sizes, allthough second level only has one entry when pagesize is 8M.

So, I went on a quick reading on

https://www.nxp.com/docs/en/application-note-software/AN3066.pdf

to get more insight, and I realized that some of the questions I made in v1 were quite dump.

Quoted 4 lines

To fit with Linux page table topology and without requiring special page directory layout like hugepd, the page entry will be replicated 1024 times in the standard page table. However for large pages it is

You only have to replicate 1024 times in case the page size is 4KB, and you will have to replicate that twice and have 2 PMDs pointing to it, right?

For 16KB, you will have the PMD containing 512 entries of 16KB.

Quoted 3 lines

necessary to set bits in the level-1 (PMD) entry. At the time being, for 512k pages the flag is kept in the PTE and inserted in the PMD entry at TLB miss exception, that is necessary because we can have

rlwimi r11, r10, 32 - 9, _PMD_PAGE_512K
mtspr SPRN_MI_TWC, r11

So we shift the value and compare it to _PMD_PAGE_512K to see if the PTE is a 512K page, and then we set it to SPRN_MI_TWC which I guess is some CPU special register?

Quoted 2 lines

pages of different sizes in a page table. However the 12 PTE bits are fully used and there is no room for an additional bit for page size.

You are referring to the bits in
arch/powerpc/include/asm/nohash/32/pte-8xx.h ?

Quoted 2 lines

For 8M pages, there will be only one page per PMD entry, it is therefore possible to flag the pagesize in the PMD entry, with the

I am confused, and it might be just terminology, or I am getting wrong the design.
You say that for 8MB pages, there will one page per PMD entry, but based on the above, you will have 1024 entries (replicated)?
So, maybe this wanted to be read as "there will be only one page size per PMD entry".

Quoted 5 lines

advantage that the information will already be at the right place for the hardware.

To do so, add a new helper called pmd_populate_size() which takes the page size as an additional argument, and modify __pte_alloc() to also

"page size" makes me thing of the standart page size the kernel is operating on (aka PAGE_SIZE), but it is actually the size of the huge page, so I think we should clarify it.

Quoted 6 lines

take that argument. pte_alloc() is left unmodified in order to reduce churn on callers, and a pte_alloc_size() is added for use by pte_alloc_huge().

When an architecture doesn't provide pmd_populate_size(), pmd_populate() is used as a fallback.

It is a bit unfortunate that we have to touch the code for other architectures (in patch#2)

Quoted 1 line

So far I only looked at this patch and patch#2, and code-wise looks good and makes sense, but I find it a bit unfortunate that we have to touch general definitons and arch code (done in patch#2 and patch#3), and I hoped we could somehow isolate this, but I could not think of a way.

I will give it some more though.

Quoted 177 lines
---
 include/linux/mm.h | 12 +++++++-----
 mm/filemap.c       |  2 +-
 mm/internal.h      |  2 +-
 mm/memory.c        | 19 ++++++++++++-------
 mm/pgalloc-track.h |  2 +-
 mm/userfaultfd.c   |  4 ++--
 6 files changed, 24 insertions(+), 17 deletions(-)
include/linux/mm.h +7 -5
index b6bdaa18b9e9..158cb87bc604 100644
@@ -2803,8 +2803,8 @@ static inline void mm_inc_nr_ptes(struct mm_struct *mm) {}
 static inline void mm_dec_nr_ptes(struct mm_struct *mm) {}
 #endif
 
-int __pte_alloc(struct mm_struct *mm, pmd_t *pmd);
-int __pte_alloc_kernel(pmd_t *pmd);
+int __pte_alloc(struct mm_struct *mm, pmd_t *pmd, unsigned long sz);
+int __pte_alloc_kernel(pmd_t *pmd, unsigned long sz);
 
 #if defined(CONFIG_MMU)
 
@@ -2989,7 +2989,8 @@ pte_t *pte_offset_map_nolock(struct mm_struct *mm, pmd_t *pmd,
 	pte_unmap(pte);					\
 } while (0)
 
-#define pte_alloc(mm, pmd) (unlikely(pmd_none(*(pmd))) && __pte_alloc(mm, pmd))
+#define pte_alloc_size(mm, pmd, sz) (unlikely(pmd_none(*(pmd))) && __pte_alloc(mm, pmd, sz))
+#define pte_alloc(mm, pmd) pte_alloc_size(mm, pmd, PAGE_SIZE)
 
 #define pte_alloc_map(mm, pmd, address)			\
 	(pte_alloc(mm, pmd) ? NULL : pte_offset_map(pmd, address))
@@ -2998,9 +2999,10 @@ pte_t *pte_offset_map_nolock(struct mm_struct *mm, pmd_t *pmd,
 	(pte_alloc(mm, pmd) ?			\
 		 NULL : pte_offset_map_lock(mm, pmd, address, ptlp))
 
-#define pte_alloc_kernel(pmd, address)			\
-	((unlikely(pmd_none(*(pmd))) && __pte_alloc_kernel(pmd))? \
+#define pte_alloc_kernel_size(pmd, address, sz)			\
+	((unlikely(pmd_none(*(pmd))) && __pte_alloc_kernel(pmd, sz))? \
 		NULL: pte_offset_kernel(pmd, address))
+#define pte_alloc_kernel(pmd, address)	pte_alloc_kernel_size(pmd, address, PAGE_SIZE)
 
 #if USE_SPLIT_PMD_PTLOCKS
 
mm/filemap.c +1 -1
index 30de18c4fd28..5a783063d1f6 100644
@@ -3428,7 +3428,7 @@ static bool filemap_map_pmd(struct vm_fault *vmf, struct folio *folio,
 	}
 
 	if (pmd_none(*vmf->pmd) && vmf->prealloc_pte)
-		pmd_install(mm, vmf->pmd, &vmf->prealloc_pte);
+		pmd_install(mm, vmf->pmd, &vmf->prealloc_pte, PAGE_SIZE);
 
 	return false;
 }
mm/internal.h +1 -1
index 07ad2675a88b..4a01bbf55264 100644
@@ -206,7 +206,7 @@ void folio_activate(struct folio *folio);
 void free_pgtables(struct mmu_gather *tlb, struct ma_state *mas,
 		   struct vm_area_struct *start_vma, unsigned long floor,
 		   unsigned long ceiling, bool mm_wr_locked);
-void pmd_install(struct mm_struct *mm, pmd_t *pmd, pgtable_t *pte);
+void pmd_install(struct mm_struct *mm, pmd_t *pmd, pgtable_t *pte, unsigned long sz);
 
 struct zap_details;
 void unmap_page_range(struct mmu_gather *tlb,
mm/memory.c +12 -7
index d2155ced45f8..2a9eba13a95f 100644
@@ -409,7 +409,12 @@ void free_pgtables(struct mmu_gather *tlb, struct ma_state *mas,
 	} while (vma);
 }
 
-void pmd_install(struct mm_struct *mm, pmd_t *pmd, pgtable_t *pte)
+#ifndef pmd_populate_size
+#define pmd_populate_size(mm, pmdp, pte, sz) pmd_populate(mm, pmdp, pte)
+#define pmd_populate_kernel_size(mm, pmdp, pte, sz) pmd_populate_kernel(mm, pmdp, pte)
+#endif
+
+void pmd_install(struct mm_struct *mm, pmd_t *pmd, pgtable_t *pte, unsigned long sz)
 {
 	spinlock_t *ptl = pmd_lock(mm, pmd);
 
@@ -429,25 +434,25 @@ void pmd_install(struct mm_struct *mm, pmd_t *pmd, pgtable_t *pte)
 		 * smp_rmb() barriers in page table walking code.
 		 */
 		smp_wmb(); /* Could be smp_wmb__xxx(before|after)_spin_lock */
-		pmd_populate(mm, pmd, *pte);
+		pmd_populate_size(mm, pmd, *pte, sz);
 		*pte = NULL;
 	}
 	spin_unlock(ptl);
 }
 
-int __pte_alloc(struct mm_struct *mm, pmd_t *pmd)
+int __pte_alloc(struct mm_struct *mm, pmd_t *pmd, unsigned long sz)
 {
 	pgtable_t new = pte_alloc_one(mm);
 	if (!new)
 		return -ENOMEM;
 
-	pmd_install(mm, pmd, &new);
+	pmd_install(mm, pmd, &new, sz);
 	if (new)
 		pte_free(mm, new);
 	return 0;
 }
 
-int __pte_alloc_kernel(pmd_t *pmd)
+int __pte_alloc_kernel(pmd_t *pmd, unsigned long sz)
 {
 	pte_t *new = pte_alloc_one_kernel(&init_mm);
 	if (!new)
@@ -456,7 +461,7 @@ int __pte_alloc_kernel(pmd_t *pmd)
 	spin_lock(&init_mm.page_table_lock);
 	if (likely(pmd_none(*pmd))) {	/* Has another populated it ? */
 		smp_wmb(); /* See comment in pmd_install() */
-		pmd_populate_kernel(&init_mm, pmd, new);
+		pmd_populate_kernel_size(&init_mm, pmd, new, sz);
 		new = NULL;
 	}
 	spin_unlock(&init_mm.page_table_lock);
@@ -4740,7 +4745,7 @@ vm_fault_t finish_fault(struct vm_fault *vmf)
 		}
 
 		if (vmf->prealloc_pte)
-			pmd_install(vma->vm_mm, vmf->pmd, &vmf->prealloc_pte);
+			pmd_install(vma->vm_mm, vmf->pmd, &vmf->prealloc_pte, PAGE_SIZE);
 		else if (unlikely(pte_alloc(vma->vm_mm, vmf->pmd)))
 			return VM_FAULT_OOM;
 	}
mm/pgalloc-track.h +1 -1
index e9e879de8649..90e37de7ab77 100644
@@ -45,7 +45,7 @@ static inline pmd_t *pmd_alloc_track(struct mm_struct *mm, pud_t *pud,
 
 #define pte_alloc_kernel_track(pmd, address, mask)			\
 	((unlikely(pmd_none(*(pmd))) &&					\
-	  (__pte_alloc_kernel(pmd) || ({*(mask)|=PGTBL_PMD_MODIFIED;0;})))?\
+	  (__pte_alloc_kernel(pmd, PAGE_SIZE) || ({*(mask)|=PGTBL_PMD_MODIFIED;0;})))?\
 		NULL: pte_offset_kernel(pmd, address))
 
 #endif /* _LINUX_PGALLOC_TRACK_H */
mm/userfaultfd.c +2 -2
index 3c3539c573e7..0f129d5c5aa2 100644
@@ -764,7 +764,7 @@ static __always_inline ssize_t mfill_atomic(struct userfaultfd_ctx *ctx,
 			break;
 		}
 		if (unlikely(pmd_none(dst_pmdval)) &&
-		    unlikely(__pte_alloc(dst_mm, dst_pmd))) {
+		    unlikely(__pte_alloc(dst_mm, dst_pmd, PAGE_SIZE))) {
 			err = -ENOMEM;
 			break;
 		}
@@ -1687,7 +1687,7 @@ ssize_t move_pages(struct userfaultfd_ctx *ctx, unsigned long dst_start,
 					err = -ENOENT;
 					break;
 				}
-				if (unlikely(__pte_alloc(mm, src_pmd))) {
+				if (unlikely(__pte_alloc(mm, src_pmd, PAGE_SIZE))) {
 					err = -ENOMEM;
 					break;
 				}
Signature · 1 line
2.44.0
Signature · 2 lines
Oscar Salvador
SUSE Labs
#3 lore raw

Re: [RFC PATCH v2 01/20] mm: Provide pagesize to pmd_populate()

Le 20/05/2024 à 11:01, Oscar Salvador a écrit :

Quoted 11 lines · Christophe Leroy
Quoted 3 lines

Unlike many architectures, powerpc 8xx hardware tablewalk requires a two level process for all page sizes, allthough second level only has one entry when pagesize is 8M.

So, I went on a quick reading on

https://www.nxp.com/docs/en/application-note-software/AN3066.pdf

to get more insight, and I realized that some of the questions I made in v1 were quite dump.

I had a quick look at that document and it seems to provide a good summary of MMU features and principles. However there are some theoritical information which is not fully right in practice. For instance when they say "Segment attributes. These fields define attributes common to all pages in this segment.". This is right in theory if you consider it from Linux page table topology point of view, hence what they call a segment is a PMD entry for Linux. However, in practice each page has its own L1 and L2 attributes and there is not requirement at HW level to have all L1 attributes of all pages of a segment the same.

Quoted 8 lines
Quoted 5 lines

To fit with Linux page table topology and without requiring special page directory layout like hugepd, the page entry will be replicated 1024 times in the standard page table. However for large pages it is

You only have to replicate 1024 times in case the page size is 4KB, and you will have to replicate that twice and have 2 PMDs pointing to it, right?

Indeed.

Quoted 2 lines

For 16KB, you will have the PMD containing 512 entries of 16KB.

Exactly.

Quoted 6 lines
Quoted 4 lines

necessary to set bits in the level-1 (PMD) entry. At the time being, for 512k pages the flag is kept in the PTE and inserted in the PMD entry at TLB miss exception, that is necessary because we can have

rlwimi r11, r10, 32 - 9, _PMD_PAGE_512K

rlwimi = Rotate Left Word Immediate then Mask Insert. Here it rotates r10 by 23 bits to the left (or 9 to the right) then masks with _PMD_PAGE_512K and inserts it into r11.

It means _PAGE_HUGE bit is copied into lower bit of PS attribute.

PS takes the following values:

PS = 00 ==> Small page (4k or 16k)
PS = 01 ==> 512k page
PS = 10 ==> Undefined
PS = 11 ==> 8M page

Quoted 5 lines

mtspr SPRN_MI_TWC, r11

So we shift the value and compare it to _PMD_PAGE_512K to see if the PTE is a 512K page, and then we set it to SPRN_MI_TWC which I guess is some CPU special register?

TWC is where you store the Level 1 attributes, see figure 3 in the document you mentioned.

Quoted 6 lines
Quoted 3 lines

pages of different sizes in a page table. However the 12 PTE bits are fully used and there is no room for an additional bit for page size.

You are referring to the bits in
arch/powerpc/include/asm/nohash/32/pte-8xx.h ?

Yes, page are 4k so only the 12 lower bits are available to encode PTE bits and all are used.

Quoted 10 lines
Quoted 3 lines

For 8M pages, there will be only one page per PMD entry, it is therefore possible to flag the pagesize in the PMD entry, with the

I am confused, and it might be just terminology, or I am getting wrong the design.
You say that for 8MB pages, there will one page per PMD entry, but based on the above, you will have 1024 entries (replicated)?
So, maybe this wanted to be read as "there will be only one page size per PMD entry".

You have 1024 entries in the PTE table. The PMD entry points to that table were all 1024 entries are the same because they all define the same (half) of a 8M page.

So you are also right, there is only one page size because there is only one 8M page.

Quoted 10 lines
Quoted 6 lines

advantage that the information will already be at the right place for the hardware.

To do so, add a new helper called pmd_populate_size() which takes the page size as an additional argument, and modify __pte_alloc() to also

"page size" makes me thing of the standart page size the kernel is operating on (aka PAGE_SIZE), but it is actually the size of the huge page, so I think we should clarify it.

Page size means "size of the page".

Quoted 10 lines
Quoted 7 lines

take that argument. pte_alloc() is left unmodified in order to reduce churn on callers, and a pte_alloc_size() is added for use by pte_alloc_huge().

When an architecture doesn't provide pmd_populate_size(), pmd_populate() is used as a fallback.

It is a bit unfortunate that we have to touch the code for other architectures (in patch#2)

That's a RFC, all ideas are welcome, I needed something to replace hugepd_populate()

Quoted 188 lines
Quoted 2 lines

So far I only looked at this patch and patch#2, and code-wise looks good and makes sense, but I find it a bit unfortunate that we have to touch general definitons and arch code (done in patch#2 and patch#3), and I hoped we could somehow isolate this, but I could not think of a way.

I will give it some more though.

Quoted 177 lines
---
  include/linux/mm.h | 12 +++++++-----
  mm/filemap.c       |  2 +-
  mm/internal.h      |  2 +-
  mm/memory.c        | 19 ++++++++++++-------
  mm/pgalloc-track.h |  2 +-
  mm/userfaultfd.c   |  4 ++--
  6 files changed, 24 insertions(+), 17 deletions(-)
include/linux/mm.h +7 -5
index b6bdaa18b9e9..158cb87bc604 100644
@@ -2803,8 +2803,8 @@ static inline void mm_inc_nr_ptes(struct mm_struct *mm) {}
  static inline void mm_dec_nr_ptes(struct mm_struct *mm) {}
  #endif
 
-int __pte_alloc(struct mm_struct *mm, pmd_t *pmd);
-int __pte_alloc_kernel(pmd_t *pmd);
+int __pte_alloc(struct mm_struct *mm, pmd_t *pmd, unsigned long sz);
+int __pte_alloc_kernel(pmd_t *pmd, unsigned long sz);
 
  #if defined(CONFIG_MMU)
 
@@ -2989,7 +2989,8 @@ pte_t *pte_offset_map_nolock(struct mm_struct *mm, pmd_t *pmd,
  	pte_unmap(pte);					\
  } while (0)
 
-#define pte_alloc(mm, pmd) (unlikely(pmd_none(*(pmd))) && __pte_alloc(mm, pmd))
+#define pte_alloc_size(mm, pmd, sz) (unlikely(pmd_none(*(pmd))) && __pte_alloc(mm, pmd, sz))
+#define pte_alloc(mm, pmd) pte_alloc_size(mm, pmd, PAGE_SIZE)
 
  #define pte_alloc_map(mm, pmd, address)			\
  	(pte_alloc(mm, pmd) ? NULL : pte_offset_map(pmd, address))
@@ -2998,9 +2999,10 @@ pte_t *pte_offset_map_nolock(struct mm_struct *mm, pmd_t *pmd,
  	(pte_alloc(mm, pmd) ?			\
  		 NULL : pte_offset_map_lock(mm, pmd, address, ptlp))
 
-#define pte_alloc_kernel(pmd, address)			\
-	((unlikely(pmd_none(*(pmd))) && __pte_alloc_kernel(pmd))? \
+#define pte_alloc_kernel_size(pmd, address, sz)			\
+	((unlikely(pmd_none(*(pmd))) && __pte_alloc_kernel(pmd, sz))? \
  		NULL: pte_offset_kernel(pmd, address))
+#define pte_alloc_kernel(pmd, address)	pte_alloc_kernel_size(pmd, address, PAGE_SIZE)
 
  #if USE_SPLIT_PMD_PTLOCKS
 
mm/filemap.c +1 -1
index 30de18c4fd28..5a783063d1f6 100644
@@ -3428,7 +3428,7 @@ static bool filemap_map_pmd(struct vm_fault *vmf, struct folio *folio,
  	}
 
  	if (pmd_none(*vmf->pmd) && vmf->prealloc_pte)
-		pmd_install(mm, vmf->pmd, &vmf->prealloc_pte);
+		pmd_install(mm, vmf->pmd, &vmf->prealloc_pte, PAGE_SIZE);
 
  	return false;
  }
mm/internal.h +1 -1
index 07ad2675a88b..4a01bbf55264 100644
@@ -206,7 +206,7 @@ void folio_activate(struct folio *folio);
  void free_pgtables(struct mmu_gather *tlb, struct ma_state *mas,
  		   struct vm_area_struct *start_vma, unsigned long floor,
  		   unsigned long ceiling, bool mm_wr_locked);
-void pmd_install(struct mm_struct *mm, pmd_t *pmd, pgtable_t *pte);
+void pmd_install(struct mm_struct *mm, pmd_t *pmd, pgtable_t *pte, unsigned long sz);
 
  struct zap_details;
  void unmap_page_range(struct mmu_gather *tlb,
mm/memory.c +12 -7
index d2155ced45f8..2a9eba13a95f 100644
@@ -409,7 +409,12 @@ void free_pgtables(struct mmu_gather *tlb, struct ma_state *mas,
  	} while (vma);
  }
 
-void pmd_install(struct mm_struct *mm, pmd_t *pmd, pgtable_t *pte)
+#ifndef pmd_populate_size
+#define pmd_populate_size(mm, pmdp, pte, sz) pmd_populate(mm, pmdp, pte)
+#define pmd_populate_kernel_size(mm, pmdp, pte, sz) pmd_populate_kernel(mm, pmdp, pte)
+#endif
+
+void pmd_install(struct mm_struct *mm, pmd_t *pmd, pgtable_t *pte, unsigned long sz)
  {
  	spinlock_t *ptl = pmd_lock(mm, pmd);
 
@@ -429,25 +434,25 @@ void pmd_install(struct mm_struct *mm, pmd_t *pmd, pgtable_t *pte)
  		 * smp_rmb() barriers in page table walking code.
  		 */
  		smp_wmb(); /* Could be smp_wmb__xxx(before|after)_spin_lock */
-		pmd_populate(mm, pmd, *pte);
+		pmd_populate_size(mm, pmd, *pte, sz);
  		*pte = NULL;
  	}
  	spin_unlock(ptl);
  }
 
-int __pte_alloc(struct mm_struct *mm, pmd_t *pmd)
+int __pte_alloc(struct mm_struct *mm, pmd_t *pmd, unsigned long sz)
  {
  	pgtable_t new = pte_alloc_one(mm);
  	if (!new)
  		return -ENOMEM;
 
-	pmd_install(mm, pmd, &new);
+	pmd_install(mm, pmd, &new, sz);
  	if (new)
  		pte_free(mm, new);
  	return 0;
  }
 
-int __pte_alloc_kernel(pmd_t *pmd)
+int __pte_alloc_kernel(pmd_t *pmd, unsigned long sz)
  {
  	pte_t *new = pte_alloc_one_kernel(&init_mm);
  	if (!new)
@@ -456,7 +461,7 @@ int __pte_alloc_kernel(pmd_t *pmd)
  	spin_lock(&init_mm.page_table_lock);
  	if (likely(pmd_none(*pmd))) {	/* Has another populated it ? */
  		smp_wmb(); /* See comment in pmd_install() */
-		pmd_populate_kernel(&init_mm, pmd, new);
+		pmd_populate_kernel_size(&init_mm, pmd, new, sz);
  		new = NULL;
  	}
  	spin_unlock(&init_mm.page_table_lock);
@@ -4740,7 +4745,7 @@ vm_fault_t finish_fault(struct vm_fault *vmf)
  		}
 
  		if (vmf->prealloc_pte)
-			pmd_install(vma->vm_mm, vmf->pmd, &vmf->prealloc_pte);
+			pmd_install(vma->vm_mm, vmf->pmd, &vmf->prealloc_pte, PAGE_SIZE);
  		else if (unlikely(pte_alloc(vma->vm_mm, vmf->pmd)))
  			return VM_FAULT_OOM;
  	}
mm/pgalloc-track.h +1 -1
index e9e879de8649..90e37de7ab77 100644
@@ -45,7 +45,7 @@ static inline pmd_t *pmd_alloc_track(struct mm_struct *mm, pud_t *pud,
 
  #define pte_alloc_kernel_track(pmd, address, mask)			\
  	((unlikely(pmd_none(*(pmd))) &&					\
-	  (__pte_alloc_kernel(pmd) || ({*(mask)|=PGTBL_PMD_MODIFIED;0;})))?\
+	  (__pte_alloc_kernel(pmd, PAGE_SIZE) || ({*(mask)|=PGTBL_PMD_MODIFIED;0;})))?\
  		NULL: pte_offset_kernel(pmd, address))
 
  #endif /* _LINUX_PGALLOC_TRACK_H */
mm/userfaultfd.c +2 -2
index 3c3539c573e7..0f129d5c5aa2 100644
@@ -764,7 +764,7 @@ static __always_inline ssize_t mfill_atomic(struct userfaultfd_ctx *ctx,
  			break;
  		}
  		if (unlikely(pmd_none(dst_pmdval)) &&
-		    unlikely(__pte_alloc(dst_mm, dst_pmd))) {
+		    unlikely(__pte_alloc(dst_mm, dst_pmd, PAGE_SIZE))) {
  			err = -ENOMEM;
  			break;
  		}
@@ -1687,7 +1687,7 @@ ssize_t move_pages(struct userfaultfd_ctx *ctx, unsigned long dst_start,
  					err = -ENOENT;
  					break;
  				}
-				if (unlikely(__pte_alloc(mm, src_pmd))) {
+				if (unlikely(__pte_alloc(mm, src_pmd, PAGE_SIZE))) {
  					err = -ENOMEM;
  					break;
  				}
Signature · 1 line
2.44.0
maintainer
#4 lore raw

Re: [RFC PATCH v2 01/20] mm: Provide pagesize to pmd_populate()

Quoted 10 lines · Christophe Leroy

I had a quick look at that document and it seems to provide a good summary of MMU features and principles. However there are some theoritical information which is not fully right in practice. For instance when they say "Segment attributes. These fields define attributes common to all pages in this segment.". This is right in theory if you consider it from Linux page table topology point of view, hence what they call a segment is a PMD entry for Linux. However, in practice each page has its own L1 and L2 attributes and there is not requirement at HW level to have all L1 attributes of all pages of a segment the same.

Thanks for taking the time Christophe, highly appreciated.

Quoted 4 lines

rlwimi = Rotate Left Word Immediate then Mask Insert. Here it rotates r10 by 23 bits to the left (or 9 to the right) then masks with _PMD_PAGE_512K and inserts it into r11.

Quoted 8 lines

It means _PAGE_HUGE bit is copied into lower bit of PS attribute.

PS takes the following values:

PS = 00 ==> Small page (4k or 16k)
PS = 01 ==> 512k page
PS = 10 ==> Undefined
PS = 11 ==> 8M page

I see, thanks for the explanation.

Quoted 2 lines

That's a RFC, all ideas are welcome, I needed something to replace hugepd_populate()

The only user interested in pmd_populate() having a sz parameter is 8xx because it will toggle _PMD_PAGE_8M in case of a 8MB mapping.

Would it be possible for 8xx to encode the 'sz' in the *pmd pointer prior to calling down the chain? (something like as we do for PTR_ERR()). Then pmd_populate_{kernel_}size() from 8xx, would extract it like:

unsigned long sz = PTR_SIZE(pmd)

Then we would not need all these 'sz' parameters scattered.

Can that work?

PD: Do you know a way to emulate a 8xx VM? qemu seems to not have support support.

Thanks

Signature · 2 lines
Oscar Salvador
SUSE Labs
#5 lore raw

Re: [RFC PATCH v2 01/20] mm: Provide pagesize to pmd_populate()

Le 21/05/2024 à 13:57, Oscar Salvador a écrit :

Quoted 40 lines · Christophe Leroy
Quoted 10 lines

I had a quick look at that document and it seems to provide a good summary of MMU features and principles. However there are some theoritical information which is not fully right in practice. For instance when they say "Segment attributes. These fields define attributes common to all pages in this segment.". This is right in theory if you consider it from Linux page table topology point of view, hence what they call a segment is a PMD entry for Linux. However, in practice each page has its own L1 and L2 attributes and there is not requirement at HW level to have all L1 attributes of all pages of a segment the same.

Thanks for taking the time Christophe, highly appreciated.

Quoted 4 lines

rlwimi = Rotate Left Word Immediate then Mask Insert. Here it rotates r10 by 23 bits to the left (or 9 to the right) then masks with _PMD_PAGE_512K and inserts it into r11.

Quoted 8 lines

It means _PAGE_HUGE bit is copied into lower bit of PS attribute.

PS takes the following values:

PS = 00 ==> Small page (4k or 16k)
PS = 01 ==> 512k page
PS = 10 ==> Undefined
PS = 11 ==> 8M page

I see, thanks for the explanation.

Quoted 2 lines

That's a RFC, all ideas are welcome, I needed something to replace hugepd_populate()

The only user interested in pmd_populate() having a sz parameter is 8xx because it will toggle _PMD_PAGE_8M in case of a 8MB mapping.

Would it be possible for 8xx to encode the 'sz' in the *pmd pointer prior to calling down the chain? (something like as we do for PTR_ERR()). Then pmd_populate_{kernel_}size() from 8xx, would extract it like:

Quoted 5 lines

unsigned long sz = PTR_SIZE(pmd)

Then we would not need all these 'sz' parameters scattered.

Can that work?

Indeed _PMD_PAGE_8M can be set in set_huge_pte_at(), no need to do it atomically as part of pmd_populate, so I'll drop patches 1 and 2.

Quoted 5 lines

PD: Do you know a way to emulate a 8xx VM? qemu seems to not have support support.

I don't know any way. You are right that 8xx is not supported by QEMU unfortunately. I don't know how difficult it would be to add it to QEMU.

Christophe

#6 lore raw

RFC PATCH v2 2/20 mm: Provide page size to pte_alloc_huge()

In reply to Christophe Leroy

In order to be able to flag the PMD entry with _PMD_HUGE_8M on powerpc 8xx, provide page size to pte_alloc_huge() and use it through the newly introduced pte_alloc_size().

---
 arch/arm64/mm/hugetlbpage.c   | 2 +-
 arch/parisc/mm/hugetlbpage.c  | 2 +-
 arch/powerpc/mm/hugetlbpage.c | 2 +-
 arch/riscv/mm/hugetlbpage.c   | 2 +-
 arch/sh/mm/hugetlbpage.c      | 2 +-
 arch/sparc/mm/hugetlbpage.c   | 2 +-
 include/linux/hugetlb.h       | 4 ++--
 7 files changed, 8 insertions(+), 8 deletions(-)
arch/arm64/mm/hugetlbpage.c +1 -1
index b872b003a55f..aa7ded49f8cf 100644
@@ -292,7 +292,7 @@ pte_t *huge_pte_alloc(struct mm_struct *mm, struct vm_area_struct *vma,
 			return NULL;
 
 		WARN_ON(addr & (sz - 1));
-		ptep = pte_alloc_huge(mm, pmdp, addr);
+		ptep = pte_alloc_huge(mm, pmdp, addr, sz);
 	} else if (sz == PMD_SIZE) {
 		if (want_pmd_share(vma, addr) && pud_none(READ_ONCE(*pudp)))
 			ptep = huge_pmd_share(mm, vma, addr, pudp);
arch/parisc/mm/hugetlbpage.c +1 -1
index a9f7e21f6656..2f4c6b440710 100644
@@ -66,7 +66,7 @@ pte_t *huge_pte_alloc(struct mm_struct *mm, struct vm_area_struct *vma,
 	if (pud) {
 		pmd = pmd_alloc(mm, pud, addr);
 		if (pmd)
-			pte = pte_alloc_huge(mm, pmd, addr);
+			pte = pte_alloc_huge(mm, pmd, addr, sz);
 	}
 	return pte;
 }
arch/powerpc/mm/hugetlbpage.c +1 -1
index 594a4b7b2ca2..66ac56b26007 100644
@@ -183,7 +183,7 @@ pte_t *huge_pte_alloc(struct mm_struct *mm, struct vm_area_struct *vma,
 		return NULL;
 
 	if (IS_ENABLED(CONFIG_PPC_8xx) && pshift < PMD_SHIFT)
-		return pte_alloc_huge(mm, (pmd_t *)hpdp, addr);
+		return pte_alloc_huge(mm, (pmd_t *)hpdp, addr, sz);
 
 	BUG_ON(!hugepd_none(*hpdp) && !hugepd_ok(*hpdp));
 
arch/riscv/mm/hugetlbpage.c +1 -1
index 5ef2a6891158..dc77a58c6321 100644
@@ -67,7 +67,7 @@ pte_t *huge_pte_alloc(struct mm_struct *mm,
 
 	for_each_napot_order(order) {
 		if (napot_cont_size(order) == sz) {
-			pte = pte_alloc_huge(mm, pmd, addr & napot_cont_mask(order));
+			pte = pte_alloc_huge(mm, pmd, addr & napot_cont_mask(order), sz);
 			break;
 		}
 	}
arch/sh/mm/hugetlbpage.c +1 -1
index 6cb0ad73dbb9..26579429e5ed 100644
@@ -38,7 +38,7 @@ pte_t *huge_pte_alloc(struct mm_struct *mm, struct vm_area_struct *vma,
 			if (pud) {
 				pmd = pmd_alloc(mm, pud, addr);
 				if (pmd)
-					pte = pte_alloc_huge(mm, pmd, addr);
+					pte = pte_alloc_huge(mm, pmd, addr, sz);
 			}
 		}
 	}
arch/sparc/mm/hugetlbpage.c +1 -1
index b432500c13a5..5a342199e837 100644
@@ -298,7 +298,7 @@ pte_t *huge_pte_alloc(struct mm_struct *mm, struct vm_area_struct *vma,
 		return NULL;
 	if (sz >= PMD_SIZE)
 		return (pte_t *)pmd;
-	return pte_alloc_huge(mm, pmd, addr);
+	return pte_alloc_huge(mm, pmd, addr, sz);
 }
 
 pte_t *huge_pte_offset(struct mm_struct *mm,
include/linux/hugetlb.h +2 -2
index 77b30a8c6076..d9c5d9daadc5 100644
@@ -193,9 +193,9 @@ static inline pte_t *pte_offset_huge(pmd_t *pmd, unsigned long address)
 	return pte_offset_kernel(pmd, address);
 }
 static inline pte_t *pte_alloc_huge(struct mm_struct *mm, pmd_t *pmd,
-				    unsigned long address)
+				    unsigned long address, unsigned long sz)
 {
-	return pte_alloc(mm, pmd) ? NULL : pte_offset_huge(pmd, address);
+	return pte_alloc_size(mm, pmd, sz) ? NULL : pte_offset_huge(pmd, address);
 }
 #endif
 
Signature · 1 line
2.44.0
#7 lore raw

RFC PATCH v2 3/20 mm: Provide pmd to pte_leaf_size()

In reply to Christophe Leroy

On powerpc 8xx, when a page is 8M size, the information is in the PMD entry. So provide it to pte_leaf_size().

---
 arch/arm64/include/asm/pgtable.h             | 2 +-
 arch/powerpc/include/asm/nohash/32/pte-8xx.h | 2 +-
 arch/riscv/include/asm/pgtable.h             | 2 +-
 arch/sparc/include/asm/pgtable_64.h          | 2 +-
 arch/sparc/mm/hugetlbpage.c                  | 2 +-
 include/linux/pgtable.h                      | 2 +-
 kernel/events/core.c                         | 2 +-
 7 files changed, 7 insertions(+), 7 deletions(-)
arch/arm64/include/asm/pgtable.h +1 -1
index afdd56d26ad7..57c40f2498ab 100644
@@ -624,7 +624,7 @@ extern pgprot_t phys_mem_access_prot(struct file *file, unsigned long pfn,
 #define pmd_bad(pmd)		(!pmd_table(pmd))
 
 #define pmd_leaf_size(pmd)	(pmd_cont(pmd) ? CONT_PMD_SIZE : PMD_SIZE)
-#define pte_leaf_size(pte)	(pte_cont(pte) ? CONT_PTE_SIZE : PAGE_SIZE)
+#define pte_leaf_size(pmd, pte)	(pte_cont(pte) ? CONT_PTE_SIZE : PAGE_SIZE)
 
 #if defined(CONFIG_ARM64_64K_PAGES) || CONFIG_PGTABLE_LEVELS < 3
 static inline bool pud_sect(pud_t pud) { return false; }
arch/powerpc/include/asm/nohash/32/pte-8xx.h +1 -1
index 137dc3c84e45..07df6b664861 100644
@@ -151,7 +151,7 @@ static inline unsigned long pgd_leaf_size(pgd_t pgd)
 
 #define pgd_leaf_size pgd_leaf_size
 
-static inline unsigned long pte_leaf_size(pte_t pte)
+static inline unsigned long pte_leaf_size(pmd_t pmd, pte_t pte)
 {
 	pte_basic_t val = pte_val(pte);
 
arch/riscv/include/asm/pgtable.h +1 -1
index 6afd6bb4882e..9d9abe161a89 100644
@@ -434,7 +434,7 @@ static inline pte_t pte_mkhuge(pte_t pte)
 }
 
 #ifdef CONFIG_RISCV_ISA_SVNAPOT
-#define pte_leaf_size(pte)	(pte_napot(pte) ?				\
+#define pte_leaf_size(pmd, pte)	(pte_napot(pte) ?				\
 					napot_cont_size(napot_cont_order(pte)) :\
 					PAGE_SIZE)
 #endif
arch/sparc/include/asm/pgtable_64.h +1 -1
index 4d1bafaba942..67063af2ff8f 100644
@@ -1175,7 +1175,7 @@ extern unsigned long pud_leaf_size(pud_t pud);
 extern unsigned long pmd_leaf_size(pmd_t pmd);
 
 #define pte_leaf_size pte_leaf_size
-extern unsigned long pte_leaf_size(pte_t pte);
+extern unsigned long pte_leaf_size(pmd_t pmd, pte_t pte);
 
 #endif /* CONFIG_HUGETLB_PAGE */
 
arch/sparc/mm/hugetlbpage.c +1 -1
index 5a342199e837..60c845a15bee 100644
@@ -276,7 +276,7 @@ static unsigned long huge_tte_to_size(pte_t pte)
 
 unsigned long pud_leaf_size(pud_t pud) { return 1UL << tte_to_shift(*(pte_t *)&pud); }
 unsigned long pmd_leaf_size(pmd_t pmd) { return 1UL << tte_to_shift(*(pte_t *)&pmd); }
-unsigned long pte_leaf_size(pte_t pte) { return 1UL << tte_to_shift(pte); }
+unsigned long pte_leaf_size(pmd_t pmd, pte_t pte) { return 1UL << tte_to_shift(pte); }
 
 pte_t *huge_pte_alloc(struct mm_struct *mm, struct vm_area_struct *vma,
 			unsigned long addr, unsigned long sz)
include/linux/pgtable.h +1 -1
index 85fc7554cd52..e605a4149fc7 100644
@@ -1802,7 +1802,7 @@ typedef unsigned int pgtbl_mod_mask;
 #define pmd_leaf_size(x) PMD_SIZE
 #endif
 #ifndef pte_leaf_size
-#define pte_leaf_size(x) PAGE_SIZE
+#define pte_leaf_size(x, y) PAGE_SIZE
 #endif
 
 /*
kernel/events/core.c +1 -1
index 724e6d7e128f..5c1c083222b2 100644
@@ -7585,7 +7585,7 @@ static u64 perf_get_pgtable_size(struct mm_struct *mm, unsigned long addr)
 
 	pte = ptep_get_lockless(ptep);
 	if (pte_present(pte))
-		size = pte_leaf_size(pte);
+		size = pte_leaf_size(pmd, pte);
 	pte_unmap(ptep);
 #endif /* CONFIG_HAVE_FAST_GUP */
 
Signature · 1 line
2.44.0
maintainer
#8 lore raw

Re: [RFC PATCH v2 03/20] mm: Provide pmd to pte_leaf_size()

Quoted 4 lines · Christophe Leroy

On powerpc 8xx, when a page is 8M size, the information is in the PMD entry. So provide it to pte_leaf_size().

Overall looks good to me.

Would be nicer if we could left the arch code untouched.
I wanted to see how this would be if we go down that road and focus only on 8xx at the risk of being more esoteric. pmd_pte_leaf_size() is a name of hell, but could be replaced with __pte_leaf_size for example.

Worth it? Maybe not, anyway, just wanted to give it a go:

diff --git a/arch/powerpc/include/asm/nohash/32/pte-8xx.h b/arch/powerpc/include/asm/nohash/32/pte-8xx.h index 137dc3c84e45..9e3fe6e1083f 100644
--- a/arch/powerpc/include/asm/nohash/32/pte-8xx.h
+++ b/arch/powerpc/include/asm/nohash/32/pte-8xx.h
@@ -151,7 +151,7 @@ static inline unsigned long pgd_leaf_size(pgd_t pgd)

  #define pgd_leaf_size pgd_leaf_size

-static inline unsigned long pte_leaf_size(pte_t pte) +static inline unsigned long pmd_pte_leaf_size(pte_t pte)

  {
         pte_basic_t val = pte_val(pte);

@@ -162,7 +162,7 @@ static inline unsigned long pte_leaf_size(pte_t pte)

         return SZ_4K;

}

-#define pte_leaf_size pte_leaf_size
+#define pmd_pte_leaf_size pmd_pte_leaf_size

/*
* On the 8xx, the page tables are a bit special. For 16k pages, we have
diff --git a/include/linux/pgtable.h b/include/linux/pgtable.h index 18019f037bae..2bc2fe3b2b53 100644
--- a/include/linux/pgtable.h
+++ b/include/linux/pgtable.h
@@ -1891,6 +1891,9 @@ typedef unsigned int pgtbl_mod_mask;
#ifndef pte_leaf_size
#define pte_leaf_size(x) PAGE_SIZE
#endif
+#ifndef pmd_pte_leaf_size
+#define pmd_pte_leaf_size(x, y) pte_leaf_size(y)
+#endif

/*
* We always define pmd_pfn for all archs as it's used in lots of generic
diff --git a/kernel/events/core.c b/kernel/events/core.c
index f0128c5ff278..e90a547d2fb2 100644
--- a/kernel/events/core.c
+++ b/kernel/events/core.c
@@ -7596,7 +7596,7 @@ static u64 perf_get_pgtable_size(struct mm_struct *mm, unsigned long addr)

         pte = ptep_get_lockless(ptep);
         if (pte_present(pte))
 -               size = pte_leaf_size(pte);
 +               size = pmd_pte_leaf_size(pmd, pte);
         pte_unmap(ptep);

#endif /* CONFIG_HAVE_GUP_FAST */

Signature · 2 lines
Oscar Salvador
SUSE Labs
#9 lore raw

Re: [RFC PATCH v2 03/20] mm: Provide pmd to pte_leaf_size()

Le 21/05/2024 à 11:39, Oscar Salvador a écrit :

Quoted 8 lines · Christophe Leroy
Quoted 4 lines

On powerpc 8xx, when a page is 8M size, the information is in the PMD entry. So provide it to pte_leaf_size().

Overall looks good to me.

Quoted 7 lines

Would be nicer if we could left the arch code untouched.
I wanted to see how this would be if we go down that road and focus only on 8xx at the risk of being more esoteric. pmd_pte_leaf_size() is a name of hell, but could be replaced with __pte_leaf_size for example.

Worth it? Maybe not, anyway, just wanted to give it a go:

I like the idea, it doesn't look that bad after all, it avoids changes to other arches.

Quoted 53 lines

  diff --git a/arch/powerpc/include/asm/nohash/32/pte-8xx.h b/arch/powerpc/include/asm/nohash/32/pte-8xx.h
  index 137dc3c84e45..9e3fe6e1083f 100644
  --- a/arch/powerpc/include/asm/nohash/32/pte-8xx.h
  +++ b/arch/powerpc/include/asm/nohash/32/pte-8xx.h
  @@ -151,7 +151,7 @@ static inline unsigned long pgd_leaf_size(pgd_t pgd)
   #define pgd_leaf_size pgd_leaf_size
  -static inline unsigned long pte_leaf_size(pte_t pte)
  +static inline unsigned long pmd_pte_leaf_size(pte_t pte)
   {
          pte_basic_t val = pte_val(pte);
  
  @@ -162,7 +162,7 @@ static inline unsigned long pte_leaf_size(pte_t pte)
          return SZ_4K;
   }

-#define pte_leaf_size pte_leaf_size
+#define pmd_pte_leaf_size pmd_pte_leaf_size

   /*
    * On the 8xx, the page tables are a bit special. For 16k pages, we have
  diff --git a/include/linux/pgtable.h b/include/linux/pgtable.h
  index 18019f037bae..2bc2fe3b2b53 100644
  --- a/include/linux/pgtable.h
  +++ b/include/linux/pgtable.h
  @@ -1891,6 +1891,9 @@ typedef unsigned int pgtbl_mod_mask;
   #ifndef pte_leaf_size
   #define pte_leaf_size(x) PAGE_SIZE
   #endif
  +#ifndef pmd_pte_leaf_size
  +#define pmd_pte_leaf_size(x, y) pte_leaf_size(y)
  +#endif

/*
* We always define pmd_pfn for all archs as it's used in lots of generic
diff --git a/kernel/events/core.c b/kernel/events/core.c
index f0128c5ff278..e90a547d2fb2 100644
--- a/kernel/events/core.c
+++ b/kernel/events/core.c
@@ -7596,7 +7596,7 @@ static u64 perf_get_pgtable_size(struct mm_struct *mm, unsigned long addr)

          pte = ptep_get_lockless(ptep);
          if (pte_present(pte))
  -               size = pte_leaf_size(pte);
  +               size = pmd_pte_leaf_size(pmd, pte);
          pte_unmap(ptep);

#endif /* CONFIG_HAVE_GUP_FAST */

#10 lore raw

RFC PATCH v2 4/20 mm: Provide mm_struct and address to huge_ptep_get()

In reply to Christophe Leroy

On powerpc 8xx huge_ptep_get() will need to know whether the given ptep is a PTE entry or a PMD entry. This cannot be known with the PMD entry itself because there is no easy way to know it from the content of the entry.

So huge_ptep_get() will need to know either the size of the page or get the pmd.

In order to be consistent with huge_ptep_get_and_clear(), give mm and address to huge_ptep_get().

---
v2: Add missing changes in arch implementations

---
 arch/arm/include/asm/hugetlb-3level.h |  2 +-
 arch/arm64/include/asm/hugetlb.h      |  2 +-
 arch/arm64/mm/hugetlbpage.c           |  2 +-
 arch/riscv/include/asm/hugetlb.h      |  2 +-
 arch/riscv/mm/hugetlbpage.c           |  2 +-
 arch/s390/include/asm/hugetlb.h       |  2 +-
 arch/s390/mm/hugetlbpage.c            |  2 +-
 fs/hugetlbfs/inode.c                  |  2 +-
 fs/proc/task_mmu.c                    |  8 ++---
 fs/userfaultfd.c                      |  2 +-
 include/asm-generic/hugetlb.h         |  2 +-
 include/linux/swapops.h               |  2 +-
 mm/damon/vaddr.c                      |  6 ++--
 mm/gup.c                              |  2 +-
 mm/hmm.c                              |  2 +-
 mm/hugetlb.c                          | 46 +++++++++++++--------------
 mm/memory-failure.c                   |  2 +-
 mm/mempolicy.c                        |  2 +-
 mm/migrate.c                          |  4 +--
 mm/mincore.c                          |  2 +-
 mm/userfaultfd.c                      |  2 +-
 21 files changed, 49 insertions(+), 49 deletions(-)
arch/arm/include/asm/hugetlb-3level.h +1 -1
index a30be5505793..470c45c22e80 100644
@@ -18,7 +18,7 @@
  * (The valid bit is automatically cleared by set_pte_at for PROT_NONE ptes).
  */
 #define __HAVE_ARCH_HUGE_PTEP_GET
-static inline pte_t huge_ptep_get(pte_t *ptep)
+static inline pte_t huge_ptep_get(struct mm_struct *mm, unsigned long addr, pte_t *ptep)
 {
 	pte_t retval = *ptep;
 	if (pte_val(retval))
arch/arm64/include/asm/hugetlb.h +1 -1
index 2ddc33d93b13..1af39a74e791 100644
@@ -46,7 +46,7 @@ extern pte_t huge_ptep_clear_flush(struct vm_area_struct *vma,
 extern void huge_pte_clear(struct mm_struct *mm, unsigned long addr,
 			   pte_t *ptep, unsigned long sz);
 #define __HAVE_ARCH_HUGE_PTEP_GET
-extern pte_t huge_ptep_get(pte_t *ptep);
+extern pte_t huge_ptep_get(struct mm_struct *mm, unsigned long addr, pte_t *ptep);
 
 void __init arm64_hugetlb_cma_reserve(void);
 
arch/arm64/mm/hugetlbpage.c +1 -1
index aa7ded49f8cf..7c6a24d29b3f 100644
@@ -141,7 +141,7 @@ static inline int num_contig_ptes(unsigned long size, size_t *pgsize)
 	return contig_ptes;
 }
 
-pte_t huge_ptep_get(pte_t *ptep)
+pte_t huge_ptep_get(struct mm_struct *mm, unsigned long addr, pte_t *ptep)
 {
 	int ncontig, i;
 	size_t pgsize;
arch/riscv/include/asm/hugetlb.h +1 -1
index 22deb7a2a6ec..6321bca08740 100644
@@ -44,7 +44,7 @@ int huge_ptep_set_access_flags(struct vm_area_struct *vma,
 			       pte_t pte, int dirty);
 
 #define __HAVE_ARCH_HUGE_PTEP_GET
-pte_t huge_ptep_get(pte_t *ptep);
+pte_t huge_ptep_get(struct mm_struct *mm, unsigned long addr, pte_t *ptep);
 
 pte_t arch_make_huge_pte(pte_t entry, unsigned int shift, vm_flags_t flags);
 #define arch_make_huge_pte arch_make_huge_pte
arch/riscv/mm/hugetlbpage.c +1 -1
index dc77a58c6321..56abd6213ca1 100644
@@ -3,7 +3,7 @@
 #include <linux/err.h>
 
 #ifdef CONFIG_RISCV_ISA_SVNAPOT
-pte_t huge_ptep_get(pte_t *ptep)
+pte_t huge_ptep_get(struct mm_struct *mm, unsigned long addr, pte_t *ptep)
 {
 	unsigned long pte_num;
 	int i;
arch/s390/include/asm/hugetlb.h +1 -1
index deb198a61039..caabc01c1812 100644
@@ -19,7 +19,7 @@ void set_huge_pte_at(struct mm_struct *mm, unsigned long addr,
 		     pte_t *ptep, pte_t pte, unsigned long sz);
 void __set_huge_pte_at(struct mm_struct *mm, unsigned long addr,
 		     pte_t *ptep, pte_t pte);
-pte_t huge_ptep_get(pte_t *ptep);
+pte_t huge_ptep_get(struct mm_struct *mm, unsigned long addr, pte_t *ptep);
 pte_t huge_ptep_get_and_clear(struct mm_struct *mm,
 			      unsigned long addr, pte_t *ptep);
 
arch/s390/mm/hugetlbpage.c +1 -1
index dc3db86e13ff..ee7da593f36c 100644
@@ -169,7 +169,7 @@ void set_huge_pte_at(struct mm_struct *mm, unsigned long addr,
 	__set_huge_pte_at(mm, addr, ptep, pte);
 }
 
-pte_t huge_ptep_get(pte_t *ptep)
+pte_t huge_ptep_get(struct mm_struct *mm, unsigned long addr, pte_t *ptep)
 {
 	return __rste_to_pte(pte_val(*ptep));
 }
fs/hugetlbfs/inode.c +1 -1
index 6502c7e776d1..ec3ec87d29e7 100644
@@ -425,7 +425,7 @@ static bool hugetlb_vma_maps_page(struct vm_area_struct *vma,
 	if (!ptep)
 		return false;
 
-	pte = huge_ptep_get(ptep);
+	pte = huge_ptep_get(vma->vm_mm, addr, ptep);
 	if (huge_pte_none(pte) || !pte_present(pte))
 		return false;
 
fs/proc/task_mmu.c +4 -4
index 102f48668c35..332ade5ae788 100644
@@ -1572,7 +1572,7 @@ static int pagemap_hugetlb_range(pte_t *ptep, unsigned long hmask,
 	if (vma->vm_flags & VM_SOFTDIRTY)
 		flags |= PM_SOFT_DIRTY;
 
-	pte = huge_ptep_get(ptep);
+	pte = huge_ptep_get(walk->mm, addr, ptep);
 	if (pte_present(pte)) {
 		struct page *page = pte_page(pte);
 
@@ -2260,7 +2260,7 @@ static int pagemap_scan_hugetlb_entry(pte_t *ptep, unsigned long hmask,
 	if (~p->arg.flags & PM_SCAN_WP_MATCHING) {
 		/* Go the short route when not write-protecting pages. */
 
-		pte = huge_ptep_get(ptep);
+		pte = huge_ptep_get(walk->mm, start, ptep);
 		categories = p->cur_vma_category | pagemap_hugetlb_category(pte);
 
 		if (!pagemap_scan_is_interesting_page(categories, p))
@@ -2272,7 +2272,7 @@ static int pagemap_scan_hugetlb_entry(pte_t *ptep, unsigned long hmask,
 	i_mmap_lock_write(vma->vm_file->f_mapping);
 	ptl = huge_pte_lock(hstate_vma(vma), vma->vm_mm, ptep);
 
-	pte = huge_ptep_get(ptep);
+	pte = huge_ptep_get(walk->mm, start, ptep);
 	categories = p->cur_vma_category | pagemap_hugetlb_category(pte);
 
 	if (!pagemap_scan_is_interesting_page(categories, p))
@@ -2667,7 +2667,7 @@ static int gather_pte_stats(pmd_t *pmd, unsigned long addr,
 static int gather_hugetlb_stats(pte_t *pte, unsigned long hmask,
 		unsigned long addr, unsigned long end, struct mm_walk *walk)
 {
-	pte_t huge_pte = huge_ptep_get(pte);
+	pte_t huge_pte = huge_ptep_get(walk->mm, addr, pte);
 	struct numa_maps *md;
 	struct page *page;
 
fs/userfaultfd.c +1 -1
index 292f5fd50104..fa58e0b2820f 100644
@@ -256,7 +256,7 @@ static inline bool userfaultfd_huge_must_wait(struct userfaultfd_ctx *ctx,
 		goto out;
 
 	ret = false;
-	pte = huge_ptep_get(ptep);
+	pte = huge_ptep_get(vma->vm_mm, vmf->address, ptep);
 
 	/*
 	 * Lockless access: we're in a wait_event so it's ok if it
include/asm-generic/hugetlb.h +1 -1
index 6dcf4d576970..594d5905f615 100644
@@ -144,7 +144,7 @@ static inline int huge_ptep_set_access_flags(struct vm_area_struct *vma,
 #endif
 
 #ifndef __HAVE_ARCH_HUGE_PTEP_GET
-static inline pte_t huge_ptep_get(pte_t *ptep)
+static inline pte_t huge_ptep_get(struct mm_struct *mm, unsigned long addr, pte_t *ptep)
 {
 	return ptep_get(ptep);
 }
include/linux/swapops.h +1 -1
index a5c560a2f8c2..44a9f786ee41 100644
@@ -334,7 +334,7 @@ static inline bool is_migration_entry_dirty(swp_entry_t entry)
 
 extern void migration_entry_wait(struct mm_struct *mm, pmd_t *pmd,
 					unsigned long address);
-extern void migration_entry_wait_huge(struct vm_area_struct *vma, pte_t *pte);
+extern void migration_entry_wait_huge(struct vm_area_struct *vma, unsigned long addr, pte_t *pte);
 #else  /* CONFIG_MIGRATION */
 static inline swp_entry_t make_readable_migration_entry(pgoff_t offset)
 {
mm/damon/vaddr.c +3 -3
index 381559e4a1fa..58829baf8b5d 100644
@@ -339,7 +339,7 @@ static void damon_hugetlb_mkold(pte_t *pte, struct mm_struct *mm,
 				struct vm_area_struct *vma, unsigned long addr)
 {
 	bool referenced = false;
-	pte_t entry = huge_ptep_get(pte);
+	pte_t entry = huge_ptep_get(mm, addr, pte);
 	struct folio *folio = pfn_folio(pte_pfn(entry));
 	unsigned long psize = huge_page_size(hstate_vma(vma));
 
@@ -373,7 +373,7 @@ static int damon_mkold_hugetlb_entry(pte_t *pte, unsigned long hmask,
 	pte_t entry;
 
 	ptl = huge_pte_lock(h, walk->mm, pte);
-	entry = huge_ptep_get(pte);
+	entry = huge_ptep_get(walk->mm, addr, pte);
 	if (!pte_present(entry))
 		goto out;
 
@@ -509,7 +509,7 @@ static int damon_young_hugetlb_entry(pte_t *pte, unsigned long hmask,
 	pte_t entry;
 
 	ptl = huge_pte_lock(h, walk->mm, pte);
-	entry = huge_ptep_get(pte);
+	entry = huge_ptep_get(walk->mm, addr, pte);
 	if (!pte_present(entry))
 		goto out;
 
mm/gup.c +1 -1
index 1611e73b1121..86b5105b82a1 100644
@@ -2812,7 +2812,7 @@ static int gup_hugepte(pte_t *ptep, unsigned long sz, unsigned long addr,
 	if (pte_end < end)
 		end = pte_end;
 
-	pte = huge_ptep_get(ptep);
+	pte = huge_ptep_get(NULL, addr, ptep);
 
 	if (!pte_access_permitted(pte, flags & FOLL_WRITE))
 		return 0;
mm/hmm.c +1 -1
index 277ddcab4947..91a0b57fcb2e 100644
@@ -485,7 +485,7 @@ static int hmm_vma_walk_hugetlb_entry(pte_t *pte, unsigned long hmask,
 	pte_t entry;
 
 	ptl = huge_pte_lock(hstate_vma(vma), walk->mm, pte);
-	entry = huge_ptep_get(pte);
+	entry = huge_ptep_get(walk->mm, addr, pte);
 
 	i = (start - range->start) >> PAGE_SHIFT;
 	pfn_req_flags = range->hmm_pfns[i];
mm/hugetlb.c +23 -23

181 lines not on this page · raw message

mm/memory-failure.c +1 -1
index 9e62a00b46dd..629db978fca5 100644
@@ -832,7 +832,7 @@ static int hwpoison_hugetlb_range(pte_t *ptep, unsigned long hmask,
 			    struct mm_walk *walk)
 {
 	struct hwpoison_walk *hwp = walk->private;
-	pte_t pte = huge_ptep_get(ptep);
+	pte_t pte = huge_ptep_get(walk->mm, addr, ptep);
 	struct hstate *h = hstate_vma(walk->vma);
 
 	return check_hwpoisoned_entry(pte, addr, huge_page_shift(h),
mm/mempolicy.c +1 -1
index 0fe77738d971..50a79700f496 100644
@@ -624,7 +624,7 @@ static int queue_folios_hugetlb(pte_t *pte, unsigned long hmask,
 	pte_t entry;
 
 	ptl = huge_pte_lock(hstate_vma(walk->vma), walk->mm, pte);
-	entry = huge_ptep_get(pte);
+	entry = huge_ptep_get(walk->mm, addr, pte);
 	if (!pte_present(entry)) {
 		if (unlikely(is_hugetlb_entry_migration(entry)))
 			qp->nr_failed++;
mm/migrate.c +2 -2
index 73a052a382f1..87f7aedb8ee2 100644
@@ -338,14 +338,14 @@ void migration_entry_wait(struct mm_struct *mm, pmd_t *pmd,
  *
  * This function will release the vma lock before returning.
  */
-void migration_entry_wait_huge(struct vm_area_struct *vma, pte_t *ptep)
+void migration_entry_wait_huge(struct vm_area_struct *vma, unsigned long addr, pte_t *ptep)
 {
 	spinlock_t *ptl = huge_pte_lockptr(hstate_vma(vma), vma->vm_mm, ptep);
 	pte_t pte;
 
 	hugetlb_vma_assert_locked(vma);
 	spin_lock(ptl);
-	pte = huge_ptep_get(ptep);
+	pte = huge_ptep_get(vma->vm_mm, addr, ptep);
 
 	if (unlikely(!is_hugetlb_entry_migration(pte))) {
 		spin_unlock(ptl);
mm/mincore.c +1 -1
index dad3622cc963..b5735a4aaa7d 100644
@@ -33,7 +33,7 @@ static int mincore_hugetlb(pte_t *pte, unsigned long hmask, unsigned long addr,
 	 * Hugepages under user process are always in RAM and never
 	 * swapped out, but theoretically it needs to be checked.
 	 */
-	present = pte && !huge_pte_none_mostly(huge_ptep_get(pte));
+	present = pte && !huge_pte_none_mostly(huge_ptep_get(walk->mm, addr, pte));
 	for (; addr != end; vec++, addr += PAGE_SIZE)
 		*vec = present;
 	walk->private = vec;
mm/userfaultfd.c +1 -1
index 0f129d5c5aa2..87526cf18830 100644
@@ -555,7 +555,7 @@ static __always_inline ssize_t mfill_atomic_hugetlb(
 		}
 
 		if (!uffd_flags_mode_is(flags, MFILL_ATOMIC_CONTINUE) &&
-		    !huge_pte_none_mostly(huge_ptep_get(dst_pte))) {
+		    !huge_pte_none_mostly(huge_ptep_get(dst_mm, dst_addr, dst_pte))) {
 			err = -EEXIST;
 			hugetlb_vma_unlock_read(dst_vma);
 			mutex_unlock(&hugetlb_fault_mutex_table[hash]);
Signature · 1 line
2.44.0
#11 lore raw

Re: [RFC PATCH v2 04/20] mm: Provide mm_struct and address to huge_ptep_get()

kernel test robot noticed the following build errors:

Hi Christophe,

[This is a private test report for your RFC patch.] kernel test robot noticed the following build errors:

[auto build test ERROR on powerpc/next]
[also build test ERROR on powerpc/fixes arm64/for-next/core linus/master v6.9] [cannot apply to akpm-mm/mm-everything next-20240517]
[If your patch is applied to the wrong git tree, kindly drop us a note. And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch#_base_tree_information]

url:    https://github.com/intel-lab-lkp/linux/commits/Christophe-Leroy/mm-Provide-pagesize-to-pmd_populate/20240518-030701
base:   https://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux.git next
patch link:    https://lore.kernel.org/r/52ef59b206e8082a173965dee11712c9394f2e83.1715971869.git.christophe.leroy%40csgroup.eu
patch subject: [RFC PATCH v2 04/20] mm: Provide mm_struct and address to huge_ptep_get()
config: s390-defconfig (https://download.01.org/0day-ci/archive/20240518/[email protected]/config)
compiler: clang version 19.0.0git (https://github.com/llvm/llvm-project fa9b1be45088dce1e4b602d451f118128b94237b)
reproduce (this is a W=1 build): (https://download.01.org/0day-ci/archive/20240518/[email protected]/reproduce)

If you fix the issue in a separate patch/commit (i.e. not just a new version of the same patch/commit), kindly add following tags
| Reported-by: kernel test robot <[email protected]>
| Closes: https://lore.kernel.org/oe-kbuild-all/[email protected]/

All errors (new ones prefixed by >>):

In file included from fs/bcachefs/fs-io.c:4:
In file included from fs/bcachefs/bcachefs.h:188:
In file included from include/linux/bio.h:10:
In file included from include/linux/blk_types.h:10:
In file included from include/linux/bvec.h:10:
In file included from include/linux/highmem.h:10:
In file included from include/linux/mm.h:2208:
include/linux/vmstat.h:508:43: warning: arithmetic between different enumeration types ('enum zone_stat_item' and 'enum numa_stat_item') [-Wenum-enum-conversion]

     508 |         return vmstat_text[NR_VM_ZONE_STAT_ITEMS +
         |                            ~~~~~~~~~~~~~~~~~~~~~ ^
     509 |                            item];
         |                            ~~~~
   include/linux/vmstat.h:515:43: warning: arithmetic between different enumeration types ('enum zone_stat_item' and 'enum numa_stat_item') [-Wenum-enum-conversion]
     515 |         return vmstat_text[NR_VM_ZONE_STAT_ITEMS +
         |                            ~~~~~~~~~~~~~~~~~~~~~ ^
     516 |                            NR_VM_NUMA_EVENT_ITEMS +
         |                            ~~~~~~~~~~~~~~~~~~~~~~
   include/linux/vmstat.h:522:36: warning: arithmetic between different enumeration types ('enum node_stat_item' and 'enum lru_list') [-Wenum-enum-conversion]
     522 |         return node_stat_name(NR_LRU_BASE + lru) + 3; // skip "nr_"
         |                               ~~~~~~~~~~~ ^ ~~~
   include/linux/vmstat.h:527:43: warning: arithmetic between different enumeration types ('enum zone_stat_item' and 'enum numa_stat_item') [-Wenum-enum-conversion]
     527 |         return vmstat_text[NR_VM_ZONE_STAT_ITEMS +
         |                            ~~~~~~~~~~~~~~~~~~~~~ ^
     528 |                            NR_VM_NUMA_EVENT_ITEMS +
         |                            ~~~~~~~~~~~~~~~~~~~~~~
   include/linux/vmstat.h:536:43: warning: arithmetic between different enumeration types ('enum zone_stat_item' and 'enum numa_stat_item') [-Wenum-enum-conversion]
     536 |         return vmstat_text[NR_VM_ZONE_STAT_ITEMS +
         |                            ~~~~~~~~~~~~~~~~~~~~~ ^
     537 |                            NR_VM_NUMA_EVENT_ITEMS +
         |                            ~~~~~~~~~~~~~~~~~~~~~~
   In file included from fs/bcachefs/fs-io.c:29:
   In file included from include/linux/migrate.h:8:
   In file included from include/linux/hugetlb.h:851:
>> arch/s390/include/asm/hugetlb.h:67:44: error: too few arguments to function call, expected 3, have 1
      67 |         int changed = !pte_same(huge_ptep_get(ptep), pte);
         |                                 ~~~~~~~~~~~~~     ^
   arch/s390/include/asm/hugetlb.h:22:7: note: 'huge_ptep_get' declared here
      22 | pte_t huge_ptep_get(struct mm_struct *mm, unsigned long addr, pte_t *ptep);
         |       ^             ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~

5 warnings and 1 error generated.
--
In file included from kernel/fork.c:30:
In file included from include/linux/module.h:19:
In file included from include/linux/elf.h:6:
In file included from arch/s390/include/asm/elf.h:173:
In file included from arch/s390/include/asm/mmu_context.h:11:
In file included from arch/s390/include/asm/pgalloc.h:18:
In file included from include/linux/mm.h:2208:
include/linux/vmstat.h:508:43: warning: arithmetic between different enumeration types ('enum zone_stat_item' and 'enum numa_stat_item') [-Wenum-enum-conversion]

     508 |         return vmstat_text[NR_VM_ZONE_STAT_ITEMS +
         |                            ~~~~~~~~~~~~~~~~~~~~~ ^
     509 |                            item];
         |                            ~~~~
   include/linux/vmstat.h:515:43: warning: arithmetic between different enumeration types ('enum zone_stat_item' and 'enum numa_stat_item') [-Wenum-enum-conversion]
     515 |         return vmstat_text[NR_VM_ZONE_STAT_ITEMS +
         |                            ~~~~~~~~~~~~~~~~~~~~~ ^
     516 |                            NR_VM_NUMA_EVENT_ITEMS +
         |                            ~~~~~~~~~~~~~~~~~~~~~~
   include/linux/vmstat.h:522:36: warning: arithmetic between different enumeration types ('enum node_stat_item' and 'enum lru_list') [-Wenum-enum-conversion]
     522 |         return node_stat_name(NR_LRU_BASE + lru) + 3; // skip "nr_"
         |                               ~~~~~~~~~~~ ^ ~~~
   include/linux/vmstat.h:527:43: warning: arithmetic between different enumeration types ('enum zone_stat_item' and 'enum numa_stat_item') [-Wenum-enum-conversion]
     527 |         return vmstat_text[NR_VM_ZONE_STAT_ITEMS +
         |                            ~~~~~~~~~~~~~~~~~~~~~ ^
     528 |                            NR_VM_NUMA_EVENT_ITEMS +
         |                            ~~~~~~~~~~~~~~~~~~~~~~
   include/linux/vmstat.h:536:43: warning: arithmetic between different enumeration types ('enum zone_stat_item' and 'enum numa_stat_item') [-Wenum-enum-conversion]
     536 |         return vmstat_text[NR_VM_ZONE_STAT_ITEMS +
         |                            ~~~~~~~~~~~~~~~~~~~~~ ^
     537 |                            NR_VM_NUMA_EVENT_ITEMS +
         |                            ~~~~~~~~~~~~~~~~~~~~~~
   In file included from kernel/fork.c:46:
   include/linux/mm_inline.h:47:41: warning: arithmetic between different enumeration types ('enum node_stat_item' and 'enum lru_list') [-Wenum-enum-conversion]
      47 |         __mod_lruvec_state(lruvec, NR_LRU_BASE + lru, nr_pages);
         |                                    ~~~~~~~~~~~ ^ ~~~
   include/linux/mm_inline.h:49:22: warning: arithmetic between different enumeration types ('enum zone_stat_item' and 'enum lru_list') [-Wenum-enum-conversion]
      49 |                                 NR_ZONE_LRU_BASE + lru, nr_pages);
         |                                 ~~~~~~~~~~~~~~~~ ^ ~~~
   In file included from kernel/fork.c:52:
   In file included from include/linux/hugetlb.h:851:
>> arch/s390/include/asm/hugetlb.h:67:44: error: too few arguments to function call, expected 3, have 1
      67 |         int changed = !pte_same(huge_ptep_get(ptep), pte);
         |                                 ~~~~~~~~~~~~~     ^
   arch/s390/include/asm/hugetlb.h:22:7: note: 'huge_ptep_get' declared here
      22 | pte_t huge_ptep_get(struct mm_struct *mm, unsigned long addr, pte_t *ptep);
         |       ^             ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
   In file included from kernel/fork.c:79:
   In file included from include/linux/tty.h:11:
   In file included from include/linux/tty_port.h:5:
   In file included from include/linux/kfifo.h:42:
   In file included from include/linux/scatterlist.h:9:
   In file included from arch/s390/include/asm/io.h:78:
   include/asm-generic/io.h:547:31: warning: performing pointer arithmetic on a null pointer has undefined behavior [-Wnull-pointer-arithmetic]
     547 |         val = __raw_readb(PCI_IOBASE + addr);
         |                           ~~~~~~~~~~ ^
   include/asm-generic/io.h:560:61: warning: performing pointer arithmetic on a null pointer has undefined behavior [-Wnull-pointer-arithmetic]
     560 |         val = __le16_to_cpu((__le16 __force)__raw_readw(PCI_IOBASE + addr));
         |                                                         ~~~~~~~~~~ ^
   include/uapi/linux/byteorder/big_endian.h:37:59: note: expanded from macro '__le16_to_cpu'
      37 | #define __le16_to_cpu(x) __swab16((__force __u16)(__le16)(x))
         |                                                           ^
   include/uapi/linux/swab.h:102:54: note: expanded from macro '__swab16'
     102 | #define __swab16(x) (__u16)__builtin_bswap16((__u16)(x))
         |                                                      ^
   In file included from kernel/fork.c:79:
   In file included from include/linux/tty.h:11:
   In file included from include/linux/tty_port.h:5:
   In file included from include/linux/kfifo.h:42:
   In file included from include/linux/scatterlist.h:9:
   In file included from arch/s390/include/asm/io.h:78:
   include/asm-generic/io.h:573:61: warning: performing pointer arithmetic on a null pointer has undefined behavior [-Wnull-pointer-arithmetic]
     573 |         val = __le32_to_cpu((__le32 __force)__raw_readl(PCI_IOBASE + addr));
         |                                                         ~~~~~~~~~~ ^
   include/uapi/linux/byteorder/big_endian.h:35:59: note: expanded from macro '__le32_to_cpu'
      35 | #define __le32_to_cpu(x) __swab32((__force __u32)(__le32)(x))
         |                                                           ^
   include/uapi/linux/swab.h:115:54: note: expanded from macro '__swab32'
     115 | #define __swab32(x) (__u32)__builtin_bswap32((__u32)(x))
         |                                                      ^
   In file included from kernel/fork.c:79:
   In file included from include/linux/tty.h:11:
   In file included from include/linux/tty_port.h:5:
   In file included from include/linux/kfifo.h:42:
   In file included from include/linux/scatterlist.h:9:
   In file included from arch/s390/include/asm/io.h:78:
   include/asm-generic/io.h:584:33: warning: performing pointer arithmetic on a null pointer has undefined behavior [-Wnull-pointer-arithmetic]
     584 |         __raw_writeb(value, PCI_IOBASE + addr);
         |                             ~~~~~~~~~~ ^
   include/asm-generic/io.h:594:59: warning: performing pointer arithmetic on a null pointer has undefined behavior [-Wnull-pointer-arithmetic]
     594 |         __raw_writew((u16 __force)cpu_to_le16(value), PCI_IOBASE + addr);
         |                                                       ~~~~~~~~~~ ^
   include/asm-generic/io.h:604:59: warning: performing pointer arithmetic on a null pointer has undefined behavior [-Wnull-pointer-arithmetic]
     604 |         __raw_writel((u32 __force)cpu_to_le32(value), PCI_IOBASE + addr);
         |                                                       ~~~~~~~~~~ ^
   include/asm-generic/io.h:692:20: warning: performing pointer arithmetic on a null pointer has undefined behavior [-Wnull-pointer-arithmetic]
     692 |         readsb(PCI_IOBASE + addr, buffer, count);
         |                ~~~~~~~~~~ ^
   include/asm-generic/io.h:700:20: warning: performing pointer arithmetic on a null pointer has undefined behavior [-Wnull-pointer-arithmetic]
     700 |         readsw(PCI_IOBASE + addr, buffer, count);
         |                ~~~~~~~~~~ ^
   include/asm-generic/io.h:708:20: warning: performing pointer arithmetic on a null pointer has undefined behavior [-Wnull-pointer-arithmetic]
     708 |         readsl(PCI_IOBASE + addr, buffer, count);
         |                ~~~~~~~~~~ ^
   include/asm-generic/io.h:717:21: warning: performing pointer arithmetic on a null pointer has undefined behavior [-Wnull-pointer-arithmetic]
     717 |         writesb(PCI_IOBASE + addr, buffer, count);
         |                 ~~~~~~~~~~ ^
   include/asm-generic/io.h:726:21: warning: performing pointer arithmetic on a null pointer has undefined behavior [-Wnull-pointer-arithmetic]
     726 |         writesw(PCI_IOBASE + addr, buffer, count);
         |                 ~~~~~~~~~~ ^
   include/asm-generic/io.h:735:21: warning: performing pointer arithmetic on a null pointer has undefined behavior [-Wnull-pointer-arithmetic]
     735 |         writesl(PCI_IOBASE + addr, buffer, count);
         |                 ~~~~~~~~~~ ^

19 warnings and 1 error generated.
--
In file included from kernel/sysctl.c:22:
In file included from include/linux/module.h:19:
In file included from include/linux/elf.h:6:
In file included from arch/s390/include/asm/elf.h:173:
In file included from arch/s390/include/asm/mmu_context.h:11:
In file included from arch/s390/include/asm/pgalloc.h:18:
In file included from include/linux/mm.h:2208:
include/linux/vmstat.h:508:43: warning: arithmetic between different enumeration types ('enum zone_stat_item' and 'enum numa_stat_item') [-Wenum-enum-conversion]

     508 |         return vmstat_text[NR_VM_ZONE_STAT_ITEMS +
         |                            ~~~~~~~~~~~~~~~~~~~~~ ^
     509 |                            item];
         |                            ~~~~
   include/linux/vmstat.h:515:43: warning: arithmetic between different enumeration types ('enum zone_stat_item' and 'enum numa_stat_item') [-Wenum-enum-conversion]
     515 |         return vmstat_text[NR_VM_ZONE_STAT_ITEMS +
         |                            ~~~~~~~~~~~~~~~~~~~~~ ^
     516 |                            NR_VM_NUMA_EVENT_ITEMS +
         |                            ~~~~~~~~~~~~~~~~~~~~~~
   include/linux/vmstat.h:522:36: warning: arithmetic between different enumeration types ('enum node_stat_item' and 'enum lru_list') [-Wenum-enum-conversion]
     522 |         return node_stat_name(NR_LRU_BASE + lru) + 3; // skip "nr_"
         |                               ~~~~~~~~~~~ ^ ~~~
   include/linux/vmstat.h:527:43: warning: arithmetic between different enumeration types ('enum zone_stat_item' and 'enum numa_stat_item') [-Wenum-enum-conversion]
     527 |         return vmstat_text[NR_VM_ZONE_STAT_ITEMS +
         |                            ~~~~~~~~~~~~~~~~~~~~~ ^
     528 |                            NR_VM_NUMA_EVENT_ITEMS +
         |                            ~~~~~~~~~~~~~~~~~~~~~~
   include/linux/vmstat.h:536:43: warning: arithmetic between different enumeration types ('enum zone_stat_item' and 'enum numa_stat_item') [-Wenum-enum-conversion]
     536 |         return vmstat_text[NR_VM_ZONE_STAT_ITEMS +
         |                            ~~~~~~~~~~~~~~~~~~~~~ ^
     537 |                            NR_VM_NUMA_EVENT_ITEMS +
         |                            ~~~~~~~~~~~~~~~~~~~~~~
   In file included from kernel/sysctl.c:35:
   In file included from include/linux/filter.h:12:
   In file included from include/linux/skbuff.h:28:
   In file included from include/linux/dma-mapping.h:11:
   In file included from include/linux/scatterlist.h:9:
   In file included from arch/s390/include/asm/io.h:78:
   include/asm-generic/io.h:547:31: warning: performing pointer arithmetic on a null pointer has undefined behavior [-Wnull-pointer-arithmetic]
     547 |         val = __raw_readb(PCI_IOBASE + addr);
         |                           ~~~~~~~~~~ ^
   include/asm-generic/io.h:560:61: warning: performing pointer arithmetic on a null pointer has undefined behavior [-Wnull-pointer-arithmetic]
     560 |         val = __le16_to_cpu((__le16 __force)__raw_readw(PCI_IOBASE + addr));
         |                                                         ~~~~~~~~~~ ^
   include/uapi/linux/byteorder/big_endian.h:37:59: note: expanded from macro '__le16_to_cpu'
      37 | #define __le16_to_cpu(x) __swab16((__force __u16)(__le16)(x))
         |                                                           ^
   include/uapi/linux/swab.h:102:54: note: expanded from macro '__swab16'
     102 | #define __swab16(x) (__u16)__builtin_bswap16((__u16)(x))
         |                                                      ^
   In file included from kernel/sysctl.c:35:
   In file included from include/linux/filter.h:12:
   In file included from include/linux/skbuff.h:28:
   In file included from include/linux/dma-mapping.h:11:
   In file included from include/linux/scatterlist.h:9:
   In file included from arch/s390/include/asm/io.h:78:
   include/asm-generic/io.h:573:61: warning: performing pointer arithmetic on a null pointer has undefined behavior [-Wnull-pointer-arithmetic]
     573 |         val = __le32_to_cpu((__le32 __force)__raw_readl(PCI_IOBASE + addr));
         |                                                         ~~~~~~~~~~ ^
   include/uapi/linux/byteorder/big_endian.h:35:59: note: expanded from macro '__le32_to_cpu'
      35 | #define __le32_to_cpu(x) __swab32((__force __u32)(__le32)(x))
         |                                                           ^
   include/uapi/linux/swab.h:115:54: note: expanded from macro '__swab32'
     115 | #define __swab32(x) (__u32)__builtin_bswap32((__u32)(x))
         |                                                      ^
   In file included from kernel/sysctl.c:35:
   In file included from include/linux/filter.h:12:
   In file included from include/linux/skbuff.h:28:
   In file included from include/linux/dma-mapping.h:11:
   In file included from include/linux/scatterlist.h:9:
   In file included from arch/s390/include/asm/io.h:78:
   include/asm-generic/io.h:584:33: warning: performing pointer arithmetic on a null pointer has undefined behavior [-Wnull-pointer-arithmetic]
     584 |         __raw_writeb(value, PCI_IOBASE + addr);
         |                             ~~~~~~~~~~ ^
   include/asm-generic/io.h:594:59: warning: performing pointer arithmetic on a null pointer has undefined behavior [-Wnull-pointer-arithmetic]
     594 |         __raw_writew((u16 __force)cpu_to_le16(value), PCI_IOBASE + addr);
         |                                                       ~~~~~~~~~~ ^
   include/asm-generic/io.h:604:59: warning: performing pointer arithmetic on a null pointer has undefined behavior [-Wnull-pointer-arithmetic]
     604 |         __raw_writel((u32 __force)cpu_to_le32(value), PCI_IOBASE + addr);
         |                                                       ~~~~~~~~~~ ^
   include/asm-generic/io.h:692:20: warning: performing pointer arithmetic on a null pointer has undefined behavior [-Wnull-pointer-arithmetic]
     692 |         readsb(PCI_IOBASE + addr, buffer, count);
         |                ~~~~~~~~~~ ^
   include/asm-generic/io.h:700:20: warning: performing pointer arithmetic on a null pointer has undefined behavior [-Wnull-pointer-arithmetic]
     700 |         readsw(PCI_IOBASE + addr, buffer, count);
         |                ~~~~~~~~~~ ^
   include/asm-generic/io.h:708:20: warning: performing pointer arithmetic on a null pointer has undefined behavior [-Wnull-pointer-arithmetic]
     708 |         readsl(PCI_IOBASE + addr, buffer, count);
         |                ~~~~~~~~~~ ^
   include/asm-generic/io.h:717:21: warning: performing pointer arithmetic on a null pointer has undefined behavior [-Wnull-pointer-arithmetic]
     717 |         writesb(PCI_IOBASE + addr, buffer, count);
         |                 ~~~~~~~~~~ ^
   include/asm-generic/io.h:726:21: warning: performing pointer arithmetic on a null pointer has undefined behavior [-Wnull-pointer-arithmetic]
     726 |         writesw(PCI_IOBASE + addr, buffer, count);
         |                 ~~~~~~~~~~ ^
   include/asm-generic/io.h:735:21: warning: performing pointer arithmetic on a null pointer has undefined behavior [-Wnull-pointer-arithmetic]
     735 |         writesl(PCI_IOBASE + addr, buffer, count);
         |                 ~~~~~~~~~~ ^
   In file included from kernel/sysctl.c:45:
   In file included from include/linux/hugetlb.h:851:
>> arch/s390/include/asm/hugetlb.h:67:44: error: too few arguments to function call, expected 3, have 1
      67 |         int changed = !pte_same(huge_ptep_get(ptep), pte);
         |                                 ~~~~~~~~~~~~~     ^
   arch/s390/include/asm/hugetlb.h:22:7: note: 'huge_ptep_get' declared here
      22 | pte_t huge_ptep_get(struct mm_struct *mm, unsigned long addr, pte_t *ptep);
         |       ^             ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
   In file included from kernel/sysctl.c:53:
   In file included from include/linux/nfs_fs.h:31:
   In file included from include/linux/sunrpc/auth.h:13:
   In file included from include/linux/sunrpc/sched.h:19:
   include/linux/sunrpc/xdr.h:782:46: warning: result of comparison of constant 4611686018427387903 with expression of type '__u32' (aka 'unsigned int') is always false [-Wtautological-constant-out-of-range-compare]
     782 |         if (U32_MAX >= SIZE_MAX / sizeof(*p) && len > SIZE_MAX / sizeof(*p))
         |                                                 ~~~ ^ ~~~~~~~~~~~~~~~~~~~~~

18 warnings and 1 error generated.
--
In file included from kernel/kexec_core.c:9:
In file included from include/linux/btf.h:8:
In file included from include/linux/bpfptr.h:6:
In file included from include/linux/mm.h:2208:
include/linux/vmstat.h:508:43: warning: arithmetic between different enumeration types ('enum zone_stat_item' and 'enum numa_stat_item') [-Wenum-enum-conversion]

     508 |         return vmstat_text[NR_VM_ZONE_STAT_ITEMS +
         |                            ~~~~~~~~~~~~~~~~~~~~~ ^
     509 |                            item];
         |                            ~~~~
   include/linux/vmstat.h:515:43: warning: arithmetic between different enumeration types ('enum zone_stat_item' and 'enum numa_stat_item') [-Wenum-enum-conversion]
     515 |         return vmstat_text[NR_VM_ZONE_STAT_ITEMS +
         |                            ~~~~~~~~~~~~~~~~~~~~~ ^
     516 |                            NR_VM_NUMA_EVENT_ITEMS +
         |                            ~~~~~~~~~~~~~~~~~~~~~~
   include/linux/vmstat.h:522:36: warning: arithmetic between different enumeration types ('enum node_stat_item' and 'enum lru_list') [-Wenum-enum-conversion]
     522 |         return node_stat_name(NR_LRU_BASE + lru) + 3; // skip "nr_"
         |                               ~~~~~~~~~~~ ^ ~~~
   include/linux/vmstat.h:527:43: warning: arithmetic between different enumeration types ('enum zone_stat_item' and 'enum numa_stat_item') [-Wenum-enum-conversion]
     527 |         return vmstat_text[NR_VM_ZONE_STAT_ITEMS +
         |                            ~~~~~~~~~~~~~~~~~~~~~ ^
     528 |                            NR_VM_NUMA_EVENT_ITEMS +
         |                            ~~~~~~~~~~~~~~~~~~~~~~
   include/linux/vmstat.h:536:43: warning: arithmetic between different enumeration types ('enum zone_stat_item' and 'enum numa_stat_item') [-Wenum-enum-conversion]
     536 |         return vmstat_text[NR_VM_ZONE_STAT_ITEMS +
         |                            ~~~~~~~~~~~~~~~~~~~~~ ^
     537 |                            NR_VM_NUMA_EVENT_ITEMS +
         |                            ~~~~~~~~~~~~~~~~~~~~~~
   In file included from kernel/kexec_core.c:15:
   In file included from include/linux/kexec.h:20:
   In file included from arch/s390/include/asm/io.h:78:
   include/asm-generic/io.h:547:31: warning: performing pointer arithmetic on a null pointer has undefined behavior [-Wnull-pointer-arithmetic]
     547 |         val = __raw_readb(PCI_IOBASE + addr);
         |                           ~~~~~~~~~~ ^
   include/asm-generic/io.h:560:61: warning: performing pointer arithmetic on a null pointer has undefined behavior [-Wnull-pointer-arithmetic]
     560 |         val = __le16_to_cpu((__le16 __force)__raw_readw(PCI_IOBASE + addr));
         |                                                         ~~~~~~~~~~ ^
   include/uapi/linux/byteorder/big_endian.h:37:59: note: expanded from macro '__le16_to_cpu'
      37 | #define __le16_to_cpu(x) __swab16((__force __u16)(__le16)(x))
         |                                                           ^
   include/uapi/linux/swab.h:102:54: note: expanded from macro '__swab16'
     102 | #define __swab16(x) (__u16)__builtin_bswap16((__u16)(x))
         |                                                      ^
   In file included from kernel/kexec_core.c:15:
   In file included from include/linux/kexec.h:20:
   In file included from arch/s390/include/asm/io.h:78:
   include/asm-generic/io.h:573:61: warning: performing pointer arithmetic on a null pointer has undefined behavior [-Wnull-pointer-arithmetic]
     573 |         val = __le32_to_cpu((__le32 __force)__raw_readl(PCI_IOBASE + addr));
         |                                                         ~~~~~~~~~~ ^
   include/uapi/linux/byteorder/big_endian.h:35:59: note: expanded from macro '__le32_to_cpu'
      35 | #define __le32_to_cpu(x) __swab32((__force __u32)(__le32)(x))
         |                                                           ^
   include/uapi/linux/swab.h:115:54: note: expanded from macro '__swab32'
     115 | #define __swab32(x) (__u32)__builtin_bswap32((__u32)(x))
         |                                                      ^
   In file included from kernel/kexec_core.c:15:
   In file included from include/linux/kexec.h:20:
   In file included from arch/s390/include/asm/io.h:78:
   include/asm-generic/io.h:584:33: warning: performing pointer arithmetic on a null pointer has undefined behavior [-Wnull-pointer-arithmetic]
     584 |         __raw_writeb(value, PCI_IOBASE + addr);
         |                             ~~~~~~~~~~ ^
   include/asm-generic/io.h:594:59: warning: performing pointer arithmetic on a null pointer has undefined behavior [-Wnull-pointer-arithmetic]
     594 |         __raw_writew((u16 __force)cpu_to_le16(value), PCI_IOBASE + addr);
         |                                                       ~~~~~~~~~~ ^
   include/asm-generic/io.h:604:59: warning: performing pointer arithmetic on a null pointer has undefined behavior [-Wnull-pointer-arithmetic]
     604 |         __raw_writel((u32 __force)cpu_to_le32(value), PCI_IOBASE + addr);
         |                                                       ~~~~~~~~~~ ^
   include/asm-generic/io.h:692:20: warning: performing pointer arithmetic on a null pointer has undefined behavior [-Wnull-pointer-arithmetic]
     692 |         readsb(PCI_IOBASE + addr, buffer, count);
         |                ~~~~~~~~~~ ^
   include/asm-generic/io.h:700:20: warning: performing pointer arithmetic on a null pointer has undefined behavior [-Wnull-pointer-arithmetic]
     700 |         readsw(PCI_IOBASE + addr, buffer, count);
         |                ~~~~~~~~~~ ^
   include/asm-generic/io.h:708:20: warning: performing pointer arithmetic on a null pointer has undefined behavior [-Wnull-pointer-arithmetic]
     708 |         readsl(PCI_IOBASE + addr, buffer, count);
         |                ~~~~~~~~~~ ^
   include/asm-generic/io.h:717:21: warning: performing pointer arithmetic on a null pointer has undefined behavior [-Wnull-pointer-arithmetic]
     717 |         writesb(PCI_IOBASE + addr, buffer, count);
         |                 ~~~~~~~~~~ ^
   include/asm-generic/io.h:726:21: warning: performing pointer arithmetic on a null pointer has undefined behavior [-Wnull-pointer-arithmetic]
     726 |         writesw(PCI_IOBASE + addr, buffer, count);
         |                 ~~~~~~~~~~ ^
   include/asm-generic/io.h:735:21: warning: performing pointer arithmetic on a null pointer has undefined behavior [-Wnull-pointer-arithmetic]
     735 |         writesl(PCI_IOBASE + addr, buffer, count);
         |                 ~~~~~~~~~~ ^
   In file included from kernel/kexec_core.c:40:
   In file included from include/linux/hugetlb.h:851:
>> arch/s390/include/asm/hugetlb.h:67:44: error: too few arguments to function call, expected 3, have 1
      67 |         int changed = !pte_same(huge_ptep_get(ptep), pte);
         |                                 ~~~~~~~~~~~~~     ^
   arch/s390/include/asm/hugetlb.h:22:7: note: 'huge_ptep_get' declared here
      22 | pte_t huge_ptep_get(struct mm_struct *mm, unsigned long addr, pte_t *ptep);
         |       ^             ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~

17 warnings and 1 error generated.
..

vim +67 arch/s390/include/asm/hugetlb.h

53492b1de46a75 include/asm-s390/hugetlb.h      Gerald Schaefer    2008-04-30  62  
e509861105a3c1 arch/s390/include/asm/hugetlb.h Martin Schwidefsky 2013-07-23  63  static inline int huge_ptep_set_access_flags(struct vm_area_struct *vma,
e509861105a3c1 arch/s390/include/asm/hugetlb.h Martin Schwidefsky 2013-07-23  64  					     unsigned long addr, pte_t *ptep,
e509861105a3c1 arch/s390/include/asm/hugetlb.h Martin Schwidefsky 2013-07-23  65  					     pte_t pte, int dirty)
53492b1de46a75 include/asm-s390/hugetlb.h      Gerald Schaefer    2008-04-30  66  {
e509861105a3c1 arch/s390/include/asm/hugetlb.h Martin Schwidefsky 2013-07-23 @67  	int changed = !pte_same(huge_ptep_get(ptep), pte);
e509861105a3c1 arch/s390/include/asm/hugetlb.h Martin Schwidefsky 2013-07-23  68  	if (changed) {
e509861105a3c1 arch/s390/include/asm/hugetlb.h Martin Schwidefsky 2013-07-23  69  		huge_ptep_get_and_clear(vma->vm_mm, addr, ptep);
935d4f0c6dc8b3 arch/s390/include/asm/hugetlb.h Ryan Roberts       2023-09-22  70  		__set_huge_pte_at(vma->vm_mm, addr, ptep, pte);
53492b1de46a75 include/asm-s390/hugetlb.h      Gerald Schaefer    2008-04-30  71  	}
e509861105a3c1 arch/s390/include/asm/hugetlb.h Martin Schwidefsky 2013-07-23  72  	return changed;
53492b1de46a75 include/asm-s390/hugetlb.h      Gerald Schaefer    2008-04-30  73  }

53492b1de46a75 include/asm-s390/hugetlb.h Gerald Schaefer 2008-04-30 74

Signature · 2 lines
0-DAY CI Kernel Test Service
https://github.com/intel/lkp-tests/wiki
#12 lore raw

Re: [RFC PATCH v2 04/20] mm: Provide mm_struct and address to huge_ptep_get()

In reply to Christophe Leroy
kernel test robot noticed the following build errors:

Hi Christophe,

[This is a private test report for your RFC patch.] kernel test robot noticed the following build errors:

[auto build test ERROR on powerpc/next]
[also build test ERROR on powerpc/fixes arm64/for-next/core linus/master v6.9] [cannot apply to akpm-mm/mm-everything next-20240517]
[If your patch is applied to the wrong git tree, kindly drop us a note. And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch#_base_tree_information]

url:    https://github.com/intel-lab-lkp/linux/commits/Christophe-Leroy/mm-Provide-pagesize-to-pmd_populate/20240518-030701
base:   https://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux.git next
patch link:    https://lore.kernel.org/r/52ef59b206e8082a173965dee11712c9394f2e83.1715971869.git.christophe.leroy%40csgroup.eu
patch subject: [RFC PATCH v2 04/20] mm: Provide mm_struct and address to huge_ptep_get()
config: loongarch-defconfig (https://download.01.org/0day-ci/archive/20240518/[email protected]/config)
compiler: loongarch64-linux-gcc (GCC) 13.2.0
reproduce (this is a W=1 build): (https://download.01.org/0day-ci/archive/20240518/[email protected]/reproduce)

If you fix the issue in a separate patch/commit (i.e. not just a new version of the same patch/commit), kindly add following tags
| Reported-by: kernel test robot <[email protected]>
| Closes: https://lore.kernel.org/oe-kbuild-all/[email protected]/

All errors (new ones prefixed by >>):

mm/hugetlb.c: In function 'hugetlb_mfill_atomic_pte':

>> mm/hugetlb.c:6692:50: error: 'mm' undeclared (first use in this function); did you mean 'tm'?
    6692 |                 if (!huge_pte_none(huge_ptep_get(mm, dst_addr, dst_pte))) {
         |                                                  ^~
         |                                                  tm

mm/hugetlb.c:6692:50: note: each undeclared identifier is reported only once for each function it appears in

vim +6692 mm/hugetlb.c

6661
6662 /*
6663 * Used by userfaultfd UFFDIO_* ioctls. Based on userfaultfd's mfill_atomic_pte
6664 * with modifications for hugetlb pages.
6665 */
6666 int hugetlb_mfill_atomic_pte(pte_t *dst_pte,

  6667				     struct vm_area_struct *dst_vma,
  6668				     unsigned long dst_addr,
  6669				     unsigned long src_addr,
  6670				     uffd_flags_t flags,
  6671				     struct folio **foliop)
  6672	{
  6673		struct mm_struct *dst_mm = dst_vma->vm_mm;
  6674		bool is_continue = uffd_flags_mode_is(flags, MFILL_ATOMIC_CONTINUE);
  6675		bool wp_enabled = (flags & MFILL_ATOMIC_WP);
  6676		struct hstate *h = hstate_vma(dst_vma);
  6677		struct address_space *mapping = dst_vma->vm_file->f_mapping;
  6678		pgoff_t idx = vma_hugecache_offset(h, dst_vma, dst_addr);
  6679		unsigned long size;
  6680		int vm_shared = dst_vma->vm_flags & VM_SHARED;
  6681		pte_t _dst_pte;
  6682		spinlock_t *ptl;
  6683		int ret = -ENOMEM;
  6684		struct folio *folio;
  6685		int writable;
  6686		bool folio_in_pagecache = false;
  6687	
  6688		if (uffd_flags_mode_is(flags, MFILL_ATOMIC_POISON)) {
  6689			ptl = huge_pte_lock(h, dst_mm, dst_pte);
  6690	
  6691			/* Don't overwrite any existing PTEs (even markers) */
> 6692			if (!huge_pte_none(huge_ptep_get(mm, dst_addr, dst_pte))) {

6693 spin_unlock(ptl);
6694 return -EEXIST;
6695 }
6696
6697 _dst_pte = make_pte_marker(PTE_MARKER_POISONED);
6698 set_huge_pte_at(dst_mm, dst_addr, dst_pte, _dst_pte,
6699 huge_page_size(h));
6700
6701 /* No need to invalidate - it was non-present before */
6702 update_mmu_cache(dst_vma, dst_addr, dst_pte);
6703
6704 spin_unlock(ptl);
6705 return 0;
6706 }
6707
6708 if (is_continue) {
6709 ret = -EFAULT;
6710 folio = filemap_lock_hugetlb_folio(h, mapping, idx);
6711 if (IS_ERR(folio))
6712 goto out;
6713 folio_in_pagecache = true;
6714 } else if (!*foliop) {
6715 /* If a folio already exists, then it's UFFDIO_COPY for
6716 * a non-missing case. Return -EEXIST.
6717 */
6718 if (vm_shared &&
6719 hugetlbfs_pagecache_present(h, dst_vma, dst_addr)) {
6720 ret = -EEXIST;
6721 goto out;
6722 }
6723
6724 folio = alloc_hugetlb_folio(dst_vma, dst_addr, 0);
6725 if (IS_ERR(folio)) {
6726 ret = -ENOMEM;
6727 goto out;
6728 }
6729
6730 ret = copy_folio_from_user(folio, (const void __user *) src_addr,
6731 false);
6732
6733 /* fallback to copy_from_user outside mmap_lock */
6734 if (unlikely(ret)) {
6735 ret = -ENOENT;
6736 /* Free the allocated folio which may have
6737 * consumed a reservation.
6738 */
6739 restore_reserve_on_error(h, dst_vma, dst_addr, folio);
6740 folio_put(folio);
6741
6742 /* Allocate a temporary folio to hold the copied
6743 * contents.
6744 */
6745 folio = alloc_hugetlb_folio_vma(h, dst_vma, dst_addr);
6746 if (!folio) {
6747 ret = -ENOMEM;
6748 goto out;
6749 }
6750 *foliop = folio;
6751 /* Set the outparam foliop and return to the caller to
6752 * copy the contents outside the lock. Don't free the
6753 * folio.
6754 */
6755 goto out;
6756 }
6757 } else {
6758 if (vm_shared &&
6759 hugetlbfs_pagecache_present(h, dst_vma, dst_addr)) {
6760 folio_put(*foliop);
6761 ret = -EEXIST;
6762 *foliop = NULL;
6763 goto out;
6764 }
6765
6766 folio = alloc_hugetlb_folio(dst_vma, dst_addr, 0);
6767 if (IS_ERR(folio)) {
6768 folio_put(*foliop);
6769 ret = -ENOMEM;
6770 *foliop = NULL;
6771 goto out;
6772 }
6773 ret = copy_user_large_folio(folio, *foliop, dst_addr, dst_vma);
6774 folio_put(*foliop);
6775 *foliop = NULL;
6776 if (ret) {
6777 folio_put(folio);
6778 goto out;
6779 }
6780 }
6781
6782 /*
6783 * If we just allocated a new page, we need a memory barrier to ensure
6784 * that preceding stores to the page become visible before the
6785 * set_pte_at() write. The memory barrier inside __folio_mark_uptodate
6786 * is what we need.
6787 *
6788 * In the case where we have not allocated a new page (is_continue),
6789 * the page must already be uptodate. UFFDIO_CONTINUE already includes
6790 * an earlier smp_wmb() to ensure that prior stores will be visible
6791 * before the set_pte_at() write.
6792 */
6793 if (!is_continue)
6794 __folio_mark_uptodate(folio);
6795 else
6796 WARN_ON_ONCE(!folio_test_uptodate(folio));
6797
6798 /* Add shared, newly allocated pages to the page cache. */
6799 if (vm_shared && !is_continue) {
6800 size = i_size_read(mapping->host) >> huge_page_shift(h);
6801 ret = -EFAULT;
6802 if (idx >= size)
6803 goto out_release_nounlock;
6804
6805 /*
6806 * Serialization between remove_inode_hugepages() and
6807 * hugetlb_add_to_page_cache() below happens through the
6808 * hugetlb_fault_mutex_table that here must be hold by
6809 * the caller.
6810 */
6811 ret = hugetlb_add_to_page_cache(folio, mapping, idx);
6812 if (ret)
6813 goto out_release_nounlock;
6814 folio_in_pagecache = true;
6815 }
6816
6817 ptl = huge_pte_lock(h, dst_mm, dst_pte);
6818
6819 ret = -EIO;
6820 if (folio_test_hwpoison(folio))
6821 goto out_release_unlock;
6822
6823 /*
6824 * We allow to overwrite a pte marker: consider when both MISSING|WP
6825 * registered, we firstly wr-protect a none pte which has no page cache
6826 * page backing it, then access the page.
6827 */
6828 ret = -EEXIST;
6829 if (!huge_pte_none_mostly(huge_ptep_get(mm, dst_addr, dst_pte)))
6830 goto out_release_unlock;
6831
6832 if (folio_in_pagecache)
6833 hugetlb_add_file_rmap(folio);
6834 else
6835 hugetlb_add_new_anon_rmap(folio, dst_vma, dst_addr);
6836
6837 /*
6838 * For either: (1) CONTINUE on a non-shared VMA, or (2) UFFDIO_COPY
6839 * with wp flag set, don't set pte write bit.
6840 */
6841 if (wp_enabled || (is_continue && !vm_shared))
6842 writable = 0;
6843 else
6844 writable = dst_vma->vm_flags & VM_WRITE;
6845
6846 _dst_pte = make_huge_pte(dst_vma, &folio->page, writable);
6847 /*
6848 * Always mark UFFDIO_COPY page dirty; note that this may not be
6849 * extremely important for hugetlbfs for now since swapping is not
6850 * supported, but we should still be clear in that this page cannot be
6851 * thrown away at will, even if write bit not set.
6852 */
6853 _dst_pte = huge_pte_mkdirty(_dst_pte);
6854 _dst_pte = pte_mkyoung(_dst_pte);
6855
6856 if (wp_enabled)
6857 _dst_pte = huge_pte_mkuffd_wp(_dst_pte);
6858
6859 set_huge_pte_at(dst_mm, dst_addr, dst_pte, _dst_pte, huge_page_size(h));
6860
6861 hugetlb_count_add(pages_per_huge_page(h), dst_mm);
6862
6863 /* No need to invalidate - it was non-present before */
6864 update_mmu_cache(dst_vma, dst_addr, dst_pte);
6865
6866 spin_unlock(ptl);
6867 if (!is_continue)
6868 folio_set_hugetlb_migratable(folio);
6869 if (vm_shared || is_continue)
6870 folio_unlock(folio);
6871 ret = 0;
6872 out:
6873 return ret;
6874 out_release_unlock:
6875 spin_unlock(ptl);
6876 if (vm_shared || is_continue)
6877 folio_unlock(folio);
6878 out_release_nounlock:
6879 if (!folio_in_pagecache)
6880 restore_reserve_on_error(h, dst_vma, dst_addr, folio);
6881 folio_put(folio);
6882 goto out;
6883 }
6884 #endif /* CONFIG_USERFAULTFD */
6885

Signature · 2 lines
0-DAY CI Kernel Test Service
https://github.com/intel/lkp-tests/wiki
#13 lore raw

RFC PATCH v2 5/20 powerpc/mm: Allow hugepages without hugepd

In reply to Christophe Leroy

In preparation of implementing huge pages on powerpc 8xx without hugepd, enclose hugepd related code inside an ifdef CONFIG_ARCH_HAS_HUGEPD

This also allows removing some stubs.

---
 arch/powerpc/include/asm/book3s/32/pgalloc.h |  2 --
 arch/powerpc/include/asm/hugetlb.h           | 10 ++--------
 arch/powerpc/include/asm/nohash/pgtable.h    |  8 +++++---
 arch/powerpc/mm/hugetlbpage.c                | 13 +++++++++++++
 arch/powerpc/mm/pgtable.c                    |  2 ++
 5 files changed, 22 insertions(+), 13 deletions(-)
arch/powerpc/include/asm/book3s/32/pgalloc.h +0 -2
index dc5c039eb28e..dd4eb3063175 100644
@@ -47,8 +47,6 @@ static inline void pgtable_free(void *table, unsigned index_size)
 	}
 }
 
-#define get_hugepd_cache_index(x)  (x)
-
 static inline void pgtable_free_tlb(struct mmu_gather *tlb,
 				    void *table, int shift)
 {
arch/powerpc/include/asm/hugetlb.h +2 -8
index ea71f7245a63..79176a499763 100644
@@ -30,10 +30,12 @@ static inline int is_hugepage_only_range(struct mm_struct *mm,
 }
 #define is_hugepage_only_range is_hugepage_only_range
 
+#ifdef CONFIG_ARCH_HAS_HUGEPD
 #define __HAVE_ARCH_HUGETLB_FREE_PGD_RANGE
 void hugetlb_free_pgd_range(struct mmu_gather *tlb, unsigned long addr,
 			    unsigned long end, unsigned long floor,
 			    unsigned long ceiling);
+#endif
 
 #define __HAVE_ARCH_HUGE_PTEP_GET_AND_CLEAR
 static inline pte_t huge_ptep_get_and_clear(struct mm_struct *mm,
@@ -67,14 +69,6 @@ static inline void flush_hugetlb_page(struct vm_area_struct *vma,
 {
 }
 
-#define hugepd_shift(x) 0
-static inline pte_t *hugepte_offset(hugepd_t hpd, unsigned long addr,
-				    unsigned pdshift)
-{
-	return NULL;
-}
-
-
 static inline void __init gigantic_hugetlb_cma_reserve(void)
 {
 }
arch/powerpc/include/asm/nohash/pgtable.h +5 -3
index 427db14292c9..ac3353f7f2ac 100644
@@ -340,7 +340,7 @@ static inline void __set_pte_at(struct mm_struct *mm, unsigned long addr,
 
 #define pgprot_writecombine pgprot_noncached_wc
 
-#ifdef CONFIG_HUGETLB_PAGE
+#ifdef CONFIG_ARCH_HAS_HUGEPD
 static inline int hugepd_ok(hugepd_t hpd)
 {
 #ifdef CONFIG_PPC_8xx
@@ -351,6 +351,10 @@ static inline int hugepd_ok(hugepd_t hpd)
 #endif
 }
 
+#define is_hugepd(hpd)		(hugepd_ok(hpd))
+#endif
+
+#ifdef CONFIG_HUGETLB_PAGE
 static inline int pmd_huge(pmd_t pmd)
 {
 	return 0;
@@ -360,8 +364,6 @@ static inline int pud_huge(pud_t pud)
 {
 	return 0;
 }
-
-#define is_hugepd(hpd)		(hugepd_ok(hpd))
 #endif
 
 int map_kernel_page(unsigned long va, phys_addr_t pa, pgprot_t prot);
arch/powerpc/mm/hugetlbpage.c +13 -0
index 66ac56b26007..82495b8ea793 100644
@@ -42,6 +42,7 @@ pte_t *huge_pte_offset(struct mm_struct *mm, unsigned long addr, unsigned long s
 	return __find_linux_pte(mm->pgd, addr, NULL, NULL);
 }
 
+#ifdef CONFIG_ARCH_HAS_HUGEPD
 static int __hugepte_alloc(struct mm_struct *mm, hugepd_t *hpdp,
 			   unsigned long address, unsigned int pdshift,
 			   unsigned int pshift, spinlock_t *ptl)
@@ -193,6 +194,16 @@ pte_t *huge_pte_alloc(struct mm_struct *mm, struct vm_area_struct *vma,
 
 	return hugepte_offset(*hpdp, addr, pdshift);
 }
+#else
+pte_t *huge_pte_alloc(struct mm_struct *mm, struct vm_area_struct *vma,
+		      unsigned long addr, unsigned long sz)
+{
+	if (sz < PMD_SIZE)
+		return pte_alloc_huge(mm, pmd_off(mm, addr), addr, sz);
+
+	return NULL;
+}
+#endif
 
 #ifdef CONFIG_PPC_BOOK3S_64
 /*
@@ -248,6 +259,7 @@ int __init alloc_bootmem_huge_page(struct hstate *h, int nid)
 	return __alloc_bootmem_huge_page(h, nid);
 }
 
+#ifdef CONFIG_ARCH_HAS_HUGEPD
 #ifndef CONFIG_PPC_BOOK3S_64
 #define HUGEPD_FREELIST_SIZE \
 	((PAGE_SIZE - sizeof(struct hugepd_freelist)) / sizeof(pte_t))
@@ -505,6 +517,7 @@ void hugetlb_free_pgd_range(struct mmu_gather *tlb,
 		}
 	} while (addr = next, addr != end);
 }
+#endif
 
 bool __init arch_hugetlb_valid_size(unsigned long size)
 {
arch/powerpc/mm/pgtable.c +2 -0
index 9e7ba9c3851f..acdf64c9b93e 100644
@@ -487,8 +487,10 @@ pte_t *__find_linux_pte(pgd_t *pgdir, unsigned long ea,
 	if (!hpdp)
 		return NULL;
 
+#ifdef CONFIG_ARCH_HAS_HUGEPD
 	ret_pte = hugepte_offset(*hpdp, ea, pdshift);
 	pdshift = hugepd_shift(*hpdp);
+#endif
 out:
 	if (hpage_shift)
 		*hpage_shift = pdshift;
Signature · 1 line
2.44.0
#14 lore raw

RFC PATCH v2 6/20 powerpc/8xx: Fix size given to set_huge_pte_at()

In reply to Christophe Leroy

set_huge_pte_at() expects the real page size, not the psize which is the index of the page definition in table mmu_psize_defs[]

Fixes 935d4f0c6dc8 ("mm: hugetlb: add huge page size param to set_huge_pte_at()")
---
 arch/powerpc/mm/nohash/8xx.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)
arch/powerpc/mm/nohash/8xx.c +2 -1
index 43d4842bb1c7..d93433e26ded 100644
@@ -94,7 +94,8 @@ static int __ref __early_map_kernel_hugepage(unsigned long va, phys_addr_t pa,
 		return -EINVAL;
 
 	set_huge_pte_at(&init_mm, va, ptep,
-			pte_mkhuge(pfn_pte(pa >> PAGE_SHIFT, prot)), psize);
+			pte_mkhuge(pfn_pte(pa >> PAGE_SHIFT, prot)),
+			1UL << mmu_psize_to_shift(psize));
 
 	return 0;
 }
Signature · 1 line
2.44.0
maintainer Reviewed-by on v2 6/20
#15 lore raw

Re: [RFC PATCH v2 06/20] powerpc/8xx: Fix size given to set_huge_pte_at()

Quoted 1 line · Christophe Leroy

set_huge_pte_at() expects the real page size, not the psize which is

"expects the size of the huge page" sounds bettter?

Quoted 4 lines

the index of the page definition in table mmu_psize_defs[]

Fixes 935d4f0c6dc8 ("mm: hugetlb: add huge page size param to set_huge_pte_at()")

AFAICS, this fixup is not related to the series, right? (yes, you will the parameter later)
I would have it at the very beginning of the series.

Quoted 21 lines
---
 arch/powerpc/mm/nohash/8xx.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)
arch/powerpc/mm/nohash/8xx.c +2 -1
index 43d4842bb1c7..d93433e26ded 100644
@@ -94,7 +94,8 @@ static int __ref __early_map_kernel_hugepage(unsigned long va, phys_addr_t pa,
 		return -EINVAL;
 
 	set_huge_pte_at(&init_mm, va, ptep,
-			pte_mkhuge(pfn_pte(pa >> PAGE_SHIFT, prot)), psize);
+			pte_mkhuge(pfn_pte(pa >> PAGE_SHIFT, prot)),
+			1UL << mmu_psize_to_shift(psize));
 
 	return 0;
 }
Signature · 1 line
2.44.0
Signature · 2 lines
Oscar Salvador
SUSE Labs
#16 lore raw

Re: [RFC PATCH v2 06/20] powerpc/8xx: Fix size given to set_huge_pte_at()

Hi Oscar, hi Michael,

Le 20/05/2024 à 11:14, Oscar Salvador a écrit :

Quoted 4 lines · Christophe Leroy
Quoted 1 line

set_huge_pte_at() expects the real page size, not the psize which is

"expects the size of the huge page" sounds bettter?

Parameter 'pzize' already provides the size of the hugepage, but not in the way set_huge_pte_at() expects it.

psize has one of the values defined by MMU_PAGE_XXX macros defined in arch/powerpc/include/asm/mmu.h while set_huge_pte_at() expects the size as a value.

Quoted 11 lines
Quoted 5 lines

the index of the page definition in table mmu_psize_defs[]

Fixes 935d4f0c6dc8 ("mm: hugetlb: add huge page size param to set_huge_pte_at()")

AFAICS, this fixup is not related to the series, right? (yes, you will the parameter later)
I would have it at the very beginning of the series.

You are right, I should have submitted it separately.

Michael can you take it as a fix for 6.10 ?

Quoted 24 lines
Quoted 23 lines

---
  arch/powerpc/mm/nohash/8xx.c | 3 ++-
  1 file changed, 2 insertions(+), 1 deletion(-)
arch/powerpc/mm/nohash/8xx.c +2 -1
index 43d4842bb1c7..d93433e26ded 100644
@@ -94,7 +94,8 @@ static int __ref __early_map_kernel_hugepage(unsigned long va, phys_addr_t pa,
  		return -EINVAL;
 
  	set_huge_pte_at(&init_mm, va, ptep,
-			pte_mkhuge(pfn_pte(pa >> PAGE_SHIFT, prot)), psize);
+			pte_mkhuge(pfn_pte(pa >> PAGE_SHIFT, prot)),
+			1UL << mmu_psize_to_shift(psize));
 
  	return 0;
  }
Signature · 1 line
2.44.0
maintainer
#17 lore raw

Re: [RFC PATCH v2 06/20] powerpc/8xx: Fix size given to set_huge_pte_at()

Quoted 6 lines · Christophe Leroy

Hi Oscar, hi Michael,

Le 20/05/2024 à 11:14, Oscar Salvador a écrit :

Quoted 3 lines · Christophe Leroy
Quoted 1 line

set_huge_pte_at() expects the real page size, not the psize which is

Quoted 8 lines
Quoted 1 line

"expects the size of the huge page" sounds bettter?

Parameter 'pzize' already provides the size of the hugepage, but not in the way set_huge_pte_at() expects it.

psize has one of the values defined by MMU_PAGE_XXX macros defined in arch/powerpc/include/asm/mmu.h while set_huge_pte_at() expects the size as a value.

Yes, psize is an index, which is not a size by itself but used to get mmu_psize_def.shift to see the actual size, I guess.
This is why I thought that being explicit about "expects the size of the huge page" was better.

But no strong feelings here.

Signature · 2 lines
Oscar Salvador
SUSE Labs
#18 lore raw

Re: [RFC PATCH v2 06/20] powerpc/8xx: Fix size given to set_huge_pte_at()

Le 20/05/2024 à 19:42, Oscar Salvador a écrit :

Quoted 16 lines · Christophe Leroy
Quoted 6 lines

Hi Oscar, hi Michael,

Le 20/05/2024 à 11:14, Oscar Salvador a écrit :

Quoted 3 lines · Christophe Leroy
Quoted 1 line

set_huge_pte_at() expects the real page size, not the psize which is

Quoted 8 lines
Quoted 1 line

"expects the size of the huge page" sounds bettter?

Parameter 'pzize' already provides the size of the hugepage, but not in the way set_huge_pte_at() expects it.

psize has one of the values defined by MMU_PAGE_XXX macros defined in arch/powerpc/include/asm/mmu.h while set_huge_pte_at() expects the size as a value.

Quoted 7 lines

Yes, psize is an index, which is not a size by itself but used to get mmu_psize_def.shift to see the actual size, I guess.
This is why I thought that being explicit about "expects the size of the huge page" was better.

But no strong feelings here.

Thanks, I'll try a rephrase.

Christophe

#19 lore raw

Re: [RFC PATCH v2 06/20] powerpc/8xx: Fix size given to set_huge_pte_at()

In reply to Christophe Leroy
Quoted 23 lines · Christophe Leroy

Hi Oscar, hi Michael,

Le 20/05/2024 à 11:14, Oscar Salvador a écrit :

Quoted 4 lines · Christophe Leroy
Quoted 1 line

set_huge_pte_at() expects the real page size, not the psize which is

"expects the size of the huge page" sounds bettter?

Parameter 'pzize' already provides the size of the hugepage, but not in the way set_huge_pte_at() expects it.

psize has one of the values defined by MMU_PAGE_XXX macros defined in arch/powerpc/include/asm/mmu.h while set_huge_pte_at() expects the size as a value.

Quoted 8 lines
Quoted 5 lines

the index of the page definition in table mmu_psize_defs[]

Fixes 935d4f0c6dc8 ("mm: hugetlb: add huge page size param to set_huge_pte_at()")
Quoted 7 lines
Quoted 3 lines

AFAICS, this fixup is not related to the series, right? (yes, you will the parameter later)
I would have it at the very beginning of the series.

You are right, I should have submitted it separately.

Michael can you take it as a fix for 6.10 ?

Yeah I can. Does it actually cause a bug at runtime (I assume so)?

cheers

maintainer
#20 lore raw

Re: [RFC PATCH v2 06/20] powerpc/8xx: Fix size given to set_huge_pte_at()

Quoted 1 line · Michael Ellerman

Yeah I can. Does it actually cause a bug at runtime (I assume so)?

No, currently set_huge_pte_at() from 8xx ignores the 'sz' parameter. But it will be used after this series.

Signature · 2 lines
Oscar Salvador
SUSE Labs
#21 lore raw

Re: [RFC PATCH v2 06/20] powerpc/8xx: Fix size given to set_huge_pte_at()

Le 21/05/2024 à 11:26, Oscar Salvador a écrit :

Quoted 6 lines · Michael Ellerman
Quoted 1 line

Yeah I can. Does it actually cause a bug at runtime (I assume so)?

No, currently set_huge_pte_at() from 8xx ignores the 'sz' parameter. But it will be used after this series.

Ah yes, I mixed things up with something else in my mind.

So this patch doesn't qualify as a fix and doesn't need to be handled separately from the series and doesn't really need to go on top of the series either, I think it is better to keep it grouped with other 8xx changes.

Christophe

#22 lore raw

Re: [RFC PATCH v2 06/20] powerpc/8xx: Fix size given to set_huge_pte_at()

+Peter Z. who added that commit.

Le 22/05/2024 à 10:32, Christophe Leroy a écrit :

Quoted 10 lines

Le 21/05/2024 à 11:26, Oscar Salvador a écrit :

Quoted 6 lines · Michael Ellerman
Quoted 1 line

Yeah I can. Does it actually cause a bug at runtime (I assume so)?

No, currently set_huge_pte_at() from 8xx ignores the 'sz' parameter. But it will be used after this series.

Quoted 7 lines

Ah yes, I mixed things up with something else in my mind.

So this patch doesn't qualify as a fix and doesn't need to be handled separately from the series and doesn't really need to go on top of the series either, I think it is better to keep it grouped with other 8xx changes.

I remember now, what I had in mind was commit c5eecbb58f65 ("powerpc/8xx: Implement pXX_leaf_size() support")

That commit is buggy, because pgd_leaf() will always return false on 8xx. First of all pgd_leaf() could only return true on a target with P4Ds. Without P4Ds it should just return 0 like pgd_none(), pgd_bad(), ... as defined in include/asm-generic/pgtable-nop4d.h

So it is pmd_leaf_size() that could eventually return something for 8xx. But as 8xx is using hugepd, at the best case it will return crap, worst case the read will go in the weed.

To be correct we should had support of hugepd in perf_get_pgtable_size() but that's not trivial and this series is aiming at removing hugepd completely so there is no point in fixing stuff here, except maybe for stable ?

#23 lore raw

RFC PATCH v2 7/20 powerpc/8xx: Rework support for 8M pages using contiguous PTE entries

In reply to Christophe Leroy

In order to fit better with standard Linux page tables layout, add support for 8M pages using contiguous PTE entries in a standard page table. Page tables will then be populated with 1024 similar entries and two PMD entries will point to that page table.

The PMD entries also get a flag to tell it is addressing an 8M page, this is required for the HW tablewalk assistance.

---
 arch/powerpc/Kconfig                          |  1 -
 arch/powerpc/include/asm/hugetlb.h            | 11 +++-
 .../include/asm/nohash/32/hugetlb-8xx.h       | 54 ++++++++----------
 arch/powerpc/include/asm/nohash/32/pgalloc.h  |  2 +
 arch/powerpc/include/asm/nohash/32/pte-8xx.h  | 57 +++++++++++++------
 arch/powerpc/include/asm/nohash/pgtable.h     |  4 --
 arch/powerpc/include/asm/page.h               |  5 --
 arch/powerpc/include/asm/pgtable.h            |  3 +
 arch/powerpc/kernel/head_8xx.S                | 10 +---
 arch/powerpc/mm/hugetlbpage.c                 | 18 +++---
 arch/powerpc/mm/kasan/8xx.c                   | 15 +++--
 arch/powerpc/mm/nohash/8xx.c                  | 43 +++++++-------
 arch/powerpc/mm/pgtable.c                     | 24 +++++---
 arch/powerpc/mm/pgtable_32.c                  |  2 +-
 arch/powerpc/platforms/Kconfig.cputype        |  2 +
 15 files changed, 139 insertions(+), 112 deletions(-)
arch/powerpc/Kconfig +0 -1
index a1a3b3363008..6a4ea7dad23f 100644
@@ -135,7 +135,6 @@ config PPC
 	select ARCH_HAS_DMA_MAP_DIRECT 		if PPC_PSERIES
 	select ARCH_HAS_FORTIFY_SOURCE
 	select ARCH_HAS_GCOV_PROFILE_ALL
-	select ARCH_HAS_HUGEPD			if HUGETLB_PAGE
 	select ARCH_HAS_KCOV
 	select ARCH_HAS_MEMBARRIER_CALLBACKS
 	select ARCH_HAS_MEMBARRIER_SYNC_CORE
arch/powerpc/include/asm/hugetlb.h +10 -1
index 79176a499763..36ed6d976cf9 100644
@@ -41,7 +41,16 @@ void hugetlb_free_pgd_range(struct mmu_gather *tlb, unsigned long addr,
 static inline pte_t huge_ptep_get_and_clear(struct mm_struct *mm,
 					    unsigned long addr, pte_t *ptep)
 {
-	return __pte(pte_update(mm, addr, ptep, ~0UL, 0, 1));
+	pmd_t *pmdp = (pmd_t *)ptep;
+	pte_t pte;
+
+	if (IS_ENABLED(CONFIG_PPC_8xx) && pmdp == pmd_off(mm, ALIGN_DOWN(addr, SZ_8M))) {
+		pte = __pte(pte_update(mm, addr, pte_offset_kernel(pmdp, 0), ~0UL, 0, 1));
+		pte_update(mm, addr, pte_offset_kernel(pmdp + 1, 0), ~0UL, 0, 1);
+	} else {
+		pte = __pte(pte_update(mm, addr, ptep, ~0UL, 0, 1));
+	}
+	return pte;
 }
 
 #define __HAVE_ARCH_HUGE_PTEP_CLEAR_FLUSH
arch/powerpc/include/asm/nohash/32/hugetlb-8xx.h +24 -30

83 lines not on this page · raw message

arch/powerpc/include/asm/nohash/32/pgalloc.h +2 -0
index 11eac371e7e0..ff4f90cfb461 100644
@@ -14,6 +14,7 @@
 #define __pmd_free_tlb(tlb,x,a)		do { } while (0)
 /* #define pgd_populate(mm, pmd, pte)      BUG() */
 
+#ifndef CONFIG_PPC_8xx
 static inline void pmd_populate_kernel(struct mm_struct *mm, pmd_t *pmdp,
 				       pte_t *pte)
 {
@@ -31,5 +32,6 @@ static inline void pmd_populate(struct mm_struct *mm, pmd_t *pmdp,
 	else
 		*pmdp = __pmd(__pa(pte_page) | _PMD_USER | _PMD_PRESENT);
 }
+#endif
 
 #endif /* _ASM_POWERPC_PGALLOC_32_H */
arch/powerpc/include/asm/nohash/32/pte-8xx.h +40 -17

102 lines not on this page · raw message

arch/powerpc/include/asm/nohash/pgtable.h +0 -4
index ac3353f7f2ac..c4be7754e96f 100644
@@ -343,12 +343,8 @@ static inline void __set_pte_at(struct mm_struct *mm, unsigned long addr,
 #ifdef CONFIG_ARCH_HAS_HUGEPD
 static inline int hugepd_ok(hugepd_t hpd)
 {
-#ifdef CONFIG_PPC_8xx
-	return ((hpd_val(hpd) & _PMD_PAGE_MASK) == _PMD_PAGE_8M);
-#else
 	/* We clear the top bit to indicate hugepd */
 	return (hpd_val(hpd) && (hpd_val(hpd) & PD_HUGE) == 0);
-#endif
 }
 
 #define is_hugepd(hpd)		(hugepd_ok(hpd))
arch/powerpc/include/asm/page.h +0 -5
index e411e5a70ea3..018c3d55232c 100644
@@ -293,13 +293,8 @@ static inline const void *pfn_to_kaddr(unsigned long pfn)
 /*
  * Some number of bits at the level of the page table that points to
  * a hugepte are used to encode the size.  This masks those bits.
- * On 8xx, HW assistance requires 4k alignment for the hugepte.
  */
-#ifdef CONFIG_PPC_8xx
-#define HUGEPD_SHIFT_MASK     0xfff
-#else
 #define HUGEPD_SHIFT_MASK     0x3f
-#endif
 
 #ifndef __ASSEMBLY__
 
arch/powerpc/include/asm/pgtable.h +3 -0
index 239709a2f68e..264a6c09517a 100644
@@ -106,6 +106,9 @@ unsigned long vmalloc_to_phys(void *vmalloc_addr);
 
 void pgtable_cache_add(unsigned int shift);
 
+#ifdef CONFIG_PPC32
+void __init *early_alloc_pgtable(unsigned long size);
+#endif
 pte_t *early_pte_alloc_kernel(pmd_t *pmdp, unsigned long va);
 
 #if defined(CONFIG_STRICT_KERNEL_RWX) || defined(CONFIG_PPC32)
arch/powerpc/kernel/head_8xx.S +2 -8
index 647b0b445e89..43919ae0bd11 100644
@@ -415,14 +415,13 @@ FixupDAR:/* Entry point for dcbx workaround. */
 	oris	r11, r11, (swapper_pg_dir - PAGE_OFFSET)@ha
 3:
 	lwz	r11, (swapper_pg_dir-PAGE_OFFSET)@l(r11)	/* Get the level 1 entry */
+	rlwinm	r11, r11, 0, ~_PMD_PAGE_8M
 	mtspr	SPRN_MD_TWC, r11
-	mtcrf	0x01, r11
 	mfspr	r11, SPRN_MD_TWC
 	lwz	r11, 0(r11)	/* Get the pte */
-	bt	28,200f		/* bit 28 = Large page (8M) */
 	/* concat physical page address(r11) and page offset(r10) */
 	rlwimi	r11, r10, 0, 32 - PAGE_SHIFT, 31
-201:	lwz	r11,0(r11)
+	lwz	r11,0(r11)
 /* Check if it really is a dcbx instruction. */
 /* dcbt and dcbtst does not generate DTLB Misses/Errors,
  * no need to include them here */
@@ -441,11 +440,6 @@ FixupDAR:/* Entry point for dcbx workaround. */
 141:	mfspr	r10,SPRN_M_TW
 	b	DARFixed	/* Nope, go back to normal TLB processing */
 
-200:
-	/* concat physical page address(r11) and page offset(r10) */
-	rlwimi	r11, r10, 0, 32 - PAGE_SHIFT_8M, 31
-	b	201b
-
 144:	mfspr	r10, SPRN_DSISR
 	rlwinm	r10, r10,0,7,5	/* Clear store bit for buggy dcbst insn */
 	mtspr	SPRN_DSISR, r10
arch/powerpc/mm/hugetlbpage.c +11 -7
index 82495b8ea793..42b12e1ec851 100644
@@ -183,9 +183,6 @@ pte_t *huge_pte_alloc(struct mm_struct *mm, struct vm_area_struct *vma,
 	if (!hpdp)
 		return NULL;
 
-	if (IS_ENABLED(CONFIG_PPC_8xx) && pshift < PMD_SHIFT)
-		return pte_alloc_huge(mm, (pmd_t *)hpdp, addr, sz);
-
 	BUG_ON(!hugepd_none(*hpdp) && !hugepd_ok(*hpdp));
 
 	if (hugepd_none(*hpdp) && __hugepte_alloc(mm, hpdp, addr,
@@ -198,10 +195,18 @@ pte_t *huge_pte_alloc(struct mm_struct *mm, struct vm_area_struct *vma,
 pte_t *huge_pte_alloc(struct mm_struct *mm, struct vm_area_struct *vma,
 		      unsigned long addr, unsigned long sz)
 {
+	pmd_t *pmd = pmd_off(mm, addr);
+
 	if (sz < PMD_SIZE)
-		return pte_alloc_huge(mm, pmd_off(mm, addr), addr, sz);
+		return pte_alloc_huge(mm, pmd, addr, sz);
 
-	return NULL;
+	if (sz != SZ_8M)
+		return NULL;
+	if (!pte_alloc_huge(mm, pmd, addr, sz))
+		return NULL;
+	if (!pte_alloc_huge(mm, pmd + 1, addr, sz))
+		return NULL;
+	return (pte_t *)pmd;
 }
 #endif
 
@@ -599,8 +604,7 @@ static int __init hugetlbpage_init(void)
 		if (pdshift > shift) {
 			if (!IS_ENABLED(CONFIG_PPC_8xx))
 				pgtable_cache_add(pdshift - shift);
-		} else if (IS_ENABLED(CONFIG_PPC_E500) ||
-			   IS_ENABLED(CONFIG_PPC_8xx)) {
+		} else if (IS_ENABLED(CONFIG_PPC_E500)) {
 			pgtable_cache_add(PTE_T_ORDER);
 		}
 
arch/powerpc/mm/kasan/8xx.c +9 -6
index 2784224054f8..a4f33508cb6e 100644
@@ -12,22 +12,25 @@ kasan_init_shadow_8M(unsigned long k_start, unsigned long k_end, void *block)
 	pmd_t *pmd = pmd_off_k(k_start);
 	unsigned long k_cur, k_next;
 
-	for (k_cur = k_start; k_cur != k_end; k_cur = k_next, pmd += 2, block += SZ_8M) {
-		pte_basic_t *new;
+	for (k_cur = k_start; k_cur != k_end; k_cur = k_next, pmd++, block += SZ_4M) {
+		pte_t *ptep;
+		int i;
 
 		k_next = pgd_addr_end(k_cur, k_end);
 		k_next = pgd_addr_end(k_next, k_end);
 		if ((void *)pmd_page_vaddr(*pmd) != kasan_early_shadow_pte)
 			continue;
 
-		new = memblock_alloc(sizeof(pte_basic_t), SZ_4K);
+		ptep = memblock_alloc(PTE_FRAG_SIZE, PTE_FRAG_SIZE);
 		if (!new)
 			return -ENOMEM;
 
-		*new = pte_val(pte_mkhuge(pfn_pte(PHYS_PFN(__pa(block)), PAGE_KERNEL)));
+		for (i = 0; i < PTRS_PER_PTE; i++) {
+			pte_t pte = pte_mkhuge(pfn_pte(PHYS_PFN(__pa(block + i * PAGE_SIZE)), PAGE_KERNEL));
 
-		hugepd_populate_kernel((hugepd_t *)pmd, (pte_t *)new, PAGE_SHIFT_8M);
-		hugepd_populate_kernel((hugepd_t *)pmd + 1, (pte_t *)new, PAGE_SHIFT_8M);
+			__set_pte_at(&init_mm, k_cur, ptep + i, pte, 1);
+		}
+		pmd_populate_kernel_size(&init_mm, pmd, ptep, SZ_8M);
 	}
 	return 0;
 }
arch/powerpc/mm/nohash/8xx.c +19 -24

63 lines not on this page · raw message

arch/powerpc/mm/pgtable.c +16 -8
index acdf64c9b93e..59f0d7706d2f 100644
@@ -297,11 +297,8 @@ int huge_ptep_set_access_flags(struct vm_area_struct *vma,
 }
 
 #if defined(CONFIG_PPC_8xx)
-void set_huge_pte_at(struct mm_struct *mm, unsigned long addr, pte_t *ptep,
-		     pte_t pte, unsigned long sz)
+static void __set_huge_pte_at(pmd_t *pmd, pte_t *ptep, pte_basic_t val)
 {
-	pmd_t *pmd = pmd_off(mm, addr);
-	pte_basic_t val;
 	pte_basic_t *entry = (pte_basic_t *)ptep;
 	int num, i;
 
@@ -311,15 +308,26 @@ void set_huge_pte_at(struct mm_struct *mm, unsigned long addr, pte_t *ptep,
 	 */
 	VM_WARN_ON(pte_hw_valid(*ptep) && !pte_protnone(*ptep));
 
-	pte = set_pte_filter(pte, addr);
-
-	val = pte_val(pte);
-
 	num = number_of_cells_per_pte(pmd, val, 1);
 
 	for (i = 0; i < num; i++, entry++, val += SZ_4K)
 		*entry = val;
 }
+
+void set_huge_pte_at(struct mm_struct *mm, unsigned long addr, pte_t *ptep,
+		     pte_t pte, unsigned long sz)
+{
+	pmd_t *pmdp = pmd_off(mm, addr);
+
+	pte = set_pte_filter(pte, addr);
+
+	if (sz == SZ_8M) {
+		__set_huge_pte_at(pmdp, pte_offset_kernel(pmdp, 0), pte_val(pte));
+		__set_huge_pte_at(pmdp, pte_offset_kernel(pmdp + 1, 0), pte_val(pte) + SZ_4M);
+	} else {
+		__set_huge_pte_at(pmdp, ptep, pte_val(pte));
+	}
+}
 #endif
 #endif /* CONFIG_HUGETLB_PAGE */
 
arch/powerpc/mm/pgtable_32.c +1 -1
index cfd622ebf774..787b22206386 100644
@@ -48,7 +48,7 @@ notrace void __init early_ioremap_init(void)
 	early_ioremap_setup();
 }
 
-static void __init *early_alloc_pgtable(unsigned long size)
+void __init *early_alloc_pgtable(unsigned long size)
 {
 	void *ptr = memblock_alloc(size, size);
 
arch/powerpc/platforms/Kconfig.cputype +2 -0
index b2d8c0da2ad9..fa4bb096b3ae 100644
@@ -98,6 +98,7 @@ config PPC_BOOK3S_64
 	select ARCH_ENABLE_HUGEPAGE_MIGRATION if HUGETLB_PAGE && MIGRATION
 	select ARCH_ENABLE_SPLIT_PMD_PTLOCK
 	select ARCH_ENABLE_THP_MIGRATION if TRANSPARENT_HUGEPAGE
+	select ARCH_HAS_HUGEPD if HUGETLB_PAGE
 	select ARCH_SUPPORTS_HUGETLBFS
 	select ARCH_SUPPORTS_NUMA_BALANCING
 	select HAVE_MOVE_PMD
@@ -290,6 +291,7 @@ config PPC_BOOK3S
 config PPC_E500
 	select FSL_EMB_PERFMON
 	bool
+	select ARCH_HAS_HUGEPD if HUGETLB_PAGE
 	select ARCH_SUPPORTS_HUGETLBFS if PHYS_64BIT || PPC64
 	select PPC_SMP_MUXED_IPI
 	select PPC_DOORBELL
Signature · 1 line
2.44.0
maintainer
#24 lore raw

Re: [RFC PATCH v2 07/20] powerpc/8xx: Rework support for 8M pages using contiguous PTE entries

Quoted 9 lines · Christophe Leroy

In order to fit better with standard Linux page tables layout, add support for 8M pages using contiguous PTE entries in a standard page table. Page tables will then be populated with 1024 similar entries and two PMD entries will point to that page table.

The PMD entries also get a flag to tell it is addressing an 8M page, this is required for the HW tablewalk assistance.

I guess that this will slightly change if you remove patch#1 and patch#2 as you said you will.
So I will not comment on the overall design because I do not know how it will look afterwards, but just some things that caught my eye

arch/powerpc/include/asm/hugetlb.h void hugetlb_free_pgd_range(struct mmu_gather *tlb, unsigned long addr, · line 47

Quoted 11 lines
arch/powerpc/include/asm/hugetlb.h +4 -1
@@ -41,7 +41,16 @@ void hugetlb_free_pgd_range(struct mmu_gather *tlb, unsigned long addr,
 static inline pte_t huge_ptep_get_and_clear(struct mm_struct *mm,
 					    unsigned long addr, pte_t *ptep)
 {
-	return __pte(pte_update(mm, addr, ptep, ~0UL, 0, 1));
+	pmd_t *pmdp = (pmd_t *)ptep;
+	pte_t pte;
+
+	if (IS_ENABLED(CONFIG_PPC_8xx) && pmdp == pmd_off(mm, ALIGN_DOWN(addr, SZ_8M))) {

There are quite some places where you do the "pmd_off" to check whether that is a 8MB entry.
I think it would make somse sense to have some kind of macro/function to make more clear what we are checking against.
e.g:

#define pmd_is_SZ_8M(mm, addr, pmdp) (pmdp == pmd_off(mm, ALIGN_DOWN(addr, SZ_8M))) (or whatever name you see fit)

then you would just need

if (IS_ENABLED(CONFIG_PPC_8xx && pmd_is_SZ_8M(mm, addr, pdmp))

Because I see that is also scaterred in 8xx code.

arch/powerpc/include/asm/hugetlb.h void hugetlb_free_pgd_range(struct mmu_gather *tlb, unsigned long addr, · line 49

Quoted 2 lines
arch/powerpc/include/asm/hugetlb.h +2 -0
+		pte = __pte(pte_update(mm, addr, pte_offset_kernel(pmdp, 0), ~0UL, 0, 1));
+		pte_update(mm, addr, pte_offset_kernel(pmdp + 1, 0), ~0UL, 0, 1);

I have this fresh one because I recently read about 8xx pagetables, but not sure how my memory will survive this, so maybe throw a little comment in there that we are pointing the two pmds to the area.

Also, the way we pass the parameters here to pte_update() is a bit awkward. Ideally we should be using some meaningful names?

clr_all_bits = ~0UL
set_bits = 0
bool is_huge = true

pte_update(mm, addr, pte_offset_kernel(pmdp + 1, 0), clr_all_bits, set_bits, is_huge)

or something along those lines

arch/powerpc/include/asm/hugetlb.h void hugetlb_free_pgd_range(struct mmu_gather *tlb, unsigned long addr, · line 50

Quoted 4 lines
arch/powerpc/include/asm/hugetlb.h +1 -3
-static inline int check_and_get_huge_psize(int shift)
-{
-	return shift_to_mmu_psize(shift);
+	if (pmdp == pmd_off(mm, ALIGN_DOWN(addr, SZ_8M)))

Here you could also use the pmd_is_SZ_8M()

Quoted 8 lines
arch/powerpc/include/asm/hugetlb.h +2 -0
+		ptep = pte_offset_kernel(pmdp, 0);
+	return ptep_get(ptep);
 }
 
 #define __HAVE_ARCH_HUGE_SET_HUGE_PTE_AT
@@ -53,7 +33,14 @@ void set_huge_pte_at(struct mm_struct *mm, unsigned long addr, pte_t *ptep,
 static inline void huge_pte_clear(struct mm_struct *mm, unsigned long addr,
 				  pte_t *ptep, unsigned long sz)

arch/powerpc/include/asm/hugetlb.h void set_huge_pte_at(struct mm_struct *mm, unsigned long addr, pte_t *ptep, · line 43

Quoted 10 lines
arch/powerpc/include/asm/hugetlb.h +8 -1
 {
-	pte_update(mm, addr, ptep, ~0UL, 0, 1);
+	pmd_t *pmdp = (pmd_t *)ptep;
+
+	if (pmdp == pmd_off(mm, ALIGN_DOWN(addr, SZ_8M))) {
+		pte_update(mm, addr, pte_offset_kernel(pmdp, 0), ~0UL, 0, 1);
+		pte_update(mm, addr, pte_offset_kernel(pmdp + 1, 0), ~0UL, 0, 1);
+	} else {
+		pte_update(mm, addr, ptep, ~0UL, 0, 1);
+	}

Could we not leverage this in huge_ptep_get_and_clear()? AFAICS,

huge_pet_get_and_clear(mm, addr, pte_t *p)

 {
      pte_t pte = pte_val(*p);

      huge_pte_clear(mm, addr, p);
      return pte;

}

Or maybe it is not that easy if different powerpc platforms provide their own. It might be worth checking though.

Quoted 5 lines
arch/powerpc/include/asm/hugetlb.h +0 -0
 }
 
 #define __HAVE_ARCH_HUGE_PTEP_SET_WRPROTECT
@@ -63,7 +50,14 @@ static inline void huge_ptep_set_wrprotect(struct mm_struct *mm,
 	unsigned long clr = ~pte_val(pte_wrprotect(__pte(~0)));

arch/powerpc/include/asm/hugetlb.h static inline void huge_ptep_set_wrprotect(struct mm_struct *mm, · line 59

Quoted 10 lines
arch/powerpc/include/asm/hugetlb.h +7 -1
 	unsigned long set = pte_val(pte_wrprotect(__pte(0)));
 
-	pte_update(mm, addr, ptep, clr, set, 1);
+	pmd_t *pmdp = (pmd_t *)ptep;
+
+	if (pmdp == pmd_off(mm, ALIGN_DOWN(addr, SZ_8M))) {
+		pte_update(mm, addr, pte_offset_kernel(pmdp, 0), clr, set, 1);
+		pte_update(mm, addr, pte_offset_kernel(pmdp + 1, 0), clr, set, 1);
+	} else {
+		pte_update(mm, addr, ptep, clr, set, 1);

I would replace the "1" with "is_huge" or "huge", as being done in __ptep_set_access_flags , something that makes it more clear without the need to check pte_update().

Quoted 5 lines
arch/powerpc/include/asm/hugetlb.h +0 -0
 #endif /* _ASM_POWERPC_PGALLOC_32_H */
arch/powerpc/include/asm/nohash/32/pte-8xx.h +0 -0
index 07df6b664861..b05cc4f87713 100644

...

Quoted 3 lines

- * For other page sizes, we have a single entry in the table.
+ * For 8M pages, we have 1024 entries as if it was
+ * 4M pages, but they are flagged as 8M pages for the hardware.

Maybe drop a comment that a single PMD entry is worth 4MB, so

arch/powerpc/include/asm/nohash/32/pte-8xx.h static inline unsigned long pte_leaf_size(pmd_t pmd, pte_t pte) · line 182

Quoted 13 lines

+ * For 4k pages, we have a single entry in the table. */

arch/powerpc/include/asm/nohash/32/pte-8xx.h +2 -5
-static pmd_t *pmd_off(struct mm_struct *mm, unsigned long addr);
-static int hugepd_ok(hugepd_t hpd);
-
 static inline int number_of_cells_per_pte(pmd_t *pmd, pte_basic_t val, int huge)
 {
 	if (!huge)
 		return PAGE_SIZE / SZ_4K;
-	else if (hugepd_ok(*((hugepd_t *)pmd)))
-		return 1;
+	else if ((pmd_val(*pmd) & _PMD_PAGE_MASK) == _PMD_PAGE_8M)
+		return SZ_4M / SZ_4K;

this becomes more intuitive.

Quoted 7 lines
arch/powerpc/include/asm/nohash/32/pte-8xx.h +7 -0
+static inline void pmd_populate_kernel_size(struct mm_struct *mm, pmd_t *pmdp,
+					    pte_t *pte, unsigned long sz)
+{
+	if (sz == SZ_8M)
+		*pmdp = __pmd(__pa(pte) | _PMD_PRESENT | _PMD_PAGE_8M);
+	else
+		*pmdp = __pmd(__pa(pte) | _PMD_PRESENT);

arch/powerpc/include/asm/nohash/32/pte-8xx.h static inline pte_t ptep_get(pte_t *ptep) · line 241

Quoted 10 lines
arch/powerpc/include/asm/nohash/32/pte-8xx.h +10 -0
+}
+
+static inline void pmd_populate_size(struct mm_struct *mm, pmd_t *pmdp,
+				     pgtable_t pte_page, unsigned long sz)
+{
+	if (sz == SZ_8M)
+		*pmdp = __pmd(__pa(pte_page) | _PMD_USER | _PMD_PRESENT | _PMD_PAGE_8M);
+	else
+		*pmdp = __pmd(__pa(pte_page) | _PMD_USER | _PMD_PRESENT);
+}

In patch#1 you mentioned this will change with the removal of patch#1 and patch#2.

Quoted 20 lines
arch/powerpc/mm/hugetlbpage.c +2 -4
@@ -183,9 +183,6 @@ pte_t *huge_pte_alloc(struct mm_struct *mm, struct vm_area_struct *vma,
 	if (!hpdp)
 		return NULL;
 
-	if (IS_ENABLED(CONFIG_PPC_8xx) && pshift < PMD_SHIFT)
-		return pte_alloc_huge(mm, (pmd_t *)hpdp, addr, sz);
-
 	BUG_ON(!hugepd_none(*hpdp) && !hugepd_ok(*hpdp));
 
 	if (hugepd_none(*hpdp) && __hugepte_alloc(mm, hpdp, addr,
@@ -198,10 +195,18 @@ pte_t *huge_pte_alloc(struct mm_struct *mm, struct vm_area_struct *vma,
 pte_t *huge_pte_alloc(struct mm_struct *mm, struct vm_area_struct *vma,
 		      unsigned long addr, unsigned long sz)
 {
+	pmd_t *pmd = pmd_off(mm, addr);
+
 	if (sz < PMD_SIZE)
-		return pte_alloc_huge(mm, pmd_off(mm, addr), addr, sz);

arch/powerpc/mm/hugetlbpage.c pte_t *huge_pte_alloc(struct mm_struct *mm, struct vm_area_struct *vma, · line 209

Quoted 10 lines
arch/powerpc/mm/hugetlbpage.c +8 -1
+		return pte_alloc_huge(mm, pmd, addr, sz);
 
-	return NULL;
+	if (sz != SZ_8M)
+		return NULL;
+	if (!pte_alloc_huge(mm, pmd, addr, sz))
+		return NULL;
+	if (!pte_alloc_huge(mm, pmd + 1, addr, sz))
+		return NULL;
+	return (pte_t *)pmd;

I think that having the check for invalid huge page sizes upfront would make more sense, maybe just a matter of taste.

/* Unsupported size */
if (sz > PMD_SIZE && sz = SZ_8M)

     return NULL;

if (sz < PMD_SIZE)

    ...

/* 8MB huge pages */
...

return (pte_t *) pmd;

Also, I am not a big fan of the two separate pte_alloc_huge() for pmd#0+pmd#1, and I am thinking we might want to hide that within a function and drop a comment in there explaining why we are updatng both pmds.

Quoted 14 lines
arch/powerpc/mm/nohash/8xx.c +0 -6
index d93433e26ded..99f656b3f9f3 100644
@@ -48,20 +48,6 @@ unsigned long p_block_mapped(phys_addr_t pa)
 	return 0;
 }
 
-static pte_t __init *early_hugepd_alloc_kernel(hugepd_t *pmdp, unsigned long va)
-{
-	if (hpd_val(*pmdp) == 0) {
-		pte_t *ptep = memblock_alloc(sizeof(pte_basic_t), SZ_4K);
-
-		if (!ptep)

arch/powerpc/mm/nohash/8xx.c unsigned long p_block_mapped(phys_addr_t pa) · line 52

Quoted 10 lines
arch/powerpc/mm/nohash/8xx.c +0 -8
-			return NULL;
-
-		hugepd_populate_kernel((hugepd_t *)pmdp, ptep, PAGE_SHIFT_8M);
-		hugepd_populate_kernel((hugepd_t *)pmdp + 1, ptep, PAGE_SHIFT_8M);
-	}
-	return hugepte_offset(*(hugepd_t *)pmdp, va, PGDIR_SHIFT);
-}
-
 static int __ref __early_map_kernel_hugepage(unsigned long va, phys_addr_t pa,
 					     pgprot_t prot, int psize, bool new)

Am I blind or do we never use the 'new' parameter? I checked the tree and it seems we always pass it 'true'.

arch/powerpc/mm/nohash/8xx.c: err = __early_map_kernel_hugepage(v, p, prot, MMU_PAGE_512K, new);
arch/powerpc/mm/nohash/8xx.c: err = __early_map_kernel_hugepage(v, p, prot, MMU_PAGE_8M, new);
arch/powerpc/mm/nohash/8xx.c: err = __early_map_kernel_hugepage(v, p, prot, MMU_PAGE_512K, new);
arch/powerpc/mm/nohash/8xx.c:
__early_map_kernel_hugepage(VIRT_IMMR_BASE, PHYS_IMMR_BASE, PAGE_KERNEL_NCG, MMU_PAGE_512K, true);

I think we can drop the 'new' and the block code that tries to handle it?

Quoted 5 lines
arch/powerpc/mm/pgtable.c +0 -0
index acdf64c9b93e..59f0d7706d2f 100644
 

arch/powerpc/mm/pgtable.c void set_huge_pte_at(struct mm_struct *mm, unsigned long addr, pte_t *ptep, · line 326

Quoted 10 lines
arch/powerpc/mm/pgtable.c +10 -0
+void set_huge_pte_at(struct mm_struct *mm, unsigned long addr, pte_t *ptep,
+		     pte_t pte, unsigned long sz)
+{
+	pmd_t *pmdp = pmd_off(mm, addr);
+
+	pte = set_pte_filter(pte, addr);
+
+	if (sz == SZ_8M) {
+		__set_huge_pte_at(pmdp, pte_offset_kernel(pmdp, 0), pte_val(pte));
+		__set_huge_pte_at(pmdp, pte_offset_kernel(pmdp + 1, 0), pte_val(pte) + SZ_4M);

You also mentioned that this would slightly change after you drop patch#0 and patch#1.
The only comment I have right know would be to add a little comment explaining the layout (the replication of 1024 entries), or just something like "see comment from number_of_cells_per_pte".

Signature · 2 lines
Oscar Salvador
SUSE Labs
#25 lore raw

Re: [RFC PATCH v2 07/20] powerpc/8xx: Rework support for 8M pages using contiguous PTE entries

Le 24/05/2024 à 12:02, Oscar Salvador a écrit :

Quoted 9 lines · Christophe Leroy
Quoted 8 lines

In order to fit better with standard Linux page tables layout, add support for 8M pages using contiguous PTE entries in a standard page table. Page tables will then be populated with 1024 similar entries and two PMD entries will point to that page table.

The PMD entries also get a flag to tell it is addressing an 8M page, this is required for the HW tablewalk assistance.

Quoted 6 lines
Quoted 1 line

I guess that this will slightly change if you remove patch#1 and patch#2 as you said you will.
So I will not comment on the overall design because I do not know how it will look afterwards, but just some things that caught my eye

Sure. I should send-out a v3 today or tomorrow, once I've done a few more tests.

Quoted 15 lines

arch/powerpc/include/asm/hugetlb.h void hugetlb_free_pgd_range(struct mmu_gather *tlb, unsigned long addr, · line 47

Quoted 12 lines
arch/powerpc/include/asm/hugetlb.h +4 -1
@@ -41,7 +41,16 @@ void hugetlb_free_pgd_range(struct mmu_gather *tlb, unsigned long addr,
  static inline pte_t huge_ptep_get_and_clear(struct mm_struct *mm,
  					    unsigned long addr, pte_t *ptep)
  {
-	return __pte(pte_update(mm, addr, ptep, ~0UL, 0, 1));
+	pmd_t *pmdp = (pmd_t *)ptep;
+	pte_t pte;
+
+	if (IS_ENABLED(CONFIG_PPC_8xx) && pmdp == pmd_off(mm, ALIGN_DOWN(addr, SZ_8M))) {

There are quite some places where you do the "pmd_off" to check whether that is a 8MB entry.

I refactored the code, now I have only two places with it: pte_update() and huge_ptep_get()

By the way it doesn't check that PMD is 8M, it checks that the ptep points to the first PMD entry matching the said address.

Quoted 14 lines

I think it would make somse sense to have some kind of macro/function to make more clear what we are checking against.
e.g:

#define pmd_is_SZ_8M(mm, addr, pmdp) (pmdp == pmd_off(mm, ALIGN_DOWN(addr, SZ_8M))) (or whatever name you see fit)

then you would just need

  if (IS_ENABLED(CONFIG_PPC_8xx && pmd_is_SZ_8M(mm, addr, pdmp))

Because I see that is also scaterred in 8xx code.

Quoted 6 lines

arch/powerpc/include/asm/hugetlb.h void hugetlb_free_pgd_range(struct mmu_gather *tlb, unsigned long addr, · line 49

Quoted 2 lines
arch/powerpc/include/asm/hugetlb.h +2 -0
+		pte = __pte(pte_update(mm, addr, pte_offset_kernel(pmdp, 0), ~0UL, 0, 1));
+		pte_update(mm, addr, pte_offset_kernel(pmdp + 1, 0), ~0UL, 0, 1);

I have this fresh one because I recently read about 8xx pagetables, but not sure how my memory will survive this, so maybe throw a little comment in there that we are pointing the two pmds to the area.

The two PMD are now pointing to there own areas, we are not anymore in the hugepd case where the PMD was pointing to a single HUGEPD containing a single HUGEPTE.

Quoted 11 lines

Also, the way we pass the parameters here to pte_update() is a bit awkward. Ideally we should be using some meaningful names?

clr_all_bits = ~0UL
set_bits = 0
bool is_huge = true

pte_update(mm, addr, pte_offset_kernel(pmdp + 1, 0), clr_all_bits, set_bits, is_huge)

or something along those lines

Well, with my refactoring those functions are not modified anymore so I won't change them.

Quoted 7 lines

arch/powerpc/include/asm/hugetlb.h void hugetlb_free_pgd_range(struct mmu_gather *tlb, unsigned long addr, · line 50

Quoted 5 lines
arch/powerpc/include/asm/hugetlb.h +1 -3
-static inline int check_and_get_huge_psize(int shift)
-{
-	return shift_to_mmu_psize(shift);
+	if (pmdp == pmd_off(mm, ALIGN_DOWN(addr, SZ_8M)))

Here you could also use the pmd_is_SZ_8M()

Yes, may do that.

Quoted 5 lines
Quoted 5 lines
arch/powerpc/include/asm/hugetlb.h +2 -0
+		ptep = pte_offset_kernel(pmdp, 0);
+	return ptep_get(ptep);
  }
Quoted 16 lines
Quoted 4 lines
  #define __HAVE_ARCH_HUGE_SET_HUGE_PTE_AT
arch/powerpc/include/asm/hugetlb.h +0 -0
@@ -53,7 +33,14 @@ void set_huge_pte_at(struct mm_struct *mm, unsigned long addr, pte_t *ptep,
  static inline void huge_pte_clear(struct mm_struct *mm, unsigned long addr,
  				  pte_t *ptep, unsigned long sz)

arch/powerpc/include/asm/hugetlb.h void set_huge_pte_at(struct mm_struct *mm, unsigned long addr, pte_t *ptep, · line 43

Quoted 10 lines
arch/powerpc/include/asm/hugetlb.h +8 -1
  {
-	pte_update(mm, addr, ptep, ~0UL, 0, 1);
+	pmd_t *pmdp = (pmd_t *)ptep;
+
+	if (pmdp == pmd_off(mm, ALIGN_DOWN(addr, SZ_8M))) {
+		pte_update(mm, addr, pte_offset_kernel(pmdp, 0), ~0UL, 0, 1);
+		pte_update(mm, addr, pte_offset_kernel(pmdp + 1, 0), ~0UL, 0, 1);
+	} else {
+		pte_update(mm, addr, ptep, ~0UL, 0, 1);
+	}

Could we not leverage this in huge_ptep_get_and_clear()?

I'm not modifying that anymore

Quoted 20 lines

AFAICS,

  huge_pet_get_and_clear(mm, addr, pte_t *p)
  {
       pte_t pte = pte_val(*p);
       huge_pte_clear(mm, addr, p);
       return pte;

}

Or maybe it is not that easy if different powerpc platforms provide their own. It might be worth checking though.

Quoted 7 lines
arch/powerpc/include/asm/hugetlb.h +0 -0
  }
 
  #define __HAVE_ARCH_HUGE_PTEP_SET_WRPROTECT
@@ -63,7 +50,14 @@ static inline void huge_ptep_set_wrprotect(struct mm_struct *mm,
  	unsigned long clr = ~pte_val(pte_wrprotect(__pte(~0)));
  	unsigned long set = pte_val(pte_wrprotect(__pte(0)));
 
Quoted 12 lines

arch/powerpc/include/asm/hugetlb.h static inline void huge_ptep_set_wrprotect(struct mm_struct *mm, · line 59

Quoted 8 lines
arch/powerpc/include/asm/hugetlb.h +7 -1
-	pte_update(mm, addr, ptep, clr, set, 1);
+	pmd_t *pmdp = (pmd_t *)ptep;
+
+	if (pmdp == pmd_off(mm, ALIGN_DOWN(addr, SZ_8M))) {
+		pte_update(mm, addr, pte_offset_kernel(pmdp, 0), clr, set, 1);
+		pte_update(mm, addr, pte_offset_kernel(pmdp + 1, 0), clr, set, 1);
+	} else {
+		pte_update(mm, addr, ptep, clr, set, 1);

I would replace the "1" with "is_huge" or "huge", as being done in __ptep_set_access_flags , something that makes it more clear without the need to check pte_update().

It's not modified anymore

Quoted 8 lines
Quoted 7 lines
arch/powerpc/include/asm/hugetlb.h +0 -0
  #endif /* _ASM_POWERPC_PGALLOC_32_H */
arch/powerpc/include/asm/nohash/32/pte-8xx.h +0 -0
index 07df6b664861..b05cc4f87713 100644

...

Quoted 5 lines
Quoted 3 lines

- * For other page sizes, we have a single entry in the table.
+ * For 8M pages, we have 1024 entries as if it was
+ * 4M pages, but they are flagged as 8M pages for the hardware.

Maybe drop a comment that a single PMD entry is worth 4MB, so

Ok, added that the 4M is indeed PMD_SIZE

Quoted 30 lines
Quoted 4 lines

+ * For 4k pages, we have a single entry in the table. */

arch/powerpc/include/asm/nohash/32/pte-8xx.h +0 -1
-static pmd_t *pmd_off(struct mm_struct *mm, unsigned long addr);

arch/powerpc/include/asm/nohash/32/pte-8xx.h static inline unsigned long pte_leaf_size(pmd_t pmd, pte_t pte) · line 182

Quoted 10 lines
arch/powerpc/include/asm/nohash/32/pte-8xx.h +2 -4
-static int hugepd_ok(hugepd_t hpd);
-
  static inline int number_of_cells_per_pte(pmd_t *pmd, pte_basic_t val, int huge)
  {
  	if (!huge)
  		return PAGE_SIZE / SZ_4K;
-	else if (hugepd_ok(*((hugepd_t *)pmd)))
-		return 1;
+	else if ((pmd_val(*pmd) & _PMD_PAGE_MASK) == _PMD_PAGE_8M)
+		return SZ_4M / SZ_4K;

this becomes more intuitive.

Quoted 12 lines
arch/powerpc/include/asm/nohash/32/pte-8xx.h +12 -0
+static inline void pmd_populate_kernel_size(struct mm_struct *mm, pmd_t *pmdp,
+					    pte_t *pte, unsigned long sz)
+{
+	if (sz == SZ_8M)
+		*pmdp = __pmd(__pa(pte) | _PMD_PRESENT | _PMD_PAGE_8M);
+	else
+		*pmdp = __pmd(__pa(pte) | _PMD_PRESENT);
+}
+
+static inline void pmd_populate_size(struct mm_struct *mm, pmd_t *pmdp,
+				     pgtable_t pte_page, unsigned long sz)
+{
Quoted 8 lines

arch/powerpc/include/asm/nohash/32/pte-8xx.h static inline pte_t ptep_get(pte_t *ptep) · line 241

Quoted 5 lines
arch/powerpc/include/asm/nohash/32/pte-8xx.h +5 -0
+	if (sz == SZ_8M)
+		*pmdp = __pmd(__pa(pte_page) | _PMD_USER | _PMD_PRESENT | _PMD_PAGE_8M);
+	else
+		*pmdp = __pmd(__pa(pte_page) | _PMD_USER | _PMD_PRESENT);
+}

In patch#1 you mentioned this will change with the removal of patch#1 and patch#2.

Yes this goes away.

Quoted 23 lines
Quoted 23 lines
arch/powerpc/mm/hugetlbpage.c +3 -4
@@ -183,9 +183,6 @@ pte_t *huge_pte_alloc(struct mm_struct *mm, struct vm_area_struct *vma,
  	if (!hpdp)
  		return NULL;
 
-	if (IS_ENABLED(CONFIG_PPC_8xx) && pshift < PMD_SHIFT)
-		return pte_alloc_huge(mm, (pmd_t *)hpdp, addr, sz);
-
  	BUG_ON(!hugepd_none(*hpdp) && !hugepd_ok(*hpdp));
 
  	if (hugepd_none(*hpdp) && __hugepte_alloc(mm, hpdp, addr,
@@ -198,10 +195,18 @@ pte_t *huge_pte_alloc(struct mm_struct *mm, struct vm_area_struct *vma,
  pte_t *huge_pte_alloc(struct mm_struct *mm, struct vm_area_struct *vma,
  		      unsigned long addr, unsigned long sz)
  {
+	pmd_t *pmd = pmd_off(mm, addr);
+
  	if (sz < PMD_SIZE)
-		return pte_alloc_huge(mm, pmd_off(mm, addr), addr, sz);
+		return pte_alloc_huge(mm, pmd, addr, sz);
 
Quoted 11 lines

arch/powerpc/mm/hugetlbpage.c pte_t *huge_pte_alloc(struct mm_struct *mm, struct vm_area_struct *vma, · line 209

Quoted 8 lines
arch/powerpc/mm/hugetlbpage.c +7 -1
-	return NULL;
+	if (sz != SZ_8M)
+		return NULL;
+	if (!pte_alloc_huge(mm, pmd, addr, sz))
+		return NULL;
+	if (!pte_alloc_huge(mm, pmd + 1, addr, sz))
+		return NULL;
+	return (pte_t *)pmd;

I think that having the check for invalid huge page sizes upfront would make more sense, maybe just a matter of taste.

Well, it would make it less easy when we go one step further to support e500 and book3s/64. I prefer to do it that way to keep it as flat as possible and avoid a deep if ... if ... if

By the way I have now squashed patch 11 into patch 5.

Quoted 7 lines
  /* Unsupported size */
  if (sz > PMD_SIZE && sz = SZ_8M)
      return NULL;

if (sz < PMD_SIZE)

     ...
Quoted 8 lines

/* 8MB huge pages */
...

  return (pte_t *) pmd;

Also, I am not a big fan of the two separate pte_alloc_huge() for pmd#0+pmd#1, and I am thinking we might want to hide that within a function and drop a comment in there explaining why we are updatng both pmds.

Now changed to:

+ for (i = 0; i < sz / PMD_SIZE; i++) {
+ if (!pte_alloc_huge(mm, pmd + i, addr))
+ return NULL;
+ }

Quoted 22 lines
Quoted 22 lines
arch/powerpc/mm/nohash/8xx.c +0 -11
index d93433e26ded..99f656b3f9f3 100644
@@ -48,20 +48,6 @@ unsigned long p_block_mapped(phys_addr_t pa)
  	return 0;
  }
 
-static pte_t __init *early_hugepd_alloc_kernel(hugepd_t *pmdp, unsigned long va)
-{
-	if (hpd_val(*pmdp) == 0) {
-		pte_t *ptep = memblock_alloc(sizeof(pte_basic_t), SZ_4K);
-
-		if (!ptep)
-			return NULL;
-
-		hugepd_populate_kernel((hugepd_t *)pmdp, ptep, PAGE_SHIFT_8M);
-		hugepd_populate_kernel((hugepd_t *)pmdp + 1, ptep, PAGE_SHIFT_8M);
-	}
Quoted 8 lines

arch/powerpc/mm/nohash/8xx.c unsigned long p_block_mapped(phys_addr_t pa) · line 52

Quoted 5 lines
arch/powerpc/mm/nohash/8xx.c +0 -3
-	return hugepte_offset(*(hugepd_t *)pmdp, va, PGDIR_SHIFT);
-}
-
  static int __ref __early_map_kernel_hugepage(unsigned long va, phys_addr_t pa,
  					     pgprot_t prot, int psize, bool new)

Am I blind or do we never use the 'new' parameter? I checked the tree and it seems we always pass it 'true'.

You must be blind :)

$ git grep mmu_mapin_ram_chunk
arch/powerpc/mm/nohash/8xx.c:static int mmu_mapin_ram_chunk(unsigned 
long offset, unsigned long top,
arch/powerpc/mm/nohash/8xx.c:   mmu_mapin_ram_chunk(0, boundary, 
PAGE_KERNEL_TEXT, true);
arch/powerpc/mm/nohash/8xx.c:           mmu_mapin_ram_chunk(boundary, 
einittext8, PAGE_KERNEL_TEXT, true);
arch/powerpc/mm/nohash/8xx.c:           mmu_mapin_ram_chunk(einittext8, 
top, PAGE_KERNEL, true);
arch/powerpc/mm/nohash/8xx.c:           err = 
mmu_mapin_ram_chunk(boundary, einittext8, PAGE_KERNEL, false);
arch/powerpc/mm/nohash/8xx.c:   err = mmu_mapin_ram_chunk(0, sinittext, 
PAGE_KERNEL_ROX, false);
Quoted 15 lines

arch/powerpc/mm/nohash/8xx.c: err = __early_map_kernel_hugepage(v, p, prot, MMU_PAGE_512K, new);
arch/powerpc/mm/nohash/8xx.c: err = __early_map_kernel_hugepage(v, p, prot, MMU_PAGE_8M, new);
arch/powerpc/mm/nohash/8xx.c: err = __early_map_kernel_hugepage(v, p, prot, MMU_PAGE_512K, new);
arch/powerpc/mm/nohash/8xx.c:
__early_map_kernel_hugepage(VIRT_IMMR_BASE, PHYS_IMMR_BASE, PAGE_KERNEL_NCG, MMU_PAGE_512K, true);

I think we can drop the 'new' and the block code that tries to handle it?

Quoted 4 lines
arch/powerpc/mm/pgtable.c +0 -0
index acdf64c9b93e..59f0d7706d2f 100644
Quoted 17 lines

arch/powerpc/mm/pgtable.c void set_huge_pte_at(struct mm_struct *mm, unsigned long addr, pte_t *ptep, · line 326

Quoted 10 lines
arch/powerpc/mm/pgtable.c +10 -0
+void set_huge_pte_at(struct mm_struct *mm, unsigned long addr, pte_t *ptep,
+		     pte_t pte, unsigned long sz)
+{
+	pmd_t *pmdp = pmd_off(mm, addr);
+
+	pte = set_pte_filter(pte, addr);
+
+	if (sz == SZ_8M) {
+		__set_huge_pte_at(pmdp, pte_offset_kernel(pmdp, 0), pte_val(pte));
+		__set_huge_pte_at(pmdp, pte_offset_kernel(pmdp + 1, 0), pte_val(pte) + SZ_4M);

You also mentioned that this would slightly change after you drop patch#0 and patch#1.
The only comment I have right know would be to add a little comment explaining the layout (the replication of 1024 entries), or just something like "see comment from number_of_cells_per_pte".

Done.

Thanks for the rewiew.
Christophe

#26 lore raw

RFC PATCH v2 8/20 powerpc/8xx: Simplify struct mmu_psize_def

In reply to Christophe Leroy

On 8xx, only the shift field is used in struct mmu_psize_def

Remove other fields and related macros.

---
 arch/powerpc/include/asm/nohash/32/mmu-8xx.h | 9 ++-------
 1 file changed, 2 insertions(+), 7 deletions(-)
arch/powerpc/include/asm/nohash/32/mmu-8xx.h +2 -7
index 141d82e249a8..a756a1e59c54 100644
@@ -189,19 +189,14 @@ typedef struct {
 
 #define PHYS_IMMR_BASE (mfspr(SPRN_IMMR) & 0xfff80000)
 
-/* Page size definitions, common between 32 and 64-bit
+/*
+ * Page size definitions for 8xx
  *
  *    shift : is the "PAGE_SHIFT" value for that page size
- *    penc  : is the pte encoding mask
  *
  */
 struct mmu_psize_def {
 	unsigned int	shift;	/* number of bits */
-	unsigned int	enc;	/* PTE encoding */
-	unsigned int    ind;    /* Corresponding indirect page size shift */
-	unsigned int	flags;
-#define MMU_PAGE_SIZE_DIRECT	0x1	/* Supported as a direct size */
-#define MMU_PAGE_SIZE_INDIRECT	0x2	/* Supported as an indirect size */
 };
 
 extern struct mmu_psize_def mmu_psize_defs[MMU_PAGE_COUNT];
Signature · 1 line
2.44.0
#28 lore raw

RFC PATCH v2 9/20 powerpc/mm: Remove _PAGE_PSIZE

In reply to Christophe Leroy

_PAGE_PSIZE macro is never used outside the place it is defined and is used only on 8xx and e500.

Remove indirection, remove it and use its content directly.

---
 arch/powerpc/include/asm/nohash/32/pte-40x.h  | 3 ---
 arch/powerpc/include/asm/nohash/32/pte-44x.h  | 3 ---
 arch/powerpc/include/asm/nohash/32/pte-85xx.h | 3 ---
 arch/powerpc/include/asm/nohash/32/pte-8xx.h  | 5 ++---
 arch/powerpc/include/asm/nohash/pte-e500.h    | 4 +---
 5 files changed, 3 insertions(+), 15 deletions(-)
arch/powerpc/include/asm/nohash/32/pte-40x.h +0 -3
index d759cfd74754..52ed58516fa4 100644
@@ -49,9 +49,6 @@
 #define _PAGE_EXEC	0x200	/* hardware: EX permission */
 #define _PAGE_ACCESSED	0x400	/* software: R: page referenced */
 
-/* No page size encoding in the linux PTE */
-#define _PAGE_PSIZE		0
-
 /* cache related flags non existing on 40x */
 #define _PAGE_COHERENT	0
 
arch/powerpc/include/asm/nohash/32/pte-44x.h +0 -3
index 851813725237..da0469928273 100644
@@ -75,9 +75,6 @@
 #define _PAGE_NO_CACHE	0x00000400		/* H: I bit */
 #define _PAGE_WRITETHRU	0x00000800		/* H: W bit */
 
-/* No page size encoding in the linux PTE */
-#define _PAGE_PSIZE		0
-
 /* TODO: Add large page lowmem mapping support */
 #define _PMD_PRESENT	0
 #define _PMD_PRESENT_MASK (PAGE_MASK)
arch/powerpc/include/asm/nohash/32/pte-85xx.h +0 -3
index 653a342d3b25..14d64b4f3f14 100644
@@ -31,9 +31,6 @@
 #define _PAGE_WRITETHRU	0x00400	/* H: W bit */
 #define _PAGE_SPECIAL	0x00800 /* S: Special page */
 
-/* No page size encoding in the linux PTE */
-#define _PAGE_PSIZE		0
-
 #define _PMD_PRESENT	0
 #define _PMD_PRESENT_MASK (PAGE_MASK)
 #define _PMD_BAD	(~PAGE_MASK)
arch/powerpc/include/asm/nohash/32/pte-8xx.h +2 -3
index b05cc4f87713..e5bf0d29c7db 100644
@@ -74,12 +74,11 @@
 #define _PTE_NONE_MASK	0
 
 #ifdef CONFIG_PPC_16K_PAGES
-#define _PAGE_PSIZE	_PAGE_SPS
+#define _PAGE_BASE_NC	(_PAGE_PRESENT | _PAGE_ACCESSED | _PAGE_SPS)
 #else
-#define _PAGE_PSIZE		0
+#define _PAGE_BASE_NC	(_PAGE_PRESENT | _PAGE_ACCESSED)
 #endif
 
-#define _PAGE_BASE_NC	(_PAGE_PRESENT | _PAGE_ACCESSED | _PAGE_PSIZE)
 #define _PAGE_BASE	(_PAGE_BASE_NC)
 
 #include <asm/pgtable-masks.h>
arch/powerpc/include/asm/nohash/pte-e500.h +1 -3
index f516f0b5b7a8..975facc7e38e 100644
@@ -65,8 +65,6 @@
 
 #define _PAGE_SPECIAL	_PAGE_SW0
 
-/* Base page size */
-#define _PAGE_PSIZE	_PAGE_PSIZE_4K
 #define	PTE_RPN_SHIFT	(24)
 
 #define PTE_WIMGE_SHIFT (19)
@@ -89,7 +87,7 @@
  * pages. We always set _PAGE_COHERENT when SMP is enabled or
  * the processor might need it for DMA coherency.
  */
-#define _PAGE_BASE_NC	(_PAGE_PRESENT | _PAGE_ACCESSED | _PAGE_PSIZE)
+#define _PAGE_BASE_NC	(_PAGE_PRESENT | _PAGE_ACCESSED | _PAGE_PSIZE_4K)
 #if defined(CONFIG_SMP)
 #define _PAGE_BASE	(_PAGE_BASE_NC | _PAGE_COHERENT)
 #else
Signature · 1 line
2.44.0
#30 lore raw

RFC PATCH v2 10/20 powerpc/mm: Fix __find_linux_pte() on 32 bits with PMD leaf entries

In reply to Christophe Leroy

Building on 32 bits with pmd_leaf() not returning always false leads to the following error:

CC arch/powerpc/mm/pgtable.o
arch/powerpc/mm/pgtable.c: In function '__find_linux_pte':
arch/powerpc/mm/pgtable.c:506:1: error: function may return address of local variable [-Werror=return-local-addr]
506 | }

      | ^

arch/powerpc/mm/pgtable.c:394:15: note: declared here
394 | pud_t pud, *pudp;
| ^~~
arch/powerpc/mm/pgtable.c:394:15: note: declared here

This is due to pmd_offset() being a no-op in that case.

So rework it for powerpc/32 so that pXd_offset() are used on real pointers and not on on-stack copies.

---
 arch/powerpc/mm/pgtable.c | 14 ++++++++++++--
 1 file changed, 12 insertions(+), 2 deletions(-)
arch/powerpc/mm/pgtable.c +12 -2
index 59f0d7706d2f..51ee508eeb5b 100644
@@ -390,8 +390,12 @@ pte_t *__find_linux_pte(pgd_t *pgdir, unsigned long ea,
 			bool *is_thp, unsigned *hpage_shift)
 {
 	pgd_t *pgdp;
-	p4d_t p4d, *p4dp;
-	pud_t pud, *pudp;
+	p4d_t *p4dp;
+	pud_t *pudp;
+#ifdef CONFIG_PPC64
+	p4d_t p4d;
+	pud_t pud;
+#endif
 	pmd_t pmd, *pmdp;
 	pte_t *ret_pte;
 	hugepd_t *hpdp = NULL;
@@ -412,6 +416,7 @@ pte_t *__find_linux_pte(pgd_t *pgdir, unsigned long ea,
 	 */
 	pgdp = pgdir + pgd_index(ea);
 	p4dp = p4d_offset(pgdp, ea);
+#ifdef CONFIG_PPC64
 	p4d  = READ_ONCE(*p4dp);
 	pdshift = P4D_SHIFT;
 
@@ -452,6 +457,11 @@ pte_t *__find_linux_pte(pgd_t *pgdir, unsigned long ea,
 
 	pdshift = PMD_SHIFT;
 	pmdp = pmd_offset(&pud, ea);
+#else
+	p4dp = p4d_offset(pgdp, ea);
+	pudp = pud_offset(p4dp, ea);
+	pmdp = pmd_offset(pudp, ea);
+#endif
 	pmd  = READ_ONCE(*pmdp);
 
 	/*
Signature · 1 line
2.44.0
maintainer
#31 lore raw

Re: [RFC PATCH v2 10/20] powerpc/mm: Fix __find_linux_pte() on 32 bits with PMD leaf entries

Quoted 2 lines · Christophe Leroy

Building on 32 bits with pmd_leaf() not returning always false leads to the following error:

I am curious though.
pmd_leaf is only defined in include/linux/pgtable.h for 32bits, and is hardcoded to false.
I do not see where we change it in previous patches, so is this artificial?

Quoted 5 lines

CC arch/powerpc/mm/pgtable.o
arch/powerpc/mm/pgtable.c: In function '__find_linux_pte':
arch/powerpc/mm/pgtable.c:506:1: error: function may return address of local variable [-Werror=return-local-addr]
506 | }

Quoted 7 lines
      | ^

arch/powerpc/mm/pgtable.c:394:15: note: declared here
394 | pud_t pud, *pudp;
| ^~~
arch/powerpc/mm/pgtable.c:394:15: note: declared here

This is due to pmd_offset() being a no-op in that case.

This is because 32bits powerpc include pgtable-nopmd.h?

Quoted 36 lines

So rework it for powerpc/32 so that pXd_offset() are used on real pointers and not on on-stack copies.

---
 arch/powerpc/mm/pgtable.c | 14 ++++++++++++--
 1 file changed, 12 insertions(+), 2 deletions(-)
arch/powerpc/mm/pgtable.c +7 -2
index 59f0d7706d2f..51ee508eeb5b 100644
@@ -390,8 +390,12 @@ pte_t *__find_linux_pte(pgd_t *pgdir, unsigned long ea,
 			bool *is_thp, unsigned *hpage_shift)
 {
 	pgd_t *pgdp;
-	p4d_t p4d, *p4dp;
-	pud_t pud, *pudp;
+	p4d_t *p4dp;
+	pud_t *pudp;
+#ifdef CONFIG_PPC64
+	p4d_t p4d;
+	pud_t pud;
+#endif
 	pmd_t pmd, *pmdp;
 	pte_t *ret_pte;
 	hugepd_t *hpdp = NULL;
@@ -412,6 +416,7 @@ pte_t *__find_linux_pte(pgd_t *pgdir, unsigned long ea,
 	 */
 	pgdp = pgdir + pgd_index(ea);
 	p4dp = p4d_offset(pgdp, ea);
+#ifdef CONFIG_PPC64
 	p4d  = READ_ONCE(*p4dp);
 	pdshift = P4D_SHIFT;
 

arch/powerpc/mm/pgtable.c pte_t *__find_linux_pte(pgd_t *pgdir, unsigned long ea, · line 463

Quoted 7 lines
arch/powerpc/mm/pgtable.c +4 -0
@@ -452,6 +457,11 @@ pte_t *__find_linux_pte(pgd_t *pgdir, unsigned long ea,
 
 	pdshift = PMD_SHIFT;
 	pmdp = pmd_offset(&pud, ea);
+#else
+	p4dp = p4d_offset(pgdp, ea);
+	pudp = pud_offset(p4dp, ea);
+	pmdp = pmd_offset(pudp, ea);

I would drop a comment on top explaining that these are no-op for 32bits, otherwise it might not be obvious to people as why this distiction between 64 and 32bits.

Other than that looks good to me

Signature · 2 lines
Oscar Salvador
SUSE Labs
#32 lore raw

Re: [RFC PATCH v2 10/20] powerpc/mm: Fix __find_linux_pte() on 32 bits with PMD leaf entries

Le 25/05/2024 à 06:12, Oscar Salvador a écrit :

Quoted 8 lines · Christophe Leroy
Quoted 2 lines

Building on 32 bits with pmd_leaf() not returning always false leads to the following error:

I am curious though.
pmd_leaf is only defined in include/linux/pgtable.h for 32bits, and is hardcoded to false.
I do not see where we change it in previous patches, so is this artificial?

Patch 17 brings pmd_leaf()

Quoted 53 lines
Quoted 6 lines

CC arch/powerpc/mm/pgtable.o
arch/powerpc/mm/pgtable.c: In function '__find_linux_pte':
arch/powerpc/mm/pgtable.c:506:1: error: function may return address of local variable [-Werror=return-local-addr]
506 | }

Quoted 7 lines
       | ^

arch/powerpc/mm/pgtable.c:394:15: note: declared here
394 | pud_t pud, *pudp;
| ^~~
arch/powerpc/mm/pgtable.c:394:15: note: declared here

This is due to pmd_offset() being a no-op in that case.

This is because 32bits powerpc include pgtable-nopmd.h?

Quoted 37 lines

So rework it for powerpc/32 so that pXd_offset() are used on real pointers and not on on-stack copies.

---
  arch/powerpc/mm/pgtable.c | 14 ++++++++++++--
  1 file changed, 12 insertions(+), 2 deletions(-)
arch/powerpc/mm/pgtable.c +7 -2
index 59f0d7706d2f..51ee508eeb5b 100644
@@ -390,8 +390,12 @@ pte_t *__find_linux_pte(pgd_t *pgdir, unsigned long ea,
  			bool *is_thp, unsigned *hpage_shift)
  {
  	pgd_t *pgdp;
-	p4d_t p4d, *p4dp;
-	pud_t pud, *pudp;
+	p4d_t *p4dp;
+	pud_t *pudp;
+#ifdef CONFIG_PPC64
+	p4d_t p4d;
+	pud_t pud;
+#endif
  	pmd_t pmd, *pmdp;
  	pte_t *ret_pte;
  	hugepd_t *hpdp = NULL;
@@ -412,6 +416,7 @@ pte_t *__find_linux_pte(pgd_t *pgdir, unsigned long ea,
  	 */
  	pgdp = pgdir + pgd_index(ea);
  	p4dp = p4d_offset(pgdp, ea);
+#ifdef CONFIG_PPC64
  	p4d  = READ_ONCE(*p4dp);
  	pdshift = P4D_SHIFT;
 
@@ -452,6 +457,11 @@ pte_t *__find_linux_pte(pgd_t *pgdir, unsigned long ea,
 
Quoted 10 lines

arch/powerpc/mm/pgtable.c pte_t *__find_linux_pte(pgd_t *pgdir, unsigned long ea, · line 463

Quoted 6 lines
arch/powerpc/mm/pgtable.c +4 -0
  	pdshift = PMD_SHIFT;
  	pmdp = pmd_offset(&pud, ea);
+#else
+	p4dp = p4d_offset(pgdp, ea);
+	pudp = pud_offset(p4dp, ea);
+	pmdp = pmd_offset(pudp, ea);

I would drop a comment on top explaining that these are no-op for 32bits, otherwise it might not be obvious to people as why this distiction between 64 and 32bits.

Ok

Quoted 5 lines

Other than that looks good to me

#33 lore raw

RFC PATCH v2 11/20 powerpc/mm: Complement huge_pte_alloc() for all non HUGEPD setups

In reply to Christophe Leroy

huge_pte_alloc() for non-HUGEPD targets is reserved for 8xx at the moment. In order to convert other targets for non-HUGEPD, complement huge_pte_alloc() to support any standard cont-PxD setup.

---
 arch/powerpc/mm/hugetlbpage.c | 25 ++++++++++++++++++++++++-
 1 file changed, 24 insertions(+), 1 deletion(-)
arch/powerpc/mm/hugetlbpage.c +24 -1
index 42b12e1ec851..f8aefa1e7363 100644
@@ -195,11 +195,34 @@ pte_t *huge_pte_alloc(struct mm_struct *mm, struct vm_area_struct *vma,
 pte_t *huge_pte_alloc(struct mm_struct *mm, struct vm_area_struct *vma,
 		      unsigned long addr, unsigned long sz)
 {
-	pmd_t *pmd = pmd_off(mm, addr);
+	pgd_t *pgd;
+	p4d_t *p4d;
+	pud_t *pud;
+	pmd_t *pmd;
+
+	addr &= ~(sz - 1);
+	pgd = pgd_offset(mm, addr);
+
+	p4d = p4d_offset(pgd, addr);
+	if (sz >= PGDIR_SIZE)
+		return (pte_t *)p4d;
+
+	pud = pud_alloc(mm, p4d, addr);
+	if (!pud)
+		return NULL;
+	if (sz >= PUD_SIZE)
+		return (pte_t *)pud;
+
+	pmd = pmd_alloc(mm, pud, addr);
+	if (!pmd)
+		return NULL;
 
 	if (sz < PMD_SIZE)
 		return pte_alloc_huge(mm, pmd, addr, sz);
 
+	if (!IS_ENABLED(CONFIG_PPC_8xx))
+		return (pte_t *)pmd;
+
 	if (sz != SZ_8M)
 		return NULL;
 	if (!pte_alloc_huge(mm, pmd, addr, sz))
Signature · 1 line
2.44.0
maintainer
#34 lore raw

Re: [RFC PATCH v2 11/20] powerpc/mm: Complement huge_pte_alloc() for all non HUGEPD setups

Quoted 35 lines · Christophe Leroy

huge_pte_alloc() for non-HUGEPD targets is reserved for 8xx at the moment. In order to convert other targets for non-HUGEPD, complement huge_pte_alloc() to support any standard cont-PxD setup.

---
 arch/powerpc/mm/hugetlbpage.c | 25 ++++++++++++++++++++++++-
 1 file changed, 24 insertions(+), 1 deletion(-)
arch/powerpc/mm/hugetlbpage.c +17 -1
index 42b12e1ec851..f8aefa1e7363 100644
@@ -195,11 +195,34 @@ pte_t *huge_pte_alloc(struct mm_struct *mm, struct vm_area_struct *vma,
 pte_t *huge_pte_alloc(struct mm_struct *mm, struct vm_area_struct *vma,
 		      unsigned long addr, unsigned long sz)
 {
-	pmd_t *pmd = pmd_off(mm, addr);
+	pgd_t *pgd;
+	p4d_t *p4d;
+	pud_t *pud;
+	pmd_t *pmd;
+
+	addr &= ~(sz - 1);
+	pgd = pgd_offset(mm, addr);
+
+	p4d = p4d_offset(pgd, addr);
+	if (sz >= PGDIR_SIZE)
+		return (pte_t *)p4d;
+
+	pud = pud_alloc(mm, p4d, addr);
+	if (!pud)
+		return NULL;
+	if (sz >= PUD_SIZE)
+		return (pte_t *)pud;

arch/powerpc/mm/hugetlbpage.c pte_t *huge_pte_alloc(struct mm_struct *mm, struct vm_area_struct *vma, · line 224

Quoted 10 lines
arch/powerpc/mm/hugetlbpage.c +6 -0
+
+	pmd = pmd_alloc(mm, pud, addr);
+	if (!pmd)
+		return NULL;
 
 	if (sz < PMD_SIZE)
 		return pte_alloc_huge(mm, pmd, addr, sz);
 
+	if (!IS_ENABLED(CONFIG_PPC_8xx))
+		return (pte_t *)pmd;

So only 8xx has cont-PMD for hugepages?

arch/powerpc/mm/hugetlbpage.c pte_t *huge_pte_alloc(struct mm_struct *mm, struct vm_area_struct *vma, · line 227

Quoted 3 lines
arch/powerpc/mm/hugetlbpage.c +1 -0
+
 	if (sz != SZ_8M)
 		return NULL;

Since this function is the core for allocation huge pages, I think it would benefit from a comment at the top explaining the possible layouts. e.g: Who can have cont-{P4d,PUD,PMD} etc.
A brief explanation of the possible scheme for all powerpc platforms.

That would help people looking into this in a future.

Signature · 2 lines
Oscar Salvador
SUSE Labs
#35 lore raw

Re: [RFC PATCH v2 11/20] powerpc/mm: Complement huge_pte_alloc() for all non HUGEPD setups

Le 25/05/2024 à 06:29, Oscar Salvador a écrit :

Quoted 41 lines · Christophe Leroy
Quoted 40 lines

huge_pte_alloc() for non-HUGEPD targets is reserved for 8xx at the moment. In order to convert other targets for non-HUGEPD, complement huge_pte_alloc() to support any standard cont-PxD setup.

---
  arch/powerpc/mm/hugetlbpage.c | 25 ++++++++++++++++++++++++-
  1 file changed, 24 insertions(+), 1 deletion(-)
arch/powerpc/mm/hugetlbpage.c +21 -1
index 42b12e1ec851..f8aefa1e7363 100644
@@ -195,11 +195,34 @@ pte_t *huge_pte_alloc(struct mm_struct *mm, struct vm_area_struct *vma,
  pte_t *huge_pte_alloc(struct mm_struct *mm, struct vm_area_struct *vma,
  		      unsigned long addr, unsigned long sz)
  {
-	pmd_t *pmd = pmd_off(mm, addr);
+	pgd_t *pgd;
+	p4d_t *p4d;
+	pud_t *pud;
+	pmd_t *pmd;
+
+	addr &= ~(sz - 1);
+	pgd = pgd_offset(mm, addr);
+
+	p4d = p4d_offset(pgd, addr);
+	if (sz >= PGDIR_SIZE)
+		return (pte_t *)p4d;
+
+	pud = pud_alloc(mm, p4d, addr);
+	if (!pud)
+		return NULL;
+	if (sz >= PUD_SIZE)
+		return (pte_t *)pud;
+
+	pmd = pmd_alloc(mm, pud, addr);
+	if (!pmd)
+		return NULL;
 
Quoted 7 lines

arch/powerpc/mm/hugetlbpage.c pte_t *huge_pte_alloc(struct mm_struct *mm, struct vm_area_struct *vma, · line 224

Quoted 5 lines
arch/powerpc/mm/hugetlbpage.c +2 -0
  	if (sz < PMD_SIZE)
  		return pte_alloc_huge(mm, pmd, addr, sz);
 
+	if (!IS_ENABLED(CONFIG_PPC_8xx))
+		return (pte_t *)pmd;

So only 8xx has cont-PMD for hugepages?

No, all have cont-PMD but only 8xx handles pages greater than PMD_SIZE as cont-PTE instead of cont-PMD.

Quoted 9 lines

arch/powerpc/mm/hugetlbpage.c pte_t *huge_pte_alloc(struct mm_struct *mm, struct vm_area_struct *vma, · line 227

Quoted 4 lines
arch/powerpc/mm/hugetlbpage.c +1 -0
+
  	if (sz != SZ_8M)
  		return NULL;

Since this function is the core for allocation huge pages, I think it would benefit from a comment at the top explaining the possible layouts. e.g: Who can have cont-{P4d,PUD,PMD} etc.
A brief explanation of the possible scheme for all powerpc platforms.

All is standard except 8xx, let's just have a comment for 8xx.

Quoted 5 lines

That would help people looking into this in a future.

maintainer
#36 lore raw

Re: [RFC PATCH v2 11/20] powerpc/mm: Complement huge_pte_alloc() for all non HUGEPD setups

Quoted 2 lines · Christophe Leroy

No, all have cont-PMD but only 8xx handles pages greater than PMD_SIZE as cont-PTE instead of cont-PMD.

Yes, sorry, I managed to confuse myself. It is obvious from the code.

Signature · 2 lines
Oscar Salvador
SUSE Labs
#37 lore raw

RFC PATCH v2 12/20 powerpc/64e: Remove unneeded #ifdef CONFIG_PPC_E500

In reply to Christophe Leroy

When it is a nohash/64 it can't be anything else than CONFIG_PPC_E500 so remove the #ifdef as they are always true.

---
 arch/powerpc/mm/nohash/tlb.c | 13 -------------
 1 file changed, 13 deletions(-)
arch/powerpc/mm/nohash/tlb.c +0 -13
index 5ffa0af4328a..d16f1ef7516c 100644
@@ -403,8 +403,6 @@ static void __init setup_page_sizes(void)
 	unsigned int tlb0ps;
 	unsigned int eptcfg;
 	int i, psize;
-
-#ifdef CONFIG_PPC_E500
 	unsigned int mmucfg = mfspr(SPRN_MMUCFG);
 	int fsl_mmu = mmu_has_feature(MMU_FTR_TYPE_FSL_E);
 
@@ -470,7 +468,6 @@ static void __init setup_page_sizes(void)
 
 		goto out;
 	}
-#endif
 
 	tlb0cfg = mfspr(SPRN_TLB0CFG);
 	tlb0ps = mfspr(SPRN_TLB0PS);
@@ -547,13 +544,11 @@ static void __init setup_mmu_htw(void)
 		patch_exception(0x1c0, exc_data_tlb_miss_htw_book3e);
 		patch_exception(0x1e0, exc_instruction_tlb_miss_htw_book3e);
 		break;
-#ifdef CONFIG_PPC_E500
 	case PPC_HTW_E6500:
 		extlb_level_exc = EX_TLB_SIZE;
 		patch_exception(0x1c0, exc_data_tlb_miss_e6500_book3e);
 		patch_exception(0x1e0, exc_instruction_tlb_miss_e6500_book3e);
 		break;
-#endif
 	}
 	pr_info("MMU: Book3E HW tablewalk %s\n",
 		book3e_htw_mode != PPC_HTW_NONE ? "enabled" : "not supported");
@@ -590,7 +585,6 @@ static void early_init_this_mmu(void)
 	}
 	mtspr(SPRN_MAS4, mas4);
 
-#ifdef CONFIG_PPC_E500
 	if (mmu_has_feature(MMU_FTR_TYPE_FSL_E)) {
 		unsigned int num_cams;
 		bool map = true;
@@ -611,7 +605,6 @@ static void early_init_this_mmu(void)
 			linear_map_top = map_mem_in_cams(linear_map_top,
 							 num_cams, false, true);
 	}
-#endif
 
 	/* A sync won't hurt us after mucking around with
 	 * the MMU configuration
@@ -643,7 +636,6 @@ static void __init early_init_mmu_global(void)
 	/* Look for HW tablewalk support */
 	setup_mmu_htw();
 
-#ifdef CONFIG_PPC_E500
 	if (mmu_has_feature(MMU_FTR_TYPE_FSL_E)) {
 		if (book3e_htw_mode == PPC_HTW_NONE) {
 			extlb_level_exc = EX_TLB_SIZE;
@@ -652,7 +644,6 @@ static void __init early_init_mmu_global(void)
 				exc_instruction_tlb_miss_bolted_book3e);
 		}
 	}
-#endif
 
 	/* Set the global containing the top of the linear mapping
 	 * for use by the TLB miss code
@@ -664,7 +655,6 @@ static void __init early_init_mmu_global(void)
 
 static void __init early_mmu_set_memory_limit(void)
 {
-#ifdef CONFIG_PPC_E500
 	if (mmu_has_feature(MMU_FTR_TYPE_FSL_E)) {
 		/*
 		 * Limit memory so we dont have linear faults.
@@ -675,7 +665,6 @@ static void __init early_mmu_set_memory_limit(void)
 		 */
 		memblock_enforce_memory_limit(linear_map_top);
 	}
-#endif
 
 	memblock_set_current_limit(linear_map_top);
 }
@@ -713,7 +702,6 @@ void setup_initial_memory_limit(phys_addr_t first_memblock_base,
 	 * We crop it to the size of the first MEMBLOCK to
 	 * avoid going over total available memory just in case...
 	 */
-#ifdef CONFIG_PPC_E500
 	if (early_mmu_has_feature(MMU_FTR_TYPE_FSL_E)) {
 		unsigned long linear_sz;
 		unsigned int num_cams;
@@ -726,7 +714,6 @@ void setup_initial_memory_limit(phys_addr_t first_memblock_base,
 
 		ppc64_rma_size = min_t(u64, linear_sz, 0x40000000);
 	} else
-#endif
 		ppc64_rma_size = min_t(u64, first_memblock_size, 0x40000000);
 
 	/* Finally limit subsequent allocations */
Signature · 1 line
2.44.0
#38 lore raw

Re: [RFC PATCH v2 12/20] powerpc/64e: Remove unneeded #ifdef CONFIG_PPC_E500

Quoted 2 lines · Christophe Leroy

When it is a nohash/64 it can't be anything else than CONFIG_PPC_E500 so remove the #ifdef as they are always true.

I have a series doing some similar cleanups, I'll post it. We can decide whether to merge it before your series or combine them or whatever.

cheers

#39 lore raw

Re: [RFC PATCH v2 12/20] powerpc/64e: Remove unneeded #ifdef CONFIG_PPC_E500

Le 24/05/2024 à 09:31, Michael Ellerman a écrit :

Quoted 7 lines
Quoted 2 lines · Christophe Leroy

When it is a nohash/64 it can't be anything else than CONFIG_PPC_E500 so remove the #ifdef as they are always true.

I have a series doing some similar cleanups, I'll post it. We can decide whether to merge it before your series or combine them or whatever.

Great. I'll apply my series on top.

Note that it doesn't apply cleanly on merge branch (47279113c5d0), a 3-way merge is needed:

$ LANG= git am -3 
~/Téléchargements/1-6-powerpc-64e-Remove-unused-IBM-HTW-code.patch
Applying: powerpc/64e: Remove unused IBM HTW code
Applying: powerpc/64e: Split out nohash Book3E 64-bit code
Using index info to reconstruct a base tree...
M	arch/powerpc/mm/nohash/Makefile
.git/rebase-apply/patch:554: trailing whitespace.
			def->shift = 0;	
warning: 1 line adds whitespace errors.
Falling back to patching base and 3-way merge...
Auto-merging arch/powerpc/mm/nohash/Makefile
Applying: powerpc/64e: Drop E500 ifdefs in 64-bit code
Applying: powerpc/64e: Drop MMU_FTR_TYPE_FSL_E checks in 64-bit code
Applying: powerpc/64e: Consolidate TLB miss handler patching
Applying: powerpc/64e: Drop unused TLB miss handlers

Thanks
Christophe

#40 lore raw

RFC PATCH v2 13/20 powerpc/64e: Clean up impossible setups

In reply to Christophe Leroy

All E500 have MMU_FTR_TYPE_FSL_E.

So remove all impossible combinations.

This leads to removing PPC_HTW_IBM and related exceptions.

---
 arch/powerpc/include/asm/nohash/mmu-e500.h |   1 -
 arch/powerpc/mm/nohash/tlb.c               | 148 ++++------------
 arch/powerpc/mm/nohash/tlb_low_64e.S       | 194 ---------------------
 3 files changed, 36 insertions(+), 307 deletions(-)
arch/powerpc/include/asm/nohash/mmu-e500.h +0 -1
index 6ddced0415cb..792bfaafd70b 100644
@@ -303,7 +303,6 @@ extern unsigned long linear_map_top;
 extern int book3e_htw_mode;
 
 #define PPC_HTW_NONE	0
-#define PPC_HTW_IBM	1
 #define PPC_HTW_E6500	2
 
 /*
arch/powerpc/mm/nohash/tlb.c +36 -112

226 lines not on this page · raw message

arch/powerpc/mm/nohash/tlb_low_64e.S +0 -194

200 lines not on this page · raw message

Signature · 1 line
2.44.0
#41 lore raw

RFC PATCH v2 14/20 powerpc/e500: Remove enc field from struct mmu_psize_def

In reply to Christophe Leroy

enc field is hidden behind BOOK3E_PAGESZ_XX macros, and when you look closer you realise that this field is nothing else than the value of shift minus ten.

So remove enc field and calculate tsize from shift field.

Also remove inc filed which is unused.

---
 arch/powerpc/include/asm/nohash/mmu-e500.h |  3 ---
 arch/powerpc/mm/nohash/book3e_pgtable.c    |  4 ++--
 arch/powerpc/mm/nohash/tlb.c               | 11 ++---------
 3 files changed, 4 insertions(+), 14 deletions(-)
arch/powerpc/include/asm/nohash/mmu-e500.h +0 -3
index 792bfaafd70b..4167da0c0241 100644
@@ -244,14 +244,11 @@ typedef struct {
 /* Page size definitions, common between 32 and 64-bit
  *
  *    shift : is the "PAGE_SHIFT" value for that page size
- *    penc  : is the pte encoding mask
  *
  */
 struct mmu_psize_def
 {
 	unsigned int	shift;	/* number of bits */
-	unsigned int	enc;	/* PTE encoding */
-	unsigned int    ind;    /* Corresponding indirect page size shift */
 	unsigned int	flags;
 #define MMU_PAGE_SIZE_DIRECT	0x1	/* Supported as a direct size */
 #define MMU_PAGE_SIZE_INDIRECT	0x2	/* Supported as an indirect size */
arch/powerpc/mm/nohash/book3e_pgtable.c +2 -2
index 1c5e4ecbebeb..ad2a7c26f2a0 100644
@@ -29,10 +29,10 @@ int __meminit vmemmap_create_mapping(unsigned long start,
 		_PAGE_KERNEL_RW;
 
 	/* PTEs only contain page size encodings up to 32M */
-	BUG_ON(mmu_psize_defs[mmu_vmemmap_psize].enc > 0xf);
+	BUG_ON(mmu_psize_defs[mmu_vmemmap_psize].shift - 10 > 0xf);
 
 	/* Encode the size in the PTE */
-	flags |= mmu_psize_defs[mmu_vmemmap_psize].enc << 8;
+	flags |= (mmu_psize_defs[mmu_vmemmap_psize].shift - 10) << 8;
 
 	/* For each PTE for that area, map things. Note that we don't
 	 * increment phys because all PTEs are of the large size and
arch/powerpc/mm/nohash/tlb.c +2 -9
index 1caccbf4c138..10b5a6b60450 100644
@@ -53,37 +53,30 @@
 struct mmu_psize_def mmu_psize_defs[MMU_PAGE_COUNT] = {
 	[MMU_PAGE_4K] = {
 		.shift	= 12,
-		.enc	= BOOK3E_PAGESZ_4K,
 	},
 	[MMU_PAGE_2M] = {
 		.shift	= 21,
-		.enc	= BOOK3E_PAGESZ_2M,
 	},
 	[MMU_PAGE_4M] = {
 		.shift	= 22,
-		.enc	= BOOK3E_PAGESZ_4M,
 	},
 	[MMU_PAGE_16M] = {
 		.shift	= 24,
-		.enc	= BOOK3E_PAGESZ_16M,
 	},
 	[MMU_PAGE_64M] = {
 		.shift	= 26,
-		.enc	= BOOK3E_PAGESZ_64M,
 	},
 	[MMU_PAGE_256M] = {
 		.shift	= 28,
-		.enc	= BOOK3E_PAGESZ_256M,
 	},
 	[MMU_PAGE_1G] = {
 		.shift	= 30,
-		.enc	= BOOK3E_PAGESZ_1GB,
 	},
 };
 
 static inline int mmu_get_tsize(int psize)
 {
-	return mmu_psize_defs[psize].enc;
+	return mmu_psize_defs[psize].shift - 10;
 }
 #else
 static inline int mmu_get_tsize(int psize)
@@ -371,7 +364,7 @@ void tlb_flush(struct mmu_gather *tlb)
  */
 void tlb_flush_pgtable(struct mmu_gather *tlb, unsigned long address)
 {
-	int tsize = mmu_psize_defs[mmu_pte_psize].enc;
+	int tsize = mmu_get_tsize(mmu_pte_psize);
 
 	if (book3e_htw_mode != PPC_HTW_NONE) {
 		unsigned long start = address & PMD_MASK;
Signature · 1 line
2.44.0
maintainer Reviewed-by on v2 14/20
#42 lore raw

Re: [RFC PATCH v2 14/20] powerpc/e500: Remove enc field from struct mmu_psize_def

Quoted 9 lines · Christophe Leroy

enc field is hidden behind BOOK3E_PAGESZ_XX macros, and when you look closer you realise that this field is nothing else than the value of shift minus ten.

So remove enc field and calculate tsize from shift field.

Also remove inc filed which is unused.

Signature · 2 lines
Oscar Salvador
SUSE Labs
#43 lore raw

RFC PATCH v2 15/20 powerpc/85xx: Switch to 64 bits PGD

In reply to Christophe Leroy

In order to allow leaf PMD entries, switch the PGD to 64 bits entries.

---
 arch/powerpc/include/asm/pgtable-types.h |  4 ++++
 arch/powerpc/kernel/head_85xx.S          | 10 ++++++----
 2 files changed, 10 insertions(+), 4 deletions(-)
arch/powerpc/include/asm/pgtable-types.h +4 -0
index 082c85cc09b1..db965d98e0ae 100644
@@ -49,7 +49,11 @@ static inline unsigned long pud_val(pud_t x)
 #endif /* CONFIG_PPC64 */
 
 /* PGD level */
+#if defined(CONFIG_PPC_E500) && defined(CONFIG_PTE_64BIT)
+typedef struct { unsigned long long pgd; } pgd_t;
+#else
 typedef struct { unsigned long pgd; } pgd_t;
+#endif
 #define __pgd(x)	((pgd_t) { (x) })
 static inline unsigned long pgd_val(pgd_t x)
 {
arch/powerpc/kernel/head_85xx.S +6 -4
index 39724ff5ae1f..a305244afc9f 100644
@@ -307,8 +307,9 @@ set_ivor:
 #ifdef CONFIG_PTE_64BIT
 #ifdef CONFIG_HUGETLB_PAGE
 #define FIND_PTE	\
-	rlwinm	r12, r10, 13, 19, 29;	/* Compute pgdir/pmd offset */	\
-	lwzx	r11, r12, r11;		/* Get pgd/pmd entry */		\
+	rlwinm	r12, r10, 14, 18, 28;	/* Compute pgdir/pmd offset */	\
+	add	r12, r11, r12;						\
+	lwz	r11, 4(r12);		/* Get pgd/pmd entry */		\
 	rlwinm.	r12, r11, 0, 0, 20;	/* Extract pt base address */	\
 	blt	1000f;			/* Normal non-huge page */	\
 	beq	2f;			/* Bail if no table */		\
@@ -321,8 +322,9 @@ set_ivor:
 1001:	lwz	r11, 4(r12);		/* Get pte entry */
 #else
 #define FIND_PTE	\
-	rlwinm	r12, r10, 13, 19, 29;	/* Compute pgdir/pmd offset */	\
-	lwzx	r11, r12, r11;		/* Get pgd/pmd entry */		\
+	rlwinm	r12, r10, 14, 18, 28;	/* Compute pgdir/pmd offset */	\
+	add	r12, r11, r12;						\
+	lwz	r11, 4(r12);		/* Get pgd/pmd entry */		\
 	rlwinm.	r12, r11, 0, 0, 20;	/* Extract pt base address */	\
 	beq	2f;			/* Bail if no table */		\
 	rlwimi	r12, r10, 23, 20, 28;	/* Compute pte address */	\
Signature · 1 line
2.44.0
maintainer
#44 lore raw

Re: [RFC PATCH v2 15/20] powerpc/85xx: Switch to 64 bits PGD

Quoted 3 lines · Christophe Leroy

In order to allow leaf PMD entries, switch the PGD to 64 bits entries.

I do not quite understand this change.
Are not powerE500 and power85xx two different things?
You are changing making it 64 for PPC_E500_64bits, but you are updating head_85xx. Are they sharing this code?

Also, we would benefit from a slightly bigger changelog, explaining why do we need this change in some more detail.

Quoted 21 lines
arch/powerpc/include/asm/pgtable-types.h +4 -0
index 082c85cc09b1..db965d98e0ae 100644
@@ -49,7 +49,11 @@ static inline unsigned long pud_val(pud_t x)
 #endif /* CONFIG_PPC64 */
 
 /* PGD level */
+#if defined(CONFIG_PPC_E500) && defined(CONFIG_PTE_64BIT)
+typedef struct { unsigned long long pgd; } pgd_t;
+#else
 typedef struct { unsigned long pgd; } pgd_t;
+#endif
 #define __pgd(x)	((pgd_t) { (x) })
 static inline unsigned long pgd_val(pgd_t x)
 {
arch/powerpc/kernel/head_85xx.S +0 -0
index 39724ff5ae1f..a305244afc9f 100644

arch/powerpc/kernel/head_85xx.S set_ivor: · line 311

Quoted 7 lines
arch/powerpc/kernel/head_85xx.S +2 -2
@@ -307,8 +307,9 @@ set_ivor:
 #ifdef CONFIG_PTE_64BIT
 #ifdef CONFIG_HUGETLB_PAGE
 #define FIND_PTE	\
-	rlwinm	r12, r10, 13, 19, 29;	/* Compute pgdir/pmd offset */	\
-	lwzx	r11, r12, r11;		/* Get pgd/pmd entry */		\
+	rlwinm	r12, r10, 14, 18, 28;	/* Compute pgdir/pmd offset */	\
+	add	r12, r11, r12;

You add the offset to pgdir?

arch/powerpc/kernel/head_85xx.S set_ivor: · line 312

Quoted 1 line
arch/powerpc/kernel/head_85xx.S +1 -0
+	lwz	r11, 4(r12);		/* Get pgd/pmd entry */		\

What is i offset 4?

Signature · 2 lines
Oscar Salvador
SUSE Labs
#45 lore raw

Re: [RFC PATCH v2 15/20] powerpc/85xx: Switch to 64 bits PGD

Le 25/05/2024 à 06:54, Oscar Salvador a écrit :

Quoted 7 lines · Christophe Leroy
Quoted 3 lines

In order to allow leaf PMD entries, switch the PGD to 64 bits entries.

I do not quite understand this change.
Are not powerE500 and power85xx two different things?

Yes they are two different things, but one contains the other

e500 is the processor-core which is included inside the MPC85xx micro controller.

But CONFIG_PPC_E500 is a bit more than e500 core, it also includes e5500 and e6500 which are evolutions of e500.

mpc85xx is 32 bits
e5500 and e6500 are 64 bits

Quoted 2 lines

You are changing making it 64 for PPC_E500_64bits, but you are updating head_85xx. Are they sharing this code?

Not exactly. mpc85xx can be built with 32 bits PTE or 64 bits PTE, based on CONFIG_PTE_64BIT

When CONFIG_PTE_64BIT is selected it uses the same PTE layout on 32-bits and 64-bits. But on 32-bits the PGD is still 32-bits, so it is not possible to use leaf entries at PGD level hence the change.

When CONFIG_PTE_64BIT is not selected, huge pages are not supported.

Quoted 3 lines

Also, we would benefit from a slightly bigger changelog, explaining why do we need this change in some more detail.

Yes I can write this is because PTEs are 64-bits allthought I thought it was obvious.

Quoted 24 lines
Quoted 24 lines
arch/powerpc/include/asm/pgtable-types.h +4 -0
index 082c85cc09b1..db965d98e0ae 100644
@@ -49,7 +49,11 @@ static inline unsigned long pud_val(pud_t x)
  #endif /* CONFIG_PPC64 */
 
  /* PGD level */
+#if defined(CONFIG_PPC_E500) && defined(CONFIG_PTE_64BIT)
+typedef struct { unsigned long long pgd; } pgd_t;
+#else
  typedef struct { unsigned long pgd; } pgd_t;
+#endif
  #define __pgd(x)	((pgd_t) { (x) })
  static inline unsigned long pgd_val(pgd_t x)
  {
arch/powerpc/kernel/head_85xx.S +0 -0
index 39724ff5ae1f..a305244afc9f 100644
@@ -307,8 +307,9 @@ set_ivor:
  #ifdef CONFIG_PTE_64BIT
Quoted 8 lines

arch/powerpc/kernel/head_85xx.S set_ivor:

Quoted 6 lines
arch/powerpc/kernel/head_85xx.S +2 -2
  #ifdef CONFIG_HUGETLB_PAGE
  #define FIND_PTE	\
-	rlwinm	r12, r10, 13, 19, 29;	/* Compute pgdir/pmd offset */	\
-	lwzx	r11, r12, r11;		/* Get pgd/pmd entry */		\
+	rlwinm	r12, r10, 14, 18, 28;	/* Compute pgdir/pmd offset */	\
+	add	r12, r11, r12;

You add the offset to pgdir?

Yes because later r12 points to the PTE so when it is a leaf PGD entry we need r12 to point to that entry.

Quoted 4 lines

arch/powerpc/kernel/head_85xx.S set_ivor: · line 312

Quoted 2 lines
arch/powerpc/kernel/head_85xx.S +1 -0
+	lwz	r11, 4(r12);		/* Get pgd/pmd entry */		\

What is i offset 4?

It is big endian, the entry is now 64 bits but the real content of the entry is still 32 bits so it is in the lower word.

Quoted 2 lines
#46 lore raw

RFC PATCH v2 16/20 powerpc/e500: Encode hugepage size in PTE bits

In reply to Christophe Leroy

Use U0-U3 bits to encode hugepage size, more exactly page shift.

As we start using hugepages at shift 21 (2Mbytes), substract 20 so that it fits into 4 bits. That may change in the future if we want to use smaller hugepages.

---
 arch/powerpc/include/asm/nohash/hugetlb-e500.h | 6 ++++++
 arch/powerpc/include/asm/nohash/pte-e500.h     | 3 +++
 2 files changed, 9 insertions(+)
arch/powerpc/include/asm/nohash/hugetlb-e500.h +6 -0
index 8f04ad20e040..d8e51a3f8557 100644
@@ -42,4 +42,10 @@ static inline int check_and_get_huge_psize(int shift)
 	return shift_to_mmu_psize(shift);
 }
 
+static inline pte_t arch_make_huge_pte(pte_t entry, unsigned int shift, vm_flags_t flags)
+{
+	return __pte(pte_val(entry) | (_PAGE_U3 * (shift - 20)));
+}
+#define arch_make_huge_pte arch_make_huge_pte
+
 #endif /* _ASM_POWERPC_NOHASH_HUGETLB_E500_H */
arch/powerpc/include/asm/nohash/pte-e500.h +3 -0
index 975facc7e38e..091e4bff1fba 100644
@@ -46,6 +46,9 @@
 #define _PAGE_NO_CACHE	0x400000 /* I: cache inhibit */
 #define _PAGE_WRITETHRU	0x800000 /* W: cache write-through */
 
+#define _PAGE_HSIZE_MSK (_PAGE_U0 | _PAGE_U1 | _PAGE_U2 | _PAGE_U3)
+#define _PAGE_HSIZE_SHIFT	14
+
 /* "Higher level" linux bit combinations */
 #define _PAGE_EXEC		(_PAGE_BAP_SX | _PAGE_BAP_UX) /* .. and was cache cleaned */
 #define _PAGE_READ		(_PAGE_BAP_SR | _PAGE_BAP_UR) /* User read permission */
Signature · 1 line
2.44.0
#47 lore raw

RFC PATCH v2 17/20 powerpc/e500: Use contiguous PMD instead of hugepd

In reply to Christophe Leroy

e500 supports many page sizes among which the following size are implemented in the kernel at the time being: 4M, 16M, 64M, 256M, 1G.

On e500, TLB miss for hugepages is exclusively handled by SW even on e6500 which has HW assistance for 4k pages, so there are no constraints like on the 8xx.

On e500/32, all are at PGD/PMD level and can be handled as cont-PMD.

On e500/64, smaller ones are on PMD while bigger ones are on PUD. Again, they can easily be handled as cont-PMD and cont-PUD instead of hugepd.

---
 .../powerpc/include/asm/nohash/hugetlb-e500.h | 32 +---------
 arch/powerpc/include/asm/nohash/pgalloc.h     |  2 -
 arch/powerpc/include/asm/nohash/pgtable.h     | 43 +++++++++----
 arch/powerpc/include/asm/nohash/pte-e500.h    | 15 +++++
 arch/powerpc/include/asm/page.h               | 15 +----
 arch/powerpc/kernel/head_85xx.S               | 23 +++----
 arch/powerpc/mm/hugetlbpage.c                 |  2 -
 arch/powerpc/mm/nohash/tlb_low_64e.S          | 63 +++++++++++--------
 arch/powerpc/mm/pgtable.c                     | 31 +++++++++
 arch/powerpc/platforms/Kconfig.cputype        |  1 -
 10 files changed, 131 insertions(+), 96 deletions(-)
arch/powerpc/include/asm/nohash/hugetlb-e500.h +3 -29
index d8e51a3f8557..d30e2a3f129d 100644
@@ -2,38 +2,12 @@
 #ifndef _ASM_POWERPC_NOHASH_HUGETLB_E500_H
 #define _ASM_POWERPC_NOHASH_HUGETLB_E500_H
 
-static inline pte_t *hugepd_page(hugepd_t hpd)
-{
-	if (WARN_ON(!hugepd_ok(hpd)))
-		return NULL;
-
-	return (pte_t *)((hpd_val(hpd) & ~HUGEPD_SHIFT_MASK) | PD_HUGE);
-}
-
-static inline unsigned int hugepd_shift(hugepd_t hpd)
-{
-	return hpd_val(hpd) & HUGEPD_SHIFT_MASK;
-}
-
-static inline pte_t *hugepte_offset(hugepd_t hpd, unsigned long addr,
-				    unsigned int pdshift)
-{
-	/*
-	 * On FSL BookE, we have multiple higher-level table entries that
-	 * point to the same hugepte.  Just use the first one since they're all
-	 * identical.  So for that case, idx=0.
-	 */
-	return hugepd_page(hpd);
-}
+#define __HAVE_ARCH_HUGE_SET_HUGE_PTE_AT
+void set_huge_pte_at(struct mm_struct *mm, unsigned long addr, pte_t *ptep,
+		     pte_t pte, unsigned long sz);
 
 void flush_hugetlb_page(struct vm_area_struct *vma, unsigned long vmaddr);
 
-static inline void hugepd_populate(hugepd_t *hpdp, pte_t *new, unsigned int pshift)
-{
-	/* We use the old format for PPC_E500 */
-	*hpdp = __hugepd(((unsigned long)new & ~PD_HUGE) | pshift);
-}
-
 static inline int check_and_get_huge_psize(int shift)
 {
 	if (shift & 1)	/* Not a power of 4 */
arch/powerpc/include/asm/nohash/pgalloc.h +0 -2
index 4b62376318e1..d06efac6d7aa 100644
@@ -44,8 +44,6 @@ static inline void pgtable_free(void *table, int shift)
 	}
 }
 
-#define get_hugepd_cache_index(x)	(x)
-
 static inline void pgtable_free_tlb(struct mmu_gather *tlb, void *table, int shift)
 {
 	unsigned long pgf = (unsigned long)table;
arch/powerpc/include/asm/nohash/pgtable.h +31 -12

67 lines not on this page · raw message

arch/powerpc/include/asm/nohash/pte-e500.h +15 -0
index 091e4bff1fba..178378cdaabb 100644
@@ -67,6 +67,7 @@
 #define _PAGE_RWX	(_PAGE_READ | _PAGE_WRITE | _PAGE_BAP_UX)
 
 #define _PAGE_SPECIAL	_PAGE_SW0
+#define _PAGE_PTE	_PAGE_PSIZE_4K
 
 #define	PTE_RPN_SHIFT	(24)
 
@@ -106,6 +107,20 @@ static inline pte_t pte_mkexec(pte_t pte)
 }
 #define pte_mkexec pte_mkexec
 
+static inline int pmd_leaf(pmd_t pmd)
+{
+	return pmd_val(pmd) & _PAGE_PTE;
+}
+#define pmd_leaf pmd_leaf
+
+#ifdef CONFIG_PPC64
+static inline int pud_leaf(pud_t pud)
+{
+	return pud_val(pud) & _PAGE_PTE;
+}
+#define pud_leaf pud_leaf
+#endif
+
 #endif /* __ASSEMBLY__ */
 
 #endif /* __KERNEL__ */
arch/powerpc/include/asm/page.h +1 -14
index 018c3d55232c..7d3c3bc40e6a 100644
@@ -269,20 +269,7 @@ static inline const void *pfn_to_kaddr(unsigned long pfn)
 #define is_kernel_addr(x)	((x) >= TASK_SIZE)
 #endif
 
-#ifndef CONFIG_PPC_BOOK3S_64
-/*
- * Use the top bit of the higher-level page table entries to indicate whether
- * the entries we point to contain hugepages.  This works because we know that
- * the page tables live in kernel space.  If we ever decide to support having
- * page tables at arbitrary addresses, this breaks and will have to change.
- */
-#ifdef CONFIG_PPC64
-#define PD_HUGE 0x8000000000000000UL
-#else
-#define PD_HUGE 0x80000000
-#endif
-
-#else	/* CONFIG_PPC_BOOK3S_64 */
+#ifdef CONFIG_PPC_BOOK3S_64
 /*
  * Book3S 64 stores real addresses in the hugepd entries to
  * avoid overlaps with _PAGE_PRESENT and _PAGE_PTE.
arch/powerpc/kernel/head_85xx.S +12 -11
index a305244afc9f..96479a2230ac 100644
@@ -310,16 +310,17 @@ set_ivor:
 	rlwinm	r12, r10, 14, 18, 28;	/* Compute pgdir/pmd offset */	\
 	add	r12, r11, r12;						\
 	lwz	r11, 4(r12);		/* Get pgd/pmd entry */		\
-	rlwinm.	r12, r11, 0, 0, 20;	/* Extract pt base address */	\
-	blt	1000f;			/* Normal non-huge page */	\
-	beq	2f;			/* Bail if no table */		\
-	oris	r11, r11, PD_HUGE@h;	/* Put back address bit */	\
-	andi.	r10, r11, HUGEPD_SHIFT_MASK@l; /* extract size field */	\
-	xor	r12, r10, r11;		/* drop size bits from pointer */ \
+	rotlwi.	r11, r11, 22;		/* Leaf entry (_PAGE_PTE set) */\
+	bge	1000f;			/* Normal non-huge page */	\
+	rlwinm	r10, r11, 64 - _PAGE_HSIZE_SHIFT - 22, 0xf;		\
+	rotrwi	r11, r11, 22;		/* Restore entry */		\
 	b	1001f;							\
-1000:	rlwimi	r12, r10, 23, 20, 28;	/* Compute pte address */	\
+1000:	rlwinm.	r12, r11, 32 - 22, 0, 20; /* Extract pt base address */	\
+	beq	2f;			/* Bail if no table */		\
+	rlwimi	r12, r10, 23, 20, 28;	/* Compute pte address */	\
 	li	r10, 0;			/* clear r10 */			\
-1001:	lwz	r11, 4(r12);		/* Get pte entry */
+	lwz	r11, 4(r12);		/* Get pte entry */		\
+1001:
 #else
 #define FIND_PTE	\
 	rlwinm	r12, r10, 14, 18, 28;	/* Compute pgdir/pmd offset */	\
@@ -749,16 +750,16 @@ finish_tlb_load:
 100:	stw	r15, 0(r17)
 
 	/*
-	 * Calc MAS1_TSIZE from r10 (which has pshift encoded)
+	 * Calc MAS1_TSIZE from r10 (which has pshift - 20 encoded)
 	 * tlb_enc = (pshift - 10).
 	 */
-	subi	r15, r10, 10
+	addi	r15, r10, 10
 	mfspr	r16, SPRN_MAS1
 	rlwimi	r16, r15, 7, 20, 24
 	mtspr	SPRN_MAS1, r16
 
 	/* copy the pshift for use later */
-	mr	r14, r10
+	addi	r14, r10, 20
 
 	/* fall through */
 
arch/powerpc/mm/hugetlbpage.c +0 -2
index f8aefa1e7363..1401587578fc 100644
@@ -627,8 +627,6 @@ static int __init hugetlbpage_init(void)
 		if (pdshift > shift) {
 			if (!IS_ENABLED(CONFIG_PPC_8xx))
 				pgtable_cache_add(pdshift - shift);
-		} else if (IS_ENABLED(CONFIG_PPC_E500)) {
-			pgtable_cache_add(PTE_T_ORDER);
 		}
 
 		configured = true;
arch/powerpc/mm/nohash/tlb_low_64e.S +38 -25

118 lines not on this page · raw message

arch/powerpc/mm/pgtable.c +31 -0
index 51ee508eeb5b..d68c0fcffe80 100644
@@ -328,6 +328,37 @@ void set_huge_pte_at(struct mm_struct *mm, unsigned long addr, pte_t *ptep,
 		__set_huge_pte_at(pmdp, ptep, pte_val(pte));
 	}
 }
+#elif defined(CONFIG_PPC_E500)
+void set_huge_pte_at(struct mm_struct *mm, unsigned long addr, pte_t *ptep,
+		     pte_t pte, unsigned long sz)
+{
+	unsigned long pdsize;
+	int i;
+
+	pte = set_pte_filter(pte, addr);
+
+	/*
+	 * Make sure hardware valid bit is not set. We don't do
+	 * tlb flush for this update.
+	 */
+	VM_WARN_ON(pte_hw_valid(*ptep) && !pte_protnone(*ptep));
+
+	if (sz < PMD_SIZE)
+		pdsize = PAGE_SIZE;
+	else if (sz < PUD_SIZE)
+		pdsize = PMD_SIZE;
+	else if (sz < P4D_SIZE)
+		pdsize = PUD_SIZE;
+	else if (sz < PGDIR_SIZE)
+		pdsize = P4D_SIZE;
+	else
+		pdsize = PGDIR_SIZE;
+
+	for (i = 0; i < sz / pdsize; i++, ptep++, addr += pdsize) {
+		__set_pte_at(mm, addr, ptep, pte, 0);
+		pte = __pte(pte_val(pte) + ((unsigned long long)pdsize / PAGE_SIZE << PFN_PTE_SHIFT));
+	}
+}
 #endif
 #endif /* CONFIG_HUGETLB_PAGE */
 
arch/powerpc/platforms/Kconfig.cputype +0 -1
index fa4bb096b3ae..30a78e99663e 100644
@@ -291,7 +291,6 @@ config PPC_BOOK3S
 config PPC_E500
 	select FSL_EMB_PERFMON
 	bool
-	select ARCH_HAS_HUGEPD if HUGETLB_PAGE
 	select ARCH_SUPPORTS_HUGETLBFS if PHYS_64BIT || PPC64
 	select PPC_SMP_MUXED_IPI
 	select PPC_DOORBELL
Signature · 1 line
2.44.0
#48 lore raw

RFC PATCH v2 18/20 powerpc/64s: Use contiguous PMD/PUD instead of HUGEPD

In reply to Christophe Leroy

On book3s/64, the only user of hugepd is hash in 4k mode.

All other setups (hash-64, radix-4, radix-64) use leaf PMD/PUD.

Rework hash-4k to use contiguous PMD and PUD instead.

In that setup there are only two huge page sizes: 16M and 16G.

16M sits at PMD level and 16G at PUD level.

pte_update doesn't know page size, lets use the same trick as hpte_need_flush() to get page size from segment properties. That's not the most efficient way but let's do that until callers of pte_update() provide page size instead of just a huge flag.

---
 arch/powerpc/include/asm/book3s/64/hash-4k.h  | 15 --------
 arch/powerpc/include/asm/book3s/64/hash.h     | 38 +++++++++++++++----
 arch/powerpc/include/asm/book3s/64/hugetlb.h  | 38 -------------------
 .../include/asm/book3s/64/pgtable-4k.h        | 34 -----------------
 .../include/asm/book3s/64/pgtable-64k.h       | 20 ----------
 arch/powerpc/include/asm/hugetlb.h            |  4 ++
 .../include/asm/nohash/32/hugetlb-8xx.h       |  4 --
 .../powerpc/include/asm/nohash/hugetlb-e500.h |  4 --
 arch/powerpc/include/asm/page.h               |  8 ----
 arch/powerpc/mm/book3s64/hash_utils.c         | 11 ++++--
 arch/powerpc/mm/book3s64/pgtable.c            | 12 ------
 arch/powerpc/mm/hugetlbpage.c                 | 19 ----------
 arch/powerpc/mm/pgtable.c                     |  2 +-
 arch/powerpc/platforms/Kconfig.cputype        |  1 -
 14 files changed, 43 insertions(+), 167 deletions(-)
arch/powerpc/include/asm/book3s/64/hash-4k.h +0 -15
index 6472b08fa1b0..c654c376ef8b 100644
@@ -74,21 +74,6 @@
 #define remap_4k_pfn(vma, addr, pfn, prot)	\
 	remap_pfn_range((vma), (addr), (pfn), PAGE_SIZE, (prot))
 
-#ifdef CONFIG_HUGETLB_PAGE
-static inline int hash__hugepd_ok(hugepd_t hpd)
-{
-	unsigned long hpdval = hpd_val(hpd);
-	/*
-	 * if it is not a pte and have hugepd shift mask
-	 * set, then it is a hugepd directory pointer
-	 */
-	if (!(hpdval & _PAGE_PTE) && (hpdval & _PAGE_PRESENT) &&
-	    ((hpdval & HUGEPD_SHIFT_MASK) != 0))
-		return true;
-	return false;
-}
-#endif
-
 /*
  * 4K PTE format is different from 64K PTE format. Saving the hash_slot is just
  * a matter of returning the PTE bits that need to be modified. On 64K PTE,
arch/powerpc/include/asm/book3s/64/hash.h +31 -7
index faf3e3b4e4b2..509811ca7695 100644
@@ -4,6 +4,7 @@
 #ifdef __KERNEL__
 
 #include <asm/asm-const.h>
+#include <asm/book3s/64/slice.h>
 
 /*
  * Common bits between 4K and 64K pages in a linux-style PTE.
@@ -161,14 +162,10 @@ extern void hpte_need_flush(struct mm_struct *mm, unsigned long addr,
 			    pte_t *ptep, unsigned long pte, int huge);
 unsigned long htab_convert_pte_flags(unsigned long pteflags, unsigned long flags);
 /* Atomic PTE updates */
-static inline unsigned long hash__pte_update(struct mm_struct *mm,
-					 unsigned long addr,
-					 pte_t *ptep, unsigned long clr,
-					 unsigned long set,
-					 int huge)
+static inline unsigned long hash__pte_update_one(pte_t *ptep, unsigned long clr,
+						 unsigned long set)
 {
 	__be64 old_be, tmp_be;
-	unsigned long old;
 
 	__asm__ __volatile__(
 	"1:	ldarx	%0,0,%3		# pte_update\n\
@@ -182,11 +179,38 @@ static inline unsigned long hash__pte_update(struct mm_struct *mm,
 	: "r" (ptep), "r" (cpu_to_be64(clr)), "m" (*ptep),
 	  "r" (cpu_to_be64(H_PAGE_BUSY)), "r" (cpu_to_be64(set))
 	: "cc" );
+
+	return be64_to_cpu(old_be);
+}
+
+static inline unsigned long hash__pte_update(struct mm_struct *mm,
+					 unsigned long addr,
+					 pte_t *ptep, unsigned long clr,
+					 unsigned long set,
+					 int huge)
+{
+	unsigned long old;
+
+	old = hash__pte_update_one(ptep, clr, set);
+
+	if (huge && IS_ENABLED(CONFIG_PPC_4K_PAGES)) {
+		unsigned int psize = get_slice_psize(mm, addr);
+		int nb, i;
+
+		if (psize == MMU_PAGE_16M)
+			nb = SZ_16M / PMD_SIZE;
+		else if (psize == MMU_PAGE_16G)
+			nb = SZ_16G / PUD_SIZE;
+		else
+			nb = 1;
+
+		for (i = 1; i < nb; i++)
+			hash__pte_update_one(ptep + i, clr, set);
+	}
 	/* huge pages use the old page table lock */
 	if (!huge)
 		assert_pte_locked(mm, addr);
 
-	old = be64_to_cpu(old_be);
 	if (old & H_PAGE_HASHPTE)
 		hpte_need_flush(mm, addr, ptep, old, huge);
 
arch/powerpc/include/asm/book3s/64/hugetlb.h +0 -38
index aa1c67c8bfc8..f0bba9c5f9c3 100644
@@ -49,9 +49,6 @@ static inline bool gigantic_page_runtime_supported(void)
 	return true;
 }
 
-/* hugepd entry valid bit */
-#define HUGEPD_VAL_BITS		(0x8000000000000000UL)
-
 #define huge_ptep_modify_prot_start huge_ptep_modify_prot_start
 extern pte_t huge_ptep_modify_prot_start(struct vm_area_struct *vma,
 					 unsigned long addr, pte_t *ptep);
@@ -60,29 +57,7 @@ extern pte_t huge_ptep_modify_prot_start(struct vm_area_struct *vma,
 extern void huge_ptep_modify_prot_commit(struct vm_area_struct *vma,
 					 unsigned long addr, pte_t *ptep,
 					 pte_t old_pte, pte_t new_pte);
-/*
- * This should work for other subarchs too. But right now we use the
- * new format only for 64bit book3s
- */
-static inline pte_t *hugepd_page(hugepd_t hpd)
-{
-	BUG_ON(!hugepd_ok(hpd));
-	/*
-	 * We have only four bits to encode, MMU page size
-	 */
-	BUILD_BUG_ON((MMU_PAGE_COUNT - 1) > 0xf);
-	return __va(hpd_val(hpd) & HUGEPD_ADDR_MASK);
-}
-
-static inline unsigned int hugepd_mmu_psize(hugepd_t hpd)
-{
-	return (hpd_val(hpd) & HUGEPD_SHIFT_MASK) >> 2;
-}
 
-static inline unsigned int hugepd_shift(hugepd_t hpd)
-{
-	return mmu_psize_to_shift(hugepd_mmu_psize(hpd));
-}
 static inline void flush_hugetlb_page(struct vm_area_struct *vma,
 				      unsigned long vmaddr)
 {
@@ -90,19 +65,6 @@ static inline void flush_hugetlb_page(struct vm_area_struct *vma,
 		return radix__flush_hugetlb_page(vma, vmaddr);
 }
 
-static inline pte_t *hugepte_offset(hugepd_t hpd, unsigned long addr,
-				    unsigned int pdshift)
-{
-	unsigned long idx = (addr & ((1UL << pdshift) - 1)) >> hugepd_shift(hpd);
-
-	return hugepd_page(hpd) + idx;
-}
-
-static inline void hugepd_populate(hugepd_t *hpdp, pte_t *new, unsigned int pshift)
-{
-	*hpdp = __hugepd(__pa(new) | HUGEPD_VAL_BITS | (shift_to_mmu_psize(pshift) << 2));
-}
-
 void flush_hugetlb_page(struct vm_area_struct *vma, unsigned long vmaddr);
 
 static inline int check_and_get_huge_psize(int shift)
arch/powerpc/include/asm/book3s/64/pgtable-4k.h +0 -34
index 48f21820afe2..2b985bfbe863 100644
@@ -26,40 +26,6 @@ static inline int pud_huge(pud_t pud)
 	return 0;
 }
 
-/*
- * With radix , we have hugepage ptes in the pud and pmd entries. We don't
- * need to setup hugepage directory for them. Our pte and page directory format
- * enable us to have this enabled.
- */
-static inline int hugepd_ok(hugepd_t hpd)
-{
-	if (radix_enabled())
-		return 0;
-	return hash__hugepd_ok(hpd);
-}
-#define is_hugepd(hpd)		(hugepd_ok(hpd))
-
-/*
- * 16M and 16G huge page directory tables are allocated from slab cache
- *
- */
-#define H_16M_CACHE_INDEX (PAGE_SHIFT + H_PTE_INDEX_SIZE + H_PMD_INDEX_SIZE - 24)
-#define H_16G_CACHE_INDEX                                                      \
-	(PAGE_SHIFT + H_PTE_INDEX_SIZE + H_PMD_INDEX_SIZE + H_PUD_INDEX_SIZE - 34)
-
-static inline int get_hugepd_cache_index(int index)
-{
-	switch (index) {
-	case H_16M_CACHE_INDEX:
-		return HTLB_16M_INDEX;
-	case H_16G_CACHE_INDEX:
-		return HTLB_16G_INDEX;
-	default:
-		BUG();
-	}
-	/* should not reach */
-}
-
 #endif /* CONFIG_HUGETLB_PAGE */
 
 #endif /* __ASSEMBLY__ */
arch/powerpc/include/asm/book3s/64/pgtable-64k.h +0 -20
index ced7ee8b42fc..02a1e3ec7cbe 100644
@@ -30,26 +30,6 @@ static inline int pud_huge(pud_t pud)
 	return !!(pud_raw(pud) & cpu_to_be64(_PAGE_PTE));
 }
 
-/*
- * With 64k page size, we have hugepage ptes in the pgd and pmd entries. We don't
- * need to setup hugepage directory for them. Our pte and page directory format
- * enable us to have this enabled.
- */
-static inline int hugepd_ok(hugepd_t hpd)
-{
-	return 0;
-}
-
-#define is_hugepd(pdep)			0
-
-/*
- * This should never get called
- */
-static __always_inline int get_hugepd_cache_index(int index)
-{
-	BUILD_BUG();
-}
-
 #endif /* CONFIG_HUGETLB_PAGE */
 
 static inline int remap_4k_pfn(struct vm_area_struct *vma, unsigned long addr,
arch/powerpc/include/asm/hugetlb.h +4 -0
index 36ed6d976cf9..d022722e6530 100644
@@ -37,6 +37,10 @@ void hugetlb_free_pgd_range(struct mmu_gather *tlb, unsigned long addr,
 			    unsigned long ceiling);
 #endif
 
+#define __HAVE_ARCH_HUGE_SET_HUGE_PTE_AT
+void set_huge_pte_at(struct mm_struct *mm, unsigned long addr, pte_t *ptep,
+		     pte_t pte, unsigned long sz);
+
 #define __HAVE_ARCH_HUGE_PTEP_GET_AND_CLEAR
 static inline pte_t huge_ptep_get_and_clear(struct mm_struct *mm,
 					    unsigned long addr, pte_t *ptep)
arch/powerpc/include/asm/nohash/32/hugetlb-8xx.h +0 -4
index 1414cfd28987..4cba84776a7d 100644
@@ -25,10 +25,6 @@ static inline pte_t huge_ptep_get(struct mm_struct *mm, unsigned long addr, pte_
 	return ptep_get(ptep);
 }
 
-#define __HAVE_ARCH_HUGE_SET_HUGE_PTE_AT
-void set_huge_pte_at(struct mm_struct *mm, unsigned long addr, pte_t *ptep,
-		     pte_t pte, unsigned long sz);
-
 #define __HAVE_ARCH_HUGE_PTE_CLEAR
 static inline void huge_pte_clear(struct mm_struct *mm, unsigned long addr,
 				  pte_t *ptep, unsigned long sz)
arch/powerpc/include/asm/nohash/hugetlb-e500.h +0 -4
index d30e2a3f129d..aea4c462e494 100644
@@ -2,10 +2,6 @@
 #ifndef _ASM_POWERPC_NOHASH_HUGETLB_E500_H
 #define _ASM_POWERPC_NOHASH_HUGETLB_E500_H
 
-#define __HAVE_ARCH_HUGE_SET_HUGE_PTE_AT
-void set_huge_pte_at(struct mm_struct *mm, unsigned long addr, pte_t *ptep,
-		     pte_t pte, unsigned long sz);
-
 void flush_hugetlb_page(struct vm_area_struct *vma, unsigned long vmaddr);
 
 static inline int check_and_get_huge_psize(int shift)
arch/powerpc/include/asm/page.h +0 -8
index 7d3c3bc40e6a..c0af246a64ff 100644
@@ -269,14 +269,6 @@ static inline const void *pfn_to_kaddr(unsigned long pfn)
 #define is_kernel_addr(x)	((x) >= TASK_SIZE)
 #endif
 
-#ifdef CONFIG_PPC_BOOK3S_64
-/*
- * Book3S 64 stores real addresses in the hugepd entries to
- * avoid overlaps with _PAGE_PRESENT and _PAGE_PTE.
- */
-#define HUGEPD_ADDR_MASK	(0x0ffffffffffffffful & ~HUGEPD_SHIFT_MASK)
-#endif /* CONFIG_PPC_BOOK3S_64 */
-
 /*
  * Some number of bits at the level of the page table that points to
  * a hugepte are used to encode the size.  This masks those bits.
arch/powerpc/mm/book3s64/hash_utils.c +7 -4
index 01c3b4b65241..6727a15ab94f 100644
@@ -1233,10 +1233,6 @@ void __init hash__early_init_mmu(void)
 	__pmd_table_size = H_PMD_TABLE_SIZE;
 	__pud_table_size = H_PUD_TABLE_SIZE;
 	__pgd_table_size = H_PGD_TABLE_SIZE;
-	/*
-	 * 4k use hugepd format, so for hash set then to
-	 * zero
-	 */
 	__pmd_val_bits = HASH_PMD_VAL_BITS;
 	__pud_val_bits = HASH_PUD_VAL_BITS;
 	__pgd_val_bits = HASH_PGD_VAL_BITS;
@@ -1546,6 +1542,13 @@ int hash_page_mm(struct mm_struct *mm, unsigned long ea,
 		goto bail;
 	}
 
+	if (IS_ENABLED(CONFIG_PPC_4K_PAGES) && !radix_enabled()) {
+		if (hugeshift == PMD_SHIFT && psize == MMU_PAGE_16M)
+			hugeshift = mmu_psize_defs[MMU_PAGE_16M].shift;
+		if (hugeshift == PUD_SHIFT && psize == MMU_PAGE_16G)
+			hugeshift = mmu_psize_defs[MMU_PAGE_16G].shift;
+	}
+
 	/*
 	 * Add _PAGE_PRESENT to the required access perm. If there are parallel
 	 * updates to the pte that can possibly clear _PAGE_PTE, catch that too.
arch/powerpc/mm/book3s64/pgtable.c +0 -12
index 83823db3488b..e4a1e3feefce 100644
@@ -460,18 +460,6 @@ static inline void pgtable_free(void *table, int index)
 	case PUD_INDEX:
 		__pud_free(table);
 		break;
-#if defined(CONFIG_PPC_4K_PAGES) && defined(CONFIG_HUGETLB_PAGE)
-		/* 16M hugepd directory at pud level */
-	case HTLB_16M_INDEX:
-		BUILD_BUG_ON(H_16M_CACHE_INDEX <= 0);
-		kmem_cache_free(PGT_CACHE(H_16M_CACHE_INDEX), table);
-		break;
-		/* 16G hugepd directory at the pgd level */
-	case HTLB_16G_INDEX:
-		BUILD_BUG_ON(H_16G_CACHE_INDEX <= 0);
-		kmem_cache_free(PGT_CACHE(H_16G_CACHE_INDEX), table);
-		break;
-#endif
 		/* We don't free pgd table via RCU callback */
 	default:
 		BUG();
arch/powerpc/mm/hugetlbpage.c +0 -19
index 1401587578fc..64b9029d86de 100644
@@ -600,34 +600,15 @@ static int __init hugetlbpage_init(void)
 
 		shift = mmu_psize_to_shift(psize);
 
-#ifdef CONFIG_PPC_BOOK3S_64
-		if (shift > PGDIR_SHIFT)
-			continue;
-		else if (shift > PUD_SHIFT)
-			pdshift = PGDIR_SHIFT;
-		else if (shift > PMD_SHIFT)
-			pdshift = PUD_SHIFT;
-		else
-			pdshift = PMD_SHIFT;
-#else
 		if (shift < PUD_SHIFT)
 			pdshift = PMD_SHIFT;
 		else if (shift < PGDIR_SHIFT)
 			pdshift = PUD_SHIFT;
 		else
 			pdshift = PGDIR_SHIFT;
-#endif
 
 		if (add_huge_page_size(1ULL << shift) < 0)
 			continue;
-		/*
-		 * if we have pdshift and shift value same, we don't
-		 * use pgt cache for hugepd.
-		 */
-		if (pdshift > shift) {
-			if (!IS_ENABLED(CONFIG_PPC_8xx))
-				pgtable_cache_add(pdshift - shift);
-		}
 
 		configured = true;
 	}
arch/powerpc/mm/pgtable.c +1 -1
index d68c0fcffe80..7d4c004cbc75 100644
@@ -328,7 +328,7 @@ void set_huge_pte_at(struct mm_struct *mm, unsigned long addr, pte_t *ptep,
 		__set_huge_pte_at(pmdp, ptep, pte_val(pte));
 	}
 }
-#elif defined(CONFIG_PPC_E500)
+#else
 void set_huge_pte_at(struct mm_struct *mm, unsigned long addr, pte_t *ptep,
 		     pte_t pte, unsigned long sz)
 {
arch/powerpc/platforms/Kconfig.cputype +0 -1
index 30a78e99663e..b2d8c0da2ad9 100644
@@ -98,7 +98,6 @@ config PPC_BOOK3S_64
 	select ARCH_ENABLE_HUGEPAGE_MIGRATION if HUGETLB_PAGE && MIGRATION
 	select ARCH_ENABLE_SPLIT_PMD_PTLOCK
 	select ARCH_ENABLE_THP_MIGRATION if TRANSPARENT_HUGEPAGE
-	select ARCH_HAS_HUGEPD if HUGETLB_PAGE
 	select ARCH_SUPPORTS_HUGETLBFS
 	select ARCH_SUPPORTS_NUMA_BALANCING
 	select HAVE_MOVE_PMD
Signature · 1 line
2.44.0
#49 lore raw

Re: [RFC PATCH v2 18/20] powerpc/64s: Use contiguous PMD/PUD instead of HUGEPD

Quoted 118 lines · Christophe Leroy

On book3s/64, the only user of hugepd is hash in 4k mode.

All other setups (hash-64, radix-4, radix-64) use leaf PMD/PUD.

Rework hash-4k to use contiguous PMD and PUD instead.

In that setup there are only two huge page sizes: 16M and 16G.

16M sits at PMD level and 16G at PUD level.

pte_update doesn't know page size, lets use the same trick as hpte_need_flush() to get page size from segment properties. That's not the most efficient way but let's do that until callers of pte_update() provide page size instead of just a huge flag.

---
 arch/powerpc/include/asm/book3s/64/hash-4k.h  | 15 --------
 arch/powerpc/include/asm/book3s/64/hash.h     | 38 +++++++++++++++----
 arch/powerpc/include/asm/book3s/64/hugetlb.h  | 38 -------------------
 .../include/asm/book3s/64/pgtable-4k.h        | 34 -----------------
 .../include/asm/book3s/64/pgtable-64k.h       | 20 ----------
 arch/powerpc/include/asm/hugetlb.h            |  4 ++
 .../include/asm/nohash/32/hugetlb-8xx.h       |  4 --
 .../powerpc/include/asm/nohash/hugetlb-e500.h |  4 --
 arch/powerpc/include/asm/page.h               |  8 ----
 arch/powerpc/mm/book3s64/hash_utils.c         | 11 ++++--
 arch/powerpc/mm/book3s64/pgtable.c            | 12 ------
 arch/powerpc/mm/hugetlbpage.c                 | 19 ----------
 arch/powerpc/mm/pgtable.c                     |  2 +-
 arch/powerpc/platforms/Kconfig.cputype        |  1 -
 14 files changed, 43 insertions(+), 167 deletions(-)
arch/powerpc/include/asm/book3s/64/hash-4k.h +0 -15
index 6472b08fa1b0..c654c376ef8b 100644
@@ -74,21 +74,6 @@
 #define remap_4k_pfn(vma, addr, pfn, prot)	\
 	remap_pfn_range((vma), (addr), (pfn), PAGE_SIZE, (prot))
 
-#ifdef CONFIG_HUGETLB_PAGE
-static inline int hash__hugepd_ok(hugepd_t hpd)
-{
-	unsigned long hpdval = hpd_val(hpd);
-	/*
-	 * if it is not a pte and have hugepd shift mask
-	 * set, then it is a hugepd directory pointer
-	 */
-	if (!(hpdval & _PAGE_PTE) && (hpdval & _PAGE_PRESENT) &&
-	    ((hpdval & HUGEPD_SHIFT_MASK) != 0))
-		return true;
-	return false;
-}
-#endif
-
 /*
  * 4K PTE format is different from 64K PTE format. Saving the hash_slot is just
  * a matter of returning the PTE bits that need to be modified. On 64K PTE,
arch/powerpc/include/asm/book3s/64/hash.h +29 -6
index faf3e3b4e4b2..509811ca7695 100644
@@ -4,6 +4,7 @@
 #ifdef __KERNEL__
 
 #include <asm/asm-const.h>
+#include <asm/book3s/64/slice.h>
 
 /*
  * Common bits between 4K and 64K pages in a linux-style PTE.
@@ -161,14 +162,10 @@ extern void hpte_need_flush(struct mm_struct *mm, unsigned long addr,
 			    pte_t *ptep, unsigned long pte, int huge);
 unsigned long htab_convert_pte_flags(unsigned long pteflags, unsigned long flags);
 /* Atomic PTE updates */
-static inline unsigned long hash__pte_update(struct mm_struct *mm,
-					 unsigned long addr,
-					 pte_t *ptep, unsigned long clr,
-					 unsigned long set,
-					 int huge)
+static inline unsigned long hash__pte_update_one(pte_t *ptep, unsigned long clr,
+						 unsigned long set)
 {
 	__be64 old_be, tmp_be;
-	unsigned long old;
 
 	__asm__ __volatile__(
 	"1:	ldarx	%0,0,%3		# pte_update\n\
@@ -182,11 +179,38 @@ static inline unsigned long hash__pte_update(struct mm_struct *mm,
 	: "r" (ptep), "r" (cpu_to_be64(clr)), "m" (*ptep),
 	  "r" (cpu_to_be64(H_PAGE_BUSY)), "r" (cpu_to_be64(set))
 	: "cc" );
+
+	return be64_to_cpu(old_be);
+}
+
+static inline unsigned long hash__pte_update(struct mm_struct *mm,
+					 unsigned long addr,
+					 pte_t *ptep, unsigned long clr,
+					 unsigned long set,
+					 int huge)
+{
+	unsigned long old;
+
+	old = hash__pte_update_one(ptep, clr, set);
+
+	if (huge && IS_ENABLED(CONFIG_PPC_4K_PAGES)) {
+		unsigned int psize = get_slice_psize(mm, addr);
+		int nb, i;
+
+		if (psize == MMU_PAGE_16M)
+			nb = SZ_16M / PMD_SIZE;
+		else if (psize == MMU_PAGE_16G)
+			nb = SZ_16G / PUD_SIZE;
+		else
+			nb = 1;
+
+		for (i = 1; i < nb; i++)

arch/powerpc/include/asm/book3s/64/hash.h static inline unsigned long hash__pte_update(struct mm_struct *mm, · line 216

Quoted 10 lines
arch/powerpc/include/asm/book3s/64/hash.h +2 -1
+			hash__pte_update_one(ptep + i, clr, set);
+	}
 	/* huge pages use the old page table lock */
 	if (!huge)
 		assert_pte_locked(mm, addr);
 
-	old = be64_to_cpu(old_be);
 	if (old & H_PAGE_HASHPTE)
 		hpte_need_flush(mm, addr, ptep, old, huge);
 

Nice series, I don't know this hugepd code very well but I'll try. Why do you have to replicate the PTE entry here? The hash table refill should always be working on the first PTE of the page otherwise we have bigger problems.

What paths look at the N > 0 PTEs of a contiguous page entry?

Thanks,
Nick

#50 lore raw

Re: [RFC PATCH v2 18/20] powerpc/64s: Use contiguous PMD/PUD instead of HUGEPD

Le 20/05/2024 à 14:54, Nicholas Piggin a écrit :

Quoted 125 lines · Christophe Leroy
Quoted 124 lines

On book3s/64, the only user of hugepd is hash in 4k mode.

All other setups (hash-64, radix-4, radix-64) use leaf PMD/PUD.

Rework hash-4k to use contiguous PMD and PUD instead.

In that setup there are only two huge page sizes: 16M and 16G.

16M sits at PMD level and 16G at PUD level.

pte_update doesn't know page size, lets use the same trick as hpte_need_flush() to get page size from segment properties. That's not the most efficient way but let's do that until callers of pte_update() provide page size instead of just a huge flag.

---
  arch/powerpc/include/asm/book3s/64/hash-4k.h  | 15 --------
  arch/powerpc/include/asm/book3s/64/hash.h     | 38 +++++++++++++++----
  arch/powerpc/include/asm/book3s/64/hugetlb.h  | 38 -------------------
  .../include/asm/book3s/64/pgtable-4k.h        | 34 -----------------
  .../include/asm/book3s/64/pgtable-64k.h       | 20 ----------
  arch/powerpc/include/asm/hugetlb.h            |  4 ++
  .../include/asm/nohash/32/hugetlb-8xx.h       |  4 --
  .../powerpc/include/asm/nohash/hugetlb-e500.h |  4 --
  arch/powerpc/include/asm/page.h               |  8 ----
  arch/powerpc/mm/book3s64/hash_utils.c         | 11 ++++--
  arch/powerpc/mm/book3s64/pgtable.c            | 12 ------
  arch/powerpc/mm/hugetlbpage.c                 | 19 ----------
  arch/powerpc/mm/pgtable.c                     |  2 +-
  arch/powerpc/platforms/Kconfig.cputype        |  1 -
  14 files changed, 43 insertions(+), 167 deletions(-)
arch/powerpc/include/asm/book3s/64/hash-4k.h +0 -15
index 6472b08fa1b0..c654c376ef8b 100644
@@ -74,21 +74,6 @@
  #define remap_4k_pfn(vma, addr, pfn, prot)	\
  	remap_pfn_range((vma), (addr), (pfn), PAGE_SIZE, (prot))
 
-#ifdef CONFIG_HUGETLB_PAGE
-static inline int hash__hugepd_ok(hugepd_t hpd)
-{
-	unsigned long hpdval = hpd_val(hpd);
-	/*
-	 * if it is not a pte and have hugepd shift mask
-	 * set, then it is a hugepd directory pointer
-	 */
-	if (!(hpdval & _PAGE_PTE) && (hpdval & _PAGE_PRESENT) &&
-	    ((hpdval & HUGEPD_SHIFT_MASK) != 0))
-		return true;
-	return false;
-}
-#endif
-
  /*
   * 4K PTE format is different from 64K PTE format. Saving the hash_slot is just
   * a matter of returning the PTE bits that need to be modified. On 64K PTE,
arch/powerpc/include/asm/book3s/64/hash.h +31 -6
index faf3e3b4e4b2..509811ca7695 100644
@@ -4,6 +4,7 @@
  #ifdef __KERNEL__
 
  #include <asm/asm-const.h>
+#include <asm/book3s/64/slice.h>
 
  /*
   * Common bits between 4K and 64K pages in a linux-style PTE.
@@ -161,14 +162,10 @@ extern void hpte_need_flush(struct mm_struct *mm, unsigned long addr,
  			    pte_t *ptep, unsigned long pte, int huge);
  unsigned long htab_convert_pte_flags(unsigned long pteflags, unsigned long flags);
  /* Atomic PTE updates */
-static inline unsigned long hash__pte_update(struct mm_struct *mm,
-					 unsigned long addr,
-					 pte_t *ptep, unsigned long clr,
-					 unsigned long set,
-					 int huge)
+static inline unsigned long hash__pte_update_one(pte_t *ptep, unsigned long clr,
+						 unsigned long set)
  {
  	__be64 old_be, tmp_be;
-	unsigned long old;
 
  	__asm__ __volatile__(
  	"1:	ldarx	%0,0,%3		# pte_update\n\
@@ -182,11 +179,38 @@ static inline unsigned long hash__pte_update(struct mm_struct *mm,
  	: "r" (ptep), "r" (cpu_to_be64(clr)), "m" (*ptep),
  	  "r" (cpu_to_be64(H_PAGE_BUSY)), "r" (cpu_to_be64(set))
  	: "cc" );
+
+	return be64_to_cpu(old_be);
+}
+
+static inline unsigned long hash__pte_update(struct mm_struct *mm,
+					 unsigned long addr,
+					 pte_t *ptep, unsigned long clr,
+					 unsigned long set,
+					 int huge)
+{
+	unsigned long old;
+
+	old = hash__pte_update_one(ptep, clr, set);
+
+	if (huge && IS_ENABLED(CONFIG_PPC_4K_PAGES)) {
+		unsigned int psize = get_slice_psize(mm, addr);
+		int nb, i;
+
+		if (psize == MMU_PAGE_16M)
+			nb = SZ_16M / PMD_SIZE;
+		else if (psize == MMU_PAGE_16G)
+			nb = SZ_16G / PUD_SIZE;
+		else
+			nb = 1;
+
+		for (i = 1; i < nb; i++)
+			hash__pte_update_one(ptep + i, clr, set);
+	}
  	/* huge pages use the old page table lock */
  	if (!huge)
  		assert_pte_locked(mm, addr);
 
Quoted 9 lines

arch/powerpc/include/asm/book3s/64/hash.h static inline unsigned long hash__pte_update(struct mm_struct *mm, · line 216

Quoted 4 lines
arch/powerpc/include/asm/book3s/64/hash.h +0 -1
-	old = be64_to_cpu(old_be);
  	if (old & H_PAGE_HASHPTE)
  		hpte_need_flush(mm, addr, ptep, old, huge);
 

Nice series, I don't know this hugepd code very well but I'll try. Why do you have to replicate the PTE entry here? The hash table refill should always be working on the first PTE of the page otherwise we have bigger problems.

I don't know how book3s/64 works exactly, but on nohash, when you get a TLB miss exception the only thing you have is the address and you don't know yes it is a hugepage so you get the PTE as if it was a 4k page and it is only when you read that PTE that you know it is a hugepage.

Ok, on book3s/64 the page size seems to be encoded inside the segment so maybe it is a bit different but anyway the TLB miss exception (or DSI ?) can happen at any address.

Quoted 3 lines

What paths look at the N > 0 PTEs of a contiguous page entry?

pte_offset_kernel() or pte_offset_map_lock() will land on any contiguous PTE based on the address handed to pte_index(), as if it was a standard (4k or 64k) page.

pte_index() doesn't know it is a hugepage, that's the reason why we need to duplicate the entry.

#51 lore raw

Re: [RFC PATCH v2 18/20] powerpc/64s: Use contiguous PMD/PUD instead of HUGEPD

Quoted 138 lines · Christophe Leroy

Le 20/05/2024 à 14:54, Nicholas Piggin a écrit :

Quoted 125 lines · Christophe Leroy
Quoted 124 lines

On book3s/64, the only user of hugepd is hash in 4k mode.

All other setups (hash-64, radix-4, radix-64) use leaf PMD/PUD.

Rework hash-4k to use contiguous PMD and PUD instead.

In that setup there are only two huge page sizes: 16M and 16G.

16M sits at PMD level and 16G at PUD level.

pte_update doesn't know page size, lets use the same trick as hpte_need_flush() to get page size from segment properties. That's not the most efficient way but let's do that until callers of pte_update() provide page size instead of just a huge flag.

---
  arch/powerpc/include/asm/book3s/64/hash-4k.h  | 15 --------
  arch/powerpc/include/asm/book3s/64/hash.h     | 38 +++++++++++++++----
  arch/powerpc/include/asm/book3s/64/hugetlb.h  | 38 -------------------
  .../include/asm/book3s/64/pgtable-4k.h        | 34 -----------------
  .../include/asm/book3s/64/pgtable-64k.h       | 20 ----------
  arch/powerpc/include/asm/hugetlb.h            |  4 ++
  .../include/asm/nohash/32/hugetlb-8xx.h       |  4 --
  .../powerpc/include/asm/nohash/hugetlb-e500.h |  4 --
  arch/powerpc/include/asm/page.h               |  8 ----
  arch/powerpc/mm/book3s64/hash_utils.c         | 11 ++++--
  arch/powerpc/mm/book3s64/pgtable.c            | 12 ------
  arch/powerpc/mm/hugetlbpage.c                 | 19 ----------
  arch/powerpc/mm/pgtable.c                     |  2 +-
  arch/powerpc/platforms/Kconfig.cputype        |  1 -
  14 files changed, 43 insertions(+), 167 deletions(-)
arch/powerpc/include/asm/book3s/64/hash-4k.h +0 -15
index 6472b08fa1b0..c654c376ef8b 100644
@@ -74,21 +74,6 @@
  #define remap_4k_pfn(vma, addr, pfn, prot)	\
  	remap_pfn_range((vma), (addr), (pfn), PAGE_SIZE, (prot))
 
-#ifdef CONFIG_HUGETLB_PAGE
-static inline int hash__hugepd_ok(hugepd_t hpd)
-{
-	unsigned long hpdval = hpd_val(hpd);
-	/*
-	 * if it is not a pte and have hugepd shift mask
-	 * set, then it is a hugepd directory pointer
-	 */
-	if (!(hpdval & _PAGE_PTE) && (hpdval & _PAGE_PRESENT) &&
-	    ((hpdval & HUGEPD_SHIFT_MASK) != 0))
-		return true;
-	return false;
-}
-#endif
-
  /*
   * 4K PTE format is different from 64K PTE format. Saving the hash_slot is just
   * a matter of returning the PTE bits that need to be modified. On 64K PTE,
arch/powerpc/include/asm/book3s/64/hash.h +31 -6
index faf3e3b4e4b2..509811ca7695 100644
@@ -4,6 +4,7 @@
  #ifdef __KERNEL__
 
  #include <asm/asm-const.h>
+#include <asm/book3s/64/slice.h>
 
  /*
   * Common bits between 4K and 64K pages in a linux-style PTE.
@@ -161,14 +162,10 @@ extern void hpte_need_flush(struct mm_struct *mm, unsigned long addr,
  			    pte_t *ptep, unsigned long pte, int huge);
  unsigned long htab_convert_pte_flags(unsigned long pteflags, unsigned long flags);
  /* Atomic PTE updates */
-static inline unsigned long hash__pte_update(struct mm_struct *mm,
-					 unsigned long addr,
-					 pte_t *ptep, unsigned long clr,
-					 unsigned long set,
-					 int huge)
+static inline unsigned long hash__pte_update_one(pte_t *ptep, unsigned long clr,
+						 unsigned long set)
  {
  	__be64 old_be, tmp_be;
-	unsigned long old;
 
  	__asm__ __volatile__(
  	"1:	ldarx	%0,0,%3		# pte_update\n\
@@ -182,11 +179,38 @@ static inline unsigned long hash__pte_update(struct mm_struct *mm,
  	: "r" (ptep), "r" (cpu_to_be64(clr)), "m" (*ptep),
  	  "r" (cpu_to_be64(H_PAGE_BUSY)), "r" (cpu_to_be64(set))
  	: "cc" );
+
+	return be64_to_cpu(old_be);
+}
+
+static inline unsigned long hash__pte_update(struct mm_struct *mm,
+					 unsigned long addr,
+					 pte_t *ptep, unsigned long clr,
+					 unsigned long set,
+					 int huge)
+{
+	unsigned long old;
+
+	old = hash__pte_update_one(ptep, clr, set);
+
+	if (huge && IS_ENABLED(CONFIG_PPC_4K_PAGES)) {
+		unsigned int psize = get_slice_psize(mm, addr);
+		int nb, i;
+
+		if (psize == MMU_PAGE_16M)
+			nb = SZ_16M / PMD_SIZE;
+		else if (psize == MMU_PAGE_16G)
+			nb = SZ_16G / PUD_SIZE;
+		else
+			nb = 1;
+
+		for (i = 1; i < nb; i++)
+			hash__pte_update_one(ptep + i, clr, set);
+	}
  	/* huge pages use the old page table lock */
  	if (!huge)
  		assert_pte_locked(mm, addr);
 
Quoted 9 lines

arch/powerpc/include/asm/book3s/64/hash.h static inline unsigned long hash__pte_update(struct mm_struct *mm, · line 216

Quoted 4 lines
arch/powerpc/include/asm/book3s/64/hash.h +0 -1
-	old = be64_to_cpu(old_be);
  	if (old & H_PAGE_HASHPTE)
  		hpte_need_flush(mm, addr, ptep, old, huge);
 

Nice series, I don't know this hugepd code very well but I'll try. Why do you have to replicate the PTE entry here? The hash table refill should always be working on the first PTE of the page otherwise we have bigger problems.

Quoted 8 lines

I don't know how book3s/64 works exactly, but on nohash, when you get a TLB miss exception the only thing you have is the address and you don't know yes it is a hugepage so you get the PTE as if it was a 4k page and it is only when you read that PTE that you know it is a hugepage.

Ok, on book3s/64 the page size seems to be encoded inside the segment so maybe it is a bit different but anyway the TLB miss exception (or DSI ?) can happen at any address.

Right.

If you think of the hash page table as a software loaded TLB (which is how Linux kind of thinks of it), then DSI is a TLB miss. hash_page_x calls find the Linux pte and load that translation into hash page table.

One of the hard parts is keeping them coherent with low overhead. This requires pte bits H_PAGE_BUSY as a lock and H_PAGE_HASHPTE which means it might be in the hash table. So Linux PTE and hash PTE have to be 1:1 in general.

There are probably cases where we could get away from 1:1, but I would much prefer not to. Maybe read-only access would be okay though. But the hash_page will have to always operate on the 0th pte, which I think we get via segment size masking, same for any set / update / clear of the pte.

Quoted 10 lines
Quoted 3 lines

What paths look at the N > 0 PTEs of a contiguous page entry?

pte_offset_kernel() or pte_offset_map_lock() will land on any contiguous PTE based on the address handed to pte_index(), as if it was a standard (4k or 64k) page.

pte_index() doesn't know it is a hugepage, that's the reason why we need to duplicate the entry.

From the mm/ side of things, hugetlb page tables are always walked via the huge vma which knows the page size and could align address... I guess except for fast gup? Which should be read-only. So okay you do need to replicate huge ptes for fast gup at least. Any others?

There's going to need to be a little more to it. __hash_page_huge sets PTE accessed and dirty for example, so if we allow any PTE readers to check the non-0th pte we would have to do something about that.

How do you deal with dirty/accessed bits for other subarchs?

We could just remove the hash_page setting of those bits and just cause a fault and require Linux mm to set them. At least for hugepages we could do that probably without any real performance worry.

Thanks,
Nick

#52 lore raw

Re: [RFC PATCH v2 18/20] powerpc/64s: Use contiguous PMD/PUD instead of HUGEPD

Le 22/05/2024 à 03:13, Nicholas Piggin a écrit :

Quoted 181 lines · Christophe Leroy
Quoted 138 lines

Le 20/05/2024 à 14:54, Nicholas Piggin a écrit :

Quoted 125 lines · Christophe Leroy
Quoted 124 lines

On book3s/64, the only user of hugepd is hash in 4k mode.

All other setups (hash-64, radix-4, radix-64) use leaf PMD/PUD.

Rework hash-4k to use contiguous PMD and PUD instead.

In that setup there are only two huge page sizes: 16M and 16G.

16M sits at PMD level and 16G at PUD level.

pte_update doesn't know page size, lets use the same trick as hpte_need_flush() to get page size from segment properties. That's not the most efficient way but let's do that until callers of pte_update() provide page size instead of just a huge flag.

---
   arch/powerpc/include/asm/book3s/64/hash-4k.h  | 15 --------
   arch/powerpc/include/asm/book3s/64/hash.h     | 38 +++++++++++++++----
   arch/powerpc/include/asm/book3s/64/hugetlb.h  | 38 -------------------
   .../include/asm/book3s/64/pgtable-4k.h        | 34 -----------------
   .../include/asm/book3s/64/pgtable-64k.h       | 20 ----------
   arch/powerpc/include/asm/hugetlb.h            |  4 ++
   .../include/asm/nohash/32/hugetlb-8xx.h       |  4 --
   .../powerpc/include/asm/nohash/hugetlb-e500.h |  4 --
   arch/powerpc/include/asm/page.h               |  8 ----
   arch/powerpc/mm/book3s64/hash_utils.c         | 11 ++++--
   arch/powerpc/mm/book3s64/pgtable.c            | 12 ------
   arch/powerpc/mm/hugetlbpage.c                 | 19 ----------
   arch/powerpc/mm/pgtable.c                     |  2 +-
   arch/powerpc/platforms/Kconfig.cputype        |  1 -
   14 files changed, 43 insertions(+), 167 deletions(-)
arch/powerpc/include/asm/book3s/64/hash-4k.h +0 -15
index 6472b08fa1b0..c654c376ef8b 100644
@@ -74,21 +74,6 @@
   #define remap_4k_pfn(vma, addr, pfn, prot)	\
   	remap_pfn_range((vma), (addr), (pfn), PAGE_SIZE, (prot))
 
-#ifdef CONFIG_HUGETLB_PAGE
-static inline int hash__hugepd_ok(hugepd_t hpd)
-{
-	unsigned long hpdval = hpd_val(hpd);
-	/*
-	 * if it is not a pte and have hugepd shift mask
-	 * set, then it is a hugepd directory pointer
-	 */
-	if (!(hpdval & _PAGE_PTE) && (hpdval & _PAGE_PRESENT) &&
-	    ((hpdval & HUGEPD_SHIFT_MASK) != 0))
-		return true;
-	return false;
-}
-#endif
-
   /*
    * 4K PTE format is different from 64K PTE format. Saving the hash_slot is just
    * a matter of returning the PTE bits that need to be modified. On 64K PTE,
arch/powerpc/include/asm/book3s/64/hash.h +31 -6
index faf3e3b4e4b2..509811ca7695 100644
@@ -4,6 +4,7 @@
   #ifdef __KERNEL__
 
   #include <asm/asm-const.h>
+#include <asm/book3s/64/slice.h>
 
   /*
    * Common bits between 4K and 64K pages in a linux-style PTE.
@@ -161,14 +162,10 @@ extern void hpte_need_flush(struct mm_struct *mm, unsigned long addr,
   			    pte_t *ptep, unsigned long pte, int huge);
   unsigned long htab_convert_pte_flags(unsigned long pteflags, unsigned long flags);
   /* Atomic PTE updates */
-static inline unsigned long hash__pte_update(struct mm_struct *mm,
-					 unsigned long addr,
-					 pte_t *ptep, unsigned long clr,
-					 unsigned long set,
-					 int huge)
+static inline unsigned long hash__pte_update_one(pte_t *ptep, unsigned long clr,
+						 unsigned long set)
   {
   	__be64 old_be, tmp_be;
-	unsigned long old;
 
   	__asm__ __volatile__(
   	"1:	ldarx	%0,0,%3		# pte_update\n\
@@ -182,11 +179,38 @@ static inline unsigned long hash__pte_update(struct mm_struct *mm,
   	: "r" (ptep), "r" (cpu_to_be64(clr)), "m" (*ptep),
   	  "r" (cpu_to_be64(H_PAGE_BUSY)), "r" (cpu_to_be64(set))
   	: "cc" );
+
+	return be64_to_cpu(old_be);
+}
+
+static inline unsigned long hash__pte_update(struct mm_struct *mm,
+					 unsigned long addr,
+					 pte_t *ptep, unsigned long clr,
+					 unsigned long set,
+					 int huge)
+{
+	unsigned long old;
+
+	old = hash__pte_update_one(ptep, clr, set);
+
+	if (huge && IS_ENABLED(CONFIG_PPC_4K_PAGES)) {
+		unsigned int psize = get_slice_psize(mm, addr);
+		int nb, i;
+
+		if (psize == MMU_PAGE_16M)
+			nb = SZ_16M / PMD_SIZE;
+		else if (psize == MMU_PAGE_16G)
+			nb = SZ_16G / PUD_SIZE;
+		else
+			nb = 1;
+
+		for (i = 1; i < nb; i++)
+			hash__pte_update_one(ptep + i, clr, set);
+	}
   	/* huge pages use the old page table lock */
   	if (!huge)
   		assert_pte_locked(mm, addr);
 
Quoted 9 lines

arch/powerpc/include/asm/book3s/64/hash.h static inline unsigned long hash__pte_update(struct mm_struct *mm, · line 216

Quoted 4 lines
arch/powerpc/include/asm/book3s/64/hash.h +0 -1
-	old = be64_to_cpu(old_be);
   	if (old & H_PAGE_HASHPTE)
   		hpte_need_flush(mm, addr, ptep, old, huge);
 

Nice series, I don't know this hugepd code very well but I'll try. Why do you have to replicate the PTE entry here? The hash table refill should always be working on the first PTE of the page otherwise we have bigger problems.

Quoted 8 lines

I don't know how book3s/64 works exactly, but on nohash, when you get a TLB miss exception the only thing you have is the address and you don't know yes it is a hugepage so you get the PTE as if it was a 4k page and it is only when you read that PTE that you know it is a hugepage.

Ok, on book3s/64 the page size seems to be encoded inside the segment so maybe it is a bit different but anyway the TLB miss exception (or DSI ?) can happen at any address.

Right.

If you think of the hash page table as a software loaded TLB (which is how Linux kind of thinks of it), then DSI is a TLB miss. hash_page_x calls find the Linux pte and load that translation into hash page table.

One of the hard parts is keeping them coherent with low overhead. This requires pte bits H_PAGE_BUSY as a lock and H_PAGE_HASHPTE which means it might be in the hash table. So Linux PTE and hash PTE have to be 1:1 in general.

There are probably cases where we could get away from 1:1, but I would much prefer not to. Maybe read-only access would be okay though. But the hash_page will have to always operate on the 0th pte, which I think we get via segment size masking, same for any set / update / clear of the pte.

Quoted 10 lines
Quoted 3 lines

What paths look at the N > 0 PTEs of a contiguous page entry?

pte_offset_kernel() or pte_offset_map_lock() will land on any contiguous PTE based on the address handed to pte_index(), as if it was a standard (4k or 64k) page.

pte_index() doesn't know it is a hugepage, that's the reason why we need to duplicate the entry.

From the mm/ side of things, hugetlb page tables are always walked via
the huge vma which knows the page size and could align address... I guess except for fast gup? Which should be read-only. So okay you do need to replicate huge ptes for fast gup at least. Any others?

Quoted 5 lines

There's going to need to be a little more to it. __hash_page_huge sets PTE accessed and dirty for example, so if we allow any PTE readers to check the non-0th pte we would have to do something about that.

How do you deal with dirty/accessed bits for other subarchs?

All nohash bail out of TLB miss handler when accessing a page which doesn have the ACCESSED bit or writing a page which doesn't have DIRTY bit, see commit 2c74e2586bb9 ("powerpc/40x: Rework 40x PTE access and TLB miss") and other commits it refers to.

Same for the 603 which is the nohash version of book3s/32, see commits f8b58c64eaef ("powerpc/603: let's handle PAGE_DIRTY directly") and 84de6ab0e904 ("powerpc/603: don't handle PAGE_ACCESSED in TLB miss handlers.").

Only the hash version of book3s/32 still updated PTE in miss handler, see
https://elixir.bootlin.com/linux/v6.9/source/arch/powerpc/mm/book3s32/hash_low.S#L146
but there are no hugepages on book3s/32

Quoted 7 lines

We could just remove the hash_page setting of those bits and just cause a fault and require Linux mm to set them. At least for hugepages we could do that probably without any real performance worry.

Thanks,
Nick

maintainer
#53 lore raw

Re: [RFC PATCH v2 18/20] powerpc/64s: Use contiguous PMD/PUD instead of HUGEPD

In reply to Nicholas Piggin
Quoted 4 lines · Nicholas Piggin

From the mm/ side of things, hugetlb page tables are always walked via the huge vma which knows the page size and could align address... I guess except for fast gup? Which should be read-only. So okay you do need to replicate huge ptes for fast gup at least. Any others?

We are trying to get away from this. We want all content in the page table to be walkable via the normal pud/pmd/pte/etc functions and the special huge VMA limited to only weird hugetlbfs internals. It should not leak into the arch.

Quoted 3 lines

There's going to need to be a little more to it. __hash_page_huge sets PTE accessed and dirty for example, so if we allow any PTE readers to check the non-0th pte we would have to do something about that.

Ryan added a special function to get the access and dirty flags from a CONTIG PTE, the arch can do the right thing here. The case where there was a CONTIG PTE that spanned two PMD entries might be some trouble though.

Quoted 1 line

How do you deal with dirty/accessed bits for other subarchs?

ARM and RISCV verions will combine the access flags from every sub pte. Their HW is allowed to set dirty/access bits on any PTE in a contiguos set.

Jason

#54 lore raw

RFC PATCH v2 19/20 powerpc/mm: Remove hugepd leftovers

In reply to Christophe Leroy

All targets have now opted out of CONFIG_ARCH_HAS_HUGEPD so remove left over code.

---
 arch/powerpc/include/asm/hugetlb.h          |   7 -
 arch/powerpc/include/asm/page.h             |   6 -
 arch/powerpc/include/asm/pgtable-be-types.h |  10 -
 arch/powerpc/include/asm/pgtable-types.h    |   9 -
 arch/powerpc/mm/hugetlbpage.c               | 412 --------------------
 arch/powerpc/mm/init-common.c               |   8 +-
 arch/powerpc/mm/pgtable.c                   |  27 +-
 7 files changed, 3 insertions(+), 476 deletions(-)
arch/powerpc/include/asm/hugetlb.h +0 -7
index d022722e6530..00327aef2dec 100644
@@ -30,13 +30,6 @@ static inline int is_hugepage_only_range(struct mm_struct *mm,
 }
 #define is_hugepage_only_range is_hugepage_only_range
 
-#ifdef CONFIG_ARCH_HAS_HUGEPD
-#define __HAVE_ARCH_HUGETLB_FREE_PGD_RANGE
-void hugetlb_free_pgd_range(struct mmu_gather *tlb, unsigned long addr,
-			    unsigned long end, unsigned long floor,
-			    unsigned long ceiling);
-#endif
-
 #define __HAVE_ARCH_HUGE_SET_HUGE_PTE_AT
 void set_huge_pte_at(struct mm_struct *mm, unsigned long addr, pte_t *ptep,
 		     pte_t pte, unsigned long sz);
arch/powerpc/include/asm/page.h +0 -6
index c0af246a64ff..83d0a4fc5f75 100644
@@ -269,12 +269,6 @@ static inline const void *pfn_to_kaddr(unsigned long pfn)
 #define is_kernel_addr(x)	((x) >= TASK_SIZE)
 #endif
 
-/*
- * Some number of bits at the level of the page table that points to
- * a hugepte are used to encode the size.  This masks those bits.
- */
-#define HUGEPD_SHIFT_MASK     0x3f
-
 #ifndef __ASSEMBLY__
 
 #ifdef CONFIG_PPC_BOOK3S_64
arch/powerpc/include/asm/pgtable-be-types.h +0 -10
index 82633200b500..6bd8f89b25dc 100644
@@ -101,14 +101,4 @@ static inline bool pmd_xchg(pmd_t *pmdp, pmd_t old, pmd_t new)
 	return pmd_raw(old) == prev;
 }
 
-#ifdef CONFIG_ARCH_HAS_HUGEPD
-typedef struct { __be64 pdbe; } hugepd_t;
-#define __hugepd(x) ((hugepd_t) { cpu_to_be64(x) })
-
-static inline unsigned long hpd_val(hugepd_t x)
-{
-	return be64_to_cpu(x.pdbe);
-}
-#endif
-
 #endif /* _ASM_POWERPC_PGTABLE_BE_TYPES_H */
arch/powerpc/include/asm/pgtable-types.h +0 -9
index db965d98e0ae..7b3d4c592a10 100644
@@ -87,13 +87,4 @@ static inline bool pte_xchg(pte_t *ptep, pte_t old, pte_t new)
 }
 #endif
 
-#ifdef CONFIG_ARCH_HAS_HUGEPD
-typedef struct { unsigned long pd; } hugepd_t;
-#define __hugepd(x) ((hugepd_t) { (x) })
-static inline unsigned long hpd_val(hugepd_t x)
-{
-	return x.pd;
-}
-#endif
-
 #endif /* _ASM_POWERPC_PGTABLE_TYPES_H */
arch/powerpc/mm/hugetlbpage.c +0 -412

430 lines not on this page · raw message

arch/powerpc/mm/init-common.c +2 -6
index d3a7726ecf51..024e95c62a2d 100644
@@ -120,12 +120,8 @@ void pgtable_cache_add(unsigned int shift)
 	/* When batching pgtable pointers for RCU freeing, we store
 	 * the index size in the low bits.  Table alignment must be
 	 * big enough to fit it.
-	 *
-	 * Likewise, hugeapge pagetable pointers contain a (different)
-	 * shift value in the low bits.  All tables must be aligned so
-	 * as to leave enough 0 bits in the address to contain it. */
-	unsigned long minalign = max(MAX_PGTABLE_INDEX_SIZE + 1,
-				     HUGEPD_SHIFT_MASK + 1);
+	 */
+	unsigned long minalign = MAX_PGTABLE_INDEX_SIZE + 1;
 	struct kmem_cache *new = NULL;
 
 	/* It would be nice if this was a BUILD_BUG_ON(), but at the
arch/powerpc/mm/pgtable.c +1 -26
index 7d4c004cbc75..e1ddfe0174d6 100644
@@ -406,11 +406,10 @@ unsigned long vmalloc_to_phys(void *va)
 EXPORT_SYMBOL_GPL(vmalloc_to_phys);
 
 /*
- * We have 4 cases for pgds and pmds:
+ * We have 3 cases for pgds and pmds:
  * (1) invalid (all zeroes)
  * (2) pointer to next table, as normal; bottom 6 bits == 0
  * (3) leaf pte for huge page _PAGE_PTE set
- * (4) hugepd pointer, _PAGE_PTE = 0 and bits [2..6] indicate size of table
  *
  * So long as we atomically load page table pointers we are safe against teardown,
  * we can follow the address down to the page and take a ref on it.
@@ -429,7 +428,6 @@ pte_t *__find_linux_pte(pgd_t *pgdir, unsigned long ea,
 #endif
 	pmd_t pmd, *pmdp;
 	pte_t *ret_pte;
-	hugepd_t *hpdp = NULL;
 	unsigned pdshift;
 
 	if (hpage_shift)
@@ -459,11 +457,6 @@ pte_t *__find_linux_pte(pgd_t *pgdir, unsigned long ea,
 		goto out;
 	}
 
-	if (is_hugepd(__hugepd(p4d_val(p4d)))) {
-		hpdp = (hugepd_t *)&p4d;
-		goto out_huge;
-	}
-
 	/*
 	 * Even if we end up with an unmap, the pgtable will not
 	 * be freed, because we do an rcu free and here we are
@@ -481,11 +474,6 @@ pte_t *__find_linux_pte(pgd_t *pgdir, unsigned long ea,
 		goto out;
 	}
 
-	if (is_hugepd(__hugepd(pud_val(pud)))) {
-		hpdp = (hugepd_t *)&pud;
-		goto out_huge;
-	}
-
 	pdshift = PMD_SHIFT;
 	pmdp = pmd_offset(&pud, ea);
 #else
@@ -525,21 +513,8 @@ pte_t *__find_linux_pte(pgd_t *pgdir, unsigned long ea,
 		goto out;
 	}
 
-	if (is_hugepd(__hugepd(pmd_val(pmd)))) {
-		hpdp = (hugepd_t *)&pmd;
-		goto out_huge;
-	}
-
 	return pte_offset_kernel(&pmd, ea);
 
-out_huge:
-	if (!hpdp)
-		return NULL;
-
-#ifdef CONFIG_ARCH_HAS_HUGEPD
-	ret_pte = hugepte_offset(*hpdp, ea, pdshift);
-	pdshift = hugepd_shift(*hpdp);
-#endif
 out:
 	if (hpage_shift)
 		*hpage_shift = pdshift;
Signature · 1 line
2.44.0
#55 lore raw

RFC PATCH v2 20/20 mm: Remove CONFIG_ARCH_HAS_HUGEPD

In reply to Christophe Leroy

powerpc was the only user of CONFIG_ARCH_HAS_HUGEPD and doesn't use it anymore, so remove all related code.

---
 arch/powerpc/mm/hugetlbpage.c |   1 -
 include/linux/hugetlb.h       |   6 --
 mm/Kconfig                    |  10 ----
 mm/gup.c                      | 105 +---------------------------------
 mm/pagewalk.c                 |  57 ++----------------
 5 files changed, 5 insertions(+), 174 deletions(-)
arch/powerpc/mm/hugetlbpage.c +0 -1
index 6fad89d7bff3..1df9e4fa1001 100644
@@ -79,7 +79,6 @@ pte_t *huge_pte_alloc(struct mm_struct *mm, struct vm_area_struct *vma,
 		return NULL;
 	return (pte_t *)pmd;
 }
-#endif
 
 #ifdef CONFIG_PPC_BOOK3S_64
 /*
include/linux/hugetlb.h +0 -6
index d9c5d9daadc5..c020e3bdf62b 100644
@@ -20,12 +20,6 @@ struct user_struct;
 struct mmu_gather;
 struct node;
 
-#ifndef CONFIG_ARCH_HAS_HUGEPD
-typedef struct { unsigned long pd; } hugepd_t;
-#define is_hugepd(hugepd) (0)
-#define __hugepd(x) ((hugepd_t) { (x) })
-#endif
-
 void free_huge_folio(struct folio *folio);
 
 #ifdef CONFIG_HUGETLB_PAGE
mm/Kconfig +0 -10
index b1448aa81e15..a52f8e3224fb 100644
@@ -1114,16 +1114,6 @@ config DMAPOOL_TEST
 config ARCH_HAS_PTE_SPECIAL
 	bool
 
-#
-# Some architectures require a special hugepage directory format that is
-# required to support multiple hugepage sizes. For example a4fe3ce76
-# "powerpc/mm: Allow more flexible layouts for hugepage pagetables"
-# introduced it on powerpc.  This allows for a more flexible hugepage
-# pagetable layouts.
-#
-config ARCH_HAS_HUGEPD
-	bool
-
 config MAPPING_DIRTY_HELPERS
         bool
 
mm/gup.c +1 -104

135 lines not on this page · raw message

mm/pagewalk.c +4 -53

87 lines not on this page · raw message

Signature · 1 line
2.44.0
maintainer
#56 lore raw
In reply to Christophe Leroy
Quoted 3 lines · Christophe Leroy

This is the continuation of the RFC v1 series "Reimplement huge pages without hugepd on powerpc 8xx". It now get rid of hugepd completely after handling also e500 and book3s/64

This is really amazing, thank you for doing it!

Jason

#57 lore raw

Le 17/05/2024 à 21:06, Jason Gunthorpe a écrit :

Quoted 7 lines · Christophe Leroy
Quoted 3 lines

This is the continuation of the RFC v1 series "Reimplement huge pages without hugepd on powerpc 8xx". It now get rid of hugepd completely after handling also e500 and book3s/64

This is really amazing, thank you for doing it!

You are welcome.

I have not yet taken into account your review comments on v1. I first wanted to have a global picture.

Christophe

reviewer
#58 lore raw
In reply to Christophe Leroy
Quoted 48 lines · Christophe Leroy

This is the continuation of the RFC v1 series "Reimplement huge pages without hugepd on powerpc 8xx". It now get rid of hugepd completely after handling also e500 and book3s/64

Unlike most architectures, powerpc 8xx HW requires a two-level pagetable topology for all page sizes. So a leaf PMD-contig approach is not feasible as such.

Possible sizes are 4k, 16k, 512k and 8M.

First level (PGD/PMD) covers 4M per entry. For 8M pages, two PMD entries must point to a single entry level-2 page table. Until now that was done using hugepd. This series changes it to use standard page tables where the entry is replicated 1024 times on each of the two pagetables refered by the two associated PMD entries for that 8M page.

At the moment it has to look into each helper to know if the hugepage ptep is a PTE or a PMD in order to know it is a 8M page or a lower size. I hope this can me handled by core-mm in the future.

For e500 and book3s/64 there are less constraints because it is not tied to the HW assisted tablewalk like on 8xx, so it is easier to use leaf PMDs (and PUDs).

On e500 the supported page sizes are 4M, 16M, 64M, 256M and 1G. All at PMD level on e500/32 and mix of PMD and PUD for e500/64. We encode page size with 4 available bits in PTE entries. On e300/32 PGD entries size is increases to 64 bits in order to allow leaf-PMD entries because PTE are 64 bits on e500.

On book3s/64 only the hash-4k mode is concerned. It supports 16M pages as cont-PMD and 16G pages as cont-PUD. In other modes (radix-4k, radix-6k and hash-64k) the sizes match with PMD and PUD sizes so that's just leaf entries.

Christophe Leroy (20):
mm: Provide pagesize to pmd_populate()
mm: Provide page size to pte_alloc_huge()
mm: Provide pmd to pte_leaf_size()
mm: Provide mm_struct and address to huge_ptep_get() powerpc/mm: Allow hugepages without hugepd
powerpc/8xx: Fix size given to set_huge_pte_at() powerpc/8xx: Rework support for 8M pages using contiguous PTE entries powerpc/8xx: Simplify struct mmu_psize_def
powerpc/mm: Remove _PAGE_PSIZE
powerpc/mm: Fix __find_linux_pte() on 32 bits with PMD leaf entries powerpc/mm: Complement huge_pte_alloc() for all non HUGEPD setups powerpc/64e: Remove unneeded #ifdef CONFIG_PPC_E500

Quoted 8 lines

powerpc/64e: Clean up impossible setups powerpc/e500: Remove enc field from struct mmu_psize_def powerpc/85xx: Switch to 64 bits PGD powerpc/e500: Encode hugepage size in PTE bits powerpc/e500: Use contiguous PMD instead of hugepd powerpc/64s: Use contiguous PMD/PUD instead of HUGEPD powerpc/mm: Remove hugepd leftovers
mm: Remove CONFIG_ARCH_HAS_HUGEPD

Great to see this series, thanks again Christophe.

I requested for help on the lsfmm hugetlb unification session, but unfortunately I don't think there were Power people around.. I'd like to request help from Power developers again here on the list: it will be very appreciated if you can help have a look at this series.

It's a direct dependent work to the hugetlb refactoring that we'll be working on, while it looks like the hugetlb refactoring is something the community as a whole would like to see in the near future.

We don't want to add more Power-only CONFIG_ARCH_HAS_HUGEPD checks for hugetlb in any new code.

Currently Oscar offered help on that hugetlb project, and Oscar will start to work on page_walk API refactoring. I guess currently the simple way is we'll work on top of Christophe's series. Some proper review on this series will definitely make it clearer on what we should do next.

Thanks,

Signature · 1 line
Peter Xu
#59 lore raw

Hi Peter,

Quoted 8 lines · Peter Xu
Quoted 7 lines · Christophe Leroy

This is the continuation of the RFC v1 series "Reimplement huge pages without hugepd on powerpc 8xx". It now get rid of hugepd completely after handling also e500 and book3s/64

Unlike most architectures, powerpc 8xx HW requires a two-level pagetable topology for all page sizes. So a leaf PMD-contig approach is not feasible as such.

....

Quoted 7 lines

Great to see this series, thanks again Christophe.

I requested for help on the lsfmm hugetlb unification session, but unfortunately I don't think there were Power people around.. I'd like to request help from Power developers again here on the list: it will be very appreciated if you can help have a look at this series.

Christophe is a powerpc developer :)

I'll help where I can, but I don't know the hugepd code that well, I've never really worked on it before. Nick will hopefully also be able to help, he at least knows mm better than me, but he also has other work.

Hopefully we can make this series work, and replace hugepd. But if we can't make that work then there is the possibility of just dropping support for 16M/16G pages with HPT/4K pages.

Quoted 6 lines

It's a direct dependent work to the hugetlb refactoring that we'll be working on, while it looks like the hugetlb refactoring is something the community as a whole would like to see in the near future.

We don't want to add more Power-only CONFIG_ARCH_HAS_HUGEPD checks for hugetlb in any new code.

Yes I understand.

cheers

reviewer
#60 lore raw
Quoted 1 line · Michael Ellerman

Christophe is a powerpc developer :)

Yes, definitely. :)

Quoted 8 lines

I'll help where I can, but I don't know the hugepd code that well, I've never really worked on it before. Nick will hopefully also be able to help, he at least knows mm better than me, but he also has other work.

Hopefully we can make this series work, and replace hugepd. But if we can't make that work then there is the possibility of just dropping support for 16M/16G pages with HPT/4K pages.

Great, thank you!

Signature · 1 line
Peter Xu
maintainer
#61 lore raw
In reply to Peter Xu
Quoted 4 lines · Peter Xu

I requested for help on the lsfmm hugetlb unification session, but unfortunately I don't think there were Power people around.. I'd like to request help from Power developers again here on the list: it will be very appreciated if you can help have a look at this series.

I am not a powerpc developer but I plan on keep on reviewing this series today and next week.

thanks

Signature · 2 lines
Oscar Salvador
SUSE Labs