2.5.1-pre5 cacheline align cleanup
Subsystems (16)
PATCH 1/1 2.5.1-pre5 cacheline align cleanup
There are some confusing uses of the __cacheline_aligned macros. This cleans them up.
1) __cacheline_aligned should always be applied to variable definitions, as before,
2) __aligned_type should be applied to struct declarations.
3) __aligned_section can be applied to array declarations (which must be arrays of an __aligned_type type, of course).
And all of them vanish on SMP (if you want it on UP, do it manually).
Thanks,
Rusty.
include/linux/cache.h +14 -23
@@ -12,34 +12,25 @@#define SMP_CACHE_BYTES L1_CACHE_BYTES#endif -#ifndef ____cacheline_aligned -#define ____cacheline_aligned __attribute__((__aligned__(SMP_CACHE_BYTES))) -#endif - -#ifndef ____cacheline_aligned_in_smp#ifdef CONFIG_SMP -#define ____cacheline_aligned_in_smp ____cacheline_aligned -#else -#define ____cacheline_aligned_in_smp -#endif /* CONFIG_SMP */ -#endif +/* Use this with types. */ +#define __aligned_type __attribute__((__aligned__(SMP_CACHE_BYTES))) -#ifndef __cacheline_aligned -#ifdef MODULE -#define __cacheline_aligned ____cacheline_aligned -#else +#ifndef MODULE +/* This with simple variables whose types are not aligned (not arrays!) */ #define __cacheline_aligned \ __attribute__((__aligned__(SMP_CACHE_BYTES), \ __section__(".data.cacheline_aligned"))) -#endif -#endif /* __cacheline_aligned */ - -#ifndef __cacheline_aligned_in_smp -#ifdef CONFIG_SMP -#define __cacheline_aligned_in_smp __cacheline_aligned +/* This is for variables whose types are declared __aligned_type */ +#define __aligned_section __attribute__((__section__(".data.cacheline_aligned")))#else -#define __cacheline_aligned_in_smp -#endif /* CONFIG_SMP */ -#endif +#define __cacheline_aligned __attribute__((__aligned__(SMP_CACHE_BYTES))) +#define __aligned_section +#endif /* MODULE */ +#else +#define __aligned_type +#define __cacheline_aligned +#define __aligned_section +#endif /* !CONFIG_SMP */ #endif /* __LINUX_CACHE_H */
arch/alpha/kernel/irq.c +1 -1
@@ -33,7 +33,7 @@/* * Controller mappings for all interrupt sources: */ -irq_desc_t irq_desc[NR_IRQS] __cacheline_aligned = { +irq_desc_t irq_desc[NR_IRQS] __aligned_section = { [0 ...NR_IRQS -1 ] = {0 , &no_irq_type,NULL ,0 ,SPIN_LOCK_UNLOCKED } };
arch/alpha/kernel/smp.c +2 -2
@@ -56,8 +56,8 @@/* A collection of single bit ipi messages. */ static struct { -unsigned long bits____cacheline_aligned ; -} ipi_data[NR_CPUS] __cacheline_aligned; +unsigned long bits __aligned_type; +} ipi_data[NR_CPUS] __aligned_section;enum ipi_message_type {IPI_RESCHEDULE ,
arch/i386/kernel/init_task.c +1 -1
@@ -29,5 +29,5 @@* section. Since TSS's are completely CPU-local, we want them * on exact cacheline boundaries, to eliminate cacheline ping-pong. */ -struct tss_struct init_tss[NR_CPUS] __cacheline_aligned = { [0 ... NR_CPUS-1] = INIT_TSS }; +struct tss_struct init_tss[NR_CPUS] __aligned_section = { [0 ... NR_CPUS-1] = INIT_TSS };
arch/i386/kernel/irq.c +1 -1
@@ -66,7 +66,7 @@/* * Controller mappings for all interrupt sources: */ -irq_desc_t irq_desc[NR_IRQS] __cacheline_aligned = +irq_desc_t irq_desc[NR_IRQS] __aligned_section = { [0 ...NR_IRQS -1 ] = {0 , &no_irq_type,NULL ,0 ,SPIN_LOCK_UNLOCKED }};static void register_irq_proc (unsigned int irq);
arch/ia64/kernel/irq.c +1 -1
@@ -65,7 +65,7 @@/* * Controller mappings for all interrupt sources: */ -irq_desc_t _irq_desc[NR_IRQS] __cacheline_aligned = +irq_desc_t _irq_desc[NR_IRQS] __aligned_section = { [0 ...NR_IRQS -1 ] = {IRQ_DISABLED , &no_irq_type,NULL ,0 ,SPIN_LOCK_UNLOCKED }};static void register_irq_proc (unsigned int irq);
arch/ia64/kernel/perfmon.c +1 -1
@@ -276,7 +276,7 @@struct {struct task_struct *owner; -}____cacheline_aligned pmu_owners[NR_CPUS ]; +} __aligned_type pmu_owners[NR_CPUS];/*
arch/mips/kernel/irq.c +1 -1
@@ -24,7 +24,7 @@/* * Controller mappings for all interrupt sources: */ -irq_desc_t irq_desc[NR_IRQS] __cacheline_aligned = +irq_desc_t irq_desc[NR_IRQS] __aligned_section = { [0 ...NR_IRQS -1 ] = {0 , &no_irq_type,NULL ,0 ,SPIN_LOCK_UNLOCKED }};/*
arch/ppc/kernel/irq.c +1 -1
@@ -75,7 +75,7 @@#define MAXCOUNT 10000000 -irq_desc_t irq_desc[NR_IRQS] __cacheline_aligned = +irq_desc_t irq_desc[NR_IRQS] __aligned_section = { [0 ...NR_IRQS -1 ] = {0 ,NULL ,NULL ,0 ,SPIN_LOCK_UNLOCKED }};int ppc_spurious_interrupts =0 ;
arch/ppc/kernel/ppc_defs.h +82 -0
82 lines not on this page · raw message
arch/sh/kernel/irq.c +1 -1
@@ -40,7 +40,7 @@/* * Controller mappings for all interrupt sources: */ -irq_desc_t irq_desc[NR_IRQS] __cacheline_aligned = +irq_desc_t irq_desc[NR_IRQS] __aligned_section = { [0 ...NR_IRQS -1 ] = {0 , &no_irq_type, }};/*
drivers/net/acenic.h +2 -2
@@ -647,7 +647,7 @@* RX elements */ unsigned long std_refill_busy - __attribute__ ((aligned (SMP_CACHE_BYTES))); + __aligned_type;unsigned long mini_refill_busy, jumbo_refill_busy;atomic_t cur_rx_bufs;atomic_t cur_mini_bufs;
@@ -682,7 +682,7 @@char name[48 ];#ifdef INDEX_DEBUG spinlock_t debug_lock - __attribute__ ((aligned (SMP_CACHE_BYTES)));; + __aligned_type;u32 last_tx, last_std_rx, last_mini_rx;#endif struct net_device_stats stats;
fs/block_dev.c +1 -1
@@ -234,7 +234,7 @@#define HASH_SIZE (1UL << HASH_BITS)#define HASH_MASK (HASH_SIZE-1)static struct list_head bdev_hashtable[HASH_SIZE ]; -static spinlock_t bdev_lock __cacheline_aligned_in_smp = SPIN_LOCK_UNLOCKED; +static spinlock_t bdev_lock __cacheline_aligned = SPIN_LOCK_UNLOCKED;static kmem_cache_t * bdev_cachep;#define alloc_bdev () \
fs/buffer.c +1 -1
@@ -74,7 +74,7 @@static rwlock_t hash_table_lock =RW_LOCK_UNLOCKED ;static struct buffer_head *lru_list[NR_LIST ]; -static spinlock_t lru_list_lock __cacheline_aligned_in_smp = SPIN_LOCK_UNLOCKED; +static spinlock_t lru_list_lock __cacheline_aligned = SPIN_LOCK_UNLOCKED;static int nr_buffers_type[NR_LIST ];static unsigned long size_buffers_type[NR_LIST ];
fs/dcache.c +1 -1
@@ -29,7 +29,7 @@#define DCACHE_PARANOIA 1/* #define DCACHE_DEBUG 1 */ -spinlock_t dcache_lock __cacheline_aligned_in_smp = SPIN_LOCK_UNLOCKED; +spinlock_t dcache_lock __cacheline_aligned = SPIN_LOCK_UNLOCKED;/* Right now the dcache depends on the kernel lock */ #define check_lock () if (!kernel_locked()) BUG()
include/asm-alpha/cache.h +0 -3
@@ -18,7 +18,4 @@# define L1_CACHE_SHIFT 5#endif -#define L1_CACHE_ALIGN (x) (((x)+(L1_CACHE_BYTES-1))&~(L1_CACHE_BYTES-1)) -#define SMP_CACHE_BYTES L1_CACHE_BYTES -#endif
include/asm-alpha/hardirq.h +1 -1
@@ -11,7 +11,7 @@unsigned int __local_bh_count;unsigned int __syscall_count;struct task_struct * __ksoftirqd_task; -}____cacheline_aligned irq_cpustat_t; +}__aligned_type irq_cpustat_t;#include <linux/irq_cpustat.h> /* Standard mappings for irq_cpustat_t above */
include/asm-arm/cache.h +0 -11
@@ -5,15 +5,4 @@#define __ASMARM_CACHE_H#define L1_CACHE_BYTES 32 -#define L1_CACHE_ALIGN (x) (((x)+(L1_CACHE_BYTES-1))&~(L1_CACHE_BYTES-1)) -#define SMP_CACHE_BYTES L1_CACHE_BYTES - -#ifdef MODULE -#define __cacheline_aligned __attribute__((__aligned__(L1_CACHE_BYTES))) -#else -#define __cacheline_aligned \ - __attribute__((__aligned__(L1_CACHE_BYTES), \ - __section__(".data.cacheline_aligned"))) -#endif -#endif
include/asm-arm/hardirq.h +1 -1
@@ -12,7 +12,7 @@unsigned int __local_bh_count;unsigned int __syscall_count;struct task_struct * __ksoftirqd_task;/* waitqueue is too large */ -}____cacheline_aligned irq_cpustat_t; +}__aligned_type irq_cpustat_t;#include <linux/irq_cpustat.h> /* Standard mappings for irq_cpustat_t above */
include/asm-cris/hardirq.h +1 -1
@@ -12,7 +12,7 @@unsigned int __local_bh_count;unsigned int __syscall_count;struct task_struct * __ksoftirqd_task;/* waitqueue is too large */ -}____cacheline_aligned irq_cpustat_t; +}__aligned_type irq_cpustat_t;#include <linux/irq_cpustat.h> /* Standard mappings for irq_cpustat_t above */
include/asm-i386/hardirq.h +1 -1
@@ -13,7 +13,7 @@unsigned int __syscall_count;struct task_struct * __ksoftirqd_task;/* waitqueue is too large */ unsigned int __nmi_count;/* arch dependent */ -}____cacheline_aligned irq_cpustat_t; +}__aligned_type irq_cpustat_t;#include <linux/irq_cpustat.h> /* Standard mappings for irq_cpustat_t above */
include/asm-i386/processor.h +1 -1
@@ -53,7 +53,7 @@unsigned long *pmd_quick;unsigned long *pte_quick;unsigned long pgtable_cache_sz; -} __attribute__((__aligned__(SMP_CACHE_BYTES))); +} __aligned_type;#define X86_VENDOR_INTEL 0#define X86_VENDOR_CYRIX 1
include/asm-m68k/hardirq.h +1 -1
@@ -11,7 +11,7 @@unsigned int __local_bh_count;unsigned int __syscall_count;struct task_struct * __ksoftirqd_task; -}____cacheline_aligned irq_cpustat_t; +}__aligned_type irq_cpustat_t;#include <linux/irq_cpustat.h> /* Standard mappings for irq_cpustat_t above */
include/asm-mips/cache.h +0 -2
@@ -34,6 +34,4 @@#define L1_CACHE_BYTES 32/* A guess */ #endif -#define SMP_CACHE_BYTES L1_CACHE_BYTES -#endif /* _ASM_CACHE_H */
include/asm-mips/hardirq.h +1 -1
@@ -21,7 +21,7 @@unsigned int __local_bh_count;unsigned int __syscall_count;struct task_struct * __ksoftirqd_task;/* waitqueue is too large */ -}____cacheline_aligned irq_cpustat_t; +}__aligned_type irq_cpustat_t;#include <linux/irq_cpustat.h> /* Standard mappings for irq_cpustat_t above */
include/asm-mips64/hardirq.h +1 -1
@@ -20,7 +20,7 @@unsigned int __local_bh_count;unsigned int __syscall_count;struct task_struct * __ksoftirqd_task;/* waitqueue is too large */ -}____cacheline_aligned irq_cpustat_t; +}__aligned_type irq_cpustat_t;#include <linux/irq_cpustat.h> /* Standard mappings for irq_cpustat_t above */
include/asm-parisc/cache.h +0 -6
@@ -31,12 +31,6 @@#define L1_CACHE_BYTES 32#endif -#define L1_CACHE_ALIGN (x) (((x)+(L1_CACHE_BYTES-1))&~(L1_CACHE_BYTES-1)) - -#define SMP_CACHE_BYTES L1_CACHE_BYTES - -#define __cacheline_aligned __attribute__((__aligned__(L1_CACHE_BYTES))) -extern void init_cache (void );/* initializes cache-flushing */ extern void flush_data_cache (void );/* flushes data-cache only */ extern void flush_instruction_cache (void );/* flushes code-cache only */
include/asm-parisc/hardirq.h +1 -1
@@ -16,7 +16,7 @@unsigned int __local_irq_count;unsigned int __local_bh_count;unsigned int __syscall_count; -}____cacheline_aligned irq_cpustat_t; +}__aligned_type irq_cpustat_t;#include <linux/irq_cpustat.h> /* Standard mappings for irq_cpustat_t above */
include/asm-ppc/cache.h +0 -11
@@ -27,18 +27,7 @@#endif #define L1_CACHE_BYTES L1_CACHE_LINE_SIZE -#define SMP_CACHE_BYTES L1_CACHE_BYTES - -#define L1_CACHE_ALIGN (x) (((x)+(L1_CACHE_BYTES-1))&~(L1_CACHE_BYTES-1))#define L1_CACHE_PAGES 8 - -#ifdef MODULE -#define __cacheline_aligned __attribute__((__aligned__(L1_CACHE_BYTES))) -#else -#define __cacheline_aligned \ - __attribute__((__aligned__(L1_CACHE_BYTES), \ - __section__(".data.cacheline_aligned"))) -#endif #if defined(__KERNEL__) && !defined(__ASSEMBLY__)extern void flush_dcache_range (unsigned long start,unsigned long stop);
include/asm-ppc/hardirq.h +1 -1
@@ -21,7 +21,7 @@unsigned int __syscall_count;struct task_struct * __ksoftirqd_task;unsigned int __last_jiffy_stamp; -}____cacheline_aligned irq_cpustat_t; +}__aligned_type irq_cpustat_t;#include <linux/irq_cpustat.h> /* Standard mappings for irq_cpustat_t above */
include/asm-s390/hardirq.h +1 -1
@@ -24,7 +24,7 @@unsigned int __local_bh_count;unsigned int __syscall_count;struct task_struct * __ksoftirqd_task;/* waitqueue is too large */ -}____cacheline_aligned irq_cpustat_t; +}__aligned_type irq_cpustat_t;#include <linux/irq_cpustat.h> /* Standard mappings for irq_cpustat_t above */
include/asm-s390/init.h +0 -3
@@ -22,8 +22,5 @@#define __FINIT .previous #define __INITDATA .section ".data.init",#alloc,#write */ - -#define __cacheline_aligned __attribute__ ((__aligned__(256))) -#endif
include/asm-s390x/hardirq.h +1 -1
@@ -24,7 +24,7 @@unsigned int __local_bh_count;unsigned int __syscall_count;struct task_struct * __ksoftirqd_task;/* waitqueue is too large */ -}____cacheline_aligned irq_cpustat_t; +}__aligned_type irq_cpustat_t;#include <linux/irq_cpustat.h> /* Standard mappings for irq_cpustat_t above */
include/asm-s390x/init.h +0 -2
@@ -23,7 +23,5 @@#define __INITDATA .section ".data.init",#alloc,#write */ -#define __cacheline_aligned __attribute__ ((__aligned__(256))) -#endif
include/asm-sh/hardirq.h +1 -1
@@ -11,7 +11,7 @@unsigned int __local_bh_count;unsigned int __syscall_count;struct task_struct * __ksoftirqd_task; -}____cacheline_aligned irq_cpustat_t; +}__aligned_type irq_cpustat_t;#include <linux/irq_cpustat.h> /* Standard mappings for irq_cpustat_t above */
include/asm-sparc/cache.h +0 -11
@@ -11,17 +11,6 @@#include <asm/asi.h> #define L1_CACHE_BYTES 32 -#define L1_CACHE_ALIGN (x) ((((x)+(L1_CACHE_BYTES-1))&~(L1_CACHE_BYTES-1))) - -#define SMP_CACHE_BYTES 32 - -#ifdef MODULE -#define __cacheline_aligned __attribute__((__aligned__(SMP_CACHE_BYTES))) -#else -#define __cacheline_aligned \ - __attribute__((__aligned__(SMP_CACHE_BYTES), \ - __section__(".data.cacheline_aligned"))) -#endif /* Direct access to the instruction cache is provided through and * alternate address space. The IDC bit must be off in the ICCR on
include/asm-sparc/hardirq.h +1 -1
@@ -24,7 +24,7 @@unsigned int __local_bh_count;unsigned int __syscall_count;struct task_struct * __ksoftirqd_task; -}____cacheline_aligned irq_cpustat_t; +}__aligned_type irq_cpustat_t;#include <linux/irq_cpustat.h> /* Standard mappings for irq_cpustat_t above */ /* Note that local_irq_count() is replaced by sparc64 specific version for SMP */
include/asm-sparc64/cache.h +0 -10
@@ -7,17 +7,7 @@/* bytes per L1 cache line */ #define L1_CACHE_BYTES 32/* Two 16-byte sub-blocks per line. */ -#define L1_CACHE_ALIGN (x) (((x)+(L1_CACHE_BYTES-1))&~(L1_CACHE_BYTES-1)) -#define SMP_CACHE_BYTES_SHIFT 6#define SMP_CACHE_BYTES (1 << SMP_CACHE_BYTES_SHIFT)/* L2 cache line size. */ - -#ifdef MODULE -#define __cacheline_aligned __attribute__((__aligned__(SMP_CACHE_BYTES))) -#else -#define __cacheline_aligned \ - __attribute__((__aligned__(SMP_CACHE_BYTES), \ - __section__(".data.cacheline_aligned"))) -#endif #endif
include/asm-sparc64/hardirq.h +1 -1
@@ -24,7 +24,7 @@unsigned int __local_bh_count;unsigned int __syscall_count;struct task_struct * __ksoftirqd_task; -}____cacheline_aligned irq_cpustat_t; +}__aligned_type irq_cpustat_t;#include <linux/irq_cpustat.h> /* Standard mappings for irq_cpustat_t above */ /* Note that local_irq_count() is replaced by sparc64 specific version for SMP */
include/linux/brlock.h +1 -1
@@ -68,7 +68,7 @@#ifndef __BRLOCK_USE_ATOMICSstruct br_wrlock {spinlock_t lock; -} __attribute__ ((__aligned__ (SMP_CACHE_BYTES ))); +} __aligned_type;extern struct br_wrlock __br_write_locks[__BR_IDX_MAX];#endif
include/linux/interrupt.h +1 -1
@@ -125,7 +125,7 @@struct tasklet_head {struct tasklet_struct *list; -} __attribute__ ((__aligned__ (SMP_CACHE_BYTES ))); +} __aligned_type;extern struct tasklet_head tasklet_vec[NR_CPUS ];extern struct tasklet_head tasklet_hi_vec[NR_CPUS ];
include/linux/irq.h +1 -1
@@ -62,7 +62,7 @@struct irqaction *action;/* IRQ action list */ unsigned int depth;/* nested irq disables */ spinlock_t lock; -}____cacheline_aligned irq_desc_t; +}__aligned_type irq_desc_t;extern irq_desc_t irq_desc [NR_IRQS ];
include/linux/netdevice.h +2 -2
@@ -161,7 +161,7 @@unsigned fastroute_deferred_out;unsigned fastroute_latency_reduction;unsigned cpu_collision; -} __attribute__ ((__aligned__(SMP_CACHE_BYTES))); +} __aligned_type;extern struct netif_rx_stats netdev_rx_stat[];
@@ -478,7 +478,7 @@struct sk_buff_head input_pkt_queue;struct net_device *output_queue;struct sk_buff *completion_queue; -} __attribute__((__aligned__(SMP_CACHE_BYTES))); +} __aligned_type;extern struct softnet_data softnet_data[NR_CPUS ];
include/net/route.h +1 -1
@@ -109,7 +109,7 @@unsigned int out_hit;unsigned int out_slow_tot;unsigned int out_slow_mc; -}____cacheline_aligned_in_smp ; +} __aligned_type;extern struct ip_rt_acct *ip_rt_acct;
include/net/snmp.h +7 -7
@@ -62,7 +62,7 @@unsigned long IpFragFails;unsigned long IpFragCreates;unsigned long __pad[0 ]; -}____cacheline_aligned ; +} __aligned_type;struct ipv6_mib {
@@ -89,7 +89,7 @@unsigned long Ip6InMcastPkts;unsigned long Ip6OutMcastPkts;unsigned long __pad[0 ]; -}____cacheline_aligned ; +} __aligned_type;struct icmp_mib {
@@ -121,7 +121,7 @@unsigned long IcmpOutAddrMaskReps;unsigned long dummy;unsigned long __pad[0 ]; -}____cacheline_aligned ; +} __aligned_type;struct icmpv6_mib {
@@ -159,7 +159,7 @@unsigned long Icmp6OutGroupMembResponses;unsigned long Icmp6OutGroupMembReductions;unsigned long __pad[0 ]; -}____cacheline_aligned ; +} __aligned_type;struct tcp_mib {
@@ -178,7 +178,7 @@unsigned long TcpInErrs;unsigned long TcpOutRsts;unsigned long __pad[0 ]; -}____cacheline_aligned ; +} __aligned_type;struct udp_mib {
@@ -187,7 +187,7 @@unsigned long UdpInErrors;unsigned long UdpOutDatagrams;unsigned long __pad[0 ]; -}____cacheline_aligned ; +} __aligned_type;struct linux_mib {
@@ -257,7 +257,7 @@unsigned long TCPAbortFailed;unsigned long TCPMemoryPressures;unsigned long __pad[0 ]; -}____cacheline_aligned ; +} __aligned_type;/*
include/net/tcp.h +1 -2
@@ -117,8 +117,7 @@* Now align to a new cache line as all the following members * are often dirty. */ - rwlock_t __tcp_lhash_lock - __attribute__((__aligned__(SMP_CACHE_BYTES))); + rwlock_t __tcp_lhash_lock __aligned_type;atomic_t __tcp_lhash_users;wait_queue_head_t __tcp_lhash_wait;spinlock_t __tcp_portalloc_lock;
kernel/fork.c +1 -1
@@ -206,7 +206,7 @@return retval; } -spinlock_t mmlist_lock __cacheline_aligned_in_smp = SPIN_LOCK_UNLOCKED; +spinlock_t mmlist_lock __cacheline_aligned = SPIN_LOCK_UNLOCKED;int mmlist_nr;#define allocate_mm () (kmem_cache_alloc(mm_cachep, SLAB_KERNEL))
kernel/ksyms.c +0 -1
@@ -60,7 +60,6 @@extern void *sys_call_table;extern struct timezone sys_tz; -extern int request_dma (unsigned int dmanr,char * deviceID);extern void free_dma (unsigned int dmanr);extern spinlock_t dma_spin_lock;
kernel/sched.c +1 -1
@@ -104,7 +104,7 @@cycles_t last_schedule; } schedule_data;char __pad [SMP_CACHE_BYTES ]; -} aligned_data [NR_CPUS] __cacheline_aligned = { {{&init_task,0}}}; +} aligned_data [NR_CPUS] __aligned_section = { {{&init_task,0}}};#define cpu_curr (cpu) aligned_data[(cpu)].schedule_data.curr#define last_schedule (cpu) aligned_data[(cpu)].schedule_data.last_schedule
kernel/softirq.c +3 -4
@@ -42,7 +42,7 @@irq_cpustat_t irq_stat[NR_CPUS ]; -static struct softirq_action softirq_vec[32] __cacheline_aligned_in_smp; +static struct softirq_action softirq_vec[32] __cacheline_aligned;/* * we cannot loop indefinitely here to avoid userspace starvation,
@@ -145,9 +145,8 @@/* Tasklets */ - -struct tasklet_head tasklet_vec[NR_CPUS] __cacheline_aligned_in_smp; -struct tasklet_head tasklet_hi_vec[NR_CPUS] __cacheline_aligned_in_smp; +struct tasklet_head tasklet_vec[NR_CPUS] __cacheline_aligned; +struct tasklet_head tasklet_hi_vec[NR_CPUS] __cacheline_aligned;void __tasklet_schedule (struct tasklet_struct *t) {
mm/filemap.c +2 -2
@@ -47,7 +47,7 @@unsigned int page_hash_bits;struct page **page_hash_table; -spinlock_t pagecache_lock __cacheline_aligned_in_smp = SPIN_LOCK_UNLOCKED; +spinlock_t pagecache_lock __cacheline_aligned = SPIN_LOCK_UNLOCKED;/* * NOTE: to avoid deadlocking you must never acquire the pagemap_lru_lock * with the pagecache_lock held.
@@ -57,7 +57,7 @@* pagemap_lru_lock -> * pagecache_lock */ -spinlock_t pagemap_lru_lock __cacheline_aligned_in_smp = SPIN_LOCK_UNLOCKED; +spinlock_t pagemap_lru_lock __cacheline_aligned = SPIN_LOCK_UNLOCKED;#define CLUSTER_PAGES (1 << page_cluster)#define CLUSTER_OFFSET (x) (((x) >> page_cluster) << page_cluster)
net/core/dev.c +1 -1
@@ -185,7 +185,7 @@* Device drivers call our routines to queue packets here. We empty the * queue in the local softnet handler. */ -struct softnet_data softnet_data[NR_CPUS] __cacheline_aligned; +struct softnet_data softnet_data[NR_CPUS] __aligned_section;#ifdef CONFIG_NET_FASTROUTE int netdev_fastroute;
net/ipv4/netfilter/ip_tables.c +1 -1
@@ -90,7 +90,7 @@unsigned int underflow[NF_IP_NUMHOOKS ];/* ipt_entry tables: one per CPU */ - char entries[0] __attribute__((aligned(SMP_CACHE_BYTES))); + char entries[0] __aligned_type; };static LIST_HEAD (ipt_target);
net/socket.c +1 -1
@@ -188,7 +188,7 @@static union {int counter;char __pad[SMP_CACHE_BYTES ]; -} sockets_in_use[NR_CPUS] __cacheline_aligned = {{0}}; +} sockets_in_use[NR_CPUS] __aligned_section = {{0}};/* * Support routines. Move socket addresses back and forth across the kernel/user
--
Premature optmztion is rt of all evl. --DK