ARM PCI cleanups
Subsystems (9)
Arm (32-bit) Arm sub-architectures Tegra architecture support PXA2xx/PXA3xx support +5 more subsystems
cover ARM PCI cleanups
This patch set cleans up some of the ARM PCI support code, mostly targetting the way the swizzling works.
We used to interpret a NULL swizzle method as meaning "no swizzling". However, the common case is to use the standard PCI swizzle function. Lets instead make the default swizzle method (i.e. NULL) mean the PCI swizzle function, and those cases which really do want no swizzling have to provide their own function.
Arguably, the 'no swizzle' case is wrong, because the swizzle is there to deal with PCI cards which themselves have PCI-to-PCI bridges on, and these won't work without this support.
We also provide sys->private_data for platforms to use. Some PCIe support code ignored this and used all kinds of horrid tricks to get at their private data. This patch set switches them to use this private data pointer instead, as they should have done in the first place.
Finally, we provide a standard bus scanning method, with the PCI configuration ops via our sysdata instead of having every platform provide a function where the only difference is the 'ops' pointer provided to pci_scan_root_bus().
While I realize that some platforms touched by this set are going to be removed, that removal is not in my tree, and avoiding this will cause those platforms to break. So they're included in these updates at the moment.
arch/arm/common/it8152.c | 7 +---- arch/arm/common/via82c505.c | 11 +------ arch/arm/include/asm/hardware/it8152.h | 2 +- arch/arm/include/asm/mach/pci.h | 17 ++++------- arch/arm/kernel/bios32.c | 37 ++++++++++++++++------- arch/arm/mach-cns3xxx/pcie.c | 12 +------ arch/arm/mach-dove/pcie.c | 24 ++++----------- arch/arm/mach-footbridge/cats-pci.c | 9 ++++- arch/arm/mach-footbridge/dc21285.c | 7 +---- arch/arm/mach-footbridge/ebsa285-pci.c | 3 +- arch/arm/mach-footbridge/netwinder-pci.c | 3 +- arch/arm/mach-footbridge/personal-pci.c | 2 +- arch/arm/mach-integrator/pci.c | 19 ++--------- arch/arm/mach-integrator/pci_v3.c | 8 +---- arch/arm/mach-iop13xx/iq81340mc.c | 1 - arch/arm/mach-iop13xx/iq81340sc.c | 1 - arch/arm/mach-iop32x/em7210.c | 3 +- arch/arm/mach-iop32x/glantank.c | 3 +- arch/arm/mach-iop32x/iq31244.c | 6 +-- arch/arm/mach-iop32x/iq80321.c | 3 +- arch/arm/mach-iop32x/n2100.c | 3 +- arch/arm/mach-iop33x/iq80331.c | 3 +- arch/arm/mach-iop33x/iq80332.c | 3 +- arch/arm/mach-ixp2000/enp2611.c | 9 +----- arch/arm/mach-ixp2000/include/mach/platform.h | 2 +- arch/arm/mach-ixp2000/ixdp2400.c | 2 +- arch/arm/mach-ixp2000/ixdp2800.c | 2 +- arch/arm/mach-ixp2000/ixdp2x01.c | 2 +- arch/arm/mach-ixp2000/pci.c | 8 +---- arch/arm/mach-ixp23xx/include/mach/platform.h | 2 +- arch/arm/mach-ixp23xx/ixdp2351.c | 2 +- arch/arm/mach-ixp23xx/pci.c | 6 ---- arch/arm/mach-ixp23xx/roadrunner.c | 2 +- arch/arm/mach-ixp4xx/avila-pci.c | 3 +- arch/arm/mach-ixp4xx/common-pci.c | 6 ---- arch/arm/mach-ixp4xx/coyote-pci.c | 3 +- arch/arm/mach-ixp4xx/dsmg600-pci.c | 3 +- arch/arm/mach-ixp4xx/fsg-pci.c | 3 +- arch/arm/mach-ixp4xx/gateway7001-pci.c | 3 +- arch/arm/mach-ixp4xx/goramo_mlr.c | 3 +- arch/arm/mach-ixp4xx/gtwx5715-pci.c | 3 +- arch/arm/mach-ixp4xx/include/mach/platform.h | 2 +- arch/arm/mach-ixp4xx/ixdp425-pci.c | 3 +- arch/arm/mach-ixp4xx/ixdpg425-pci.c | 3 +- arch/arm/mach-ixp4xx/miccpt-pci.c | 3 +- arch/arm/mach-ixp4xx/nas100d-pci.c | 3 +- arch/arm/mach-ixp4xx/nslu2-pci.c | 3 +- arch/arm/mach-ixp4xx/vulcan-pci.c | 3 +- arch/arm/mach-ixp4xx/wg302v2-pci.c | 3 +- arch/arm/mach-kirkwood/pcie.c | 16 ++++------ arch/arm/mach-ks8695/pci.c | 9 +----- arch/arm/mach-mv78xx0/pcie.c | 24 ++++----------- arch/arm/mach-orion5x/db88f5281-setup.c | 1 - arch/arm/mach-orion5x/dns323-setup.c | 1 - arch/arm/mach-orion5x/kurobox_pro-setup.c | 1 - arch/arm/mach-orion5x/mss2-setup.c | 1 - arch/arm/mach-orion5x/rd88f5181l-fxo-setup.c | 1 - arch/arm/mach-orion5x/rd88f5181l-ge-setup.c | 1 - arch/arm/mach-orion5x/rd88f5182-setup.c | 1 - arch/arm/mach-orion5x/rd88f6183ap-ge-setup.c | 1 - arch/arm/mach-orion5x/terastation_pro2-setup.c | 1 - arch/arm/mach-orion5x/ts209-setup.c | 1 - arch/arm/mach-orion5x/ts409-setup.c | 1 - arch/arm/mach-orion5x/wnr854t-setup.c | 1 - arch/arm/mach-orion5x/wrt350n-v2-setup.c | 1 - arch/arm/mach-pxa/cm-x2xx-pci.c | 3 +- arch/arm/mach-sa1100/pci-nanoengine.c | 8 +---- arch/arm/mach-shark/pci.c | 3 +- arch/arm/mach-tegra/pcie.c | 1 - arch/arm/mach-versatile/pci.c | 13 +------- arch/arm/plat-iop/pci.c | 8 +---- 71 files changed, 112 insertions(+), 260 deletions(-)
PATCH 1/8 ARM: PCI: remove unused sys->hw
Some platforms mark their hw_pci structure as __initdata, which means it will be discarded after init time. Storing pointers to __initdata in long lived data structures is a potential source of problems, and in this case, sys->hw is unused apart from its initialization.
So, lets remove this member and its initializer.
Signed-off-by Russell King <[email protected]>
--- arch/arm/include/asm/mach/pci.h | 1 - arch/arm/kernel/bios32.c | 1 - 2 files changed, 0 insertions(+), 2 deletions(-)
arch/arm/include/asm/mach/pci.h +0 -1
@@ -45,7 +45,6 @@ struct pci_sys_data {u8 (*swizzle)(struct pci_dev *,u8 *);/* IRQ mapping */ int (*map_irq)(const struct pci_dev *,u8 ,u8 ); -struct hw_pci *hw;void *private_data;/* platform controller private data */ };
arch/arm/kernel/bios32.c +0 -1
@@ -424,7 +424,6 @@ static void __init pcibios_init_hw(struct hw_pci *hw)#ifdef CONFIG_PCI_DOMAINS sys->domain = hw->domain;#endif - sys->hw = hw; sys->busnr = busnr; sys->swizzle = hw->swizzle; sys->map_irq = hw->map_irq;
Signature · 1 line
1.7.4.4
PATCH 1/8 ARM: PCI: remove unused sys->hw
Quoted 39 lines · Russell King
Some platforms mark their
hw_pcistructure as__initdata, which means it will be discarded after init time. Storing pointers to__initdatain long lived data structures is a potential source of problems, and in this case,sys->hwis unused apart from its initialization.So, lets remove this member and its initializer.
Signed-off-by Russell King <[email protected]>--- arch/arm/include/asm/mach/pci.h | 1 - arch/arm/kernel/bios32.c | 1 - 2 files changed, 0 insertions(+), 2 deletions(-)arch/arm/include/asm/mach/pci.h +0
-1@@ -45,7 +45,6 @@ struct pci_sys_data {u8 (*swizzle)(struct pci_dev *,u8 *);/* IRQ mapping */ int (*map_irq)(const struct pci_dev *,u8 ,u8 ); -struct hw_pci *hw;void *private_data;/* platform controller private data */ };arch/arm/kernel/bios32.c +0
-1@@ -424,7 +424,6 @@ static void __init pcibios_init_hw(struct hw_pci *hw)#ifdef CONFIG_PCI_DOMAINS sys->domain = hw->domain;#endif - sys->hw = hw; sys->busnr = busnr; sys->swizzle = hw->swizzle; sys->map_irq = hw->map_irq;Signature · 1 line
1.7.4.4
I have some patches which convert the Tegra PCIe code to a platform driver. I used to use the sys->hw field to obtain a pointer to my driver-private struct which had the struct hw_pci embedded.
Something like this:
struct tegra_pcie_info {
...
struct hw_pci hw;
...
};And then uses the following function to obtain the driver-private data in the various callbacks (.setup, ...):
static inline struct tegra_pcie_info *sys_to_pcie(struct pci_sys_data *sys)
{
return container_of(sys->hw, struct tegra_pcie_info, hw);
}With the removal of the sys->hw field, this obviously no longer works. So I've come up with the attached hack. I don't know if this is anywhere near acceptable. If it isn't do you have any other suggestions?
Thierry
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Quoted 1 line
From
ed0421bb87e3fa1484fd54fa504e828e017c3221Mon Sep 17 00:00:00 2001
From: Thierry Reding <[email protected]>
Date: Mon, 21 May 2012 16:25:58 +0200
Subject: [PATCH] HACK: ARM: PCI: Allow passing driver-private data
Signed-off-by Thierry Reding <[email protected]>
--- arch/arm/include/asm/mach/pci.h | 2 +- arch/arm/kernel/bios32.c | 16 +++++++++------- 2 files changed, 10 insertions(+), 8 deletions(-)
arch/arm/include/asm/mach/pci.h +1 -1
@@ -52,7 +52,7 @@ struct pci_sys_data {/* * Call this with your hw_pci struct to initialise the PCI system. */ -void pci_common_init (struct hw_pci *); +void pci_common_init (struct hw_pci *,void *);/* * PCI controllers
arch/arm/kernel/bios32.c +9 -7
@@ -423,7 +423,8 @@ static int pcibios_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)return irq; } -static void pcibios_init_hw (struct hw_pci *hw,struct list_head *head) +static void pcibios_init_hw (struct hw_pci *hw,struct list_head *head, +void *private) {struct pci_sys_data *sys =NULL ;int ret;
@@ -435,11 +436,12 @@ static void pcibios_init_hw(struct hw_pci *hw, struct list_head *head)panic ("PCI: unable to allocate sys data!" );#ifdef CONFIG_PCI_DOMAINS - sys->domain = hw->domain; + sys->domain = hw->domain;#endif - sys->busnr = busnr; - sys->swizzle = hw->swizzle; - sys->map_irq = hw->map_irq; + sys->busnr = busnr; + sys->swizzle = hw->swizzle; + sys->map_irq = hw->map_irq; + sys->private_data = private;INIT_LIST_HEAD (&sys->resources); ret = hw->setup (nr, sys);
@@ -472,7 +474,7 @@ static void pcibios_init_hw(struct hw_pci *hw, struct list_head *head) } } -void pci_common_init (struct hw_pci *hw) +void pci_common_init (struct hw_pci *hw,void *private) {struct pci_sys_data *sys;LIST_HEAD (head);
@@ -480,7 +482,7 @@ void pci_common_init(struct hw_pci *hw)pci_add_flags (PCI_REASSIGN_ALL_RSRC );if (hw->preinit) hw->preinit (); -pcibios_init_hw (hw, &head); +pcibios_init_hw (hw, &head, private);if (hw->postinit) hw->postinit ();
Signature · 9 lines
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PATCH 1/8 ARM: PCI: remove unused sys->hw
Quoted 11 lines · Thierry Reding
I have some patches which convert the Tegra PCIe code to a platform driver. I used to use the
sys->hwfield to obtain a pointer to my driver-private struct which had the structhw_pciembedded.Something like this:
struct tegra_pcie_info { ... struct hw_pci hw; ... };
The hw_pci struct is not supposed to be embedded into anything - it's supposed to be a short-term struct used just to initialize things - it's certainly not required after pci_common_init() returns.
Quoted 42 lines
From
ed0421bb87e3fa1484fd54fa504e828e017c3221Mon Sep 17 00:00:00 2001
From: Thierry Reding <[email protected]>
Date: Mon, 21 May 2012 16:25:58 +0200
Subject: [PATCH] HACK: ARM: PCI: Allow passing driver-private dataSigned-off-by Thierry Reding <[email protected]>--- arch/arm/include/asm/mach/pci.h | 2 +- arch/arm/kernel/bios32.c | 16 +++++++++------- 2 files changed, 10 insertions(+), 8 deletions(-)arch/arm/include/asm/mach/pci.h +1
-1@@ -52,7 +52,7 @@ struct pci_sys_data {/* * Call this with your hw_pci struct to initialise the PCI system. */ -void pci_common_init (struct hw_pci *); +void pci_common_init (struct hw_pci *,void *);/* * PCI controllers arch/arm/kernel/bios32.c +2
-1@@ -423,7 +423,8 @@ static int pcibios_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)return irq; } -static void pcibios_init_hw (struct hw_pci *hw,struct list_head *head) +static void pcibios_init_hw (struct hw_pci *hw,struct list_head *head, +void *private) {struct pci_sys_data *sys =NULL ;int ret;@@ -435,11 +436,12 @@ static void pcibios_init_hw(struct hw_pci *hw, struct list_head *head)panic ("PCI: unable to allocate sys data!" );#ifdef CONFIG_PCI_DOMAINS
arch/arm/kernel/bios32.c static void pcibios_init_hw(struct hw_pci *hw, struct list_head *head) · line 444
Quoted 10 lines
arch/arm/kernel/bios32.c +5
-4- sys->domain = hw->domain; + sys->domain = hw->domain;#endif - sys->busnr = busnr; - sys->swizzle = hw->swizzle; - sys->map_irq = hw->map_irq; + sys->busnr = busnr; + sys->swizzle = hw->swizzle; + sys->map_irq = hw->map_irq; + sys->private_data = private;
This is inappropriate, because if you look at pcibios_init_hw() you'll notice that it loops over N buses, and they typically want differing private data.
If we want to do this, we need to restructure this code. However...
I'm not sure coupling a platform driver into this code is the best approach - the platform driver will have to live outside of arch/arm, yet would depend totally on code within arch/arm. That sounds like the wrong approach. What if some other arch wants to reuse your platform driver?
PATCH 1/8 ARM: PCI: remove unused sys->hw
Quoted 13 lines · Russell King - ARM Linux
Quoted 11 lines · Thierry Reding
I have some patches which convert the Tegra PCIe code to a platform driver. I used to use the
sys->hwfield to obtain a pointer to my driver-private struct which had the structhw_pciembedded.Something like this:
struct tegra_pcie_info { ... struct hw_pci hw; ... };
Quoted 3 lines
The
hw_pcistruct is not supposed to be embedded into anything - it's supposed to be a short-term struct used just to initialize things - it's certainly not required afterpci_common_init()returns.
Okay, understood.
Quoted 41 lines
Quoted 41 lines
From
ed0421bb87e3fa1484fd54fa504e828e017c3221Mon Sep 17 00:00:00 2001
From: Thierry Reding <[email protected]>
Date: Mon, 21 May 2012 16:25:58 +0200
Subject: [PATCH] HACK: ARM: PCI: Allow passing driver-private dataSigned-off-by Thierry Reding <[email protected]>--- arch/arm/include/asm/mach/pci.h | 2 +- arch/arm/kernel/bios32.c | 16 +++++++++------- 2 files changed, 10 insertions(+), 8 deletions(-)arch/arm/include/asm/mach/pci.h +1
-1@@ -52,7 +52,7 @@ struct pci_sys_data {/* * Call this with your hw_pci struct to initialise the PCI system. */ -void pci_common_init (struct hw_pci *); +void pci_common_init (struct hw_pci *,void *);/* * PCI controllers arch/arm/kernel/bios32.c +2
-1@@ -423,7 +423,8 @@ static int pcibios_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)return irq; } -static void pcibios_init_hw (struct hw_pci *hw,struct list_head *head) +static void pcibios_init_hw (struct hw_pci *hw,struct list_head *head, +void *private) {struct pci_sys_data *sys =NULL ;int ret;@@ -435,11 +436,12 @@ static void pcibios_init_hw(struct hw_pci *hw, struct list_head *head)panic ("PCI: unable to allocate sys data!" );
Quoted 15 lines
arch/arm/kernel/bios32.c static void pcibios_init_hw(struct hw_pci *hw, struct list_head *head) · line 444
Quoted 11 lines
arch/arm/kernel/bios32.c +5
-4#ifdef CONFIG_PCI_DOMAINS - sys->domain = hw->domain; + sys->domain = hw->domain;#endif - sys->busnr = busnr; - sys->swizzle = hw->swizzle; - sys->map_irq = hw->map_irq; + sys->busnr = busnr; + sys->swizzle = hw->swizzle; + sys->map_irq = hw->map_irq; + sys->private_data = private;This is inappropriate, because if you look at
pcibios_init_hw()you'll notice that it loops over N buses, and they typically want differing private data.
In this particular case, each bus gets the same struct tegra_pcie_info.
Quoted 1 line
If we want to do this, we need to restructure this code. However...
Maybe an array of pointers for each controller can be added to hw_pci instead. I'd rather not add a global variable to store this information (like other PCIe controller drivers do) because it goes completely against the concept of rewriting this code as a platform driver.
I know that there will likely only ever be a single instance of the driver, but that doesn't mean it shouldn't be done properly.
Quoted 5 lines
I'm not sure coupling a platform driver into this code is the best approach - the platform driver will have to live outside of
arch/arm, yet would depend totally on code withinarch/arm. That sounds like the wrong approach. What if some other arch wants to reuse your platform driver?
The driver isn't used by any other platform. It is a driver for the Tegra PCIe controller. When I posted it the first time there was some discussion that it should move out of arch/arm, but it was argued that it won't be usable on anything else but Tegra anyway and therefore would better be located in arch/arm/mach-tegra.
One of the reasons for rewriting the code as a platform driver is so that it can be probed via DT. It's in fact one of the remaining issues to fix before board files can be removed for Tegra (along with clock tables I think).
Thierry
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PATCH 2/8 ARM: PCI: footbridge: provide a 'no swizzle' function for CATS
In reply to Russell King - ARM LinuxCATS sets its swizzle function to zero, which at the moment means that no swizzling is required. Make this explicit for CATS.
Signed-off-by Russell King <[email protected]>
--- arch/arm/mach-footbridge/cats-pci.c | 7 ++++++- 1 files changed, 6 insertions(+), 1 deletions(-)
arch/arm/mach-footbridge/cats-pci.c +6 -1
@@ -16,6 +16,11 @@/* cats host-specific stuff */ static int irqmap_cats[]__initdata = {IRQ_PCI ,IRQ_IN0 ,IRQ_IN1 ,IRQ_IN3 }; +static u8 cats_no_swizzle (struct pci_dev *dev,u8 *pin) +{ +return 0 ; +} +static int __init cats_map_irq (const struct pci_dev *dev,u8 slot,u8 pin) {if (dev->irq >=255 )
@@ -39,7 +44,7 @@ static int __init cats_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)* cards being used (ie, pci-pci bridge based cards)? */ static struct hw_pci cats_pci__initdata = { - .swizzle =NULL , + .swizzle = cats_no_swizzle, .map_irq = cats_map_irq, .nr_controllers =1 , .setup = dc21285_setup,
Signature · 1 line
1.7.4.4
PATCH 3/8 ARM: PCI: integrator: use common PCI swizzle
In reply to Russell King - ARM LinuxThe Integrator swizzle function is almost the same as the standard PCI swizzle, except for an initial check for pin = 0. Make the integrator swizzle function a wrapper around the standard PCI swizzle function so we preseve this behaviour while using common code.
Signed-off-by Russell King <[email protected]>
--- arch/arm/mach-integrator/pci.c | 17 +++-------------- 1 files changed, 3 insertions(+), 14 deletions(-)
arch/arm/mach-integrator/pci.c +3 -14
@@ -70,21 +70,10 @@*/ static u8 __init integrator_swizzle (struct pci_dev *dev,u8 *pinp) { -int pin = *pinp; +if (*pinp ==0 ) + *pinp =1 ; -if (pin ==0 ) - pin =1 ; - -while (dev->bus->self) { - pin =pci_swizzle_interrupt_pin (dev, pin); -/* -* move up the chain of bridges, swizzling as we go. -*/ - dev = dev->bus->self; - } - *pinp = pin; - -return PCI_SLOT (dev->devfn); +return pci_std_swizzle (dev, pinp); }static int irq_tab[4 ]__initdata = {
Signature · 1 line
1.7.4.4
PATCH 4/8 ARM: PCI: versatile: fix PCI interrupt setup
In reply to Russell King - ARM LinuxThis is at odds with the documentation in the file; it says pin 1 on slots 24,25,26,27 map to IRQs 27,28,29,30, but the function will always be entered with slot=0 due to the lack of swizzle function. Fix this function to behave as the comments say, and use the standard PCI swizzle.
Signed-off-by Russell King <[email protected]>
--- arch/arm/mach-versatile/pci.c | 6 ++---- 1 files changed, 2 insertions(+), 4 deletions(-)
arch/arm/mach-versatile/pci.c +2 -4
@@ -339,15 +339,13 @@ static int __init versatile_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)* 26 1 29 * 27 1 30 */ - irq =27 + ((slot + pin -1 ) &3 ); - -printk ("PCI map irq: slot %d, pin %d, devslot %d, irq: %d\n" ,slot,pin,devslot,irq); + irq =27 + ((slot -24 + pin -1 ) &3 );return irq; }static struct hw_pci versatile_pci__initdata = { - .swizzle =NULL , + .swizzle = pci_std_swizzle, .map_irq = versatile_map_irq, .nr_controllers =1 , .setup = pci_versatile_setup,
Signature · 1 line
1.7.4.4
PATCH 5/8 ARM: PCI: get rid of pci_std_swizzle()
In reply to Russell King - ARM LinuxMost PCI implementations use the standard PCI swizzle function, which handles the well defined behaviour of PCI-to-PCI bridges which can be found on cards (eg, four port ethernet cards.)
Rather than having almost every platform specify the standard swizzle function, make this the default when no swizzle function is supplied. Therefore, a swizzle function only needs to be provided when there is something exceptional which needs to be handled.
This gets rid of the swizzle initializer from 47 files, and leaves us with just two platforms specifying a swizzle function: ARM Integrator and Chalice CATS.
Signed-off-by Russell King <[email protected]>
--- arch/arm/include/asm/mach/pci.h | 5 ----- arch/arm/kernel/bios32.c | 19 ++++++++++++++++--- arch/arm/mach-cns3xxx/pcie.c | 2 -- arch/arm/mach-dove/pcie.c | 1 - arch/arm/mach-footbridge/ebsa285-pci.c | 1 - arch/arm/mach-footbridge/netwinder-pci.c | 1 - arch/arm/mach-iop13xx/iq81340mc.c | 1 - arch/arm/mach-iop13xx/iq81340sc.c | 1 - arch/arm/mach-iop32x/em7210.c | 1 - arch/arm/mach-iop32x/glantank.c | 1 - arch/arm/mach-iop32x/iq31244.c | 2 -- arch/arm/mach-iop32x/iq80321.c | 1 - arch/arm/mach-iop32x/n2100.c | 1 - arch/arm/mach-iop33x/iq80331.c | 1 - arch/arm/mach-iop33x/iq80332.c | 1 - arch/arm/mach-ixp4xx/avila-pci.c | 1 - arch/arm/mach-ixp4xx/coyote-pci.c | 1 - arch/arm/mach-ixp4xx/dsmg600-pci.c | 1 - arch/arm/mach-ixp4xx/fsg-pci.c | 1 - arch/arm/mach-ixp4xx/gateway7001-pci.c | 1 - arch/arm/mach-ixp4xx/goramo_mlr.c | 1 - arch/arm/mach-ixp4xx/gtwx5715-pci.c | 1 - arch/arm/mach-ixp4xx/ixdp425-pci.c | 1 - arch/arm/mach-ixp4xx/ixdpg425-pci.c | 1 - arch/arm/mach-ixp4xx/miccpt-pci.c | 1 - arch/arm/mach-ixp4xx/nas100d-pci.c | 1 - arch/arm/mach-ixp4xx/nslu2-pci.c | 1 - arch/arm/mach-ixp4xx/vulcan-pci.c | 1 - arch/arm/mach-ixp4xx/wg302v2-pci.c | 1 - arch/arm/mach-kirkwood/pcie.c | 1 - arch/arm/mach-ks8695/pci.c | 1 - arch/arm/mach-mv78xx0/pcie.c | 1 - arch/arm/mach-orion5x/db88f5281-setup.c | 1 - arch/arm/mach-orion5x/dns323-setup.c | 1 - arch/arm/mach-orion5x/kurobox_pro-setup.c | 1 - arch/arm/mach-orion5x/mss2-setup.c | 1 - arch/arm/mach-orion5x/rd88f5181l-fxo-setup.c | 1 - arch/arm/mach-orion5x/rd88f5181l-ge-setup.c | 1 - arch/arm/mach-orion5x/rd88f5182-setup.c | 1 - arch/arm/mach-orion5x/rd88f6183ap-ge-setup.c | 1 - arch/arm/mach-orion5x/terastation_pro2-setup.c | 1 - arch/arm/mach-orion5x/ts209-setup.c | 1 - arch/arm/mach-orion5x/ts409-setup.c | 1 - arch/arm/mach-orion5x/wnr854t-setup.c | 1 - arch/arm/mach-orion5x/wrt350n-v2-setup.c | 1 - arch/arm/mach-pxa/cm-x2xx-pci.c | 1 - arch/arm/mach-shark/pci.c | 1 - arch/arm/mach-tegra/pcie.c | 1 - arch/arm/mach-versatile/pci.c | 1 - 49 files changed, 16 insertions(+), 57 deletions(-)
arch/arm/include/asm/mach/pci.h +0 -5
@@ -49,11 +49,6 @@ struct pci_sys_data { };/* -* This is the standard PCI-PCI bridge swizzling algorithm. -*/ -#define pci_std_swizzle pci_common_swizzle - -/* * Call this with your hw_pci struct to initialise the PCI system. */ void pci_common_init (struct hw_pci *);
arch/arm/kernel/bios32.c +16 -3
@@ -374,16 +374,29 @@ EXPORT_SYMBOL(pcibios_fixup_bus);#endif /* -* Swizzle the device pin each time we cross a bridge. -* This might update pin and returns the slot number. +* Swizzle the device pin each time we cross a bridge. If a platform does +* not provide a swizzle function, we perform the standard PCI swizzling. +* +* The default swizzling walks up the bus tree one level at a time, applying +* the standard swizzle function at each step, stopping when it finds the PCI +* root bus. This will return the slot number of the bridge device on the +* root bus and the interrupt pin on that device which should correspond +* with the downstream device interrupt. +* +* Platforms may override this, in which case the slot and pin returned +* depend entirely on the platform code. However, please note that the +* PCI standard swizzle is implemented on plug-in cards and Cardbus based +* PCI extenders, so it can not be ignored. */ static u8 __devinit pcibios_swizzle (struct pci_dev *dev,u8 *pin) {struct pci_sys_data *sys = dev->sysdata; -int slot =0 , oldpin = *pin; +int slot, oldpin = *pin;if (sys->swizzle) slot = sys->swizzle (dev, pin); +else + slot =pci_common_swizzle (dev, pin);if (debug_pci) printk("PCI: %s swizzling pin %d => pin %d slot %d\n",
arch/arm/mach-cns3xxx/pcie.c +0 -2
@@ -221,7 +221,6 @@ static struct cns3xxx_pcie cns3xxx_pcie[] = { .irqs = { IRQ_CNS3XXX_PCIE0_RC, IRQ_CNS3XXX_PCIE0_DEVICE, }, .hw_pci = { .domain =0 , - .swizzle = pci_std_swizzle, .nr_controllers = 1, .setup = cns3xxx_pci_setup, .scan = cns3xxx_pci_scan_bus,
@@ -264,7 +263,6 @@ static struct cns3xxx_pcie cns3xxx_pcie[] = { .irqs = { IRQ_CNS3XXX_PCIE1_RC, IRQ_CNS3XXX_PCIE1_DEVICE, }, .hw_pci = { .domain =1 , - .swizzle = pci_std_swizzle, .nr_controllers = 1, .setup = cns3xxx_pci_setup, .scan = cns3xxx_pci_scan_bus,
arch/arm/mach-dove/pcie.c +0 -1
@@ -201,7 +201,6 @@ static int __init dove_pcie_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)static struct hw_pci dove_pci__initdata = { .nr_controllers =2 , - .swizzle = pci_std_swizzle, .setup = dove_pcie_setup, .scan = dove_pcie_scan_bus, .map_irq = dove_pcie_map_irq,
arch/arm/mach-footbridge/ebsa285-pci.c +0 -1
@@ -29,7 +29,6 @@ static int __init ebsa285_map_irq(const struct pci_dev *dev, u8 slot, u8 pin) }static struct hw_pci ebsa285_pci__initdata = { - .swizzle = pci_std_swizzle, .map_irq = ebsa285_map_irq, .nr_controllers =1 , .setup = dc21285_setup,
arch/arm/mach-footbridge/netwinder-pci.c +0 -1
@@ -43,7 +43,6 @@ static int __init netwinder_map_irq(const struct pci_dev *dev, u8 slot, u8 pin) }static struct hw_pci netwinder_pci__initdata = { - .swizzle = pci_std_swizzle, .map_irq = netwinder_map_irq, .nr_controllers =1 , .setup = dc21285_setup,
arch/arm/mach-iop13xx/iq81340mc.c +0 -1
@@ -54,7 +54,6 @@ iq81340mc_pcix_map_irq(const struct pci_dev *dev, u8 idsel, u8 pin) }static struct hw_pci iq81340mc_pci__initdata = { - .swizzle = pci_std_swizzle, .nr_controllers =0 , .setup = iop13xx_pci_setup, .map_irq = iq81340mc_pcix_map_irq,
arch/arm/mach-iop13xx/iq81340sc.c +0 -1
@@ -56,7 +56,6 @@ iq81340sc_atux_map_irq(struct pci_dev *dev, u8 idsel, u8 pin) }static struct hw_pci iq81340sc_pci__initdata = { - .swizzle = pci_std_swizzle, .nr_controllers =0 , .setup = iop13xx_pci_setup, .scan = iop13xx_scan_bus,
arch/arm/mach-iop32x/em7210.c +0 -1
@@ -103,7 +103,6 @@ em7210_pci_map_irq(const struct pci_dev *dev, u8 slot, u8 pin) }static struct hw_pci em7210_pci__initdata = { - .swizzle = pci_std_swizzle, .nr_controllers =1 , .setup = iop3xx_pci_setup, .preinit = iop3xx_pci_preinit,
arch/arm/mach-iop32x/glantank.c +0 -1
@@ -96,7 +96,6 @@ glantank_pci_map_irq(const struct pci_dev *dev, u8 slot, u8 pin) }static struct hw_pci glantank_pci__initdata = { - .swizzle = pci_std_swizzle, .nr_controllers =1 , .setup = iop3xx_pci_setup, .preinit = iop3xx_pci_preinit,
arch/arm/mach-iop32x/iq31244.c +0 -2
@@ -130,7 +130,6 @@ ep80219_pci_map_irq(const struct pci_dev *dev, u8 slot, u8 pin) }static struct hw_pci ep80219_pci__initdata = { - .swizzle = pci_std_swizzle, .nr_controllers =1 , .setup = iop3xx_pci_setup, .preinit = iop3xx_pci_preinit,
@@ -166,7 +165,6 @@ iq31244_pci_map_irq(const struct pci_dev *dev, u8 slot, u8 pin) }static struct hw_pci iq31244_pci__initdata = { - .swizzle = pci_std_swizzle, .nr_controllers =1 , .setup = iop3xx_pci_setup, .preinit = iop3xx_pci_preinit,
arch/arm/mach-iop32x/iq80321.c +0 -1
@@ -101,7 +101,6 @@ iq80321_pci_map_irq(const struct pci_dev *dev, u8 slot, u8 pin) }static struct hw_pci iq80321_pci__initdata = { - .swizzle = pci_std_swizzle, .nr_controllers =1 , .setup = iop3xx_pci_setup, .preinit = iop3xx_pci_preinit_cond,
arch/arm/mach-iop32x/n2100.c +0 -1
@@ -114,7 +114,6 @@ n2100_pci_map_irq(const struct pci_dev *dev, u8 slot, u8 pin) }static struct hw_pci n2100_pci__initdata = { - .swizzle = pci_std_swizzle, .nr_controllers =1 , .setup = iop3xx_pci_setup, .preinit = iop3xx_pci_preinit,
arch/arm/mach-iop33x/iq80331.c +0 -1
@@ -84,7 +84,6 @@ iq80331_pci_map_irq(const struct pci_dev *dev, u8 slot, u8 pin) }static struct hw_pci iq80331_pci__initdata = { - .swizzle = pci_std_swizzle, .nr_controllers =1 , .setup = iop3xx_pci_setup, .preinit = iop3xx_pci_preinit_cond,
arch/arm/mach-iop33x/iq80332.c +0 -1
@@ -84,7 +84,6 @@ iq80332_pci_map_irq(const struct pci_dev *dev, u8 slot, u8 pin) }static struct hw_pci iq80332_pci__initdata = { - .swizzle = pci_std_swizzle, .nr_controllers =1 , .setup = iop3xx_pci_setup, .preinit = iop3xx_pci_preinit_cond,
arch/arm/mach-ixp4xx/avila-pci.c +0 -1
@@ -66,7 +66,6 @@ static int __init avila_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)struct hw_pci avila_pci__initdata = { .nr_controllers =1 , .preinit = avila_pci_preinit, - .swizzle = pci_std_swizzle, .setup = ixp4xx_setup, .scan = ixp4xx_scan_bus, .map_irq = avila_map_irq,
arch/arm/mach-ixp4xx/coyote-pci.c +0 -1
@@ -49,7 +49,6 @@ static int __init coyote_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)struct hw_pci coyote_pci__initdata = { .nr_controllers =1 , .preinit = coyote_pci_preinit, - .swizzle = pci_std_swizzle, .setup = ixp4xx_setup, .scan = ixp4xx_scan_bus, .map_irq = coyote_map_irq,
arch/arm/mach-ixp4xx/dsmg600-pci.c +0 -1
@@ -63,7 +63,6 @@ static int __init dsmg600_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)struct hw_pci __initdata dsmg600_pci = { .nr_controllers =1 , .preinit = dsmg600_pci_preinit, - .swizzle = pci_std_swizzle, .setup = ixp4xx_setup, .scan = ixp4xx_scan_bus, .map_irq = dsmg600_map_irq,
arch/arm/mach-ixp4xx/fsg-pci.c +0 -1
@@ -60,7 +60,6 @@ static int __init fsg_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)struct hw_pci fsg_pci__initdata = { .nr_controllers =1 , .preinit = fsg_pci_preinit, - .swizzle = pci_std_swizzle, .setup = ixp4xx_setup, .scan = ixp4xx_scan_bus, .map_irq = fsg_map_irq,
arch/arm/mach-ixp4xx/gateway7001-pci.c +0 -1
@@ -48,7 +48,6 @@ static int __init gateway7001_map_irq(const struct pci_dev *dev, u8 slot,struct hw_pci gateway7001_pci__initdata = { .nr_controllers =1 , .preinit = gateway7001_pci_preinit, - .swizzle = pci_std_swizzle, .setup = ixp4xx_setup, .scan = ixp4xx_scan_bus, .map_irq = gateway7001_map_irq,
arch/arm/mach-ixp4xx/goramo_mlr.c +0 -1
@@ -475,7 +475,6 @@ static struct hw_pci gmlr_hw_pci __initdata = { .nr_controllers = 1, .preinit = gmlr_pci_preinit, .postinit = gmlr_pci_postinit, - .swizzle = pci_std_swizzle, .setup = ixp4xx_setup, .scan = ixp4xx_scan_bus, .map_irq = gmlr_map_irq,
arch/arm/mach-ixp4xx/gtwx5715-pci.c +0 -1
@@ -68,7 +68,6 @@ static int __init gtwx5715_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)struct hw_pci gtwx5715_pci__initdata = { .nr_controllers =1 , .preinit = gtwx5715_pci_preinit, - .swizzle = pci_std_swizzle, .setup = ixp4xx_setup, .scan = ixp4xx_scan_bus, .map_irq = gtwx5715_map_irq,
arch/arm/mach-ixp4xx/ixdp425-pci.c +0 -1
@@ -61,7 +61,6 @@ static int __init ixdp425_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)struct hw_pci ixdp425_pci__initdata = { .nr_controllers =1 , .preinit = ixdp425_pci_preinit, - .swizzle = pci_std_swizzle, .setup = ixp4xx_setup, .scan = ixp4xx_scan_bus, .map_irq = ixdp425_map_irq,
arch/arm/mach-ixp4xx/ixdpg425-pci.c +0 -1
@@ -43,7 +43,6 @@ static int __init ixdpg425_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)struct hw_pci ixdpg425_pci__initdata = { .nr_controllers =1 , .preinit = ixdpg425_pci_preinit, - .swizzle = pci_std_swizzle, .setup = ixp4xx_setup, .scan = ixp4xx_scan_bus, .map_irq = ixdpg425_map_irq,
arch/arm/mach-ixp4xx/miccpt-pci.c +0 -1
@@ -62,7 +62,6 @@ static int __init miccpt_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)struct hw_pci miccpt_pci__initdata = { .nr_controllers =1 , .preinit = miccpt_pci_preinit, - .swizzle = pci_std_swizzle, .setup = ixp4xx_setup, .scan = ixp4xx_scan_bus, .map_irq = miccpt_map_irq,
arch/arm/mach-ixp4xx/nas100d-pci.c +0 -1
@@ -59,7 +59,6 @@ static int __init nas100d_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)struct hw_pci __initdata nas100d_pci = { .nr_controllers =1 , .preinit = nas100d_pci_preinit, - .swizzle = pci_std_swizzle, .setup = ixp4xx_setup, .scan = ixp4xx_scan_bus, .map_irq = nas100d_map_irq,
arch/arm/mach-ixp4xx/nslu2-pci.c +0 -1
@@ -55,7 +55,6 @@ static int __init nslu2_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)struct hw_pci __initdata nslu2_pci = { .nr_controllers =1 , .preinit = nslu2_pci_preinit, - .swizzle = pci_std_swizzle, .setup = ixp4xx_setup, .scan = ixp4xx_scan_bus, .map_irq = nslu2_map_irq,
arch/arm/mach-ixp4xx/vulcan-pci.c +0 -1
@@ -57,7 +57,6 @@ static int __init vulcan_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)struct hw_pci vulcan_pci__initdata = { .nr_controllers =1 , .preinit = vulcan_pci_preinit, - .swizzle = pci_std_swizzle, .setup = ixp4xx_setup, .scan = ixp4xx_scan_bus, .map_irq = vulcan_map_irq,
arch/arm/mach-ixp4xx/wg302v2-pci.c +0 -1
@@ -47,7 +47,6 @@ static int __init wg302v2_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)struct hw_pci wg302v2_pci__initdata = { .nr_controllers =1 , .preinit = wg302v2_pci_preinit, - .swizzle = pci_std_swizzle, .setup = ixp4xx_setup, .scan = ixp4xx_scan_bus, .map_irq = wg302v2_map_irq,
arch/arm/mach-kirkwood/pcie.c +0 -1
@@ -254,7 +254,6 @@ static int __init kirkwood_pcie_map_irq(const struct pci_dev *dev, u8 slot, }static struct hw_pci kirkwood_pci__initdata = { - .swizzle = pci_std_swizzle, .setup = kirkwood_pcie_setup, .scan = kirkwood_pcie_scan_bus, .map_irq = kirkwood_pcie_map_irq,
arch/arm/mach-ks8695/pci.c +0 -1
@@ -306,7 +306,6 @@ static struct hw_pci ks8695_pci __initdata = { .setup = ks8695_pci_setup, .scan = ks8695_pci_scan_bus, .postinit = NULL, - .swizzle = pci_std_swizzle, .map_irq = NULL, };
arch/arm/mach-mv78xx0/pcie.c +0 -1
@@ -271,7 +271,6 @@ static int __init mv78xx0_pcie_map_irq(const struct pci_dev *dev, u8 slot,static struct hw_pci mv78xx0_pci__initdata = { .nr_controllers =8 , .preinit = mv78xx0_pcie_preinit, - .swizzle = pci_std_swizzle, .setup = mv78xx0_pcie_setup, .scan = mv78xx0_pcie_scan_bus, .map_irq = mv78xx0_pcie_map_irq,
arch/arm/mach-orion5x/db88f5281-setup.c +0 -1
@@ -265,7 +265,6 @@ static int __init db88f5281_pci_map_irq(const struct pci_dev *dev, u8 slot,static struct hw_pci db88f5281_pci__initdata = { .nr_controllers =2 , .preinit = db88f5281_pci_preinit, - .swizzle = pci_std_swizzle, .setup = orion5x_pci_sys_setup, .scan = orion5x_pci_sys_scan_bus, .map_irq = db88f5281_pci_map_irq,
arch/arm/mach-orion5x/dns323-setup.c +0 -1
@@ -86,7 +86,6 @@ static int __init dns323_pci_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)static struct hw_pci dns323_pci__initdata = { .nr_controllers =2 , - .swizzle = pci_std_swizzle, .setup = orion5x_pci_sys_setup, .scan = orion5x_pci_sys_scan_bus, .map_irq = dns323_pci_map_irq,
arch/arm/mach-orion5x/kurobox_pro-setup.c +0 -1
@@ -138,7 +138,6 @@ static int __init kurobox_pro_pci_map_irq(const struct pci_dev *dev, u8 slot,static struct hw_pci kurobox_pro_pci__initdata = { .nr_controllers =2 , - .swizzle = pci_std_swizzle, .setup = orion5x_pci_sys_setup, .scan = orion5x_pci_sys_scan_bus, .map_irq = kurobox_pro_pci_map_irq,
arch/arm/mach-orion5x/mss2-setup.c +0 -1
@@ -89,7 +89,6 @@ static int __init mss2_pci_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)static struct hw_pci mss2_pci__initdata = { .nr_controllers =2 , - .swizzle = pci_std_swizzle, .setup = orion5x_pci_sys_setup, .scan = orion5x_pci_sys_scan_bus, .map_irq = mss2_pci_map_irq,
arch/arm/mach-orion5x/rd88f5181l-fxo-setup.c +0 -1
@@ -149,7 +149,6 @@ rd88f5181l_fxo_pci_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)static struct hw_pci rd88f5181l_fxo_pci__initdata = { .nr_controllers =2 , - .swizzle = pci_std_swizzle, .setup = orion5x_pci_sys_setup, .scan = orion5x_pci_sys_scan_bus, .map_irq = rd88f5181l_fxo_pci_map_irq,
arch/arm/mach-orion5x/rd88f5181l-ge-setup.c +0 -1
@@ -161,7 +161,6 @@ rd88f5181l_ge_pci_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)static struct hw_pci rd88f5181l_ge_pci__initdata = { .nr_controllers =2 , - .swizzle = pci_std_swizzle, .setup = orion5x_pci_sys_setup, .scan = orion5x_pci_sys_scan_bus, .map_irq = rd88f5181l_ge_pci_map_irq,
arch/arm/mach-orion5x/rd88f5182-setup.c +0 -1
@@ -200,7 +200,6 @@ static int __init rd88f5182_pci_map_irq(const struct pci_dev *dev, u8 slot,static struct hw_pci rd88f5182_pci__initdata = { .nr_controllers =2 , .preinit = rd88f5182_pci_preinit, - .swizzle = pci_std_swizzle, .setup = orion5x_pci_sys_setup, .scan = orion5x_pci_sys_scan_bus, .map_irq = rd88f5182_pci_map_irq,
arch/arm/mach-orion5x/rd88f6183ap-ge-setup.c +0 -1
@@ -102,7 +102,6 @@ static void __init rd88f6183ap_ge_init(void)static struct hw_pci rd88f6183ap_ge_pci__initdata = { .nr_controllers =2 , - .swizzle = pci_std_swizzle, .setup = orion5x_pci_sys_setup, .scan = orion5x_pci_sys_scan_bus, .map_irq = orion5x_pci_map_irq,
arch/arm/mach-orion5x/terastation_pro2-setup.c +0 -1
@@ -122,7 +122,6 @@ static int __init tsp2_pci_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)static struct hw_pci tsp2_pci__initdata = { .nr_controllers =2 , .preinit = tsp2_pci_preinit, - .swizzle = pci_std_swizzle, .setup = orion5x_pci_sys_setup, .scan = orion5x_pci_sys_scan_bus, .map_irq = tsp2_pci_map_irq,
arch/arm/mach-orion5x/ts209-setup.c +0 -1
@@ -170,7 +170,6 @@ static int __init qnap_ts209_pci_map_irq(const struct pci_dev *dev, u8 slot,static struct hw_pci qnap_ts209_pci__initdata = { .nr_controllers =2 , .preinit = qnap_ts209_pci_preinit, - .swizzle = pci_std_swizzle, .setup = orion5x_pci_sys_setup, .scan = orion5x_pci_sys_scan_bus, .map_irq = qnap_ts209_pci_map_irq,
arch/arm/mach-orion5x/ts409-setup.c +0 -1
@@ -140,7 +140,6 @@ static int __init qnap_ts409_pci_map_irq(const struct pci_dev *dev, u8 slot,static struct hw_pci qnap_ts409_pci__initdata = { .nr_controllers =2 , - .swizzle = pci_std_swizzle, .setup = orion5x_pci_sys_setup, .scan = orion5x_pci_sys_scan_bus, .map_irq = qnap_ts409_pci_map_irq,
arch/arm/mach-orion5x/wnr854t-setup.c +0 -1
@@ -155,7 +155,6 @@ static int __init wnr854t_pci_map_irq(const struct pci_dev *dev, u8 slot,static struct hw_pci wnr854t_pci__initdata = { .nr_controllers =2 , - .swizzle = pci_std_swizzle, .setup = orion5x_pci_sys_setup, .scan = orion5x_pci_sys_scan_bus, .map_irq = wnr854t_pci_map_irq,
arch/arm/mach-orion5x/wrt350n-v2-setup.c +0 -1
@@ -243,7 +243,6 @@ static int __init wrt350n_v2_pci_map_irq(const struct pci_dev *dev, u8 slot,static struct hw_pci wrt350n_v2_pci__initdata = { .nr_controllers =2 , - .swizzle = pci_std_swizzle, .setup = orion5x_pci_sys_setup, .scan = orion5x_pci_sys_scan_bus, .map_irq = wrt350n_v2_pci_map_irq,
arch/arm/mach-pxa/cm-x2xx-pci.c +0 -1
@@ -181,7 +181,6 @@ static void cmx2xx_pci_preinit(void) }static struct hw_pci cmx2xx_pci__initdata = { - .swizzle = pci_std_swizzle, .map_irq = cmx2xx_pci_map_irq, .nr_controllers =1 , .setup = it8152_pci_setup,
arch/arm/mach-shark/pci.c +0 -1
@@ -29,7 +29,6 @@ extern void __init via82c505_preinit(void);static struct hw_pci shark_pci__initdata = { .setup = via82c505_setup, - .swizzle = pci_std_swizzle, .map_irq = shark_map_irq, .nr_controllers =1 , .scan = via82c505_scan_bus,
arch/arm/mach-tegra/pcie.c +0 -1
@@ -475,7 +475,6 @@ static struct hw_pci tegra_pcie_hw __initdata = { .nr_controllers = 2, .setup = tegra_pcie_setup, .scan = tegra_pcie_scan_bus, - .swizzle = pci_std_swizzle, .map_irq = tegra_pcie_map_irq, };
arch/arm/mach-versatile/pci.c +0 -1
@@ -345,7 +345,6 @@ static int __init versatile_map_irq(const struct pci_dev *dev, u8 slot, u8 pin) }static struct hw_pci versatile_pci__initdata = { - .swizzle = pci_std_swizzle, .map_irq = versatile_map_irq, .nr_controllers =1 , .setup = pci_versatile_setup,
Signature · 1 line
1.7.4.4
PATCH 5/8 ARM: PCI: get rid of pci_std_swizzle()
Quoted 4 lines · Russell King
Most PCI implementations use the standard PCI swizzle function, which handles the well defined behaviour of PCI-to-PCI bridges which can be found on cards (eg, four port ethernet cards.)
Quoted 8 lines
Rather than having almost every platform specify the standard swizzle function, make this the default when no swizzle function is supplied. Therefore, a swizzle function only needs to be provided when there is something exceptional which needs to be handled.
This gets rid of the swizzle initializer from 47 files, and leaves us with just two platforms specifying a swizzle function: ARM Integrator and Chalice CATS.
Acked-by Krzysztof Ha?asa <[email protected]>
PATCH 6/8 ARM: PCI: provide a default bus scan implementation
In reply to Russell King - ARM LinuxMost PCI implementations perform simple root bus scanning. Rather than having each group of platforms provide a duplicated bus scan function, provide the PCI configuration ops structure via the hw_pci structure, and call the root bus scanning function from core ARM PCI code.
Signed-off-by Russell King <[email protected]>
--- arch/arm/common/it8152.c | 7 +------ arch/arm/common/via82c505.c | 11 +---------- arch/arm/include/asm/hardware/it8152.h | 2 +- arch/arm/include/asm/mach/pci.h | 10 ++++++---- arch/arm/kernel/bios32.c | 6 +++++- arch/arm/mach-cns3xxx/pcie.c | 10 ++-------- arch/arm/mach-footbridge/cats-pci.c | 2 +- arch/arm/mach-footbridge/dc21285.c | 7 +------ arch/arm/mach-footbridge/ebsa285-pci.c | 2 +- arch/arm/mach-footbridge/netwinder-pci.c | 2 +- arch/arm/mach-footbridge/personal-pci.c | 2 +- arch/arm/mach-integrator/pci.c | 2 +- arch/arm/mach-integrator/pci_v3.c | 8 +------- arch/arm/mach-iop32x/em7210.c | 2 +- arch/arm/mach-iop32x/glantank.c | 2 +- arch/arm/mach-iop32x/iq31244.c | 4 ++-- arch/arm/mach-iop32x/iq80321.c | 2 +- arch/arm/mach-iop32x/n2100.c | 2 +- arch/arm/mach-iop33x/iq80331.c | 2 +- arch/arm/mach-iop33x/iq80332.c | 2 +- arch/arm/mach-ixp2000/enp2611.c | 9 +-------- arch/arm/mach-ixp2000/include/mach/platform.h | 2 +- arch/arm/mach-ixp2000/ixdp2400.c | 2 +- arch/arm/mach-ixp2000/ixdp2800.c | 2 +- arch/arm/mach-ixp2000/ixdp2x01.c | 2 +- arch/arm/mach-ixp2000/pci.c | 8 +------- arch/arm/mach-ixp23xx/include/mach/platform.h | 2 +- arch/arm/mach-ixp23xx/ixdp2351.c | 2 +- arch/arm/mach-ixp23xx/pci.c | 6 ------ arch/arm/mach-ixp23xx/roadrunner.c | 2 +- arch/arm/mach-ixp4xx/avila-pci.c | 2 +- arch/arm/mach-ixp4xx/common-pci.c | 6 ------ arch/arm/mach-ixp4xx/coyote-pci.c | 2 +- arch/arm/mach-ixp4xx/dsmg600-pci.c | 2 +- arch/arm/mach-ixp4xx/fsg-pci.c | 2 +- arch/arm/mach-ixp4xx/gateway7001-pci.c | 2 +- arch/arm/mach-ixp4xx/goramo_mlr.c | 2 +- arch/arm/mach-ixp4xx/gtwx5715-pci.c | 2 +- arch/arm/mach-ixp4xx/include/mach/platform.h | 2 +- arch/arm/mach-ixp4xx/ixdp425-pci.c | 2 +- arch/arm/mach-ixp4xx/ixdpg425-pci.c | 2 +- arch/arm/mach-ixp4xx/miccpt-pci.c | 2 +- arch/arm/mach-ixp4xx/nas100d-pci.c | 2 +- arch/arm/mach-ixp4xx/nslu2-pci.c | 2 +- arch/arm/mach-ixp4xx/vulcan-pci.c | 2 +- arch/arm/mach-ixp4xx/wg302v2-pci.c | 2 +- arch/arm/mach-ks8695/pci.c | 8 +------- arch/arm/mach-pxa/cm-x2xx-pci.c | 2 +- arch/arm/mach-sa1100/pci-nanoengine.c | 8 +------- arch/arm/mach-shark/pci.c | 2 +- arch/arm/mach-versatile/pci.c | 8 +------- arch/arm/plat-iop/pci.c | 8 +------- 52 files changed, 61 insertions(+), 135 deletions(-)
arch/arm/common/it8152.c +1 -6
@@ -222,7 +222,7 @@ static int it8152_pci_write_config(struct pci_bus *bus,return PCIBIOS_SUCCESSFUL ; } -static struct pci_ops it8152_ops = { +struct pci_ops it8152_ops = { .read = it8152_pci_read_config, .write = it8152_pci_write_config, };
@@ -346,9 +346,4 @@ void pcibios_set_master(struct pci_dev *dev) } -struct pci_bus *__init it8152_pci_scan_bus (int nr,struct pci_sys_data *sys) -{ -return pci_scan_root_bus (NULL , nr, &it8152_ops, sys, &sys->resources); -} -EXPORT_SYMBOL (dma_set_coherent_mask);
arch/arm/common/via82c505.c +1 -10
@@ -51,7 +51,7 @@ via82c505_write_config(struct pci_bus *bus, unsigned int devfn, int where,return PCIBIOS_SUCCESSFUL ; } -static struct pci_ops via82c505_ops = { +struct pci_ops via82c505_ops = { .read = via82c505_read_config, .write = via82c505_write_config, };
@@ -81,12 +81,3 @@ int __init via82c505_setup(int nr, struct pci_sys_data *sys) {return (nr ==0 ); } - -struct pci_bus *__init via82c505_scan_bus (int nr,struct pci_sys_data *sysdata) -{ -if (nr ==0 ) -return pci_scan_root_bus (NULL ,0 , &via82c505_ops, sysdata, - &sysdata->resources); - -return NULL ; -}
arch/arm/include/asm/hardware/it8152.h +1 -1
@@ -110,6 +110,6 @@ extern void it8152_irq_demux(unsigned int irq, struct irq_desc *desc);extern void it8152_init_irq (void );extern int it8152_pci_map_irq (const struct pci_dev *dev,u8 slot,u8 pin);extern int it8152_pci_setup (int nr,struct pci_sys_data *sys); -extern struct pci_bus *it8152_pci_scan_bus (int nr,struct pci_sys_data *sys); +extern struct pci_ops it8152_ops;#endif /* __ASM_HARDWARE_IT8152_H */
arch/arm/include/asm/mach/pci.h +6 -4
@@ -12,6 +12,7 @@#define __ASM_MACH_PCI_Hstruct pci_sys_data ; +struct pci_ops ;struct pci_bus ;struct hw_pci {
@@ -19,6 +20,7 @@ struct hw_pci {int domain;#endif struct list_head buses; +struct pci_ops *ops;int nr_controllers;int (*setup)(int nr,struct pci_sys_data *);struct pci_bus *(*scan)(int nr,struct pci_sys_data *);
@@ -56,22 +58,22 @@ void pci_common_init(struct hw_pci *);/* * PCI controllers */ +extern struct pci_ops iop3xx_ops;extern int iop3xx_pci_setup (int nr,struct pci_sys_data *); -extern struct pci_bus *iop3xx_pci_scan_bus (int nr,struct pci_sys_data *);extern void iop3xx_pci_preinit (void );extern void iop3xx_pci_preinit_cond (void ); +extern struct pci_ops dc21285_ops;extern int dc21285_setup (int nr,struct pci_sys_data *); -extern struct pci_bus *dc21285_scan_bus (int nr,struct pci_sys_data *);extern void dc21285_preinit (void );extern void dc21285_postinit (void ); +extern struct pci_ops via82c505_ops;extern int via82c505_setup (int nr,struct pci_sys_data *); -extern struct pci_bus *via82c505_scan_bus (int nr,struct pci_sys_data *);extern void via82c505_init (void *sysdata); +extern struct pci_ops pci_v3_ops;extern int pci_v3_setup (int nr,struct pci_sys_data *); -extern struct pci_bus *pci_v3_scan_bus (int nr,struct pci_sys_data *);extern void pci_v3_preinit (void );extern void pci_v3_postinit (void );
arch/arm/kernel/bios32.c +5 -1
@@ -452,7 +452,11 @@ static void __init pcibios_init_hw(struct hw_pci *hw) &iomem_resource, sys->mem_offset); } - sys->bus = hw->scan (nr, sys); +if (hw->scan) + sys->bus = hw->scan (nr, sys); +else + sys->bus =pci_scan_root_bus (NULL , sys->busnr, + hw->ops, sys, &sys->resources);if (!sys->bus)panic ("PCI: unable to scan bus!" );
arch/arm/mach-cns3xxx/pcie.c +2 -8
@@ -166,12 +166,6 @@ static struct pci_ops cns3xxx_pcie_ops = { .write = cns3xxx_pci_write_config, }; -static struct pci_bus *cns3xxx_pci_scan_bus (int nr,struct pci_sys_data *sys) -{ -return pci_scan_root_bus (NULL , sys->busnr, &cns3xxx_pcie_ops, sys, - &sys->resources); -} -static int cns3xxx_pcie_map_irq (const struct pci_dev *dev,u8 slot,u8 pin) {struct cns3xxx_pcie *cnspci =pdev_to_cnspci (dev);
@@ -222,8 +216,8 @@ static struct cns3xxx_pcie cns3xxx_pcie[] = { .hw_pci = { .domain = 0, .nr_controllers = 1, + .ops = &cns3xxx_pcie_ops, .setup = cns3xxx_pci_setup, - .scan = cns3xxx_pci_scan_bus, .map_irq = cns3xxx_pcie_map_irq, }, },
@@ -264,8 +258,8 @@ static struct cns3xxx_pcie cns3xxx_pcie[] = { .hw_pci = { .domain = 1, .nr_controllers = 1, + .ops = &cns3xxx_pcie_ops, .setup = cns3xxx_pci_setup, - .scan = cns3xxx_pci_scan_bus, .map_irq = cns3xxx_pcie_map_irq, }, },
arch/arm/mach-footbridge/cats-pci.c +1 -1
@@ -47,8 +47,8 @@ static struct hw_pci cats_pci __initdata = { .swizzle = cats_no_swizzle, .map_irq = cats_map_irq, .nr_controllers = 1, + .ops = &dc21285_ops, .setup = dc21285_setup, - .scan = dc21285_scan_bus, .preinit = dc21285_preinit, .postinit = dc21285_postinit, };
arch/arm/mach-footbridge/dc21285.c +1 -6
@@ -129,7 +129,7 @@ dc21285_write_config(struct pci_bus *bus, unsigned int devfn, int where,return PCIBIOS_SUCCESSFUL ; } -static struct pci_ops dc21285_ops = { +struct pci_ops dc21285_ops = { .read = dc21285_read_config, .write = dc21285_write_config, };
@@ -284,11 +284,6 @@ int __init dc21285_setup(int nr, struct pci_sys_data *sys)return 1 ; } -struct pci_bus *__init dc21285_scan_bus (int nr,struct pci_sys_data *sys) -{ -return pci_scan_root_bus (NULL ,0 , &dc21285_ops, sys, &sys->resources); -} -#define dc21285_request_irq (_a, _b, _c, _d, _e) \ WARN_ON(request_irq(_a, _b, _c, _d, _e) < 0)
arch/arm/mach-footbridge/ebsa285-pci.c +1 -1
@@ -31,8 +31,8 @@ static int __init ebsa285_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)static struct hw_pci ebsa285_pci__initdata = { .map_irq = ebsa285_map_irq, .nr_controllers =1 , + .ops = &dc21285_ops, .setup = dc21285_setup, - .scan = dc21285_scan_bus, .preinit = dc21285_preinit, .postinit = dc21285_postinit, };
arch/arm/mach-footbridge/netwinder-pci.c +1 -1
@@ -45,8 +45,8 @@ static int __init netwinder_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)static struct hw_pci netwinder_pci__initdata = { .map_irq = netwinder_map_irq, .nr_controllers =1 , + .ops = &dc21285_ops, .setup = dc21285_setup, - .scan = dc21285_scan_bus, .preinit = dc21285_preinit, .postinit = dc21285_postinit, };
arch/arm/mach-footbridge/personal-pci.c +1 -1
@@ -41,8 +41,8 @@ static int __init personal_server_map_irq(const struct pci_dev *dev, u8 slot,static struct hw_pci personal_server_pci__initdata = { .map_irq = personal_server_map_irq, .nr_controllers =1 , + .ops = &dc21285_ops, .setup = dc21285_setup, - .scan = dc21285_scan_bus, .preinit = dc21285_preinit, .postinit = dc21285_postinit, };
arch/arm/mach-integrator/pci.c +1 -1
@@ -98,7 +98,7 @@ static struct hw_pci integrator_pci __initdata = { .map_irq = integrator_map_irq, .setup = pci_v3_setup, .nr_controllers = 1, - .scan = pci_v3_scan_bus, + .ops = &pci_v3_ops, .preinit = pci_v3_preinit, .postinit = pci_v3_postinit, };
arch/arm/mach-integrator/pci_v3.c +1 -7
@@ -340,7 +340,7 @@ static int v3_write_config(struct pci_bus *bus, unsigned int devfn, int where,return PCIBIOS_SUCCESSFUL ; } -static struct pci_ops pci_v3_ops = { +struct pci_ops pci_v3_ops = { .read = v3_read_config, .write = v3_write_config, };
@@ -488,12 +488,6 @@ int __init pci_v3_setup(int nr, struct pci_sys_data *sys)return ret; } -struct pci_bus *__init pci_v3_scan_bus (int nr,struct pci_sys_data *sys) -{ -return pci_scan_root_bus (NULL , sys->busnr, &pci_v3_ops, sys, - &sys->resources); -} -/* * V3_LB_BASE? - local bus address * V3_LB_MAP? - pci bus address
arch/arm/mach-iop32x/em7210.c +1 -1
@@ -104,9 +104,9 @@ em7210_pci_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)static struct hw_pci em7210_pci__initdata = { .nr_controllers =1 , + .ops = &iop3xx_ops, .setup = iop3xx_pci_setup, .preinit = iop3xx_pci_preinit, - .scan = iop3xx_pci_scan_bus, .map_irq = em7210_pci_map_irq, };
arch/arm/mach-iop32x/glantank.c +1 -1
@@ -97,9 +97,9 @@ glantank_pci_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)static struct hw_pci glantank_pci__initdata = { .nr_controllers =1 , + .ops = &iop3xx_ops, .setup = iop3xx_pci_setup, .preinit = iop3xx_pci_preinit, - .scan = iop3xx_pci_scan_bus, .map_irq = glantank_pci_map_irq, };
arch/arm/mach-iop32x/iq31244.c +2 -2
@@ -131,9 +131,9 @@ ep80219_pci_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)static struct hw_pci ep80219_pci__initdata = { .nr_controllers =1 , + .ops = &iop3xx_ops, .setup = iop3xx_pci_setup, .preinit = iop3xx_pci_preinit, - .scan = iop3xx_pci_scan_bus, .map_irq = ep80219_pci_map_irq, };
@@ -166,9 +166,9 @@ iq31244_pci_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)static struct hw_pci iq31244_pci__initdata = { .nr_controllers =1 , + .ops = &iop3xx_ops, .setup = iop3xx_pci_setup, .preinit = iop3xx_pci_preinit, - .scan = iop3xx_pci_scan_bus, .map_irq = iq31244_pci_map_irq, };
arch/arm/mach-iop32x/iq80321.c +1 -1
@@ -102,9 +102,9 @@ iq80321_pci_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)static struct hw_pci iq80321_pci__initdata = { .nr_controllers =1 , + .ops = &iop3xx_ops, .setup = iop3xx_pci_setup, .preinit = iop3xx_pci_preinit_cond, - .scan = iop3xx_pci_scan_bus, .map_irq = iq80321_pci_map_irq, };
arch/arm/mach-iop32x/n2100.c +1 -1
@@ -115,9 +115,9 @@ n2100_pci_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)static struct hw_pci n2100_pci__initdata = { .nr_controllers =1 , + .ops = &iop3xx_ops, .setup = iop3xx_pci_setup, .preinit = iop3xx_pci_preinit, - .scan = iop3xx_pci_scan_bus, .map_irq = n2100_pci_map_irq, };
arch/arm/mach-iop33x/iq80331.c +1 -1
@@ -85,9 +85,9 @@ iq80331_pci_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)static struct hw_pci iq80331_pci__initdata = { .nr_controllers =1 , + .ops = &iop3xx_ops, .setup = iop3xx_pci_setup, .preinit = iop3xx_pci_preinit_cond, - .scan = iop3xx_pci_scan_bus, .map_irq = iq80331_pci_map_irq, };
arch/arm/mach-iop33x/iq80332.c +1 -1
@@ -85,9 +85,9 @@ iq80332_pci_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)static struct hw_pci iq80332_pci__initdata = { .nr_controllers =1 , + .ops = &iop3xx_ops, .setup = iop3xx_pci_setup, .preinit = iop3xx_pci_preinit_cond, - .scan = iop3xx_pci_scan_bus, .map_irq = iq80332_pci_map_irq, };
arch/arm/mach-ixp2000/enp2611.c +1 -8
@@ -141,13 +141,6 @@ static struct pci_ops enp2611_pci_ops = { .write = enp2611_pci_write_config }; -static struct pci_bus *__init enp2611_pci_scan_bus (int nr, -struct pci_sys_data *sys) -{ -return pci_scan_root_bus (NULL , sys->busnr, &enp2611_pci_ops, sys, - &sys->resources); -} -static int __init enp2611_pci_map_irq (const struct pci_dev *dev,u8 slot,u8 pin) {
@@ -180,9 +173,9 @@ static int __init enp2611_pci_map_irq(const struct pci_dev *dev, u8 slot,struct hw_pci enp2611_pci__initdata = { .nr_controllers =1 , + .ops = &enp2611_pci_ops, .setup = enp2611_pci_setup, .preinit = enp2611_pci_preinit, - .scan = enp2611_pci_scan_bus, .map_irq = enp2611_pci_map_irq, };
arch/arm/mach-ixp2000/include/mach/platform.h +1 -1
@@ -127,10 +127,10 @@ unsigned long ixp2000_gettimeoffset(void);struct pci_sys_data ; +extern struct pci_ops ixp2000_pci_ops;u32 *ixp2000_pci_config_addr (unsigned int bus,unsigned int devfn,int where);void ixp2000_pci_preinit (void );int ixp2000_pci_setup (int ,struct pci_sys_data *); -struct pci_bus *ixp2000_pci_scan_bus (int ,struct pci_sys_data *);int ixp2000_pci_read_config (struct pci_bus *,unsigned int ,int ,int ,u32 *);int ixp2000_pci_write_config (struct pci_bus *,unsigned int ,int ,int ,u32 );
arch/arm/mach-ixp2000/ixdp2400.c +1 -1
@@ -146,10 +146,10 @@ static void ixdp2400_pci_postinit(void)static struct hw_pci ixdp2400_pci__initdata = { .nr_controllers =1 , + .ops = &ixp2000_pci_ops, .setup = ixdp2400_pci_setup, .preinit = ixdp2400_pci_preinit, .postinit = ixdp2400_pci_postinit, - .scan = ixp2000_pci_scan_bus, .map_irq = ixdp2400_pci_map_irq, };
arch/arm/mach-ixp2000/ixdp2800.c +1 -1
@@ -246,10 +246,10 @@ static void __init ixdp2800_pci_postinit(void)struct __initdata hw_pci ixdp2800_pci__initdata = { .nr_controllers =1 , + .ops = &ixp2000_pci_ops, .setup = ixdp2800_pci_setup, .preinit = ixdp2800_pci_preinit, .postinit = ixdp2800_pci_postinit, - .scan = ixp2000_pci_scan_bus, .map_irq = ixdp2800_pci_map_irq, };
arch/arm/mach-ixp2000/ixdp2x01.c +1 -1
@@ -327,9 +327,9 @@ static int ixdp2x01_pci_setup(int nr, struct pci_sys_data *sys)struct hw_pci ixdp2x01_pci__initdata = { .nr_controllers =1 , + .ops = &ixp2000_pci_ops, .setup = ixdp2x01_pci_setup, .preinit = ixdp2x01_pci_preinit, - .scan = ixp2000_pci_scan_bus, .map_irq = ixdp2x01_pci_map_irq, };
arch/arm/mach-ixp2000/pci.c +1 -7
@@ -124,17 +124,11 @@ int ixp2000_pci_write_config(struct pci_bus *bus, unsigned int devfn, int where, } -static struct pci_ops ixp2000_pci_ops = { +struct pci_ops ixp2000_pci_ops = { .read = ixp2000_pci_read_config, .write = ixp2000_pci_write_config }; -struct pci_bus *ixp2000_pci_scan_bus (int nr,struct pci_sys_data *sysdata) -{ -return pci_scan_root_bus (NULL , sysdata->busnr, &ixp2000_pci_ops, - sysdata, &sysdata->resources); -} -int ixp2000_pci_abort_handler (unsigned long addr,unsigned int fsr,struct pt_regs *regs) {
arch/arm/mach-ixp23xx/include/mach/platform.h +1 -1
@@ -37,7 +37,7 @@ void ixp23xx_sys_init(void);void ixp23xx_restart (char ,const char *);int ixp23xx_pci_setup (int ,struct pci_sys_data *);void ixp23xx_pci_preinit (void ); -struct pci_bus *ixp23xx_pci_scan_bus (int ,struct pci_sys_data *); +extern struct pci_ops ixp23xx_pci_ops;void ixp23xx_pci_slave_init (void );extern struct sys_timer ixp23xx_timer;
arch/arm/mach-ixp23xx/ixdp2351.c +1 -1
@@ -251,9 +251,9 @@ static int __init ixdp2351_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)struct hw_pci ixdp2351_pci__initdata = { .nr_controllers =1 , + .ops = &ixp23xx_pci_ops, .preinit = ixp23xx_pci_preinit, .setup = ixp23xx_pci_setup, - .scan = ixp23xx_pci_scan_bus, .map_irq = ixdp2351_map_irq, };
arch/arm/mach-ixp23xx/pci.c +0 -6
@@ -140,12 +140,6 @@ struct pci_ops ixp23xx_pci_ops = { .write = ixp23xx_pci_write_config, }; -struct pci_bus *ixp23xx_pci_scan_bus (int nr,struct pci_sys_data *sysdata) -{ -return pci_scan_root_bus (NULL , sysdata->busnr, &ixp23xx_pci_ops, - sysdata, &sysdata->resources); -} -int ixp23xx_pci_abort_handler (unsigned long addr,unsigned int fsr,struct pt_regs *regs) {volatile unsigned long temp;
arch/arm/mach-ixp23xx/roadrunner.c +1 -1
@@ -118,9 +118,9 @@ static void __init roadrunner_pci_preinit(void)static struct hw_pci roadrunner_pci__initdata = { .nr_controllers =1 , + .ops = &ixp23xx_pci_ops, .preinit = roadrunner_pci_preinit, .setup = ixp23xx_pci_setup, - .scan = ixp23xx_pci_scan_bus, .map_irq = roadrunner_map_irq, };
arch/arm/mach-ixp4xx/avila-pci.c +1 -1
@@ -65,9 +65,9 @@ static int __init avila_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)struct hw_pci avila_pci__initdata = { .nr_controllers =1 , + .ops = &ixp4xx_ops, .preinit = avila_pci_preinit, .setup = ixp4xx_setup, - .scan = ixp4xx_scan_bus, .map_irq = avila_map_irq, };
arch/arm/mach-ixp4xx/common-pci.c +0 -6
@@ -480,12 +480,6 @@ int ixp4xx_setup(int nr, struct pci_sys_data *sys)return 1 ; } -struct pci_bus *__devinit ixp4xx_scan_bus (int nr,struct pci_sys_data *sys) -{ -return pci_scan_root_bus (NULL , sys->busnr, &ixp4xx_ops, sys, - &sys->resources); -} -int dma_set_coherent_mask (struct device *dev,u64 mask) {if (mask >=SZ_64M -1 )
arch/arm/mach-ixp4xx/coyote-pci.c +1 -1
@@ -48,9 +48,9 @@ static int __init coyote_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)struct hw_pci coyote_pci__initdata = { .nr_controllers =1 , + .ops = &ixp4xx_ops, .preinit = coyote_pci_preinit, .setup = ixp4xx_setup, - .scan = ixp4xx_scan_bus, .map_irq = coyote_map_irq, };
arch/arm/mach-ixp4xx/dsmg600-pci.c +1 -1
@@ -62,9 +62,9 @@ static int __init dsmg600_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)struct hw_pci __initdata dsmg600_pci = { .nr_controllers =1 , + .ops = &ixp4xx_ops, .preinit = dsmg600_pci_preinit, .setup = ixp4xx_setup, - .scan = ixp4xx_scan_bus, .map_irq = dsmg600_map_irq, };
arch/arm/mach-ixp4xx/fsg-pci.c +1 -1
@@ -59,9 +59,9 @@ static int __init fsg_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)struct hw_pci fsg_pci__initdata = { .nr_controllers =1 , + .ops = &ixp4xx_ops, .preinit = fsg_pci_preinit, .setup = ixp4xx_setup, - .scan = ixp4xx_scan_bus, .map_irq = fsg_map_irq, };
arch/arm/mach-ixp4xx/gateway7001-pci.c +1 -1
@@ -47,9 +47,9 @@ static int __init gateway7001_map_irq(const struct pci_dev *dev, u8 slot,struct hw_pci gateway7001_pci__initdata = { .nr_controllers =1 , + .ops = &ixp4xx_ops, .preinit = gateway7001_pci_preinit, .setup = ixp4xx_setup, - .scan = ixp4xx_scan_bus, .map_irq = gateway7001_map_irq, };
arch/arm/mach-ixp4xx/goramo_mlr.c +1 -1
@@ -473,10 +473,10 @@ static int __init gmlr_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)static struct hw_pci gmlr_hw_pci__initdata = { .nr_controllers =1 , + .ops = &ixp4xx_ops, .preinit = gmlr_pci_preinit, .postinit = gmlr_pci_postinit, .setup = ixp4xx_setup, - .scan = ixp4xx_scan_bus, .map_irq = gmlr_map_irq, };
arch/arm/mach-ixp4xx/gtwx5715-pci.c +1 -1
@@ -67,9 +67,9 @@ static int __init gtwx5715_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)struct hw_pci gtwx5715_pci__initdata = { .nr_controllers =1 , + .ops = &ixp4xx_ops, .preinit = gtwx5715_pci_preinit, .setup = ixp4xx_setup, - .scan = ixp4xx_scan_bus, .map_irq = gtwx5715_map_irq, };
arch/arm/mach-ixp4xx/include/mach/platform.h +1 -1
@@ -130,7 +130,7 @@ extern void ixp4xx_restart(char, const char *);extern void ixp4xx_pci_preinit (void );struct pci_sys_data ;extern int ixp4xx_setup (int nr,struct pci_sys_data *sys); -extern struct pci_bus *ixp4xx_scan_bus (int nr,struct pci_sys_data *sys); +extern struct pci_ops ixp4xx_ops;/* * GPIO-functions
arch/arm/mach-ixp4xx/ixdp425-pci.c +1 -1
@@ -60,9 +60,9 @@ static int __init ixdp425_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)struct hw_pci ixdp425_pci__initdata = { .nr_controllers =1 , + .ops = &ixp4xx_ops, .preinit = ixdp425_pci_preinit, .setup = ixp4xx_setup, - .scan = ixp4xx_scan_bus, .map_irq = ixdp425_map_irq, };
arch/arm/mach-ixp4xx/ixdpg425-pci.c +1 -1
@@ -42,9 +42,9 @@ static int __init ixdpg425_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)struct hw_pci ixdpg425_pci__initdata = { .nr_controllers =1 , + .ops = &ixp4xx_ops, .preinit = ixdpg425_pci_preinit, .setup = ixp4xx_setup, - .scan = ixp4xx_scan_bus, .map_irq = ixdpg425_map_irq, };
arch/arm/mach-ixp4xx/miccpt-pci.c +1 -1
@@ -61,9 +61,9 @@ static int __init miccpt_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)struct hw_pci miccpt_pci__initdata = { .nr_controllers =1 , + .ops = &ixp4xx_ops, .preinit = miccpt_pci_preinit, .setup = ixp4xx_setup, - .scan = ixp4xx_scan_bus, .map_irq = miccpt_map_irq, };
arch/arm/mach-ixp4xx/nas100d-pci.c +1 -1
@@ -58,9 +58,9 @@ static int __init nas100d_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)struct hw_pci __initdata nas100d_pci = { .nr_controllers =1 , + .ops = &ixp4xx_ops, .preinit = nas100d_pci_preinit, .setup = ixp4xx_setup, - .scan = ixp4xx_scan_bus, .map_irq = nas100d_map_irq, };
arch/arm/mach-ixp4xx/nslu2-pci.c +1 -1
@@ -54,9 +54,9 @@ static int __init nslu2_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)struct hw_pci __initdata nslu2_pci = { .nr_controllers =1 , + .ops = &ixp4xx_ops, .preinit = nslu2_pci_preinit, .setup = ixp4xx_setup, - .scan = ixp4xx_scan_bus, .map_irq = nslu2_map_irq, };
arch/arm/mach-ixp4xx/vulcan-pci.c +1 -1
@@ -56,9 +56,9 @@ static int __init vulcan_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)struct hw_pci vulcan_pci__initdata = { .nr_controllers =1 , + .ops = &ixp4xx_ops, .preinit = vulcan_pci_preinit, .setup = ixp4xx_setup, - .scan = ixp4xx_scan_bus, .map_irq = vulcan_map_irq, };
arch/arm/mach-ixp4xx/wg302v2-pci.c +1 -1
@@ -46,9 +46,9 @@ static int __init wg302v2_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)struct hw_pci wg302v2_pci__initdata = { .nr_controllers =1 , + .ops = &ixp4xx_ops, .preinit = wg302v2_pci_preinit, .setup = ixp4xx_setup, - .scan = ixp4xx_scan_bus, .map_irq = wg302v2_map_irq, };
arch/arm/mach-ks8695/pci.c +1 -7
@@ -141,12 +141,6 @@ static struct pci_ops ks8695_pci_ops = { .write = ks8695_pci_writeconfig, }; -static struct pci_bus *__init ks8695_pci_scan_bus (int nr,struct pci_sys_data *sys) -{ -return pci_scan_root_bus (NULL , sys->busnr, &ks8695_pci_ops, sys, - &sys->resources); -} -static struct resource pci_mem = { .name ="PCI Memory space" , .start =KS8695_PCIMEM_PA ,
@@ -302,9 +296,9 @@ static void ks8695_show_pciregs(void)static struct hw_pci ks8695_pci__initdata = { .nr_controllers =1 , + .ops = &ks8695_pci_ops, .preinit = ks8695_pci_preinit, .setup = ks8695_pci_setup, - .scan = ks8695_pci_scan_bus, .postinit =NULL , .map_irq =NULL , };
arch/arm/mach-pxa/cm-x2xx-pci.c +1 -1
@@ -183,8 +183,8 @@ static void cmx2xx_pci_preinit(void)static struct hw_pci cmx2xx_pci__initdata = { .map_irq = cmx2xx_pci_map_irq, .nr_controllers =1 , + .ops = &it8152_ops, .setup = it8152_pci_setup, - .scan = it8152_pci_scan_bus, .preinit = cmx2xx_pci_preinit, };
arch/arm/mach-sa1100/pci-nanoengine.c +1 -7
@@ -129,12 +129,6 @@ static int __init pci_nanoengine_map_irq(const struct pci_dev *dev, u8 slot,return NANOENGINE_IRQ_GPIO_PCI ; } -struct pci_bus *__init pci_nanoengine_scan_bus (int nr,struct pci_sys_data *sys) -{ -return pci_scan_root_bus (NULL , sys->busnr, &pci_nano_ops, sys, - &sys->resources); -} -static struct resource pci_io_ports =DEFINE_RES_IO_NAMED (0x400 ,0x400 ,"PCI IO" );
@@ -274,7 +268,7 @@ int __init pci_nanoengine_setup(int nr, struct pci_sys_data *sys)static struct hw_pci nanoengine_pci__initdata = { .map_irq = pci_nanoengine_map_irq, .nr_controllers =1 , - .scan = pci_nanoengine_scan_bus, + .ops = &pci_nano_ops, .setup = pci_nanoengine_setup, };
arch/arm/mach-shark/pci.c +1 -1
@@ -31,7 +31,7 @@ static struct hw_pci shark_pci __initdata = { .setup = via82c505_setup, .map_irq = shark_map_irq, .nr_controllers = 1, - .scan = via82c505_scan_bus, + .ops = &via82c505_ops, .preinit = via82c505_preinit, };
arch/arm/mach-versatile/pci.c +1 -7
@@ -303,12 +303,6 @@ int __init pci_versatile_setup(int nr, struct pci_sys_data *sys) } -struct pci_bus *__init pci_versatile_scan_bus (int nr,struct pci_sys_data *sys) -{ -return pci_scan_root_bus (NULL , sys->busnr, &pci_versatile_ops, sys, - &sys->resources); -} -void __init pci_versatile_preinit (void ) { pcibios_min_io =0x44000000 ;
@@ -347,8 +341,8 @@ static int __init versatile_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)static struct hw_pci versatile_pci__initdata = { .map_irq = versatile_map_irq, .nr_controllers =1 , + .ops = &pci_versatile_ops, .setup = pci_versatile_setup, - .scan = pci_versatile_scan_bus, .preinit = pci_versatile_preinit, };
arch/arm/plat-iop/pci.c +1 -7
@@ -160,7 +160,7 @@ iop3xx_write_config(struct pci_bus *bus, unsigned int devfn, int where,return PCIBIOS_SUCCESSFUL ; } -static struct pci_ops iop3xx_ops = { +struct pci_ops iop3xx_ops = { .read = iop3xx_read_config, .write = iop3xx_write_config, };
@@ -220,12 +220,6 @@ int iop3xx_pci_setup(int nr, struct pci_sys_data *sys)return 1 ; } -struct pci_bus *iop3xx_pci_scan_bus (int nr,struct pci_sys_data *sys) -{ -return pci_scan_root_bus (NULL , sys->busnr, &iop3xx_ops, sys, - &sys->resources); -} -void __init iop3xx_atu_setup (void ) {/* BAR 0 ( Disabled ) */
Signature · 1 line
1.7.4.4
PATCH 6/8 ARM: PCI: provide a default bus scan implementation
Quoted 4 lines · Russell King
Most PCI implementations perform simple root bus scanning. Rather than having each group of platforms provide a duplicated bus scan function, provide the PCI configuration ops structure via the
hw_pcistructure, and call the root bus scanning function from core ARM PCI code.
Acked-by Krzysztof Ha?asa <[email protected]>
PATCH 7/8 ARM: PCI: dove/kirkwood/mv78xx0: use sys->private_data
In reply to Russell King - ARM LinuxUse sys->private_data to store the PCIe port data structure.
Signed-off-by Russell King <[email protected]>
--- arch/arm/mach-dove/pcie.c | 23 +++++++---------------- arch/arm/mach-kirkwood/pcie.c | 15 ++++++--------- arch/arm/mach-mv78xx0/pcie.c | 23 +++++++---------------- 3 files changed, 20 insertions(+), 41 deletions(-)
arch/arm/mach-dove/pcie.c +7 -16
@@ -43,6 +43,7 @@ static int __init dove_pcie_setup(int nr, struct pci_sys_data *sys)return 0 ; pp = &pcie_port[nr]; + sys->private_data = pp; pp->root_bus_nr = sys->busnr;/*
@@ -93,19 +94,6 @@ static int __init dove_pcie_setup(int nr, struct pci_sys_data *sys)return 1 ; } -static struct pcie_port *bus_to_port (int bus) -{ -int i; - -for (i = num_pcie_ports -1 ; i >=0 ; i--) { -int rbus = pcie_port[i].root_bus_nr; -if (rbus !=-1 && rbus <= bus) -break ; - } - -return i >=0 ? pcie_port + i :NULL ; -} -static int pcie_valid_config (struct pcie_port *pp,int bus,int dev) {/*
@@ -121,7 +109,8 @@ static int pcie_valid_config(struct pcie_port *pp, int bus, int dev)static int pcie_rd_conf (struct pci_bus *bus,u32 devfn,int where,int size,u32 *val) { -struct pcie_port *pp =bus_to_port (bus->number); +struct pci_sys_data *sys = bus->sysdata; +struct pcie_port *pp = sys->private_data;unsigned long flags;int ret;
@@ -140,7 +129,8 @@ static int pcie_rd_conf(struct pci_bus *bus, u32 devfn, int where,static int pcie_wr_conf (struct pci_bus *bus,u32 devfn,int where,int size,u32 val) { -struct pcie_port *pp =bus_to_port (bus->number); +struct pci_sys_data *sys = bus->sysdata; +struct pcie_port *pp = sys->private_data;unsigned long flags;int ret;
@@ -194,7 +184,8 @@ dove_pcie_scan_bus(int nr, struct pci_sys_data *sys)static int __init dove_pcie_map_irq (const struct pci_dev *dev,u8 slot,u8 pin) { -struct pcie_port *pp =bus_to_port (dev->bus->number); +struct pci_sys_data *sys = dev->sysdata; +struct pcie_port *pp = sys->private_data;return pp->index ?IRQ_DOVE_PCIE1 :IRQ_DOVE_PCIE0 ; }
arch/arm/mach-kirkwood/pcie.c +6 -9
@@ -44,12 +44,6 @@ struct pcie_port {static int pcie_port_map[2 ];static int num_pcie_ports; -static inline struct pcie_port *bus_to_port (struct pci_bus *bus) -{ -struct pci_sys_data *sys = bus->sysdata; -return sys->private_data; -} -static int pcie_valid_config (struct pcie_port *pp,int bus,int dev) {/*
@@ -79,7 +73,8 @@ static int pcie_valid_config(struct pcie_port *pp, int bus, int dev)static int pcie_rd_conf (struct pci_bus *bus,u32 devfn,int where,int size,u32 *val) { -struct pcie_port *pp =bus_to_port (bus); +struct pci_sys_data *sys = bus->sysdata; +struct pcie_port *pp = sys->private_data;unsigned long flags;int ret;
@@ -98,7 +93,8 @@ static int pcie_rd_conf(struct pci_bus *bus, u32 devfn, int where,static int pcie_wr_conf (struct pci_bus *bus,u32 devfn,int where,int size,u32 val) { -struct pcie_port *pp =bus_to_port (bus); +struct pci_sys_data *sys = bus->sysdata; +struct pcie_port *pp = sys->private_data;unsigned long flags;int ret;
@@ -248,7 +244,8 @@ kirkwood_pcie_scan_bus(int nr, struct pci_sys_data *sys)static int __init kirkwood_pcie_map_irq (const struct pci_dev *dev,u8 slot,u8 pin) { -struct pcie_port *pp =bus_to_port (dev->bus); +struct pci_sys_data *sys = dev->sysdata; +struct pcie_port *pp = sys->private_data;return pp->irq; }
arch/arm/mach-mv78xx0/pcie.c +7 -16
@@ -147,6 +147,7 @@ static int __init mv78xx0_pcie_setup(int nr, struct pci_sys_data *sys)return 0 ; pp = &pcie_port[nr]; + sys->private_data = pp; pp->root_bus_nr = sys->busnr;/*
@@ -161,19 +162,6 @@ static int __init mv78xx0_pcie_setup(int nr, struct pci_sys_data *sys)return 1 ; } -static struct pcie_port *bus_to_port (int bus) -{ -int i; - -for (i = num_pcie_ports -1 ; i >=0 ; i--) { -int rbus = pcie_port[i].root_bus_nr; -if (rbus !=-1 && rbus <= bus) -break ; - } - -return i >=0 ? pcie_port + i :NULL ; -} -static int pcie_valid_config (struct pcie_port *pp,int bus,int dev) {/*
@@ -189,7 +177,8 @@ static int pcie_valid_config(struct pcie_port *pp, int bus, int dev)static int pcie_rd_conf (struct pci_bus *bus,u32 devfn,int where,int size,u32 *val) { -struct pcie_port *pp =bus_to_port (bus->number); +struct pci_sys_data *sys = bus->sysdata; +struct pcie_port *pp = sys->private_data;unsigned long flags;int ret;
@@ -208,7 +197,8 @@ static int pcie_rd_conf(struct pci_bus *bus, u32 devfn, int where,static int pcie_wr_conf (struct pci_bus *bus,u32 devfn,int where,int size,u32 val) { -struct pcie_port *pp =bus_to_port (bus->number); +struct pci_sys_data *sys = bus->sysdata; +struct pcie_port *pp = sys->private_data;unsigned long flags;int ret;
@@ -263,7 +253,8 @@ mv78xx0_pcie_scan_bus(int nr, struct pci_sys_data *sys)static int __init mv78xx0_pcie_map_irq (const struct pci_dev *dev,u8 slot,u8 pin) { -struct pcie_port *pp =bus_to_port (dev->bus->number); +struct pci_sys_data *sys = bus->sysdata; +struct pcie_port *pp = sys->private_data;return IRQ_MV78XX0_PCIE_00 + (pp->maj <<2 ) + pp->min; }
Signature · 1 line
1.7.4.4
PATCH 8/8 ARM: PCI: remove per-pci_hw list of buses
In reply to Russell King - ARM LinuxNo one uses the per-hw list of buses, so get rid of this. Instead, build the list locally.
Signed-off-by Russell King <[email protected]>
--- arch/arm/include/asm/mach/pci.h | 1 - arch/arm/kernel/bios32.c | 11 +++++------ 2 files changed, 5 insertions(+), 7 deletions(-)
arch/arm/include/asm/mach/pci.h +0 -1
@@ -19,7 +19,6 @@ struct hw_pci {#ifdef CONFIG_PCI_DOMAINS int domain;#endif -struct list_head buses;struct pci_ops *ops;int nr_controllers;int (*setup)(int nr,struct pci_sys_data *);
arch/arm/kernel/bios32.c +5 -6
@@ -423,7 +423,7 @@ static int pcibios_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)return irq; } -static void __init pcibios_init_hw (struct hw_pci *hw) +static void __init pcibios_init_hw (struct hw_pci *hw,struct list_head *head) {struct pci_sys_data *sys =NULL ;int ret;
@@ -463,7 +463,7 @@ static void __init pcibios_init_hw(struct hw_pci *hw) busnr = sys->bus->subordinate +1 ; -list_add (&sys->node, &hw->buses); +list_add (&sys->node, head); }else {kfree (sys);if (ret <0 )
@@ -475,19 +475,18 @@ static void __init pcibios_init_hw(struct hw_pci *hw)void __init pci_common_init (struct hw_pci *hw) {struct pci_sys_data *sys; - -INIT_LIST_HEAD (&hw->buses); +LIST_HEAD (head);pci_add_flags (PCI_REASSIGN_ALL_RSRC );if (hw->preinit) hw->preinit (); -pcibios_init_hw (hw); +pcibios_init_hw (hw, &head);if (hw->postinit) hw->postinit ();pci_fixup_irqs (pcibios_swizzle, pcibios_map_irq); -list_for_each_entry (sys, &hw->buses, node) { +list_for_each_entry (sys, &head, node) {struct pci_bus *bus = sys->bus;if (!pci_has_flag (PCI_PROBE_ONLY )) {
Signature · 1 line
1.7.4.4