net: dsa: always use phylink
Subsystems (18)
Russell King (Oracle)
maintainerv2 cover net: dsa: always use phylink
Hi,
This is a re-hash of the previous RFC series, this time using the suggestion from Vladimir to create a swnode based fixed-link specifier.
Most of the changes are to DSA and phylink code from the previous series. I've tested on my Clearfog (which has just one Marvell DSA switch) and it works there - also tested without the fixed-link specified in DT.
drivers/base/swnode.c | 14 ++- drivers/net/dsa/b53/b53_common.c | 3 +- drivers/net/dsa/bcm_sf2.c | 3 +- drivers/net/dsa/hirschmann/hellcreek.c | 3 +- drivers/net/dsa/lantiq_gswip.c | 6 +- drivers/net/dsa/microchip/ksz_common.c | 3 +- drivers/net/dsa/mt7530.c | 3 +- drivers/net/dsa/mv88e6xxx/chip.c | 134 ++++++++++++------------- drivers/net/dsa/mv88e6xxx/chip.h | 6 +- drivers/net/dsa/mv88e6xxx/port.c | 32 ------ drivers/net/dsa/mv88e6xxx/port.h | 5 - drivers/net/dsa/ocelot/felix.c | 3 +- drivers/net/dsa/qca/ar9331.c | 3 +- drivers/net/dsa/qca8k.c | 3 +- drivers/net/dsa/realtek/rtl8365mb.c | 3 +- drivers/net/dsa/sja1105/sja1105_main.c | 3 +- drivers/net/dsa/xrs700x/xrs700x.c | 3 +- drivers/net/phy/phylink.c | 30 ++++-- include/linux/phylink.h | 1 + include/linux/property.h | 4 + include/net/dsa.h | 3 +- net/dsa/port.c | 175 +++++++++++++++++++++++++++++---- 22 files changed, 290 insertions(+), 153 deletions(-)
Signature · 2 lines
RMK's Patch system: https://www.armlinux.org.uk/developer/patches/ FTTP is here! 40Mbps down 10Mbps up. Decent connectivity at last!
RFC PATCH v2 1/6 net: phylink: split out and export interface to caps translation
phylink_get_linkmodes() translates the interface mode into a set of speed and duplex capabilities which are masked with the MAC modes to then derive the link modes that are available.
Split out the initial transformation into a new function phylink_interface_to_caps(), and export it, which will be useful when setting the maximum fixed link speed in DSA code.
Signed-off-by Russell King (Oracle) <[email protected]>
--- drivers/net/phy/phylink.c | 30 ++++++++++++++++++++++-------- include/linux/phylink.h | 1 + 2 files changed, 23 insertions(+), 8 deletions(-)
drivers/net/phy/phylink.c +22 -8
@@ -297,17 +297,12 @@ static void phylink_caps_to_linkmodes(unsigned long *linkmodes, }/** -* phylink_get_linkmodes() - get acceptable link modes -* @linkmodes: ethtool linkmode mask (must be already initialised) +* phylink_interface_to_caps() - translate an interface mode to phylink caps * @interface: phy interface mode defined by &typedef phy_interface_t -* @mac_capabilities: bitmask of MAC capabilities * -* Set all possible pause, speed and duplex linkmodes in @linkmodes that -* are supported by the @interface mode and @mac_capabilities. @linkmodes -* must have been initialised previously. +* Translate the @interface mode to a phylink MAC capabilities mask. */ -void phylink_get_linkmodes (unsigned long *linkmodes,phy_interface_t interface, -unsigned long mac_capabilities) +unsigned long phylink_interface_to_caps (phy_interface_t interface) {unsigned long caps =MAC_SYM_PAUSE |MAC_ASYM_PAUSE ;
@@ -381,6 +376,25 @@ void phylink_get_linkmodes(unsigned long *linkmodes, phy_interface_t interface,break ; } +return caps; +} +EXPORT_SYMBOL_GPL (phylink_interface_to_caps); + +/** +* phylink_get_linkmodes() - get acceptable link modes +* @linkmodes: ethtool linkmode mask (must be already initialised) +* @interface: phy interface mode defined by &typedef phy_interface_t +* @mac_capabilities: bitmask of MAC capabilities +* +* Set all possible pause, speed and duplex linkmodes in @linkmodes that +* are supported by the @interface mode and @mac_capabilities. @linkmodes +* must have been initialised previously. +*/ +void phylink_get_linkmodes (unsigned long *linkmodes,phy_interface_t interface, +unsigned long mac_capabilities) +{ +unsigned long caps =phylink_interface_to_caps (interface); +phylink_caps_to_linkmodes (linkmodes, caps & mac_capabilities); }EXPORT_SYMBOL_GPL (phylink_get_linkmodes);
include/linux/phylink.h +1 -0
@@ -518,6 +518,7 @@ void pcs_link_up(struct phylink_pcs *pcs, unsigned int mode, phy_interface_t interface, int speed, int duplex);#endif +unsigned long phylink_interface_to_caps (phy_interface_t interface);void phylink_get_linkmodes (unsigned long *linkmodes,phy_interface_t interface,unsigned long mac_capabilities); void phylink_generic_validate(struct phylink_config *config,
Signature · 1 line
2.30.2
Re: [PATCH RFC net-next v2 1/6] net: phylink: split out and export interface to caps translation
Quoted 9 lines · On Wed, 13 Jul 2022 15:07:42 +0100 "Russell King (Oracle)"…
phylink_get_linkmodes()translates the interface mode into a set of speed and duplex capabilities which are masked with the MAC modes to then derive the link modes that are available.Split out the initial transformation into a new function
phylink_interface_to_caps(), and export it, which will be useful when setting the maximum fixed link speed in DSA code.Signed-off-by Russell King (Oracle) <[email protected]>
Reviewed-by Marek Behún <[email protected]>
RFC PATCH v2 2/6 software node: allow named software node to be created
In reply to Russell King (Oracle)From: Vladimir Oltean <[email protected]>
Allow a named software node to be created, which is needed for software nodes for a fixed-link specification for DSA.
Signed-off-by Vladimir Oltean <[email protected]>
Signed-off-by Russell King (Oracle) <[email protected]>
--- drivers/base/swnode.c | 14 ++++++++++++-- include/linux/property.h | 4 ++++ 2 files changed, 16 insertions(+), 2 deletions(-)
drivers/base/swnode.c +12 -2
@@ -972,8 +972,9 @@ void software_node_unregister(const struct software_node *node)EXPORT_SYMBOL_GPL (software_node_unregister);struct fwnode_handle * -fwnode_create_software_node (const struct property_entry *properties, -const struct fwnode_handle *parent) +fwnode_create_named_software_node (const struct property_entry *properties, +const struct fwnode_handle *parent, +const char *name) {struct fwnode_handle *fwnode;struct software_node *node;
@@ -991,6 +992,7 @@ fwnode_create_software_node(const struct property_entry *properties,return ERR_CAST (node); node->parent = p ? p->node :NULL ; + node->name = name; fwnode =swnode_register (node, p,1 );if (IS_ERR (fwnode))
@@ -998,6 +1000,14 @@ fwnode_create_software_node(const struct property_entry *properties,return fwnode; } +EXPORT_SYMBOL_GPL (fwnode_create_named_software_node); + +struct fwnode_handle * +fwnode_create_software_node (const struct property_entry *properties, +const struct fwnode_handle *parent) +{ +return fwnode_create_named_software_node (properties, parent,NULL ); +}EXPORT_SYMBOL_GPL (fwnode_create_software_node);void fwnode_remove_software_node (struct fwnode_handle *fwnode)
include/linux/property.h +4 -0
@@ -492,6 +492,10 @@ void software_node_unregister(const struct software_node *node);struct fwnode_handle *fwnode_create_software_node (const struct property_entry *properties,const struct fwnode_handle *parent); +struct fwnode_handle * +fwnode_create_named_software_node (const struct property_entry *properties, +const struct fwnode_handle *parent, +const char *name);void fwnode_remove_software_node (struct fwnode_handle *fwnode);int device_add_software_node (struct device *dev,const struct software_node *node);
Signature · 1 line
2.30.2
Re: [PATCH RFC net-next v2 2/6] software node: allow named software node to be created
Quoted 7 lines · On Wed, 13 Jul 2022 15:07:47 +0100 Russell King (Oracle)…
From: Vladimir Oltean <[email protected]>
Allow a named software node to be created, which is needed for software nodes for a fixed-link specification for DSA.
Signed-off-by Vladimir Oltean <[email protected]>Signed-off-by Russell King (Oracle) <[email protected]>
Reviewed-by Marek Behún <[email protected]>
Russell King (Oracle)
maintainerRe: [PATCH RFC net-next v2 2/6] software node: allow named software node to be created
In reply to Russell King (Oracle)Hi Andy,
Please can you let me know whether you happy with this patch? I would like to send this series to net-next today.
Thanks.
Quoted 70 lines · Russell King
From: Vladimir Oltean <[email protected]>
Allow a named software node to be created, which is needed for software nodes for a fixed-link specification for DSA.
Signed-off-by Vladimir Oltean <[email protected]>Signed-off-by Russell King (Oracle) <[email protected]>--- drivers/base/swnode.c | 14 ++++++++++++-- include/linux/property.h | 4 ++++ 2 files changed, 16 insertions(+), 2 deletions(-)drivers/base/swnode.c +12
-2@@ -972,8 +972,9 @@ void software_node_unregister(const struct software_node *node)EXPORT_SYMBOL_GPL (software_node_unregister);struct fwnode_handle * -fwnode_create_software_node (const struct property_entry *properties, -const struct fwnode_handle *parent) +fwnode_create_named_software_node (const struct property_entry *properties, +const struct fwnode_handle *parent, +const char *name) {struct fwnode_handle *fwnode;struct software_node *node;@@ -991,6 +992,7 @@ fwnode_create_software_node(const struct property_entry *properties,return ERR_CAST (node); node->parent = p ? p->node :NULL ; + node->name = name; fwnode =swnode_register (node, p,1 );if (IS_ERR (fwnode))@@ -998,6 +1000,14 @@ fwnode_create_software_node(const struct property_entry *properties,return fwnode; } +EXPORT_SYMBOL_GPL (fwnode_create_named_software_node); + +struct fwnode_handle * +fwnode_create_software_node (const struct property_entry *properties, +const struct fwnode_handle *parent) +{ +return fwnode_create_named_software_node (properties, parent,NULL ); +}EXPORT_SYMBOL_GPL (fwnode_create_software_node);void fwnode_remove_software_node (struct fwnode_handle *fwnode)include/linux/property.h +4
-0@@ -492,6 +492,10 @@ void software_node_unregister(const struct software_node *node);struct fwnode_handle *fwnode_create_software_node (const struct property_entry *properties,const struct fwnode_handle *parent); +struct fwnode_handle * +fwnode_create_named_software_node (const struct property_entry *properties, +const struct fwnode_handle *parent, +const char *name);void fwnode_remove_software_node (struct fwnode_handle *fwnode);int device_add_software_node (struct device *dev,const struct software_node *node);Signature · 1 line
2.30.2
Signature · 2 lines
RMK's Patch system: https://www.armlinux.org.uk/developer/patches/ FTTP is here! 40Mbps down 10Mbps up. Decent connectivity at last!
RFC PATCH v2 3/6 net: dsa: add support for retrieving the interface mode
In reply to Russell King (Oracle)DSA port bindings allow for an optional phy interface mode. When an interface mode is not specified, DSA uses the NA interface mode type.
However, phylink needs to know the parameters of the link, and this will become especially important when using phylink for ports that are devoid of all properties except the required "reg" property, so that phylink can select the maximum supported link settings. Without knowing the interface mode, phylink can't truely know the maximum link speed.
Update the prototype for the phylink_get_caps method to allow drivers to report this information back to DSA, and update all DSA implementations function declarations to cater for this change. No code is added to the implementations.
Reviewed-by Marek Behún <[email protected]>
Signed-off-by Russell King (Oracle) <[email protected]>
--- drivers/net/dsa/b53/b53_common.c | 3 ++- drivers/net/dsa/bcm_sf2.c | 3 ++- drivers/net/dsa/hirschmann/hellcreek.c | 3 ++- drivers/net/dsa/lantiq_gswip.c | 6 ++++-- drivers/net/dsa/microchip/ksz_common.c | 3 ++- drivers/net/dsa/mt7530.c | 3 ++- drivers/net/dsa/mv88e6xxx/chip.c | 3 ++- drivers/net/dsa/ocelot/felix.c | 3 ++- drivers/net/dsa/qca/ar9331.c | 3 ++- drivers/net/dsa/qca8k.c | 3 ++- drivers/net/dsa/realtek/rtl8365mb.c | 3 ++- drivers/net/dsa/sja1105/sja1105_main.c | 3 ++- drivers/net/dsa/xrs700x/xrs700x.c | 3 ++- include/net/dsa.h | 3 ++- net/dsa/port.c | 23 +++++++++++++++++------ 15 files changed, 47 insertions(+), 21 deletions(-)
drivers/net/dsa/b53/b53_common.c +2 -1
@@ -1310,7 +1310,8 @@ void b53_port_event(struct dsa_switch *ds, int port)EXPORT_SYMBOL (b53_port_event);static void b53_phylink_get_caps (struct dsa_switch *ds,int port, -struct phylink_config *config) +struct phylink_config *config, +phy_interface_t *default_interface) {struct b53_device *dev = ds->priv;
drivers/net/dsa/bcm_sf2.c +2 -1
@@ -713,7 +713,8 @@ static u32 bcm_sf2_sw_get_phy_flags(struct dsa_switch *ds, int port) }static void bcm_sf2_sw_get_caps (struct dsa_switch *ds,int port, -struct phylink_config *config) +struct phylink_config *config, +phy_interface_t *default_interface) {unsigned long *interfaces = config->supported_interfaces;struct bcm_sf2_priv *priv =bcm_sf2_to_priv (ds);
drivers/net/dsa/hirschmann/hellcreek.c +2 -1
@@ -1462,7 +1462,8 @@ static void hellcreek_teardown(struct dsa_switch *ds) }static void hellcreek_phylink_get_caps (struct dsa_switch *ds,int port, -struct phylink_config *config) +struct phylink_config *config, +phy_interface_t *default_interface) {struct hellcreek *hellcreek = ds->priv;
drivers/net/dsa/lantiq_gswip.c +4 -2
@@ -1492,7 +1492,8 @@ static int gswip_port_change_mtu(struct dsa_switch *ds, int port, int new_mtu) }static void gswip_xrx200_phylink_get_caps (struct dsa_switch *ds,int port, -struct phylink_config *config) +struct phylink_config *config, +phy_interface_t *default_interface) {switch (port) {case 0 :
@@ -1525,7 +1526,8 @@ static void gswip_xrx200_phylink_get_caps(struct dsa_switch *ds, int port, }static void gswip_xrx300_phylink_get_caps (struct dsa_switch *ds,int port, -struct phylink_config *config) +struct phylink_config *config, +phy_interface_t *default_interface) {switch (port) {case 0 :
drivers/net/dsa/microchip/ksz_common.c +2 -1
@@ -721,7 +721,8 @@ static int ksz_check_device_id(struct ksz_device *dev) }static void ksz_phylink_get_caps (struct dsa_switch *ds,int port, -struct phylink_config *config) +struct phylink_config *config, +phy_interface_t *default_interface) {struct ksz_device *dev = ds->priv;
drivers/net/dsa/mt7530.c +2 -1
@@ -2914,7 +2914,8 @@ mt7531_cpu_port_config(struct dsa_switch *ds, int port) }static void mt753x_phylink_get_caps (struct dsa_switch *ds,int port, -struct phylink_config *config) +struct phylink_config *config, +phy_interface_t *default_interface) {struct mt7530_priv *priv = ds->priv;
drivers/net/dsa/mv88e6xxx/chip.c +2 -1
@@ -819,7 +819,8 @@ static void mv88e6393x_phylink_get_caps(struct mv88e6xxx_chip *chip, int port, }static void mv88e6xxx_get_caps (struct dsa_switch *ds,int port, -struct phylink_config *config) +struct phylink_config *config, +phy_interface_t *default_interface) {struct mv88e6xxx_chip *chip = ds->priv;
drivers/net/dsa/ocelot/felix.c +2 -1
@@ -937,7 +937,8 @@ static int felix_vlan_del(struct dsa_switch *ds, int port, }static void felix_phylink_get_caps (struct dsa_switch *ds,int port, -struct phylink_config *config) +struct phylink_config *config, +phy_interface_t *default_interface) {struct ocelot *ocelot = ds->priv;
drivers/net/dsa/qca/ar9331.c +2 -1
@@ -501,7 +501,8 @@ static enum dsa_tag_protocol ar9331_sw_get_tag_protocol(struct dsa_switch *ds, }static void ar9331_sw_phylink_get_caps (struct dsa_switch *ds,int port, -struct phylink_config *config) +struct phylink_config *config, +phy_interface_t *default_interface) { config->mac_capabilities =MAC_ASYM_PAUSE |MAC_SYM_PAUSE |MAC_10 |MAC_100 ;
drivers/net/dsa/qca8k.c +2 -1
@@ -1749,7 +1749,8 @@ qca8k_phylink_mac_config(struct dsa_switch *ds, int port, unsigned int mode, }static void qca8k_phylink_get_caps (struct dsa_switch *ds,int port, -struct phylink_config *config) +struct phylink_config *config, +phy_interface_t *default_interface) {switch (port) {case 0 :/* 1st CPU port */
drivers/net/dsa/realtek/rtl8365mb.c +2 -1
@@ -1024,7 +1024,8 @@ static int rtl8365mb_ext_config_forcemode(struct realtek_priv *priv, int port, }static void rtl8365mb_phylink_get_caps (struct dsa_switch *ds,int port, -struct phylink_config *config) +struct phylink_config *config, +phy_interface_t *default_interface) {const struct rtl8365mb_extint *extint =rtl8365mb_get_port_extint (ds->priv, port);
drivers/net/dsa/sja1105/sja1105_main.c +2 -1
@@ -1390,7 +1390,8 @@ static void sja1105_mac_link_up(struct dsa_switch *ds, int port, }static void sja1105_phylink_get_caps (struct dsa_switch *ds,int port, -struct phylink_config *config) +struct phylink_config *config, +phy_interface_t *default_interface) {struct sja1105_private *priv = ds->priv;struct sja1105_xmii_params_entry *mii;
drivers/net/dsa/xrs700x/xrs700x.c +2 -1
@@ -443,7 +443,8 @@ static void xrs700x_teardown(struct dsa_switch *ds) }static void xrs700x_phylink_get_caps (struct dsa_switch *ds,int port, -struct phylink_config *config) +struct phylink_config *config, +phy_interface_t *default_interface) {switch (port) {case 0 :
include/net/dsa.h +2 -1
@@ -852,7 +852,8 @@ struct dsa_switch_ops {* PHYLINK integration */ void (*phylink_get_caps)(struct dsa_switch *ds,int port, -struct phylink_config *config); +struct phylink_config *config, +phy_interface_t *default_interface);void (*phylink_validate)(struct dsa_switch *ds,int port,unsigned long *supported,struct phylink_link_state *state);
net/dsa/port.c +17 -6
@@ -1524,13 +1524,9 @@ static const struct phylink_mac_ops dsa_port_phylink_mac_ops = {int dsa_port_phylink_create (struct dsa_port *dp) {struct dsa_switch *ds = dp->ds; -phy_interface_t mode; +phy_interface_t mode, def_mode;int err; - err =of_get_phy_mode (dp->dn, &mode); -if (err) - mode =PHY_INTERFACE_MODE_NA ; -/* Presence of phylink_mac_link_state or phylink_mac_an_restart is * an indicator of a legacy phylink driver. */
@@ -1538,8 +1534,23 @@ int dsa_port_phylink_create(struct dsa_port *dp) ds->ops->phylink_mac_an_restart) dp->pl_config.legacy_pre_march2020 = true; + def_mode =PHY_INTERFACE_MODE_NA ;if (ds->ops->phylink_get_caps) - ds->ops->phylink_get_caps (ds, dp->index, &dp->pl_config); + ds->ops->phylink_get_caps (ds, dp->index, &dp->pl_config, + &def_mode); + + err =of_get_phy_mode (dp->dn, &mode); +if (err) { +/* We must not set the default mode for user ports as a PHY +* overrides the NA mode in phylink. Setting it here would +* prevent the interface mode being updated. +*/ +if (dp->type ==DSA_PORT_TYPE_CPU || + dp->type ==DSA_PORT_TYPE_DSA ) + mode = def_mode; +else + mode =PHY_INTERFACE_MODE_NA ; + } dp->pl =phylink_create (&dp->pl_config,of_fwnode_handle (dp->dn), mode, &dsa_port_phylink_mac_ops);
Signature · 1 line
2.30.2
RFC PATCH v2 4/6 net: dsa: mv88e6xxx: report the default interface mode for the port
In reply to Russell King (Oracle)Report the maximum speed interface mode for the port, or if we don't have that information, the hardware configured interface mode for the port.
This allows phylink to know which interface mode CPU and DSA ports are operating, which will be necessary when we want to select the maximum speed for the port (required for such ports without a PHY or fixed-link specified in firmware.)
Reviewed-by Marek Behún <[email protected]>
Signed-off-by Russell King (Oracle) <[email protected]>
--- drivers/net/dsa/mv88e6xxx/chip.c | 82 +++++++++++++++++++++++--------- drivers/net/dsa/mv88e6xxx/chip.h | 3 +- 2 files changed, 61 insertions(+), 24 deletions(-)
drivers/net/dsa/mv88e6xxx/chip.c +59 -23
@@ -578,7 +578,8 @@ static const u8 mv88e6185_phy_interface_modes[] = { };static void mv88e6095_phylink_get_caps (struct mv88e6xxx_chip *chip,int port, -struct phylink_config *config) +struct phylink_config *config, +phy_interface_t *default_interface) {u8 cmode = chip->ports[port].cmode;
@@ -588,23 +589,29 @@ static void mv88e6095_phylink_get_caps(struct mv88e6xxx_chip *chip, int port,__set_bit (PHY_INTERFACE_MODE_MII , config->supported_interfaces); }else {if (cmode <ARRAY_SIZE (mv88e6185_phy_interface_modes) && - mv88e6185_phy_interface_modes[cmode]) + mv88e6185_phy_interface_modes[cmode]) {__set_bit (mv88e6185_phy_interface_modes[cmode], config->supported_interfaces); + *default_interface = + mv88e6185_phy_interface_modes[cmode]; + } config->mac_capabilities |=MAC_1000FD ; } }static void mv88e6185_phylink_get_caps (struct mv88e6xxx_chip *chip,int port, -struct phylink_config *config) +struct phylink_config *config, +phy_interface_t *default_interface) {u8 cmode = chip->ports[port].cmode;if (cmode <ARRAY_SIZE (mv88e6185_phy_interface_modes) && - mv88e6185_phy_interface_modes[cmode]) + mv88e6185_phy_interface_modes[cmode]) {__set_bit (mv88e6185_phy_interface_modes[cmode], config->supported_interfaces); + *default_interface = mv88e6185_phy_interface_modes[cmode]; + } config->mac_capabilities =MAC_SYM_PAUSE |MAC_10 |MAC_100 |MAC_1000FD ;
@@ -616,6 +623,7 @@ static const u8 mv88e6xxx_phy_interface_modes[] = { [MV88E6XXX_PORT_STS_CMODE_GMII] = PHY_INTERFACE_MODE_GMII, [MV88E6XXX_PORT_STS_CMODE_RMII_PHY] = PHY_INTERFACE_MODE_RMII, [MV88E6XXX_PORT_STS_CMODE_RMII] = PHY_INTERFACE_MODE_RMII, + [MV88E6XXX_PORT_STS_CMODE_RGMII] = PHY_INTERFACE_MODE_RGMII, [MV88E6XXX_PORT_STS_CMODE_100BASEX] = PHY_INTERFACE_MODE_100BASEX, [MV88E6XXX_PORT_STS_CMODE_1000BASEX] = PHY_INTERFACE_MODE_1000BASEX, [MV88E6XXX_PORT_STS_CMODE_SGMII] = PHY_INTERFACE_MODE_SGMII,
@@ -625,22 +633,32 @@ static const u8 mv88e6xxx_phy_interface_modes[] = {*/ }; -static void mv88e6xxx_translate_cmode (u8 cmode,unsigned long *supported) +static void mv88e6xxx_translate_cmode (u8 cmode,unsigned long *supported, +phy_interface_t *default_interface) { +phy_interface_t interface; +if (cmode <ARRAY_SIZE (mv88e6xxx_phy_interface_modes) && - mv88e6xxx_phy_interface_modes[cmode]) -__set_bit (mv88e6xxx_phy_interface_modes[cmode], supported); -else if (cmode ==MV88E6XXX_PORT_STS_CMODE_RGMII ) -phy_interface_set_rgmii (supported); + mv88e6xxx_phy_interface_modes[cmode]) { + interface = mv88e6xxx_phy_interface_modes[cmode]; +if (interface ==PHY_INTERFACE_MODE_RGMII ) +phy_interface_set_rgmii (supported); +else +__set_bit (interface, supported); +if (default_interface) + *default_interface = interface; + } }static void mv88e6250_phylink_get_caps (struct mv88e6xxx_chip *chip,int port, -struct phylink_config *config) +struct phylink_config *config, +phy_interface_t *default_interface) {unsigned long *supported = config->supported_interfaces;/* Translate the default cmode */ -mv88e6xxx_translate_cmode (chip->ports[port].cmode, supported); +mv88e6xxx_translate_cmode (chip->ports[port].cmode, supported, + default_interface); config->mac_capabilities =MAC_SYM_PAUSE |MAC_10 |MAC_100 ; }
@@ -676,13 +694,15 @@ static int mv88e6352_get_port4_serdes_cmode(struct mv88e6xxx_chip *chip) }static void mv88e6352_phylink_get_caps (struct mv88e6xxx_chip *chip,int port, -struct phylink_config *config) +struct phylink_config *config, +phy_interface_t *default_interface) {unsigned long *supported = config->supported_interfaces;int err, cmode;/* Translate the default cmode */ -mv88e6xxx_translate_cmode (chip->ports[port].cmode, supported); +mv88e6xxx_translate_cmode (chip->ports[port].cmode, supported, + default_interface); config->mac_capabilities =MAC_SYM_PAUSE |MAC_10 |MAC_100 |MAC_1000FD ;
@@ -702,19 +722,21 @@ static void mv88e6352_phylink_get_caps(struct mv88e6xxx_chip *chip, int port,dev_err (chip->dev,"p%d: failed to read serdes cmode\n" , port); else -mv88e6xxx_translate_cmode (cmode ,supported ); +mv88e6xxx_translate_cmode (cmode ,supported ,NULL ); unlock:mv88e6xxx_reg_unlock (chip); } }static void mv88e6341_phylink_get_caps (struct mv88e6xxx_chip *chip,int port, -struct phylink_config *config) +struct phylink_config *config, +phy_interface_t *default_interface) {unsigned long *supported = config->supported_interfaces;/* Translate the default cmode */ -mv88e6xxx_translate_cmode (chip->ports[port].cmode, supported); +mv88e6xxx_translate_cmode (chip->ports[port].cmode, supported, + default_interface);/* No ethtool bits for 200Mbps */ config->mac_capabilities = MAC_SYM_PAUSE | MAC_10 | MAC_100 |
@@ -726,17 +748,21 @@ static void mv88e6341_phylink_get_caps(struct mv88e6xxx_chip *chip, int port,__set_bit (PHY_INTERFACE_MODE_1000BASEX , supported);__set_bit (PHY_INTERFACE_MODE_2500BASEX , supported); + *default_interface =PHY_INTERFACE_MODE_2500BASEX ; + config->mac_capabilities |=MAC_2500FD ; } }static void mv88e6390_phylink_get_caps (struct mv88e6xxx_chip *chip,int port, -struct phylink_config *config) +struct phylink_config *config, +phy_interface_t *default_interface) {unsigned long *supported = config->supported_interfaces;/* Translate the default cmode */ -mv88e6xxx_translate_cmode (chip->ports[port].cmode, supported); +mv88e6xxx_translate_cmode (chip->ports[port].cmode, supported, + default_interface);/* No ethtool bits for 200Mbps */ config->mac_capabilities = MAC_SYM_PAUSE | MAC_10 | MAC_100 |
@@ -748,16 +774,19 @@ static void mv88e6390_phylink_get_caps(struct mv88e6xxx_chip *chip, int port,__set_bit (PHY_INTERFACE_MODE_1000BASEX , supported);__set_bit (PHY_INTERFACE_MODE_2500BASEX , supported); + *default_interface =PHY_INTERFACE_MODE_2500BASEX ; + config->mac_capabilities |=MAC_2500FD ; } }static void mv88e6390x_phylink_get_caps (struct mv88e6xxx_chip *chip,int port, -struct phylink_config *config) +struct phylink_config *config, +phy_interface_t *default_interface) {unsigned long *supported = config->supported_interfaces; -mv88e6390_phylink_get_caps (chip, port, config); +mv88e6390_phylink_get_caps (chip, port, config, default_interface);/* For the 6x90X, ports 2-7 can be in automedia mode. * (Note that 6x90 doesn't support RXAUI nor XAUI).
@@ -783,18 +812,22 @@ static void mv88e6390x_phylink_get_caps(struct mv88e6xxx_chip *chip, int port,__set_bit (PHY_INTERFACE_MODE_XAUI , supported);__set_bit (PHY_INTERFACE_MODE_RXAUI , supported); + *default_interface =PHY_INTERFACE_MODE_XAUI ; + config->mac_capabilities |=MAC_10000FD ; } }static void mv88e6393x_phylink_get_caps (struct mv88e6xxx_chip *chip,int port, -struct phylink_config *config) +struct phylink_config *config, +phy_interface_t *default_interface) {unsigned long *supported = config->supported_interfaces;bool is_6191x = chip->info->prod_num ==MV88E6XXX_PORT_SWITCH_ID_PROD_6191X ; -mv88e6xxx_translate_cmode (chip->ports[port].cmode, supported); +mv88e6xxx_translate_cmode (chip->ports[port].cmode, supported, + default_interface); config->mac_capabilities =MAC_SYM_PAUSE |MAC_10 |MAC_100 |MAC_1000FD ;
@@ -812,6 +845,8 @@ static void mv88e6393x_phylink_get_caps(struct mv88e6xxx_chip *chip, int port,/* FIXME: USXGMII is not supported yet */ /* __set_bit(PHY_INTERFACE_MODE_USXGMII, supported); */ + *default_interface =PHY_INTERFACE_MODE_10GBASER ; + config->mac_capabilities |=MAC_2500FD |MAC_5000FD |MAC_10000FD ; }
@@ -824,7 +859,8 @@ static void mv88e6xxx_get_caps(struct dsa_switch *ds, int port, {struct mv88e6xxx_chip *chip = ds->priv; - chip->info->ops->phylink_get_caps (chip, port, config); + chip->info->ops->phylink_get_caps (chip, port, config, + default_interface);/* Internal ports need GMII for PHYLIB */ if (mv88e6xxx_phy_is_internal (ds, port))
drivers/net/dsa/mv88e6xxx/chip.h +2 -1
@@ -643,7 +643,8 @@ struct mv88e6xxx_ops {/* Phylink */ void (*phylink_get_caps)(struct mv88e6xxx_chip *chip,int port, -struct phylink_config *config); +struct phylink_config *config, +phy_interface_t *default_interface);/* Max Frame Size */ int (*set_max_frame_size)(struct mv88e6xxx_chip *chip,int mtu);
Signature · 1 line
2.30.2
RFC PATCH v2 5/6 net: dsa: create swnode fixed-link if using default params
In reply to Russell King (Oracle)Create and use a swnode fixed-link specification for phylink if no parameters are given in DT for a fixed-link. This allows phylink to be used for "default" cases for DSA and CPU ports.
Signed-off-by Vladimir Oltean <[email protected]>
Signed-off-by Russell King (Oracle) <[email protected]>
--- net/dsa/port.c | 152 ++++++++++++++++++++++++++++++++++++++++++++----- 1 file changed, 139 insertions(+), 13 deletions(-)
net/dsa/port.c +139 -13
@@ -1521,10 +1521,131 @@ static const struct phylink_mac_ops dsa_port_phylink_mac_ops = { .mac_link_up = dsa_port_phylink_mac_link_up, }; +static struct { +unsigned long mask; +int speed; +int duplex; +} phylink_caps_params[] = { + {MAC_400000FD ,SPEED_400000 ,DUPLEX_FULL }, + {MAC_200000FD ,SPEED_200000 ,DUPLEX_FULL }, + {MAC_100000FD ,SPEED_100000 ,DUPLEX_FULL }, + {MAC_56000FD ,SPEED_56000 ,DUPLEX_FULL }, + {MAC_50000FD ,SPEED_50000 ,DUPLEX_FULL }, + {MAC_40000FD ,SPEED_40000 ,DUPLEX_FULL }, + {MAC_25000FD ,SPEED_25000 ,DUPLEX_FULL }, + {MAC_20000FD ,SPEED_20000 ,DUPLEX_FULL }, + {MAC_10000FD ,SPEED_10000 ,DUPLEX_FULL }, + {MAC_5000FD ,SPEED_5000 ,DUPLEX_FULL }, + {MAC_2500FD ,SPEED_2500 ,DUPLEX_FULL }, + {MAC_1000FD ,SPEED_1000 ,DUPLEX_FULL }, + {MAC_100FD ,SPEED_100 ,DUPLEX_FULL }, + {MAC_10FD ,SPEED_10 ,DUPLEX_FULL }, + {MAC_1000HD ,SPEED_1000 ,DUPLEX_HALF }, + {MAC_100HD ,SPEED_100 ,DUPLEX_HALF }, + {MAC_10HD ,SPEED_10 ,DUPLEX_HALF }, +}; + +static int dsa_port_find_max_speed (unsigned long caps,int *speed,int *duplex) +{ +int i; + + *speed =SPEED_UNKNOWN ; + *duplex =DUPLEX_UNKNOWN ; + +for (i =0 ; i <ARRAY_SIZE (phylink_caps_params); i++) { +if (caps & phylink_caps_params[i].mask) { + *speed = phylink_caps_params[i].speed; + *duplex = phylink_caps_params[i].duplex; +break ; + } + } + +return *speed ==SPEED_UNKNOWN ? -EINVAL :0 ; +} + +static void dsa_port_find_max_caps (struct dsa_port *dp, +phy_interface_t *max_interface, +unsigned long *max_caps) +{ +struct phylink_config *config = &dp->pl_config; +phy_interface_t interface; +unsigned long caps; + + *max_interface =PHY_INTERFACE_MODE_NA ; + *max_caps =0 ; + +for_each_set_bit (interface, config->supported_interfaces, +PHY_INTERFACE_MODE_MAX ) { + caps = config->mac_capabilities & +phylink_interface_to_caps (interface); +if (caps > *max_caps) { + *max_caps = caps; + *max_interface = interface; + } + } +} + +static struct fwnode_handle *dsa_port_get_fwnode (struct dsa_port *dp, +phy_interface_t mode) +{ +struct property_entry fixed_link_props[3 ] = { }; +struct property_entry port_props[3 ] = {}; +struct fwnode_handle *fixed_link_fwnode; +struct fwnode_handle *new_port_fwnode; +struct device_node *dn = dp->dn; +struct device_node *phy_node; +int err, speed, duplex; +unsigned long caps; + + phy_node =of_parse_phandle (dn,"phy-handle" ,0 ); +of_node_put (phy_node); +if (phy_node ||of_phy_is_fixed_link (dn)) +/* Nothing broken, nothing to fix. +* TODO: As discussed with Russell, maybe phylink could provide +* a more comprehensive helper to determine what constitutes a +* valid fwnode binding than this guerilla kludge. +*/ +return of_fwnode_handle (dn); + +if (mode ==PHY_INTERFACE_MODE_NA ) +dsa_port_find_max_caps (dp, &mode, &caps); +else + caps = dp->pl_config.mac_capabilities & +phylink_interface_to_caps (mode); + + err =dsa_port_find_max_speed (caps, &speed, &duplex); +if (err) +return ERR_PTR (err); + + fixed_link_props[0 ] =PROPERTY_ENTRY_U32 ("speed" , speed); +if (duplex ==DUPLEX_FULL ) + fixed_link_props[1 ] =PROPERTY_ENTRY_BOOL ("full-duplex" ); + + port_props[0 ] =PROPERTY_ENTRY_STRING ("phy-mode" ,phy_modes (mode)); + + new_port_fwnode =fwnode_create_software_node (port_props,NULL ); +if (IS_ERR (new_port_fwnode)) +return new_port_fwnode; + +/* Node needs to be named so that phylink's call to +* fwnode_get_named_child_node() finds it. +*/ + fixed_link_fwnode =fwnode_create_named_software_node (fixed_link_props, + new_port_fwnode, +"fixed-link" ); +if (IS_ERR (fixed_link_fwnode)) { +fwnode_remove_software_node (new_port_fwnode); +return fixed_link_fwnode; + } + +return new_port_fwnode; +} +int dsa_port_phylink_create (struct dsa_port *dp) {struct dsa_switch *ds = dp->ds;phy_interface_t mode, def_mode; +struct fwnode_handle *fwnode;int err;/* Presence of phylink_mac_link_state or phylink_mac_an_restart is
@@ -1552,8 +1673,19 @@ int dsa_port_phylink_create(struct dsa_port *dp) mode =PHY_INTERFACE_MODE_NA ; } - dp->pl =phylink_create (&dp->pl_config,of_fwnode_handle (dp->dn), - mode, &dsa_port_phylink_mac_ops); + fwnode =dsa_port_get_fwnode (dp, mode); +if (IS_ERR (fwnode)) { +dev_err (ds->dev, +"Failed to get fwnode for port %d: %pe\n" , + dp->index, fwnode); +return PTR_ERR (fwnode); + } + + dp->pl =phylink_create (&dp->pl_config, fwnode, mode, + &dsa_port_phylink_mac_ops); + +fwnode_remove_software_node (fwnode); +if (IS_ERR (dp->pl)) {pr_err ("error creating PHYLINK: %ld\n" ,PTR_ERR (dp->pl));return PTR_ERR (dp->pl);
@@ -1663,20 +1795,14 @@ static int dsa_port_phylink_register(struct dsa_port *dp)int dsa_port_link_register_of (struct dsa_port *dp) {struct dsa_switch *ds = dp->ds; -struct device_node *phy_np;int port = dp->index;if (!ds->ops->adjust_link) { - phy_np =of_parse_phandle (dp->dn,"phy-handle" ,0 ); -if (of_phy_is_fixed_link (dp->dn) || phy_np) { -if (ds->ops->phylink_mac_link_down) - ds->ops->phylink_mac_link_down (ds, port, -MLO_AN_FIXED ,PHY_INTERFACE_MODE_NA ); -of_node_put (phy_np); -return dsa_port_phylink_register (dp); - } -of_node_put (phy_np); -return 0 ; +if (ds->ops->phylink_mac_link_down) + ds->ops->phylink_mac_link_down (ds, port,MLO_AN_FIXED , +PHY_INTERFACE_MODE_NA ); + +return dsa_port_phylink_register (dp); } dev_warn(ds->dev,
Signature · 1 line
2.30.2
Re: [PATCH RFC net-next v2 5/6] net: dsa: create swnode fixed-link if using default params
Quoted 6 lines · On Wed, 13 Jul 2022 15:08:03 +0100 "Russell King (Oracle)"…
Create and use a swnode fixed-link specification for phylink if no parameters are given in DT for a fixed-link. This allows phylink to be used for "default" cases for DSA and CPU ports.
Signed-off-by Vladimir Oltean <[email protected]>Signed-off-by Russell King (Oracle) <[email protected]>
Reviewed-by Marek Behún <[email protected]>
RFC PATCH v2 6/6 net: dsa: mv88e6xxx: remove handling for DSA and CPU ports
In reply to Russell King (Oracle)As we now always use a fixed-link for DSA and CPU ports, we no longer need the hack in the Marvell code to make this work. Remove it.
This is especially important with the conversion of DSA drivers to phylink_pcs, as the PCS code only gets called if we are using phylink for the port.
Signed-off-by Russell King (Oracle) <[email protected]>
--- drivers/net/dsa/mv88e6xxx/chip.c | 49 +++----------------------------- drivers/net/dsa/mv88e6xxx/chip.h | 3 -- drivers/net/dsa/mv88e6xxx/port.c | 32 --------------------- drivers/net/dsa/mv88e6xxx/port.h | 5 ---- 4 files changed, 4 insertions(+), 85 deletions(-)
drivers/net/dsa/mv88e6xxx/chip.c +4 -45
@@ -3314,9 +3314,8 @@ static int mv88e6xxx_setup_port(struct mv88e6xxx_chip *chip, int port) {struct device_node *phy_handle =NULL ;struct dsa_switch *ds = chip->ds; -phy_interface_t mode;struct dsa_port *dp; -int tx_amp, speed; +int tx_amp;int err;u16 reg;
@@ -3325,40 +3324,9 @@ static int mv88e6xxx_setup_port(struct mv88e6xxx_chip *chip, int port) dp =dsa_to_port (ds, port); -/* MAC Forcing register: don't force link, speed, duplex or flow control -* state to any particular values on physical ports, but force the CPU -* port and all DSA ports to their maximum bandwidth and full duplex. -*/ -if (dsa_is_cpu_port (ds, port) ||dsa_is_dsa_port (ds, port)) { -unsigned long caps = dp->pl_config.mac_capabilities; - -if (chip->info->ops->port_max_speed_mode) - mode = chip->info->ops->port_max_speed_mode (port); -else - mode =PHY_INTERFACE_MODE_NA ; - -if (caps &MAC_10000FD ) - speed =SPEED_10000 ; -else if (caps &MAC_5000FD ) - speed =SPEED_5000 ; -else if (caps &MAC_2500FD ) - speed =SPEED_2500 ; -else if (caps &MAC_1000 ) - speed =SPEED_1000 ; -else if (caps &MAC_100 ) - speed =SPEED_100 ; -else - speed =SPEED_10 ; - - err =mv88e6xxx_port_setup_mac (chip, port,LINK_FORCED_UP , - speed,DUPLEX_FULL , -PAUSE_OFF , mode); - }else { - err =mv88e6xxx_port_setup_mac (chip, port,LINK_UNFORCED , -SPEED_UNFORCED ,DUPLEX_UNFORCED , -PAUSE_ON , -PHY_INTERFACE_MODE_NA ); - } + err =mv88e6xxx_port_setup_mac (chip, port,LINK_UNFORCED , +SPEED_UNFORCED ,DUPLEX_UNFORCED , +PAUSE_ON ,PHY_INTERFACE_MODE_NA );if (err)return err;
@@ -4306,7 +4274,6 @@ static const struct mv88e6xxx_ops mv88e6141_ops = { .port_sync_link = mv88e6xxx_port_sync_link, .port_set_rgmii_delay = mv88e6390_port_set_rgmii_delay, .port_set_speed_duplex = mv88e6341_port_set_speed_duplex, - .port_max_speed_mode = mv88e6341_port_max_speed_mode, .port_tag_remap = mv88e6095_port_tag_remap, .port_set_policy = mv88e6352_port_set_policy, .port_set_frame_mode = mv88e6351_port_set_frame_mode,
@@ -4699,7 +4666,6 @@ static const struct mv88e6xxx_ops mv88e6190_ops = { .port_sync_link = mv88e6xxx_port_sync_link, .port_set_rgmii_delay = mv88e6390_port_set_rgmii_delay, .port_set_speed_duplex = mv88e6390_port_set_speed_duplex, - .port_max_speed_mode = mv88e6390_port_max_speed_mode, .port_tag_remap = mv88e6390_port_tag_remap, .port_set_policy = mv88e6352_port_set_policy, .port_set_frame_mode = mv88e6351_port_set_frame_mode,
@@ -4762,7 +4728,6 @@ static const struct mv88e6xxx_ops mv88e6190x_ops = { .port_sync_link = mv88e6xxx_port_sync_link, .port_set_rgmii_delay = mv88e6390_port_set_rgmii_delay, .port_set_speed_duplex = mv88e6390x_port_set_speed_duplex, - .port_max_speed_mode = mv88e6390x_port_max_speed_mode, .port_tag_remap = mv88e6390_port_tag_remap, .port_set_policy = mv88e6352_port_set_policy, .port_set_frame_mode = mv88e6351_port_set_frame_mode,
@@ -4825,7 +4790,6 @@ static const struct mv88e6xxx_ops mv88e6191_ops = { .port_sync_link = mv88e6xxx_port_sync_link, .port_set_rgmii_delay = mv88e6390_port_set_rgmii_delay, .port_set_speed_duplex = mv88e6390_port_set_speed_duplex, - .port_max_speed_mode = mv88e6390_port_max_speed_mode, .port_tag_remap = mv88e6390_port_tag_remap, .port_set_frame_mode = mv88e6351_port_set_frame_mode, .port_set_ucast_flood = mv88e6352_port_set_ucast_flood,
@@ -4990,7 +4954,6 @@ static const struct mv88e6xxx_ops mv88e6290_ops = { .port_sync_link = mv88e6xxx_port_sync_link, .port_set_rgmii_delay = mv88e6390_port_set_rgmii_delay, .port_set_speed_duplex = mv88e6390_port_set_speed_duplex, - .port_max_speed_mode = mv88e6390_port_max_speed_mode, .port_tag_remap = mv88e6390_port_tag_remap, .port_set_policy = mv88e6352_port_set_policy, .port_set_frame_mode = mv88e6351_port_set_frame_mode,
@@ -5141,7 +5104,6 @@ static const struct mv88e6xxx_ops mv88e6341_ops = { .port_sync_link = mv88e6xxx_port_sync_link, .port_set_rgmii_delay = mv88e6390_port_set_rgmii_delay, .port_set_speed_duplex = mv88e6341_port_set_speed_duplex, - .port_max_speed_mode = mv88e6341_port_max_speed_mode, .port_tag_remap = mv88e6095_port_tag_remap, .port_set_policy = mv88e6352_port_set_policy, .port_set_frame_mode = mv88e6351_port_set_frame_mode,
@@ -5364,7 +5326,6 @@ static const struct mv88e6xxx_ops mv88e6390_ops = { .port_sync_link = mv88e6xxx_port_sync_link, .port_set_rgmii_delay = mv88e6390_port_set_rgmii_delay, .port_set_speed_duplex = mv88e6390_port_set_speed_duplex, - .port_max_speed_mode = mv88e6390_port_max_speed_mode, .port_tag_remap = mv88e6390_port_tag_remap, .port_set_policy = mv88e6352_port_set_policy, .port_set_frame_mode = mv88e6351_port_set_frame_mode,
@@ -5431,7 +5392,6 @@ static const struct mv88e6xxx_ops mv88e6390x_ops = { .port_sync_link = mv88e6xxx_port_sync_link, .port_set_rgmii_delay = mv88e6390_port_set_rgmii_delay, .port_set_speed_duplex = mv88e6390x_port_set_speed_duplex, - .port_max_speed_mode = mv88e6390x_port_max_speed_mode, .port_tag_remap = mv88e6390_port_tag_remap, .port_set_policy = mv88e6352_port_set_policy, .port_set_frame_mode = mv88e6351_port_set_frame_mode,
@@ -5497,7 +5457,6 @@ static const struct mv88e6xxx_ops mv88e6393x_ops = { .port_sync_link = mv88e6xxx_port_sync_link, .port_set_rgmii_delay = mv88e6390_port_set_rgmii_delay, .port_set_speed_duplex = mv88e6393x_port_set_speed_duplex, - .port_max_speed_mode = mv88e6393x_port_max_speed_mode, .port_tag_remap = mv88e6390_port_tag_remap, .port_set_policy = mv88e6393x_port_set_policy, .port_set_frame_mode = mv88e6351_port_set_frame_mode,
drivers/net/dsa/mv88e6xxx/chip.h +0 -3
@@ -502,9 +502,6 @@ struct mv88e6xxx_ops {int (*port_set_speed_duplex)(struct mv88e6xxx_chip *chip,int port,int speed,int duplex); -/* What interface mode should be used for maximum speed? */ -phy_interface_t (*port_max_speed_mode)(int port); -int (*port_tag_remap)(struct mv88e6xxx_chip *chip,int port); int (*port_set_policy)(struct mv88e6xxx_chip *chip, int port,
drivers/net/dsa/mv88e6xxx/port.c +0 -32
@@ -333,14 +333,6 @@ int mv88e6341_port_set_speed_duplex(struct mv88e6xxx_chip *chip, int port, duplex); } -phy_interface_t mv88e6341_port_max_speed_mode (int port) -{ -if (port ==5 ) -return PHY_INTERFACE_MODE_2500BASEX ; - -return PHY_INTERFACE_MODE_NA ; -} -/* Support 10, 100, 200, 1000 Mbps (e.g. 88E6352 family) */ int mv88e6352_port_set_speed_duplex (struct mv88e6xxx_chip *chip,int port,int speed,int duplex)
@@ -372,14 +364,6 @@ int mv88e6390_port_set_speed_duplex(struct mv88e6xxx_chip *chip, int port, duplex); } -phy_interface_t mv88e6390_port_max_speed_mode (int port) -{ -if (port ==9 || port ==10 ) -return PHY_INTERFACE_MODE_2500BASEX ; - -return PHY_INTERFACE_MODE_NA ; -} -/* Support 10, 100, 200, 1000, 2500, 10000 Mbps (e.g. 88E6190X) */ int mv88e6390x_port_set_speed_duplex (struct mv88e6xxx_chip *chip,int port,int speed,int duplex)
@@ -394,14 +378,6 @@ int mv88e6390x_port_set_speed_duplex(struct mv88e6xxx_chip *chip, int port, duplex); } -phy_interface_t mv88e6390x_port_max_speed_mode (int port) -{ -if (port ==9 || port ==10 ) -return PHY_INTERFACE_MODE_XAUI ; - -return PHY_INTERFACE_MODE_NA ; -} -/* Support 10, 100, 200, 1000, 2500, 5000, 10000 Mbps (e.g. 88E6393X) * Function mv88e6xxx_port_set_speed_duplex() can't be used as the register * values for speeds 2500 & 5000 conflict.
@@ -491,14 +467,6 @@ int mv88e6393x_port_set_speed_duplex(struct mv88e6xxx_chip *chip, int port,return 0 ; } -phy_interface_t mv88e6393x_port_max_speed_mode (int port) -{ -if (port ==0 || port ==9 || port ==10 ) -return PHY_INTERFACE_MODE_10GBASER ; - -return PHY_INTERFACE_MODE_NA ; -} -static int mv88e6xxx_port_set_cmode (struct mv88e6xxx_chip *chip,int port,phy_interface_t mode,bool force) {
drivers/net/dsa/mv88e6xxx/port.h +0 -5
@@ -357,11 +357,6 @@ int mv88e6390x_port_set_speed_duplex(struct mv88e6xxx_chip *chip, int port,int mv88e6393x_port_set_speed_duplex (struct mv88e6xxx_chip *chip,int port,int speed,int duplex); -phy_interface_t mv88e6341_port_max_speed_mode (int port); -phy_interface_t mv88e6390_port_max_speed_mode (int port); -phy_interface_t mv88e6390x_port_max_speed_mode (int port); -phy_interface_t mv88e6393x_port_max_speed_mode (int port); -int mv88e6xxx_port_set_state (struct mv88e6xxx_chip *chip,int port,u8 state);int mv88e6xxx_port_set_vlan_map (struct mv88e6xxx_chip *chip,int port,u16 map);
Signature · 1 line
2.30.2
Re: [PATCH RFC net-next v2 6/6] net: dsa: mv88e6xxx: remove handling for DSA and CPU ports
Quoted 8 lines · On Wed, 13 Jul 2022 15:08:08 +0100 "Russell King (Oracle)"…
As we now always use a fixed-link for DSA and CPU ports, we no longer need the hack in the Marvell code to make this work. Remove it.
This is especially important with the conversion of DSA drivers to
phylink_pcs, as the PCS code only gets called if we are using phylink for the port.Signed-off-by Russell King (Oracle) <[email protected]>
Reviewed-by Marek Behún <[email protected]>
Hi,
śr., 13 lip 2022 o 16:16 Russell King (Oracle) <[email protected]> napisał(a):
Quoted 27 lines
Hi,
This is a re-hash of the previous RFC series, this time using the suggestion from Vladimir to create a swnode based fixed-link specifier.
Most of the changes are to DSA and phylink code from the previous series. I've tested on my Clearfog (which has just one Marvell DSA switch) and it works there - also tested without the fixed-link specified in DT.
drivers/base/swnode.c | 14 ++- drivers/net/dsa/b53/b53_common.c | 3 +- drivers/net/dsa/bcm_sf2.c | 3 +- drivers/net/dsa/hirschmann/hellcreek.c | 3 +- drivers/net/dsa/lantiq_gswip.c | 6 +- drivers/net/dsa/microchip/ksz_common.c | 3 +- drivers/net/dsa/mt7530.c | 3 +- drivers/net/dsa/mv88e6xxx/chip.c | 134 ++++++++++++------------- drivers/net/dsa/mv88e6xxx/chip.h | 6 +- drivers/net/dsa/mv88e6xxx/port.c | 32 ------ drivers/net/dsa/mv88e6xxx/port.h | 5 - drivers/net/dsa/ocelot/felix.c | 3 +- drivers/net/dsa/qca/ar9331.c | 3 +- drivers/net/dsa/qca8k.c | 3 +- drivers/net/dsa/realtek/rtl8365mb.c | 3 +-
Quoted 9 lines
drivers/net/dsa/sja1105/sja1105_main.c | 3 +- drivers/net/dsa/xrs700x/xrs700x.c | 3 +- drivers/net/phy/phylink.c | 30 ++++-- include/linux/phylink.h | 1 + include/linux/property.h | 4 + include/net/dsa.h | 3 +- net/dsa/port.c | 175 +++++++++++++++++++++++++++++---- 22 files changed, 290 insertions(+), 153 deletions(-)
I tested the patchset on top of net-next/master alone and with my fwnode_/ACPI patchset:
* On EspressoBIN
* On SolidRun CN913x CEx7 Eval Board
- with DT (with and without fixed-link description in CPU port)
- with ACPI (with and without fixed-link description in CPU port)
All works as expected, so:
Tested-by Marcin Wojtas <[email protected]>
FWIW, the patches LGTM:
Reviewed-by Marcin Wojtas <[email protected]>
Best regards,
Marcin