Netronix embedded controller driver for Kobo and Tolino ebook readers

The Netronix embedded controller is a microcontroller found in some e-book readers designed by the original design manufacturer Netronix, Inc. It contains RTC, battery monitoring, system power management, and PWM functionality.

This driver implements register access and version detection.

Third-party hardware documentation is available at:

https://github.com/neuschaefer/linux/wiki/Netronix-MSP430-embedded-controller

The EC supports interrupts, but the driver doesn't make use of them so far.

Signed-off-by Jonathan Neuschäfer <[email protected]>

---

v4:
- include asm/unaligned.h after linux/*
- Use put_unaligned_be16 instead of open-coded big-endian packing
- Clarify that 0x90=0xff00 causes an error in downstream kernel too
- Add commas after non-sentinel positions
- ntxec.h: declare structs device and regmap
- Replace WARN_ON usage and add comments to explain errors
- Replace dev_alert with dev_warn when the result isn't handled
- Change subdevice registration error message to dev_err
- Declare ntxec_reg8 as returning __be16
- Restructure version detection code
- Spell out ODM

v3:
- https://lore.kernel.org/lkml/[email protected]/
- Add (EC) to CONFIG_MFD_NTXEC prompt
- Relicense as GPLv2 or later
- Add email address to copyright line
- remove empty lines in ntxec_poweroff and ntxec_restart functions
- Split long lines
- Remove 'Install ... handler' comments
- Make naming of struct i2c_client parameter consistent
- Remove struct ntxec_info
- Rework 'depends on' lines in Kconfig, hard-depend on I2C, select REGMAP_I2C and MFD_CORE
- Register subdevices via mfd_cells
- Move 8-bit register conversion to ntxec.h

v2:
- https://lore.kernel.org/lkml/[email protected]/
- Add a description of the device to the patch text
- Unify spelling as 'Netronix embedded controller'.
'Netronix' is the proper name of the manufacturer, but 'embedded controller' is just a label that I have assigned to the device.
- Switch to regmap, avoid regmap use in poweroff and reboot handlers. Inspired by cf84dc0bb40f4 ("mfd: rn5t618: Make restart handler atomic safe")
- Use a list of known-working firmware versions instead of checking for a known-incompatible version
- Prefix registers with NTXEC_REG_
- Define register values as constants
- Various style cleanups as suggested by Lee Jones
- Don't align = signs in struct initializers [Uwe Kleine-König]
- Don't use dev_dbg for an error message
- Explain sleep in poweroff handler
- Remove (struct ntxec).client
- Switch to .probe_new in i2c driver
- Add .remove callback
- Make CONFIG_MFD_NTXEC a tristate option

---
 drivers/mfd/Kconfig       |  11 ++
 drivers/mfd/Makefile      |   1 +
 drivers/mfd/ntxec.c       | 216 ++++++++++++++++++++++++++++++++++++++
 include/linux/mfd/ntxec.h |  34 ++++++
 4 files changed, 262 insertions(+)
 create mode 100644 drivers/mfd/ntxec.c
 create mode 100644 include/linux/mfd/ntxec.h

drivers/mfd/Kconfig +11 -0

index 8b99a13669bfc..d96751f884dc6 100644
@@ -990,6 +990,17 @@ config MFD_VIPERBOARD
 	  You need to select the mfd cell drivers separately.
 	  The drivers do not support all features the board exposes.
 
+config MFD_NTXEC
+	tristate "Netronix embedded controller (EC)"
+	depends on OF || COMPILE_TEST
+	depends on I2C
+	select REGMAP_I2C
+	select MFD_CORE
+	help
+	  Say yes here if you want to support the embedded controller found in
+	  certain e-book readers designed by the original design manufacturer
+	  Netronix.
+
 config MFD_RETU
 	tristate "Nokia Retu and Tahvo multi-function device"
 	select MFD_CORE

drivers/mfd/Makefile +1 -0

index 1780019d24748..815c99b84019e 100644
@@ -218,6 +218,7 @@ obj-$(CONFIG_MFD_INTEL_MSIC)	+= intel_msic.o
 obj-$(CONFIG_MFD_INTEL_PMC_BXT)	+= intel_pmc_bxt.o
 obj-$(CONFIG_MFD_PALMAS)	+= palmas.o
 obj-$(CONFIG_MFD_VIPERBOARD)    += viperboard.o
+obj-$(CONFIG_MFD_NTXEC)		+= ntxec.o
 obj-$(CONFIG_MFD_RC5T583)	+= rc5t583.o rc5t583-irq.o
 obj-$(CONFIG_MFD_RK808)		+= rk808.o
 obj-$(CONFIG_MFD_RN5T618)	+= rn5t618.o

drivers/mfd/ntxec.c new file +129 -0

new file mode 100644
index 0000000000000..c1510711d7363
@@ -0,0 +1,216 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+/*
+ * The Netronix embedded controller is a microcontroller found in some
+ * e-book readers designed by the original design manufacturer Netronix, Inc.
+ * It contains RTC, battery monitoring, system power management, and PWM
+ * functionality.
+ *
+ * This driver implements register access, version detection, and system
+ * power-off/reset.
+ *
+ * Copyright 2020 Jonathan Neuschäfer <[email protected]>
+ */
+
+#include <linux/delay.h>
+#include <linux/errno.h>
+#include <linux/i2c.h>
+#include <linux/mfd/core.h>
+#include <linux/mfd/ntxec.h>
+#include <linux/module.h>
+#include <linux/pm.h>
+#include <linux/reboot.h>
+#include <linux/regmap.h>
+#include <linux/types.h>
+#include <asm/unaligned.h>
+
+#define NTXEC_REG_VERSION	0x00
+#define NTXEC_REG_POWEROFF	0x50
+#define NTXEC_REG_POWERKEEP	0x70
+#define NTXEC_REG_RESET		0x90
+
+#define NTXEC_POWEROFF_VALUE	0x0100
+#define NTXEC_POWERKEEP_VALUE	0x0800
+#define NTXEC_RESET_VALUE	0xff00
+
+static struct i2c_client *poweroff_restart_client;
+
+static void ntxec_poweroff(void)
+{
+	int res;
+	u8 buf[3] = { NTXEC_REG_POWEROFF };
+	struct i2c_msg msgs[] = {
+		{
+			.addr = poweroff_restart_client->addr,
+			.flags = 0,
+			.len = sizeof(buf),
+			.buf = buf,
+		},
+	};
+
+	put_unaligned_be16(NTXEC_POWEROFF_VALUE, buf + 1);
+
+	res = i2c_transfer(poweroff_restart_client->adapter, msgs, ARRAY_SIZE(msgs));
+	if (res < 0)
+		dev_warn(&poweroff_restart_client->dev,
+			 "Failed to power off (err = %d)\n", res);
+
+	/*
+	 * The time from the register write until the host CPU is powered off
+	 * has been observed to be about 2.5 to 3 seconds. Sleep long enough to
+	 * safely avoid returning from the poweroff handler.
+	 */
+	msleep(5000);
+}
+
+static int ntxec_restart(struct notifier_block *nb,
+			 unsigned long action, void *data)
+{
+	int res;
+	u8 buf[3] = { NTXEC_REG_RESET };
+	/*
+	 * NOTE: The lower half of the reset value is not sent, because sending
+	 * it causes an I2C error. (The reset handler in the downstream driver
+	 * does send the full two-byte value, but doesn't check the result).
+	 */
+	struct i2c_msg msgs[] = {
+		{
+			.addr = poweroff_restart_client->addr,
+			.flags = 0,
+			.len = sizeof(buf) - 1,
+			.buf = buf,
+		},
+	};
+
+	put_unaligned_be16(NTXEC_RESET_VALUE, buf + 1);
+
+	res = i2c_transfer(poweroff_restart_client->adapter, msgs, ARRAY_SIZE(msgs));
+	if (res < 0)
+		dev_warn(&poweroff_restart_client->dev,
+			 "Failed to restart (err = %d)\n", res);
+
+	return NOTIFY_DONE;
+}
+
+static struct notifier_block ntxec_restart_handler = {
+	.notifier_call = ntxec_restart,
+	.priority = 128,
+};
+
+static const struct regmap_config regmap_config = {
+	.name = "ntxec",
+	.reg_bits = 8,
+	.val_bits = 16,
+	.cache_type = REGCACHE_NONE,
+	.val_format_endian = REGMAP_ENDIAN_BIG,
+};
+
+static const struct mfd_cell ntxec_subdevices[] = {
+	{ .name = "ntxec-rtc" },
+	{ .name = "ntxec-pwm" },
+};
+
+static int ntxec_probe(struct i2c_client *client)
+{
+	struct ntxec *ec;
+	unsigned int version;
+	int res;
+
+	ec = devm_kmalloc(&client->dev, sizeof(*ec), GFP_KERNEL);
+	if (!ec)
+		return -ENOMEM;
+
+	ec->dev = &client->dev;
+
+	ec->regmap = devm_regmap_init_i2c(client, &regmap_config);
+	if (IS_ERR(ec->regmap)) {
+		dev_err(ec->dev, "Failed to set up regmap for device\n");
+		return res;
+	}
+

Quoted 73 lines · Jonathan Neuschäfer

The Netronix embedded controller is a microcontroller found in some e-book readers designed by the original design manufacturer Netronix, Inc. It contains RTC, battery monitoring, system power management, and PWM functionality.

This driver implements register access and version detection.

Third-party hardware documentation is available at:

https://github.com/neuschaefer/linux/wiki/Netronix-MSP430-embedded-controller

The EC supports interrupts, but the driver doesn't make use of them so far.

Signed-off-by Jonathan Neuschäfer <[email protected]>

---

v4:
- include asm/unaligned.h after linux/*
- Use put_unaligned_be16 instead of open-coded big-endian packing
- Clarify that 0x90=0xff00 causes an error in downstream kernel too
- Add commas after non-sentinel positions
- ntxec.h: declare structs device and regmap
- Replace WARN_ON usage and add comments to explain errors
- Replace dev_alert with dev_warn when the result isn't handled
- Change subdevice registration error message to dev_err
- Declare ntxec_reg8 as returning __be16
- Restructure version detection code
- Spell out ODM

v3:
- https://lore.kernel.org/lkml/[email protected]/
- Add (EC) to CONFIG_MFD_NTXEC prompt
- Relicense as GPLv2 or later
- Add email address to copyright line
- remove empty lines in ntxec_poweroff and ntxec_restart functions
- Split long lines
- Remove 'Install ... handler' comments
- Make naming of struct i2c_client parameter consistent
- Remove struct ntxec_info
- Rework 'depends on' lines in Kconfig, hard-depend on I2C, select REGMAP_I2C and MFD_CORE
- Register subdevices via mfd_cells
- Move 8-bit register conversion to ntxec.h

v2:
- https://lore.kernel.org/lkml/[email protected]/
- Add a description of the device to the patch text
- Unify spelling as 'Netronix embedded controller'.
'Netronix' is the proper name of the manufacturer, but 'embedded controller' is just a label that I have assigned to the device.
- Switch to regmap, avoid regmap use in poweroff and reboot handlers. Inspired by cf84dc0bb40f4 ("mfd: rn5t618: Make restart handler atomic safe")
- Use a list of known-working firmware versions instead of checking for a known-incompatible version
- Prefix registers with NTXEC_REG_
- Define register values as constants
- Various style cleanups as suggested by Lee Jones
- Don't align = signs in struct initializers [Uwe Kleine-König]
- Don't use dev_dbg for an error message
- Explain sleep in poweroff handler
- Remove (struct ntxec).client
- Switch to .probe_new in i2c driver
- Add .remove callback
- Make CONFIG_MFD_NTXEC a tristate option

---
 drivers/mfd/Kconfig       |  11 ++
 drivers/mfd/Makefile      |   1 +
 drivers/mfd/ntxec.c       | 216 ++++++++++++++++++++++++++++++++++++++
 include/linux/mfd/ntxec.h |  34 ++++++
 4 files changed, 262 insertions(+)
 create mode 100644 drivers/mfd/ntxec.c
 create mode 100644 include/linux/mfd/ntxec.h

drivers/mfd/ntxec.c line 139

Quoted 3 lines

drivers/mfd/ntxec.c new file +3 -0

+	/* Bail out if we encounter an unknown firmware version */
+	switch (version) {
+	case 0xd726: /* found in Kobo Aura */

No magic numbers.

Please submit a subsequent patch to define this.

drivers/mfd/ntxec.c line 146

Quoted 7 lines

drivers/mfd/ntxec.c new file +7 -0

+		break;
+	default:
+		dev_err(ec->dev,
+			"Netronix embedded controller version %04x is not supported.\n",
+			version);
+		return -ENODEV;
+	}

Applied, thanks.

On Sun, 22 Nov 2020, Jonathan Neuschäfer wrote:

drivers/mfd/ntxec.c line 139

Quoted 3 lines

drivers/mfd/ntxec.c new file +3 -0

+	/* Bail out if we encounter an unknown firmware version */
+	switch (version) {
+	case 0xd726: /* found in Kobo Aura */

No magic numbers.

Please submit a subsequent patch to define this.

Quoted 1 line · Lee Jones

On Sun, 22 Nov 2020, Jonathan Neuschäfer wrote:

[...]

Quoted 7 lines

drivers/mfd/ntxec.c line 139

Quoted 3 lines

drivers/mfd/ntxec.c new file +3 -0

+	/* Bail out if we encounter an unknown firmware version */
+	switch (version) {
+	case 0xd726: /* found in Kobo Aura */

No magic numbers.

Please submit a subsequent patch to define this.

Will do.

But I don't think I'll be able to give it a more meaningful name than NTXEC_VERSION_D726. I don't have a good overview of which versions appear in which devices. "0xd726 found in Kobo Aura" only means that; I don't know if it's the only version used in the Kobo Aura, and I don't know if the Kobo Aura is the only device where it is used.

Quoted 11 lines · Jonathan Neuschäfer

Quoted 1 line · Lee Jones

On Sun, 22 Nov 2020, Jonathan Neuschäfer wrote:

[...]

Quoted 7 lines

drivers/mfd/ntxec.c line 139

Quoted 3 lines

drivers/mfd/ntxec.c new file +3 -0

+	/* Bail out if we encounter an unknown firmware version */
+	switch (version) {
+	case 0xd726: /* found in Kobo Aura */

No magic numbers.

Please submit a subsequent patch to define this.

Quoted 7 lines

Will do.

But I don't think I'll be able to give it a more meaningful name than NTXEC_VERSION_D726. I don't have a good overview of which versions appear in which devices. "0xd726 found in Kobo Aura" only means that; I don't know if it's the only version used in the Kobo Aura, and I don't know if the Kobo Aura is the only device where it is used.

Defines are not set in stone.

They can evolve over time as more is known.

NTXEC_KOBO_AURA would be fine for now.

The Netronix EC provides a PWM output which is used for the backlight on some ebook readers. This patches adds a driver for the PWM output.

The .get_state callback is not implemented, because the PWM state can't be read back from the hardware.

Signed-off-by Jonathan Neuschäfer <[email protected]>

---

v4:
- Document hardware/driver limitations
- Only accept normal polarity
- Fix a typo ("zone" -> "zero")
- change MAX_PERIOD_NS to 0xffff * 125
- Clamp period to the maximum rather than returning an error
- Rename private struct pointer to priv
- Rearrage control flow in _probe to save a few lines and a temporary variable
- Add missing MODULE_ALIAS line
- Spell out ODM

v3:
- https://lore.kernel.org/lkml/[email protected]/
- Relicense as GPLv2 or later
- Add email address to copyright line
- Remove OF compatible string and don't include linux/of_device.h
- Fix bogus ?: in return line
- Don't use a comma after sentinels
- Avoid ret |= ... pattern
- Move 8-bit register conversion to ntxec.h

v2:
- https://lore.kernel.org/lkml/[email protected]/
- Various grammar and style improvements, as suggested by Uwe Kleine-König, Lee Jones, and Alexandre Belloni
- Switch to regmap
- Prefix registers with NTXEC_REG_
- Add help text to the Kconfig option
- Use the .apply callback instead of the old API
- Add a #define for the time base (125ns)
- Don't change device state in .probe; this avoids multiple problems
- Rework division and overflow check logic to perform divisions in 32 bits
- Avoid setting duty cycle to zero, to work around a hardware quirk

---
 drivers/pwm/Kconfig     |   8 ++
 drivers/pwm/Makefile    |   1 +
 drivers/pwm/pwm-ntxec.c | 166 ++++++++++++++++++++++++++++++++++++++++
 3 files changed, 175 insertions(+)
 create mode 100644 drivers/pwm/pwm-ntxec.c

drivers/pwm/Kconfig +8 -0

index 63be5362fd3a5..815f329ed5b46 100644
@@ -350,6 +350,14 @@ config PWM_MXS
 	  To compile this driver as a module, choose M here: the module
 	  will be called pwm-mxs.
 
+config PWM_NTXEC
+	tristate "Netronix embedded controller PWM support"
+	depends on MFD_NTXEC
+	help
+	  Say yes here if you want to support the PWM output of the embedded
+	  controller found in certain e-book readers designed by the original
+	  design manufacturer Netronix.
+
 config PWM_OMAP_DMTIMER
 	tristate "OMAP Dual-Mode Timer PWM support"
 	depends on OF

drivers/pwm/Makefile +1 -0

index cbdcd55d69eef..1deb29e6ae8e5 100644
@@ -32,6 +32,7 @@ obj-$(CONFIG_PWM_MESON)		+= pwm-meson.o
 obj-$(CONFIG_PWM_MEDIATEK)	+= pwm-mediatek.o
 obj-$(CONFIG_PWM_MTK_DISP)	+= pwm-mtk-disp.o
 obj-$(CONFIG_PWM_MXS)		+= pwm-mxs.o
+obj-$(CONFIG_PWM_NTXEC)		+= pwm-ntxec.o
 obj-$(CONFIG_PWM_OMAP_DMTIMER)	+= pwm-omap-dmtimer.o
 obj-$(CONFIG_PWM_PCA9685)	+= pwm-pca9685.o
 obj-$(CONFIG_PWM_PXA)		+= pwm-pxa.o

drivers/pwm/pwm-ntxec.c new file +52 -0

new file mode 100644
index 0000000000000..4f4f736d71aba
@@ -0,0 +1,166 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+/*
+ * The Netronix embedded controller is a microcontroller found in some
+ * e-book readers designed by the original design manufacturer Netronix, Inc.
+ * It contains RTC, battery monitoring, system power management, and PWM
+ * functionality.
+ *
+ * This driver implements PWM output.
+ *
+ * Copyright 2020 Jonathan Neuschäfer <[email protected]>
+ *
+ * Limitations:
+ * - The get_state callback is not implemented, because the current state of
+ *   the PWM output can't be read back from the hardware.
+ * - The hardware can only generate normal polarity output.
+ */
+
+#include <linux/mfd/ntxec.h>
+#include <linux/module.h>
+#include <linux/platform_device.h>
+#include <linux/pwm.h>
+#include <linux/regmap.h>
+#include <linux/types.h>
+
+struct ntxec_pwm {
+	struct device *dev;
+	struct ntxec *ec;
+	struct pwm_chip chip;
+};
+
+static struct ntxec_pwm *pwmchip_to_priv(struct pwm_chip *chip)
+{
+	return container_of(chip, struct ntxec_pwm, chip);
+}
+
+#define NTXEC_REG_AUTO_OFF_HI	0xa1
+#define NTXEC_REG_AUTO_OFF_LO	0xa2
+#define NTXEC_REG_ENABLE	0xa3
+#define NTXEC_REG_PERIOD_LOW	0xa4
+#define NTXEC_REG_PERIOD_HIGH	0xa5
+#define NTXEC_REG_DUTY_LOW	0xa6
+#define NTXEC_REG_DUTY_HIGH	0xa7
+
+/*
+ * The time base used in the EC is 8MHz, or 125ns. Period and duty cycle are
+ * measured in this unit.
+ */
+#define TIME_BASE_NS 125
+
+/*
+ * The maximum input value (in nanoseconds) is determined by the time base and
+ * the range of the hardware registers that hold the converted value.

drivers/pwm/pwm-ntxec.c new file +8 -0

+	int res = 0;
+
+	if (state->polarity != PWM_POLARITY_NORMAL)
+		return -EINVAL;
+
+	if (period > MAX_PERIOD_NS) {
+		period = MAX_PERIOD_NS;
+

drivers/pwm/pwm-ntxec.c new file +15 -0

+
+	/*
+	 * Writing a duty cycle of zero puts the device into a state where
+	 * writing a higher duty cycle doesn't result in the brightness that it
+	 * usually results in. This can be fixed by cycling the ENABLE register.
+	 *
+	 * As a workaround, write ENABLE=0 when the duty cycle is zero.
+	 */
+	if (state->enabled && duty != 0) {
+		res = regmap_write(priv->ec->regmap, NTXEC_REG_ENABLE, ntxec_reg8(1));
+		if (res)
+			return res;
+
+		/* Disable the auto-off timer */
+		res = regmap_write(priv->ec->regmap, NTXEC_REG_AUTO_OFF_HI, ntxec_reg8(0xff));

drivers/pwm/pwm-ntxec.c new file +48 -0

+	.owner = THIS_MODULE,
+};
+
+static int ntxec_pwm_probe(struct platform_device *pdev)
+{
+	struct ntxec *ec = dev_get_drvdata(pdev->dev.parent);
+	struct ntxec_pwm *priv;
+	struct pwm_chip *chip;
+
+	priv = devm_kzalloc(&pdev->dev, sizeof(*priv), GFP_KERNEL);
+	if (!priv)
+		return -ENOMEM;
+
+	priv->ec = ec;
+	priv->dev = &pdev->dev;
+
+	platform_set_drvdata(pdev, priv);
+
+	chip = &priv->chip;
+	chip->dev = &pdev->dev;
+	chip->ops = &ntxec_pwm_ops;
+	chip->base = -1;
+	chip->npwm = 1;
+
+	return pwmchip_add(chip);
+}
+
+static int ntxec_pwm_remove(struct platform_device *pdev)
+{
+	struct ntxec_pwm *priv = platform_get_drvdata(pdev);
+	struct pwm_chip *chip = &priv->chip;
+
+	return pwmchip_remove(chip);
+}
+
+static struct platform_driver ntxec_pwm_driver = {
+	.driver = {
+		.name = "ntxec-pwm",
+	},
+	.probe = ntxec_pwm_probe,
+	.remove = ntxec_pwm_remove,
+};
+module_platform_driver(ntxec_pwm_driver);
+
+MODULE_AUTHOR("Jonathan Neuschäfer <[email protected]>");
+MODULE_DESCRIPTION("PWM driver for Netronix EC");
+MODULE_LICENSE("GPL");
+MODULE_ALIAS("platform:ntxec-pwm");

Hello,

On Sun, Nov 22, 2020 at 11:27:36PM +0100, Jonathan Neuschäfer wrote:

Quoted 15 lines

drivers/pwm/pwm-ntxec.c new file +15 -0

+/*
+ * The time base used in the EC is 8MHz, or 125ns. Period and duty cycle are
+ * measured in this unit.
+ */
+#define TIME_BASE_NS 125
+
+/*
+ * The maximum input value (in nanoseconds) is determined by the time base and
+ * the range of the hardware registers that hold the converted value.
+ * It fits into 32 bits, so we can do our calculations in 32 bits as well.
+ */
+#define MAX_PERIOD_NS (TIME_BASE_NS * 0xffff)
+
+static int ntxec_pwm_apply(struct pwm_chip *chip, struct pwm_device *pwm_dev,
+			   const struct pwm_state *state)

drivers/pwm/pwm-ntxec.c line 62

Quoted 4 lines

drivers/pwm/pwm-ntxec.c new file +4 -0

+{
+	struct ntxec_pwm *priv = pwmchip_to_priv(pwm_dev->chip);
+	unsigned int duty = state->duty_cycle;
+	unsigned int period = state->period;

state->duty_cycle and state->period are u64, so you're losing information here. Consider state->duty_cycle = 0x100000001 and state->period = 0x200000001.

Quoted 13 lines

drivers/pwm/pwm-ntxec.c new file +13 -0

+	int res = 0;
+
+	if (state->polarity != PWM_POLARITY_NORMAL)
+		return -EINVAL;
+
+	if (period > MAX_PERIOD_NS) {
+		period = MAX_PERIOD_NS;
+
+		if (duty > period)
+			duty = period;
+	}
+
+	period /= TIME_BASE_NS;

drivers/pwm/pwm-ntxec.c line 80

Quoted 5 lines

drivers/pwm/pwm-ntxec.c new file +5 -0

+	duty /= TIME_BASE_NS;
+
+	res = regmap_write(priv->ec->regmap, NTXEC_REG_PERIOD_HIGH, ntxec_reg8(period >> 8));
+	if (res)
+		return res;

I wonder if you can add some logic to the regmap in the mfd driver such that ntxec_reg8 isn't necessary for all users.

drivers/pwm/pwm-ntxec.c line 92

Quoted 12 lines

drivers/pwm/pwm-ntxec.c new file +11 -0

+	res = regmap_write(priv->ec->regmap, NTXEC_REG_PERIOD_LOW, ntxec_reg8(period));
+	if (res)
+		return res;
+
+	res = regmap_write(priv->ec->regmap, NTXEC_REG_DUTY_HIGH, ntxec_reg8(duty >> 8));
+	if (res)
+		return res;
+
+	res = regmap_write(priv->ec->regmap, NTXEC_REG_DUTY_LOW, ntxec_reg8(duty));
+	if (res)
+		return res;

I think I already asked, but I don't remember the reply: What happens to the output between these writes? A comment here about this would be suitable.

Quoted 20 lines

drivers/pwm/pwm-ntxec.c new file +19 -0

+
+	/*
+	 * Writing a duty cycle of zero puts the device into a state where
+	 * writing a higher duty cycle doesn't result in the brightness that it
+	 * usually results in. This can be fixed by cycling the ENABLE register.
+	 *
+	 * As a workaround, write ENABLE=0 when the duty cycle is zero.
+	 */
+	if (state->enabled && duty != 0) {
+		res = regmap_write(priv->ec->regmap, NTXEC_REG_ENABLE, ntxec_reg8(1));
+		if (res)
+			return res;
+
+		/* Disable the auto-off timer */
+		res = regmap_write(priv->ec->regmap, NTXEC_REG_AUTO_OFF_HI, ntxec_reg8(0xff));
+		if (res)
+			return res;
+
+		return regmap_write(priv->ec->regmap, NTXEC_REG_AUTO_OFF_LO, ntxec_reg8(0xff));

drivers/pwm/pwm-ntxec.c line 117

Quoted 6 lines

drivers/pwm/pwm-ntxec.c new file +6 -0

+	} else {
+		return regmap_write(priv->ec->regmap, NTXEC_REG_ENABLE, ntxec_reg8(0));
+	}
+}
+
+static struct pwm_ops ntxec_pwm_ops = {

This can be const.

drivers/pwm/pwm-ntxec.c line 118

Quoted 1 line

drivers/pwm/pwm-ntxec.c new file +1 -0

+	.apply = ntxec_pwm_apply,

/*
* The current state cannot be read out, so there is no .get_state
* callback.
*/

Hmm, at least you could provice a .get_state() callback that reports the setting that was actually implemented for in the last call to .apply()?

@Thierry: Do you have concerns here? Actually it would be more effective to have a callback (like .apply()) that modfies its pwm_state accordingly. (Some drivers did that in the past, but I changed that to get an uniform behaviour in 71523d1812aca61e32e742e87ec064e3d8c615e1.) The downside is that people have to understand that concept to properly use it. I'm torn about the right approach.

Quoted 1 line · Uwe Kleine-König

On Sun, Nov 22, 2020 at 11:27:36PM +0100, Jonathan Neuschäfer wrote:

[...]

Quoted 15 lines

Quoted 15 lines

drivers/pwm/pwm-ntxec.c new file +15 -0

+/*
+ * The time base used in the EC is 8MHz, or 125ns. Period and duty cycle are
+ * measured in this unit.
+ */
+#define TIME_BASE_NS 125
+
+/*
+ * The maximum input value (in nanoseconds) is determined by the time base and
+ * the range of the hardware registers that hold the converted value.
+ * It fits into 32 bits, so we can do our calculations in 32 bits as well.
+ */
+#define MAX_PERIOD_NS (TIME_BASE_NS * 0xffff)
+
+static int ntxec_pwm_apply(struct pwm_chip *chip, struct pwm_device *pwm_dev,
+			   const struct pwm_state *state)

Quoted 8 lines

drivers/pwm/pwm-ntxec.c line 62

Quoted 4 lines

drivers/pwm/pwm-ntxec.c new file +4 -0

+{
+	struct ntxec_pwm *priv = pwmchip_to_priv(pwm_dev->chip);
+	unsigned int duty = state->duty_cycle;
+	unsigned int period = state->period;

state->duty_cycle and state->period are u64, so you're losing information here. Consider state->duty_cycle = 0x100000001 and state->period = 0x200000001.

Oh, good point, I didn't notice the truncation.

The reason I picked unsigned int was to avoid a 64-bit division; I suppose I can do something like this:

    period = (u32)period / TIME_BASE_NS;
    duty = (u32)duty / TIME_BASE_NS;

Quoted 13 lines

Quoted 13 lines

drivers/pwm/pwm-ntxec.c new file +13 -0

+	int res = 0;
+
+	if (state->polarity != PWM_POLARITY_NORMAL)
+		return -EINVAL;
+
+	if (period > MAX_PERIOD_NS) {
+		period = MAX_PERIOD_NS;
+
+		if (duty > period)
+			duty = period;
+	}
+
+	period /= TIME_BASE_NS;

Quoted 8 lines

drivers/pwm/pwm-ntxec.c line 80

Quoted 5 lines

drivers/pwm/pwm-ntxec.c new file +5 -0

+	duty /= TIME_BASE_NS;
+
+	res = regmap_write(priv->ec->regmap, NTXEC_REG_PERIOD_HIGH, ntxec_reg8(period >> 8));
+	if (res)
+		return res;

I wonder if you can add some logic to the regmap in the mfd driver such that ntxec_reg8 isn't necessary for all users.

I think that would involve:

1. adding custom register access functions to the regmap, which decide based on the register number whether a register needs 8-bit or 16-bit access. So far I have avoided information about registers into the main driver, when the registers are only used in the sub-drivers.

or

2. switching the regmap configuration to little endian, which would be advantageous for 8-bit registers, inconsequential for 16-bit registers that consist of independent high and low halves, and wrong for the 16-bit registers 0x41, which reads the battery voltage ADC value. It is also different from how the vendor kernel treats 16-bit registers.

Perhaps there is another option that I haven't considered yet.

Quoted 7 lines

Quoted 7 lines

drivers/pwm/pwm-ntxec.c new file +7 -0

+	res = regmap_write(priv->ec->regmap, NTXEC_REG_PERIOD_LOW, ntxec_reg8(period));
+	if (res)
+		return res;
+
+	res = regmap_write(priv->ec->regmap, NTXEC_REG_DUTY_HIGH, ntxec_reg8(duty >> 8));
+	if (res)
+		return res;

Quoted 8 lines

drivers/pwm/pwm-ntxec.c line 92

Quoted 4 lines

drivers/pwm/pwm-ntxec.c new file +4 -0

+
+	res = regmap_write(priv->ec->regmap, NTXEC_REG_DUTY_LOW, ntxec_reg8(duty));
+	if (res)
+		return res;

I think I already asked, but I don't remember the reply: What happens to the output between these writes? A comment here about this would be suitable.

I will add something like the following:

/*
* Changes to the period and duty cycle take effect as soon as the
* corresponding low byte is written, so the hardware may be configured
* to an inconsistent state after the period is written and before the
* duty cycle is fully written. If, in such a case, the old duty cycle
* is longer than the new period, the EC will output 100% for a moment. */

Quoted 9 lines

drivers/pwm/pwm-ntxec.c line 118

Quoted 1 line

drivers/pwm/pwm-ntxec.c new file +1 -0

+	.apply = ntxec_pwm_apply,

/*
* The current state cannot be read out, so there is no .get_state
* callback.
*/

Hmm, at least you could provice a .get_state() callback that reports the setting that was actually implemented for in the last call to .apply()?

Yes... I see two options:

1. Caching the state in the driver's private struct. I'm not completely convinced of the value, given that the information is mostly available in the PWM core already (except for the adjustments that the driver makes).

2. Writing the adjusted state back into pwm_dev->state (via pwm_set_*). This seems a bit dirty.

Quoted 6 lines

@Thierry: Do you have concerns here? Actually it would be more effective to have a callback (like .apply()) that modfies its pwm_state accordingly. (Some drivers did that in the past, but I changed that to get an uniform behaviour in 71523d1812aca61e32e742e87ec064e3d8c615e1.) The downside is that people have to understand that concept to properly use it. I'm torn about the right approach.

General guidance for such cases when the state can't be read back from the hardware would be appreciated.

Hello Jonathan,

Quoted 27 lines · Jonathan Neuschäfer

Quoted 1 line · Uwe Kleine-König

On Sun, Nov 22, 2020 at 11:27:36PM +0100, Jonathan Neuschäfer wrote:

[...]

Quoted 15 lines

Quoted 15 lines

drivers/pwm/pwm-ntxec.c new file +15 -0

+/*
+ * The time base used in the EC is 8MHz, or 125ns. Period and duty cycle are
+ * measured in this unit.
+ */
+#define TIME_BASE_NS 125
+
+/*
+ * The maximum input value (in nanoseconds) is determined by the time base and
+ * the range of the hardware registers that hold the converted value.
+ * It fits into 32 bits, so we can do our calculations in 32 bits as well.
+ */
+#define MAX_PERIOD_NS (TIME_BASE_NS * 0xffff)
+
+static int ntxec_pwm_apply(struct pwm_chip *chip, struct pwm_device *pwm_dev,
+			   const struct pwm_state *state)

Quoted 8 lines

drivers/pwm/pwm-ntxec.c line 62

Quoted 4 lines

drivers/pwm/pwm-ntxec.c new file +4 -0

+{
+	struct ntxec_pwm *priv = pwmchip_to_priv(pwm_dev->chip);
+	unsigned int duty = state->duty_cycle;
+	unsigned int period = state->period;

state->duty_cycle and state->period are u64, so you're losing information here. Consider state->duty_cycle = 0x100000001 and state->period = 0x200000001.

Quoted 7 lines

Oh, good point, I didn't notice the truncation.

The reason I picked unsigned int was to avoid a 64-bit division; I suppose I can do something like this:

    period = (u32)period / TIME_BASE_NS;
    duty = (u32)duty / TIME_BASE_NS;

You can do that after you checked period > MAX_PERIOD_NS below, yes. Something like:

	if (state->polarity != PWM_POLARITY_NORMAL)
		return -EINVAL;

	if (state->period > MAX_PERIOD_NS) {
		period = MAX_PERIOD_NS;
	else
		period = state->period;

	if (state->duty_cycle > period)
		duty_cycle = period;
	else
		duty_cycle = state->duty_cycle;

should work with even keeping the local variables as unsigned int.

Quoted 31 lines

Quoted 13 lines

Quoted 13 lines

drivers/pwm/pwm-ntxec.c new file +13 -0

+	int res = 0;
+
+	if (state->polarity != PWM_POLARITY_NORMAL)
+		return -EINVAL;
+
+	if (period > MAX_PERIOD_NS) {
+		period = MAX_PERIOD_NS;
+
+		if (duty > period)
+			duty = period;
+	}
+
+	period /= TIME_BASE_NS;

Quoted 8 lines

drivers/pwm/pwm-ntxec.c line 80

Quoted 5 lines

drivers/pwm/pwm-ntxec.c new file +5 -0

+	duty /= TIME_BASE_NS;
+
+	res = regmap_write(priv->ec->regmap, NTXEC_REG_PERIOD_HIGH, ntxec_reg8(period >> 8));
+	if (res)
+		return res;

I wonder if you can add some logic to the regmap in the mfd driver such that ntxec_reg8 isn't necessary for all users.

I think that would involve:

1. adding custom register access functions to the regmap, which decide based on the register number whether a register needs 8-bit or 16-bit access. So far I have avoided information about registers into the main driver, when the registers are only used in the sub-drivers.

or

Quoted 8 lines

2. switching the regmap configuration to little endian, which would be advantageous for 8-bit registers, inconsequential for 16-bit registers that consist of independent high and low halves, and wrong for the 16-bit registers 0x41, which reads the battery voltage ADC value. It is also different from how the vendor kernel treats 16-bit registers.

Perhaps there is another option that I haven't considered yet.

I don't know enough about regmap to teach you something here. But maybe Mark has an idea. (I promoted him from Cc: to To:, maybe he will notice.)

Quoted 18 lines

Quoted 7 lines

Quoted 7 lines

drivers/pwm/pwm-ntxec.c new file +7 -0

+	res = regmap_write(priv->ec->regmap, NTXEC_REG_PERIOD_LOW, ntxec_reg8(period));
+	if (res)
+		return res;
+
+	res = regmap_write(priv->ec->regmap, NTXEC_REG_DUTY_HIGH, ntxec_reg8(duty >> 8));
+	if (res)
+		return res;

Quoted 8 lines

drivers/pwm/pwm-ntxec.c line 92

Quoted 4 lines

drivers/pwm/pwm-ntxec.c new file +4 -0

+
+	res = regmap_write(priv->ec->regmap, NTXEC_REG_DUTY_LOW, ntxec_reg8(duty));
+	if (res)
+		return res;

I think I already asked, but I don't remember the reply: What happens to the output between these writes? A comment here about this would be suitable.

I will add something like the following:

Quoted 7 lines

/*
* Changes to the period and duty cycle take effect as soon as the
* corresponding low byte is written, so the hardware may be configured
* to an inconsistent state after the period is written and before the
* duty cycle is fully written. If, in such a case, the old duty cycle
* is longer than the new period, the EC will output 100% for a moment. */

Is the value pair taken over by hardware atomically? That is, is it really "will" in your last line, or only "might". (E.g. when changing from duty_cycle, period = 1000, 2000 to 500, 800 and a new cycle begins after reducing period, the new duty_cycle is probably written before the counter reaches 500. Do we get a 100% cycle here?)

Other than that the info is fine. Make sure to point this out in the Limitations paragraph at the top of the driver please, too.

Quoted 13 lines

Quoted 10 lines

drivers/pwm/pwm-ntxec.c line 118

Quoted 2 lines

drivers/pwm/pwm-ntxec.c new file +1 -0

+	.apply = ntxec_pwm_apply,

/*
* The current state cannot be read out, so there is no .get_state
* callback.
*/

Hmm, at least you could provice a .get_state() callback that reports the setting that was actually implemented for in the last call to .apply()?

Yes... I see two options:

Quoted 7 lines

1. Caching the state in the driver's private struct. I'm not completely convinced of the value, given that the information is mostly available in the PWM core already (except for the adjustments that the driver makes).

2. Writing the adjusted state back into pwm_dev->state (via pwm_set_*). This seems a bit dirty.

2. isn't a good option. Maybe regmap caches this stuff anyhow for 1. (or can be made doing that)?

Quoted 7 lines

Quoted 6 lines

@Thierry: Do you have concerns here? Actually it would be more effective to have a callback (like .apply()) that modfies its pwm_state accordingly. (Some drivers did that in the past, but I changed that to get an uniform behaviour in 71523d1812aca61e32e742e87ec064e3d8c615e1.) The downside is that people have to understand that concept to properly use it. I'm torn about the right approach.

Quoted 2 lines

General guidance for such cases when the state can't be read back from the hardware would be appreciated.

Yes, improving the documentation would be great here. Thierry, can you please comment on
https://lore.kernel.org/r/[email protected]
which I'm waiting on before describing our understanding in more detail.

Quoted 126 lines · Uwe Kleine-König

Hello Jonathan,

Quoted 27 lines · Jonathan Neuschäfer

Quoted 1 line · Uwe Kleine-König

On Sun, Nov 22, 2020 at 11:27:36PM +0100, Jonathan Neuschäfer wrote:

[...]

Quoted 15 lines

Quoted 15 lines

(quoted diff) +15 -0

+/*
+ * The time base used in the EC is 8MHz, or 125ns. Period and duty cycle are
+ * measured in this unit.
+ */
+#define TIME_BASE_NS 125
+
+/*
+ * The maximum input value (in nanoseconds) is determined by the time base and
+ * the range of the hardware registers that hold the converted value.
+ * It fits into 32 bits, so we can do our calculations in 32 bits as well.
+ */
+#define MAX_PERIOD_NS (TIME_BASE_NS * 0xffff)
+
+static int ntxec_pwm_apply(struct pwm_chip *chip, struct pwm_device *pwm_dev,
+			   const struct pwm_state *state)

Quoted 8 lines

Review

Quoted 4 lines

(quoted diff) +4 -0

+{
+	struct ntxec_pwm *priv = pwmchip_to_priv(pwm_dev->chip);
+	unsigned int duty = state->duty_cycle;
+	unsigned int period = state->period;

state->duty_cycle and state->period are u64, so you're losing information here. Consider state->duty_cycle = 0x100000001 and state->period = 0x200000001.

Quoted 7 lines

Oh, good point, I didn't notice the truncation.

The reason I picked unsigned int was to avoid a 64-bit division; I suppose I can do something like this:

    period = (u32)period / TIME_BASE_NS;
    duty = (u32)duty / TIME_BASE_NS;

You can do that after you checked period > MAX_PERIOD_NS below, yes. Something like:

	if (state->polarity != PWM_POLARITY_NORMAL)
		return -EINVAL;

	if (state->period > MAX_PERIOD_NS) {
		period = MAX_PERIOD_NS;
	else
		period = state->period;

	if (state->duty_cycle > period)
		duty_cycle = period;
	else
		duty_cycle = state->duty_cycle;

should work with even keeping the local variables as unsigned int.

Quoted 31 lines

Quoted 13 lines

Quoted 13 lines

(quoted diff) +13 -0

+	int res = 0;
+
+	if (state->polarity != PWM_POLARITY_NORMAL)
+		return -EINVAL;
+
+	if (period > MAX_PERIOD_NS) {
+		period = MAX_PERIOD_NS;
+
+		if (duty > period)
+			duty = period;
+	}
+
+	period /= TIME_BASE_NS;

Quoted 8 lines

Review

Quoted 5 lines

(quoted diff) +5 -0

+	duty /= TIME_BASE_NS;
+
+	res = regmap_write(priv->ec->regmap, NTXEC_REG_PERIOD_HIGH, ntxec_reg8(period >> 8));
+	if (res)
+		return res;

I wonder if you can add some logic to the regmap in the mfd driver such that ntxec_reg8 isn't necessary for all users.

I think that would involve:

1. adding custom register access functions to the regmap, which decide based on the register number whether a register needs 8-bit or 16-bit access. So far I have avoided information about registers into the main driver, when the registers are only used in the sub-drivers.

or

Quoted 8 lines

2. switching the regmap configuration to little endian, which would be advantageous for 8-bit registers, inconsequential for 16-bit registers that consist of independent high and low halves, and wrong for the 16-bit registers 0x41, which reads the battery voltage ADC value. It is also different from how the vendor kernel treats 16-bit registers.

Perhaps there is another option that I haven't considered yet.

I don't know enough about regmap to teach you something here. But maybe Mark has an idea. (I promoted him from Cc: to To:, maybe he will notice.)

Quoted 18 lines

Quoted 7 lines

Quoted 7 lines

(quoted diff) +7 -0

+	res = regmap_write(priv->ec->regmap, NTXEC_REG_PERIOD_LOW, ntxec_reg8(period));
+	if (res)
+		return res;
+
+	res = regmap_write(priv->ec->regmap, NTXEC_REG_DUTY_HIGH, ntxec_reg8(duty >> 8));
+	if (res)
+		return res;

Quoted 8 lines

Review

Quoted 4 lines

(quoted diff) +4 -0

+
+	res = regmap_write(priv->ec->regmap, NTXEC_REG_DUTY_LOW, ntxec_reg8(duty));
+	if (res)
+		return res;

I think I already asked, but I don't remember the reply: What happens to the output between these writes? A comment here about this would be suitable.

I will add something like the following:

Quoted 7 lines

/*
* Changes to the period and duty cycle take effect as soon as the
* corresponding low byte is written, so the hardware may be configured
* to an inconsistent state after the period is written and before the
* duty cycle is fully written. If, in such a case, the old duty cycle
* is longer than the new period, the EC will output 100% for a moment. */

Quoted 8 lines

Is the value pair taken over by hardware atomically? That is, is it really "will" in your last line, or only "might". (E.g. when changing from duty_cycle, period = 1000, 2000 to 500, 800 and a new cycle begins after reducing period, the new duty_cycle is probably written before the counter reaches 500. Do we get a 100% cycle here?)

Other than that the info is fine. Make sure to point this out in the Limitations paragraph at the top of the driver please, too.

Perhaps also use something like regmap_bulk_write() to make sure the time between these writes is a short as possible.

Quoted 34 lines

Quoted 13 lines

Quoted 10 lines

Review

Quoted 2 lines

(quoted diff) +1 -0

+	.apply = ntxec_pwm_apply,

/*
* The current state cannot be read out, so there is no .get_state
* callback.
*/

Hmm, at least you could provice a .get_state() callback that reports the setting that was actually implemented for in the last call to .apply()?

Yes... I see two options:

Quoted 7 lines

1. Caching the state in the driver's private struct. I'm not completely convinced of the value, given that the information is mostly available in the PWM core already (except for the adjustments that the driver makes).

2. Writing the adjusted state back into pwm_dev->state (via pwm_set_*). This seems a bit dirty.

2. isn't a good option. Maybe regmap caches this stuff anyhow for 1. (or can be made doing that)?

Quoted 9 lines

Quoted 6 lines

@Thierry: Do you have concerns here? Actually it would be more effective to have a callback (like .apply()) that modfies its pwm_state accordingly. (Some drivers did that in the past, but I changed that to get an uniform behaviour in 71523d1812aca61e32e742e87ec064e3d8c615e1.) The downside is that people have to understand that concept to properly use it. I'm torn about the right approach.

General guidance for such cases when the state can't be read back from the hardware would be appreciated.

Quoted 4 lines

Yes, improving the documentation would be great here. Thierry, can you please comment on
https://lore.kernel.org/r/[email protected]
which I'm waiting on before describing our understanding in more detail.

Hm... that link gives me a "Not Found" message. Anyway, I think perhaps

the best compromise would be for the core to provide an implementation of ->get_state() that drivers can use if they can't read out hardware state. This generic implementation would then just copy over the internal state and we have to trust that that's really what was applied.

One drawback of that is that we don't factor in things like rounding errors and other limitations. So a better alternative may be to require drivers to store a cached version of the state and return that in their ->get_state() implementation.

Or perhaps a hybrid of the above would work where the core provides the helper that copies cached state and a cached state structure for storage and then the drivers that can't properly read back hardware state just need to update the cached state during ->apply().

I slightly prefer variant 2 because it's not clear to me how often we'll need this and we can always easily convert to variant 3 if this becomes a more common thing to do.

I suggest for now we go for "don't provide a .get_state() callback" because in the only case where it is currently called there is no cached data to rely on anyhow.

Hello Jonathan,

Quoted 1 line · Jonathan Neuschäfer

On Tue, Nov 24, 2020 at 09:20:19AM +0100, Uwe Kleine-König wrote:

Quoted 11 lines

Quoted 3 lines

state->duty_cycle and state->period are u64, so you're losing information here. Consider state->duty_cycle = 0x100000001 and state->period = 0x200000001.

Oh, good point, I didn't notice the truncation.

The reason I picked unsigned int was to avoid a 64-bit division; I suppose I can do something like this:

    period = (u32)period / TIME_BASE_NS;
    duty = (u32)duty / TIME_BASE_NS;

You can do that after you checked period > MAX_PERIOD_NS below, yes. Something like:

	if (state->polarity != PWM_POLARITY_NORMAL)
		return -EINVAL;

	if (state->period > MAX_PERIOD_NS) {
		period = MAX_PERIOD_NS;
	else
		period = state->period;

	if (state->duty_cycle > period)
		duty_cycle = period;
	else
		duty_cycle = state->duty_cycle;

should work with even keeping the local variables as unsigned int.

Quoted 6 lines

Quoted 3 lines

I think I already asked, but I don't remember the reply: What happens to the output between these writes? A comment here about this would be suitable.

I will add something like the following:

Quoted 7 lines

/*
* Changes to the period and duty cycle take effect as soon as the
* corresponding low byte is written, so the hardware may be configured
* to an inconsistent state after the period is written and before the
* duty cycle is fully written. If, in such a case, the old duty cycle
* is longer than the new period, the EC will output 100% for a moment. */

Is the value pair taken over by hardware atomically? That is, is it really "will" in your last line, or only "might". (E.g. when changing from duty_cycle, period = 1000, 2000 to 500, 800 and a new cycle begins after reducing period, the new duty_cycle is probably written before the counter reaches 500. Do we get a 100% cycle here?)

Other than that the info is fine. Make sure to point this out in the Limitations paragraph at the top of the driver please, too.

Quoted 15 lines

Quoted 7 lines

/*
* The current state cannot be read out, so there is no .get_state
* callback.
*/

Hmm, at least you could provice a .get_state() callback that reports the setting that was actually implemented for in the last call to .apply()?

Yes... I see two options:

1. Caching the state in the driver's private struct. I'm not completely convinced of the value, given that the information is mostly available in the PWM core already (except for the adjustments that the driver makes).

Quoted 2 lines

2. Writing the adjusted state back into pwm_dev->state (via pwm_set_*). This seems a bit dirty.

2. isn't a good option. Maybe regmap caches this stuff anyhow for 1. (or can be made doing that)?

With this driver, mainline Linux can keep its time and date in sync with the vendor kernel.

Advanced functionality like alarm and automatic power-on is not yet supported.

Signed-off-by Jonathan Neuschäfer <[email protected]>

drivers/rtc/rtc-ntxec.c new file +27 -0

+static int ntxec_set_time(struct device *dev, struct rtc_time *tm)
+{
+	struct ntxec_rtc *rtc = dev_get_drvdata(dev);
+	int res = 0;
+
+	/*
+	 * To avoid time overflows while we're writing the full date/time,
+	 * set the seconds field to zero before doing anything else. For the
+	 * next 59 seconds (plus however long it takes until the RTC's next
+	 * update of the second field), the seconds field will not overflow
+	 * into the other fields.
+	 */
+	res = regmap_write(rtc->ec->regmap, NTXEC_REG_WRITE_SECOND, ntxec_reg8(0));
+	if (res)
+		return res;
+
+	res = regmap_write(rtc->ec->regmap, NTXEC_REG_WRITE_YEAR, ntxec_reg8(tm->tm_year - 100));
+	if (res)
+		return res;
+
+	res = regmap_write(rtc->ec->regmap, NTXEC_REG_WRITE_MONTH, ntxec_reg8(tm->tm_mon + 1));
+	if (res)
+		return res;
+
+	res = regmap_write(rtc->ec->regmap, NTXEC_REG_WRITE_DAY, ntxec_reg8(tm->tm_mday));
+	if (res)
+		return res;

drivers/rtc/rtc-ntxec.c new file +19 -0

+}
+
+static const struct rtc_class_ops ntxec_rtc_ops = {
+	.read_time = ntxec_read_time,
+	.set_time = ntxec_set_time,
+};
+
+static int ntxec_rtc_probe(struct platform_device *pdev)
+{
+	struct rtc_device *dev;
+	struct ntxec_rtc *rtc;
+
+	rtc = devm_kzalloc(&pdev->dev, sizeof(*rtc), GFP_KERNEL);
+	if (!rtc)
+		return -ENOMEM;
+
+	rtc->dev = &pdev->dev;
+	rtc->ec = dev_get_drvdata(pdev->dev.parent);
+	platform_set_drvdata(pdev, rtc);

Hi,

Quoted 7 lines · Jonathan Neuschäfer

With this driver, mainline Linux can keep its time and date in sync with the vendor kernel.

Advanced functionality like alarm and automatic power-on is not yet supported.

Signed-off-by Jonathan Neuschäfer <[email protected]>

Acked-by Alexandre Belloni <[email protected]>

However, two comments below:

Quoted 32 lines

drivers/rtc/rtc-ntxec.c new file +32 -0

+static int ntxec_set_time(struct device *dev, struct rtc_time *tm)
+{
+	struct ntxec_rtc *rtc = dev_get_drvdata(dev);
+	int res = 0;
+
+	/*
+	 * To avoid time overflows while we're writing the full date/time,
+	 * set the seconds field to zero before doing anything else. For the
+	 * next 59 seconds (plus however long it takes until the RTC's next
+	 * update of the second field), the seconds field will not overflow
+	 * into the other fields.
+	 */
+	res = regmap_write(rtc->ec->regmap, NTXEC_REG_WRITE_SECOND, ntxec_reg8(0));
+	if (res)
+		return res;
+
+	res = regmap_write(rtc->ec->regmap, NTXEC_REG_WRITE_YEAR, ntxec_reg8(tm->tm_year - 100));
+	if (res)
+		return res;
+
+	res = regmap_write(rtc->ec->regmap, NTXEC_REG_WRITE_MONTH, ntxec_reg8(tm->tm_mon + 1));
+	if (res)
+		return res;
+
+	res = regmap_write(rtc->ec->regmap, NTXEC_REG_WRITE_DAY, ntxec_reg8(tm->tm_mday));
+	if (res)
+		return res;
+
+	res = regmap_write(rtc->ec->regmap, NTXEC_REG_WRITE_HOUR, ntxec_reg8(tm->tm_hour));
+	if (res)
+		return res;
+

drivers/rtc/rtc-ntxec.c line 115

Quoted 5 lines

drivers/rtc/rtc-ntxec.c new file +5 -0

+	res = regmap_write(rtc->ec->regmap, NTXEC_REG_WRITE_MINUTE, ntxec_reg8(tm->tm_min));
+	if (res)
+		return res;
+
+	return regmap_write(rtc->ec->regmap, NTXEC_REG_WRITE_SECOND, ntxec_reg8(tm->tm_sec));

Couldn't you do a regmap_block_write or a regmap_multi_reg_write which would be more efficient as they would be locking the regmap only once.

Note that this won't compile after
https://git.kernel.org/pub/scm/linux/kernel/git/abelloni/linux.git/commit/?id=fdcfd854333be5b30377dc5daa9cd0fa1643a979

We can solve that with immutable branches though.

Quoted 2 lines · Alexandre Belloni

Couldn't you do a regmap_block_write or a regmap_multi_reg_write which would be more efficient as they would be locking the regmap only once.

I can't find regmap_block_write anywhere, but regmap_multi_reg_write looks like a good approach to simplify the code here.

Quoted 8 lines

drivers/rtc/rtc-ntxec.c line 115

Quoted 5 lines

drivers/rtc/rtc-ntxec.c new file +5 -0

+	res = regmap_write(rtc->ec->regmap, NTXEC_REG_WRITE_MINUTE, ntxec_reg8(tm->tm_min));
+	if (res)
+		return res;
+
+	return regmap_write(rtc->ec->regmap, NTXEC_REG_WRITE_SECOND, ntxec_reg8(tm->tm_sec));

Couldn't you do a regmap_block_write or a regmap_multi_reg_write which would be more efficient as they would be locking the regmap only once.

I can't find regmap_block_write anywhere, but regmap_multi_reg_write looks like a good approach to simplify the code here.

[...]

Quoted 4 lines

Note that this won't compile after
https://git.kernel.org/pub/scm/linux/kernel/git/abelloni/linux.git/commit/?id=fdcfd854333be5b30377dc5daa9cd0fa1643a979

We can solve that with immutable branches though.

Thanks for the heads-up. Please let me know if/when there is any action that I need to take here.