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clk: tegra: Fix duplicated SE clock entry

PATCH Applied Dmitry Osipenko 3 participants 5 messages Oct 25, 2020 – Dec 10, 2020

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#0 lore raw

PATCH 1/1 clk: tegra: Fix duplicated SE clock entry

The periph_clks[] array contains duplicated entry for Security Engine clock which was meant to be defined for T210, but it wasn't added properly. This patch corrects the T210 SE entry and fixes the following error message on T114/T124: "Tegra clk 127: register failed with -17".

Fixes dc37fec48314 ("clk: tegra: periph: Add new periph clks and muxes for Tegra210")

Tested-by Nicolas Chauvet <[email protected]>
Reported-by Nicolas Chauvet <[email protected]>

---
 drivers/clk/tegra/clk-id.h           | 1 +
 drivers/clk/tegra/clk-tegra-periph.c | 2 +-
 2 files changed, 2 insertions(+), 1 deletion(-)
drivers/clk/tegra/clk-id.h +1 -0
index ff7da2d3e94d..24413812ec5b 100644
@@ -227,6 +227,7 @@ enum clk_id {
 	tegra_clk_sdmmc4,
 	tegra_clk_sdmmc4_8,
 	tegra_clk_se,
+	tegra_clk_se_10,
 	tegra_clk_soc_therm,
 	tegra_clk_soc_therm_8,
 	tegra_clk_sor0,
drivers/clk/tegra/clk-tegra-periph.c +1 -1
index 2b2a3b81c16b..60cc34f90cb9 100644
@@ -630,7 +630,7 @@ static struct tegra_periph_init_data periph_clks[] = {
 	INT8("host1x", mux_pllm_pllc2_c_c3_pllp_plla, CLK_SOURCE_HOST1X, 28, 0, tegra_clk_host1x_8),
 	INT8("host1x", mux_pllc4_out1_pllc_pllc4_out2_pllp_clkm_plla_pllc4_out0, CLK_SOURCE_HOST1X, 28, 0, tegra_clk_host1x_9),
 	INT8("se", mux_pllp_pllc2_c_c3_pllm_clkm, CLK_SOURCE_SE, 127, TEGRA_PERIPH_ON_APB, tegra_clk_se),
-	INT8("se", mux_pllp_pllc2_c_c3_clkm, CLK_SOURCE_SE, 127, TEGRA_PERIPH_ON_APB, tegra_clk_se),
+	INT8("se", mux_pllp_pllc2_c_c3_clkm, CLK_SOURCE_SE, 127, TEGRA_PERIPH_ON_APB, tegra_clk_se_10),
 	INT8("2d", mux_pllm_pllc2_c_c3_pllp_plla, CLK_SOURCE_2D, 21, 0, tegra_clk_gr2d_8),
 	INT8("3d", mux_pllm_pllc2_c_c3_pllp_plla, CLK_SOURCE_3D, 24, 0, tegra_clk_gr3d_8),
 	INT8("vic03", mux_pllm_pllc_pllp_plla_pllc2_c3_clkm, CLK_SOURCE_VIC03, 178, 0, tegra_clk_vic03),
Signature · 1 line
2.27.0
maintainer
#1 lore raw

Quoting Dmitry Osipenko (2020-10-25 15:42:12)

Quoted 10 lines

The periph_clks[] array contains duplicated entry for Security Engine clock which was meant to be defined for T210, but it wasn't added properly. This patch corrects the T210 SE entry and fixes the following error message on T114/T124: "Tegra clk 127: register failed with -17".

Fixes dc37fec48314 ("clk: tegra: periph: Add new periph clks and muxes for Tegra210")

Tested-by Nicolas Chauvet <[email protected]>
Reported-by Nicolas Chauvet <[email protected]>

---

Looks correct. Should I pick this up Thierry?

Quoted 29 lines
 drivers/clk/tegra/clk-id.h           | 1 +
 drivers/clk/tegra/clk-tegra-periph.c | 2 +-
 2 files changed, 2 insertions(+), 1 deletion(-)
drivers/clk/tegra/clk-id.h +1 -0
index ff7da2d3e94d..24413812ec5b 100644
@@ -227,6 +227,7 @@ enum clk_id {
        tegra_clk_sdmmc4,
        tegra_clk_sdmmc4_8,
        tegra_clk_se,
+       tegra_clk_se_10,
        tegra_clk_soc_therm,
        tegra_clk_soc_therm_8,
        tegra_clk_sor0,
drivers/clk/tegra/clk-tegra-periph.c +1 -1
index 2b2a3b81c16b..60cc34f90cb9 100644
@@ -630,7 +630,7 @@ static struct tegra_periph_init_data periph_clks[] = {
        INT8("host1x", mux_pllm_pllc2_c_c3_pllp_plla, CLK_SOURCE_HOST1X, 28, 0, tegra_clk_host1x_8),
        INT8("host1x", mux_pllc4_out1_pllc_pllc4_out2_pllp_clkm_plla_pllc4_out0, CLK_SOURCE_HOST1X, 28, 0, tegra_clk_host1x_9),
        INT8("se", mux_pllp_pllc2_c_c3_pllm_clkm, CLK_SOURCE_SE, 127, TEGRA_PERIPH_ON_APB, tegra_clk_se),
-       INT8("se", mux_pllp_pllc2_c_c3_clkm, CLK_SOURCE_SE, 127, TEGRA_PERIPH_ON_APB, tegra_clk_se),
+       INT8("se", mux_pllp_pllc2_c_c3_clkm, CLK_SOURCE_SE, 127, TEGRA_PERIPH_ON_APB, tegra_clk_se_10),
        INT8("2d", mux_pllm_pllc2_c_c3_pllp_plla, CLK_SOURCE_2D, 21, 0, tegra_clk_gr2d_8),
        INT8("3d", mux_pllm_pllc2_c_c3_pllp_plla, CLK_SOURCE_3D, 24, 0, tegra_clk_gr3d_8),
        INT8("vic03", mux_pllm_pllc_pllp_plla_pllc2_c3_clkm, CLK_SOURCE_VIC03, 178, 0, tegra_clk_vic03),
#2 lore raw
Quoted 6 lines · Stephen Boyd

Quoting Dmitry Osipenko (2020-10-25 15:42:12)

Quoted 5 lines

The periph_clks[] array contains duplicated entry for Security Engine clock which was meant to be defined for T210, but it wasn't added properly. This patch corrects the T210 SE entry and fixes the following error message on T114/T124: "Tegra clk 127: register failed with -17".

Quoted 7 lines
Quoted 5 lines
Fixes dc37fec48314 ("clk: tegra: periph: Add new periph clks and muxes for Tegra210")

Tested-by Nicolas Chauvet <[email protected]>
Reported-by Nicolas Chauvet <[email protected]>

---

Looks correct. Should I pick this up Thierry?

Yes, please. Thanks for catching this, it had slipped through my filter.

Thierry

Acked-by on v1 1/1
#3 lore raw
In reply to Dmitry Osipenko
Quoted 5 lines · Dmitry Osipenko

The periph_clks[] array contains duplicated entry for Security Engine clock which was meant to be defined for T210, but it wasn't added properly. This patch corrects the T210 SE entry and fixes the following error message on T114/T124: "Tegra clk 127: register failed with -17".

Quoted 8 lines
Fixes dc37fec48314 ("clk: tegra: periph: Add new periph clks and muxes for Tegra210")

Tested-by Nicolas Chauvet <[email protected]>
Reported-by Nicolas Chauvet <[email protected]>

---
 drivers/clk/tegra/clk-id.h           | 1 +
 drivers/clk/tegra/clk-tegra-periph.c | 2 +-
 2 files changed, 2 insertions(+), 1 deletion(-)
maintainer Applied
#4 lore raw
In reply to Dmitry Osipenko

Quoting Dmitry Osipenko (2020-10-25 15:42:12)

Quoted 10 lines

The periph_clks[] array contains duplicated entry for Security Engine clock which was meant to be defined for T210, but it wasn't added properly. This patch corrects the T210 SE entry and fixes the following error message on T114/T124: "Tegra clk 127: register failed with -17".

Fixes dc37fec48314 ("clk: tegra: periph: Add new periph clks and muxes for Tegra210")

Tested-by Nicolas Chauvet <[email protected]>
Reported-by Nicolas Chauvet <[email protected]>

---

Applied to clk-next