intel-m10-bmc: Split BMC to core and SPI parts & add PMCI+N6000 support
Subsystems (5)
v6 cover intel-m10-bmc: Split BMC to core and SPI parts & add PMCI+N6000 support
Hi all,
Here are the patches for MAX 10 BMC core/SPI interface split and addition of the PMCI interface. There are a few supporting rearrangement patches prior to the actual split.
I had to move flash MUX control back from sec driver to PMCI because there will be other drivers that also read flash (e.g., log driver). It also lead to realization that the flash_mutex wasn't enough to handle reads during an update (erase + write) but the update has to be tracked independent of just the write itself. BMC will manage flash MUX at that point and reads got -ETIMEDOUT in v5 when update was already in progress but not yet doing write. In v6, the reads return -EBUSY during an update. These changes impact the last patch of the series.
As both Yilun and Lee seemed to find it better to not put the register defines into the .c files, I've left them into header file starting from v6 and just renamed them such that it's more obvious the define relates to one board type.
The patch set is based on top of 60ce26d10e58 ("fpga: m10bmc-sec: Fix probe rollback").
v6:
- Move flash MUX control back to PMCI driver (other drivers besides secure update such as log driver depend on it while reading the flash)
- Track updates independent of write itself using bool flash_busy
- Return -EBUSY for flash reads during update (erase+write)
- Add type specific ops & ->rsu_status() into the sec update driver to handle RSU status in different registers inside the driver.
- Corrected handling of unaligned tail in bulk read
- Rename raw doorbell parameters to doorbell_reg
- Drop unnecessary PMCI telemetry reg defines
- Keep defines include/linux/mfd/intel-m10-bmc.h
- More register defines with N3000/N6000 prefix
- Define flash timeouts only once, remove the other
- Add correct includes for linux/mfd/intel-m10-bmc.h
- Simplified rename variable patch tags
v5:
- Explain flash MUX rollback path in commit message
- Fix RSU status field register location
v4:
- Use board type for naming defines & structs
- Set .reg_read/write and call devm_regmap_init() directly
- Rename indirect_bus_*() funcs to indirect_*()
- Move indirect code into intel-m10-bmc-pmci so funcs can be static
- Drop module licence GPL v2 - GPL change
v3:
- Move regmap indirect into BMC PMCI module
- Get rid of "generalization" of cmd offsets and values, back to v1 #defines
- Tweak Kconfig & Makefile
- Rename intel-m10-bmc-pmci to intel-m10-bmc-pmci-main
- Rework sec update read/write paths
- Sec update driver code effectively uses the SPI side code from v2
- Rename m10bmc_sec_write() to m10bmc_sec_fw_write()
- Rename flash_ops to flash_bulk_ops and make them optional
- Move flash MUX and flash_mutex handling into sec update driver
- Prevent simultaneous flash bulk write & read using flash_mutex
- Keep M10BMC_STAGING_BASE in header (now used in the sec update code)
- Rebased on top of leak fix "fpga: m10bmc-sec: Fix probe rollback"
v2:
- Drop type from mfd side, the platform info takes care of differentation
- Explain introducing ->info to struct m10bmc in commit message (belongs logically there)
- Intro PMCI better
- Improve naming
- Rename M10BMC_PMCI_FLASH_CTRL to M10BMC_PMCI_FLASH_MUX_CTRL
- Use m10bmc_pmci/M10BMC_PMCI prefix consistently
- Use M10BMC_SPI prefix for SPI related defines
- Newly added stuff gets m10bmc_spi prefix
- Removed dev from struct m10bmc_pmci_device
- Rename "n_offset" variable to "offset" in PMCI flash ops
- Always issue idle command in regmap indirect to clear RD/WR/ACK bits
- Handle stride misaligned sizes in flash read/write ops
Ilpo Järvinen (11):
mfd: intel-m10-bmc: Add missing includes to header
mfd: intel-m10-bmc: Create m10bmc_platform_info for type specific info
mfd: intel-m10-bmc: Rename the local variables
mfd: intel-m10-bmc: Split into core and spi specific parts
mfd: intel-m10-bmc: Support multiple CSR register layouts
fpga: intel-m10-bmc: Rework flash read/write
mfd: intel-m10-bmc: Prefix register defines with M10BMC_N3000
fpga: m10bmc-sec: Create helpers for rsu status/progress checks
fpga: m10bmc-sec: Make rsu status type specific
mfd: intel-m10-bmc: Add PMCI driver
fpga: m10bmc-sec: Add support for N6000
.../ABI/testing/sysfs-driver-intel-m10-bmc | 8 +- MAINTAINERS | 2 +- drivers/fpga/Kconfig | 2 +- drivers/fpga/intel-m10-bmc-sec-update.c | 415 ++++++++++------ drivers/hwmon/Kconfig | 2 +- drivers/mfd/Kconfig | 32 +- drivers/mfd/Makefile | 5 +- drivers/mfd/intel-m10-bmc-core.c | 122 +++++ drivers/mfd/intel-m10-bmc-pmci.c | 455 ++++++++++++++++++ drivers/mfd/intel-m10-bmc-spi.c | 168 +++++++ drivers/mfd/intel-m10-bmc.c | 238 --------- include/linux/mfd/intel-m10-bmc.h | 205 ++++++-- 12 files changed, 1221 insertions(+), 433 deletions(-) create mode 100644 drivers/mfd/intel-m10-bmc-core.c create mode 100644 drivers/mfd/intel-m10-bmc-pmci.c create mode 100644 drivers/mfd/intel-m10-bmc-spi.c delete mode 100644 drivers/mfd/intel-m10-bmc.c
Signature · 1 line
2.30.2
PATCH v6 1/11 mfd: intel-m10-bmc: Add missing includes to header
linux/mfd/intel-m10-bmc.h is using:
- pr_err(), thus include also linux/dev_printk.h
- FIELD_GET(), this include also linux/bitfield.h
- GENMASK(), thus include also linux/bits.h
--- include/linux/mfd/intel-m10-bmc.h | 3 +++ 1 file changed, 3 insertions(+)
include/linux/mfd/intel-m10-bmc.h +3 -0
@@ -7,6 +7,9 @@#ifndef __MFD_INTEL_M10_BMC_H#define __MFD_INTEL_M10_BMC_H +#include <linux/bitfield.h> +#include <linux/bits.h> +#include <linux/dev_printk.h> #include <linux/regmap.h> #define M10BMC_LEGACY_BUILD_VER 0x300468
Signature · 1 line
2.30.2
Re: [PATCH v6 01/11] mfd: intel-m10-bmc: Add missing includes to header
Quoted 4 lines · Ilpo Järvinen
linux/mfd/intel-m10-bmc.his using:
-pr_err(), thus include alsolinux/dev_printk.h
-FIELD_GET(), this include alsolinux/bitfield.h
-GENMASK(), thus include alsolinux/bits.h
Quoted 19 lines
Signed-off-by Ilpo Järvinen <[email protected]>--- include/linux/mfd/intel-m10-bmc.h | 3 +++ 1 file changed, 3 insertions(+)include/linux/mfd/intel-m10-bmc.h +3
-0@@ -7,6 +7,9 @@#ifndef __MFD_INTEL_M10_BMC_H#define __MFD_INTEL_M10_BMC_H +#include <linux/bitfield.h> +#include <linux/bits.h> +#include <linux/dev_printk.h> #include <linux/regmap.h> #define M10BMC_LEGACY_BUILD_VER 0x300468
Re: [PATCH v6 01/11] mfd: intel-m10-bmc: Add missing includes to header
Quoted 9 lines · Russ Weight
Quoted 4 lines · Ilpo Järvinen
linux/mfd/intel-m10-bmc.his using:
-pr_err(), thus include alsolinux/dev_printk.h
-FIELD_GET(), this include alsolinux/bitfield.h
-GENMASK(), thus include alsolinux/bits.hReviewed-by Russ Weight <[email protected]>
Quoted 21 lines
Quoted 20 lines
Signed-off-by Ilpo Järvinen <[email protected]>--- include/linux/mfd/intel-m10-bmc.h | 3 +++ 1 file changed, 3 insertions(+)include/linux/mfd/intel-m10-bmc.h +3
-0@@ -7,6 +7,9 @@#ifndef __MFD_INTEL_M10_BMC_H#define __MFD_INTEL_M10_BMC_H +#include <linux/bitfield.h> +#include <linux/bits.h> +#include <linux/dev_printk.h> #include <linux/regmap.h> #define M10BMC_LEGACY_BUILD_VER 0x300468
Re: [PATCH v6 01/11] mfd: intel-m10-bmc: Add missing includes to header
In reply to Ilpo JärvinenQuoted 9 lines · Ilpo Järvinen
linux/mfd/intel-m10-bmc.his using:
-pr_err(), thus include alsolinux/dev_printk.h
-FIELD_GET(), this include alsolinux/bitfield.h
-GENMASK(), thus include alsolinux/bits.hSigned-off-by Ilpo Järvinen <[email protected]>--- include/linux/mfd/intel-m10-bmc.h | 3 +++ 1 file changed, 3 insertions(+)
Applied, thanks
Signature · 1 line
Lee Jones [李琼斯]
PATCH v6 2/11 mfd: intel-m10-bmc: Create m10bmc_platform_info for type specific info
In reply to Ilpo JärvinenBMC type specific info is currently set by a switch/case block. The size of this info is expected to grow as more dev types and features are added which would have made the switch block bloaty.
Store type specific info into struct and place them into .driver_data instead because it makes things a bit cleaner.
The m10bmc_type enum can be dropped as the differentiation is now fully handled by the platform info.
The info member of struct intel_m10bmc that is added here is not used yet in this change but its addition logically still belongs to this change. The CSR map change that comes after this change needs to have the info member.
--- drivers/mfd/intel-m10-bmc.c | 53 ++++++++++++++----------------- include/linux/mfd/intel-m10-bmc.h | 12 +++++++ 2 files changed, 36 insertions(+), 29 deletions(-)
drivers/mfd/intel-m10-bmc.c +24 -29
@@ -13,12 +13,6 @@#include <linux/regmap.h> #include <linux/spi/spi.h> -enum m10bmc_type { -M10_N3000 , -M10_D5005 , -M10_N5010 , -}; -static struct mfd_cell m10bmc_d5005_subdevs[] = { { .name ="d5005bmc-hwmon" }, { .name ="d5005bmc-sec-update" }
@@ -162,15 +156,17 @@ static int check_m10bmc_version(struct intel_m10bmc *ddata)static int intel_m10_bmc_spi_probe (struct spi_device *spi) {const struct spi_device_id *id =spi_get_device_id (spi); +const struct intel_m10bmc_platform_info *info;struct device *dev = &spi->dev; -struct mfd_cell *cells;struct intel_m10bmc *ddata; -int ret, n_cell; +int ret; ddata =devm_kzalloc (dev,sizeof (*ddata),GFP_KERNEL );if (!ddata)return -ENOMEM ; + info = (struct intel_m10bmc_platform_info *)id->driver_data; + ddata->info = info; ddata->dev = dev; ddata->regmap =
@@ -189,24 +185,8 @@ static int intel_m10_bmc_spi_probe(struct spi_device *spi)return ret; } -switch (id->driver_data) { -case M10_N3000 : - cells = m10bmc_pacn3000_subdevs; - n_cell =ARRAY_SIZE (m10bmc_pacn3000_subdevs); -break ; -case M10_D5005 : - cells = m10bmc_d5005_subdevs; - n_cell =ARRAY_SIZE (m10bmc_d5005_subdevs); -break ; -case M10_N5010 : - cells = m10bmc_n5010_subdevs; - n_cell =ARRAY_SIZE (m10bmc_n5010_subdevs); -break ; -default : -return -ENODEV ; - } - - ret =devm_mfd_add_devices (dev,PLATFORM_DEVID_AUTO , cells, n_cell, + ret =devm_mfd_add_devices (dev,PLATFORM_DEVID_AUTO , + info->cells, info->n_cells,NULL ,0 ,NULL );if (ret)dev_err (dev,"Failed to register sub-devices: %d\n" , ret);
@@ -214,10 +194,25 @@ static int intel_m10_bmc_spi_probe(struct spi_device *spi)return ret; } +static const struct intel_m10bmc_platform_info m10bmc_spi_n3000 = { + .cells = m10bmc_pacn3000_subdevs, + .n_cells =ARRAY_SIZE (m10bmc_pacn3000_subdevs), +}; + +static const struct intel_m10bmc_platform_info m10bmc_spi_d5005 = { + .cells = m10bmc_d5005_subdevs, + .n_cells =ARRAY_SIZE (m10bmc_d5005_subdevs), +}; + +static const struct intel_m10bmc_platform_info m10bmc_spi_n5010 = { + .cells = m10bmc_n5010_subdevs, + .n_cells =ARRAY_SIZE (m10bmc_n5010_subdevs), +}; +static const struct spi_device_id m10bmc_spi_id[] = { - {"m10-n3000" ,M10_N3000 }, - {"m10-d5005" ,M10_D5005 }, - {"m10-n5010" ,M10_N5010 }, + {"m10-n3000" , (kernel_ulong_t)&m10bmc_spi_n3000 }, + {"m10-d5005" , (kernel_ulong_t)&m10bmc_spi_d5005 }, + {"m10-n5010" , (kernel_ulong_t)&m10bmc_spi_n5010 }, { } };MODULE_DEVICE_TABLE (spi, m10bmc_spi_id);
include/linux/mfd/intel-m10-bmc.h +12 -0
@@ -121,14 +121,26 @@/* Address of 4KB inverted bit vector containing staging area FLASH count */ #define STAGING_FLASH_COUNT 0x17ffb000 +/** +* struct intel_m10bmc_platform_info - Intel MAX 10 BMC platform specific information +* @cells: MFD cells +* @n_cells: MFD cells ARRAY_SIZE() +*/ +struct intel_m10bmc_platform_info { +struct mfd_cell *cells; +int n_cells; +}; +/** * struct intel_m10bmc - Intel MAX 10 BMC parent driver data structure * @dev: this device * @regmap: the regmap used to access registers by m10bmc itself +* @info: the platform information for MAX10 BMC */ struct intel_m10bmc {struct device *dev;struct regmap *regmap; +const struct intel_m10bmc_platform_info *info; };/*
Signature · 1 line
2.30.2
Re: [PATCH v6 02/11] mfd: intel-m10-bmc: Create m10bmc_platform_info for type specific info
Quoted 15 lines · Ilpo Järvinen
BMC type specific info is currently set by a switch/case block. The size of this info is expected to grow as more dev types and features are added which would have made the switch block bloaty.
Store type specific info into struct and place them into .driver_data instead because it makes things a bit cleaner.
The
m10bmc_typeenum can be dropped as the differentiation is now fully handled by the platform info.The info member of struct
intel_m10bmcthat is added here is not used yet in this change but its addition logically still belongs to this change. The CSR map change that comes after this change needs to have the info member.
Quoted 7 lines
Reviewed-by Russ Weight <[email protected]>Reviewed-by Xu Yilun <[email protected]>Signed-off-by Ilpo Järvinen <[email protected]>--- drivers/mfd/intel-m10-bmc.c | 53 ++++++++++++++----------------- include/linux/mfd/intel-m10-bmc.h | 12 +++++++ 2 files changed, 36 insertions(+), 29 deletions(-)
Applied, thanks
Signature · 1 line
Lee Jones [李琼斯]
PATCH v6 3/11 mfd: intel-m10-bmc: Rename the local variables
In reply to Ilpo JärvinenLocal variables directly interact with dev_get_drvdata/dev_set_drvdata should be named ddata.
--- drivers/mfd/intel-m10-bmc.c | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-)
drivers/mfd/intel-m10-bmc.c +5 -5
@@ -81,15 +81,15 @@ static DEVICE_ATTR_RO(bmcfw_version);static ssize_t mac_address_show (struct device *dev,struct device_attribute *attr,char *buf) { -struct intel_m10bmc *max10 =dev_get_drvdata (dev); +struct intel_m10bmc *ddata =dev_get_drvdata (dev);unsigned int macaddr_low, macaddr_high;int ret; - ret =m10bmc_sys_read (max10,M10BMC_MAC_LOW , &macaddr_low); + ret =m10bmc_sys_read (ddata,M10BMC_MAC_LOW , &macaddr_low);if (ret)return ret; - ret =m10bmc_sys_read (max10,M10BMC_MAC_HIGH , &macaddr_high); + ret =m10bmc_sys_read (ddata,M10BMC_MAC_HIGH , &macaddr_high);if (ret)return ret;
@@ -106,11 +106,11 @@ static DEVICE_ATTR_RO(mac_address);static ssize_t mac_count_show (struct device *dev,struct device_attribute *attr,char *buf) { -struct intel_m10bmc *max10 =dev_get_drvdata (dev); +struct intel_m10bmc *ddata =dev_get_drvdata (dev);unsigned int macaddr_high;int ret; - ret =m10bmc_sys_read (max10,M10BMC_MAC_HIGH , &macaddr_high); + ret =m10bmc_sys_read (ddata,M10BMC_MAC_HIGH , &macaddr_high);if (ret)return ret;
Signature · 1 line
2.30.2
Re: [PATCH v6 03/11] mfd: intel-m10-bmc: Rename the local variables
Quoted 10 lines · Ilpo Järvinen
Local variables directly interact with dev_get_drvdata/dev_set_drvdata should be named ddata.
Reviewed-by Russ Weight <[email protected]>Reviewed-by Xu Yilun <[email protected]>Acked-for-MFD-by Lee Jones <[email protected]>Signed-off-by Ilpo Järvinen <[email protected]>--- drivers/mfd/intel-m10-bmc.c | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-)
Applied, thanks
Signature · 1 line
Lee Jones [李琼斯]
PATCH v6 4/11 mfd: intel-m10-bmc: Split into core and spi specific parts
In reply to Ilpo JärvinenSplit the common code from intel-m10-bmc driver into intel-m10-bmc-core and move the SPI bus parts into an interface specific file.
intel-m10-bmc-core becomes the core MFD functions which can support multiple bus interface like SPI bus.
---
MAINTAINERS | 2 +-
drivers/fpga/Kconfig | 2 +-
drivers/hwmon/Kconfig | 2 +-
drivers/mfd/Kconfig | 30 ++--
drivers/mfd/Makefile | 4 +-
drivers/mfd/intel-m10-bmc-core.c | 122 +++++++++++++++++
.../{intel-m10-bmc.c => intel-m10-bmc-spi.c} | 128 +++---------------
include/linux/mfd/intel-m10-bmc.h | 6 +
8 files changed, 172 insertions(+), 124 deletions(-)
create mode 100644 drivers/mfd/intel-m10-bmc-core.c
rename drivers/mfd/{intel-m10-bmc.c => intel-m10-bmc-spi.c} (59%)MAINTAINERS +1 -1
@@ -10452,7 +10452,7 @@ S: Maintained F: Documentation/ABI/testing/sysfs-driver-intel-m10-bmc F: Documentation/hwmon/intel-m10-bmc-hwmon.rst F: drivers/hwmon/intel-m10-bmc-hwmon.c -F: drivers/mfd/intel-m10-bmc.c +F: drivers/mfd/intel-m10-bmc* F: include/linux/mfd/intel-m10-bmc.h INTEL MENLOW THERMAL DRIVER
drivers/fpga/Kconfig +1 -1
@@ -246,7 +246,7 @@ config FPGA_MGR_VERSAL_FPGA config FPGA_M10_BMC_SEC_UPDATE tristate "Intel MAX10 BMC Secure Update driver" - depends on MFD_INTEL_M10_BMC + depends on MFD_INTEL_M10_BMC_CORE select FW_LOADER select FW_UPLOAD help
drivers/hwmon/Kconfig +1 -1
@@ -2321,7 +2321,7 @@ config SENSORS_XGENE config SENSORS_INTEL_M10_BMC_HWMON tristate "Intel MAX10 BMC Hardware Monitoring" - depends on MFD_INTEL_M10_BMC + depends on MFD_INTEL_M10_BMC_CORE help This driver provides support for the hardware monitoring functionality on Intel MAX10 BMC chip.
drivers/mfd/Kconfig +18 -12
@@ -2219,18 +2219,24 @@ config SGI_MFD_IOC3 If you have an SGI Origin, Octane, or a PCI IOC3 card, then say Y. Otherwise say N. -config MFD_INTEL_M10_BMC - tristate "Intel MAX 10 Board Management Controller" - depends on SPI_MASTER - select REGMAP_SPI_AVMM - select MFD_CORE - help - Support for the Intel MAX 10 board management controller using the - SPI interface. - - This driver provides common support for accessing the device, - additional drivers must be enabled in order to use the functionality - of the device. +config MFD_INTEL_M10_BMC_CORE + tristate + select MFD_CORE + select REGMAP + default n + +config MFD_INTEL_M10_BMC_SPI + tristate "Intel MAX 10 Board Management Controller with SPI" + depends on SPI_MASTER + select MFD_INTEL_M10_BMC_CORE + select REGMAP_SPI_AVMM + help + Support for the Intel MAX 10 board management controller using the + SPI interface. + + This driver provides common support for accessing the device, + additional drivers must be enabled in order to use the functionality + of the device. config MFD_RSMU_I2C tristate "Renesas Synchronization Management Unit with I2C"
drivers/mfd/Makefile +3 -1
@@ -271,7 +271,9 @@ obj-$(CONFIG_MFD_QCOM_PM8008) += qcom-pm8008.o obj-$(CONFIG_SGI_MFD_IOC3) += ioc3.o obj-$(CONFIG_MFD_SIMPLE_MFD_I2C) += simple-mfd-i2c.o -obj-$(CONFIG_MFD_INTEL_M10_BMC) += intel-m10-bmc.o + +obj-$(CONFIG_MFD_INTEL_M10_BMC_CORE) += intel-m10-bmc-core.o +obj-$(CONFIG_MFD_INTEL_M10_BMC_SPI) += intel-m10-bmc-spi.o obj-$(CONFIG_MFD_ATC260X) += atc260x-core.o obj-$(CONFIG_MFD_ATC260X_I2C) += atc260x-i2c.o
drivers/mfd/intel-m10-bmc-core.c new file +122 -0
122 lines not on this page · raw message
drivers/mfd/intel-m10-bmc-spi.c renamed from drivers/mfd/intel-m10-bmc.c +20 -108
175 lines not on this page · raw message
include/linux/mfd/intel-m10-bmc.h +6 -0
@@ -174,4 +174,10 @@ m10bmc_raw_read(struct intel_m10bmc *m10bmc, unsigned int addr,#define m10bmc_sys_read (m10bmc, offset, val) \ m10bmc_raw_read(m10bmc, M10BMC_SYS_BASE + (offset), val) +/* +* MAX10 BMC Core support +*/ +int m10bmc_dev_init (struct intel_m10bmc *m10bmc,const struct intel_m10bmc_platform_info *info); +extern const struct attribute_group *m10bmc_dev_groups[]; +#endif /* __MFD_INTEL_M10_BMC_H */
Signature · 1 line
2.30.2
Re: [PATCH v6 04/11] mfd: intel-m10-bmc: Split into core and spi specific parts
Quoted 13 lines · Ilpo Järvinen
Split the common code from intel-m10-bmc driver into intel-m10-bmc-core and move the SPI bus parts into an interface specific file.
intel-m10-bmc-core becomes the core MFD functions which can support multiple bus interface like SPI bus.
Co-developed-by Tianfei zhang <[email protected]>Signed-off-by Tianfei zhang <[email protected]>Reviewed-by Russ Weight <[email protected]>Reviewed-by Xu Yilun <[email protected]>Acked-for-MFD-by Lee Jones <[email protected]>Signed-off-by Ilpo Järvinen <[email protected]>
Quoted 12 lines
---
MAINTAINERS | 2 +-
drivers/fpga/Kconfig | 2 +-
drivers/hwmon/Kconfig | 2 +-
drivers/mfd/Kconfig | 30 ++--
drivers/mfd/Makefile | 4 +-
drivers/mfd/intel-m10-bmc-core.c | 122 +++++++++++++++++
.../{intel-m10-bmc.c => intel-m10-bmc-spi.c} | 128 +++---------------
include/linux/mfd/intel-m10-bmc.h | 6 +
8 files changed, 172 insertions(+), 124 deletions(-)
create mode 100644 drivers/mfd/intel-m10-bmc-core.c
rename drivers/mfd/{intel-m10-bmc.c => intel-m10-bmc-spi.c} (59%)Applied, thanks
Signature · 1 line
Lee Jones [李琼斯]
PATCH v6 5/11 mfd: intel-m10-bmc: Support multiple CSR register layouts
In reply to Ilpo JärvinenThere are different addresses for the MAX10 CSR registers. Introducing a new data structure m10bmc_csr_map for the register definition of MAX10 CSR.
Provide the csr_map for SPI.
--- drivers/fpga/intel-m10-bmc-sec-update.c | 73 +++++++++++++++++-------- drivers/mfd/intel-m10-bmc-core.c | 10 ++-- drivers/mfd/intel-m10-bmc-spi.c | 23 ++++++++ include/linux/mfd/intel-m10-bmc.h | 38 +++++++++++-- 4 files changed, 111 insertions(+), 33 deletions(-)
drivers/fpga/intel-m10-bmc-sec-update.c +49 -24
@@ -73,16 +73,24 @@ show_root_entry_hash(struct device *dev, u32 exp_magic,return cnt; } -#define DEVICE_ATTR_SEC_REH_RO (_name, _magic, _prog_addr, _reh_addr) \ +#define DEVICE_ATTR_SEC_REH_RO (_name) \ static ssize_t _name##_root_entry_hash_show(struct device *dev, \ struct device_attribute *attr, \ char *buf) \ -{ return show_root_entry_hash(dev, _magic, _prog_addr, _reh_addr, buf); } \ +{ \ + struct m10bmc_sec *sec = dev_get_drvdata(dev); \ + const struct m10bmc_csr_map *csr_map = sec->m10bmc->info->csr_map; \ + \ + return show_root_entry_hash(dev, csr_map->_name##_magic, \ + csr_map->_name##_prog_addr, \ + csr_map->_name##_reh_addr, \ + buf); \ +} \ static DEVICE_ATTR_RO(_name##_root_entry_hash) -DEVICE_ATTR_SEC_REH_RO (bmc,BMC_PROG_MAGIC ,BMC_PROG_ADDR ,BMC_REH_ADDR ); -DEVICE_ATTR_SEC_REH_RO (sr,SR_PROG_MAGIC ,SR_PROG_ADDR ,SR_REH_ADDR ); -DEVICE_ATTR_SEC_REH_RO (pr,PR_PROG_MAGIC ,PR_PROG_ADDR ,PR_REH_ADDR ); +DEVICE_ATTR_SEC_REH_RO (bmc); +DEVICE_ATTR_SEC_REH_RO (sr); +DEVICE_ATTR_SEC_REH_RO (pr);#define CSK_BIT_LEN 128U#define CSK_32ARRAY_SIZE DIV_ROUND_UP(CSK_BIT_LEN, 32)
@@ -122,18 +130,25 @@ show_canceled_csk(struct device *dev, u32 addr, char *buf)return bitmap_print_to_pagebuf (1 , buf, csk_map,CSK_BIT_LEN ); } -#define DEVICE_ATTR_SEC_CSK_RO (_name, _addr) \ +#define DEVICE_ATTR_SEC_CSK_RO (_name) \ static ssize_t _name##_canceled_csks_show(struct device *dev, \ struct device_attribute *attr, \ char *buf) \ -{ return show_canceled_csk(dev, _addr, buf); } \ +{ \ + struct m10bmc_sec *sec = dev_get_drvdata(dev); \ + const struct m10bmc_csr_map *csr_map = sec->m10bmc->info->csr_map; \ + \ + return show_canceled_csk(dev, \ + csr_map->_name##_prog_addr + CSK_VEC_OFFSET, \ + buf); \ +} \ static DEVICE_ATTR_RO(_name##_canceled_csks)#define CSK_VEC_OFFSET 0x34 -DEVICE_ATTR_SEC_CSK_RO (bmc,BMC_PROG_ADDR +CSK_VEC_OFFSET ); -DEVICE_ATTR_SEC_CSK_RO (sr,SR_PROG_ADDR +CSK_VEC_OFFSET ); -DEVICE_ATTR_SEC_CSK_RO (pr,PR_PROG_ADDR +CSK_VEC_OFFSET ); +DEVICE_ATTR_SEC_CSK_RO (bmc); +DEVICE_ATTR_SEC_CSK_RO (sr); +DEVICE_ATTR_SEC_CSK_RO (pr);#define FLASH_COUNT_SIZE 4096/* count stored as inverted bit vector */
@@ -141,6 +156,7 @@ static ssize_t flash_count_show(struct device *dev, struct device_attribute *attr, char *buf) { struct m10bmc_sec *sec = dev_get_drvdata(dev); +const struct m10bmc_csr_map *csr_map = sec->m10bmc->info->csr_map;unsigned int stride, num_bits;u8 *flash_buf;int cnt, ret;
@@ -160,12 +176,12 @@ static ssize_t flash_count_show(struct device *dev,if (!flash_buf)return -ENOMEM ; - ret =regmap_bulk_read (sec->m10bmc->regmap,STAGING_FLASH_COUNT , + ret =regmap_bulk_read (sec->m10bmc->regmap, csr_map->rsu_update_counter, flash_buf,FLASH_COUNT_SIZE / stride);if (ret) {dev_err (sec->dev,"failed to read flash count: %x cnt %x: %d\n" , -STAGING_FLASH_COUNT ,FLASH_COUNT_SIZE / stride, ret); + csr_map->rsu_update_counter,FLASH_COUNT_SIZE / stride, ret); goto exit_free; } cnt = num_bits -bitmap_weight ((unsigned long *)flash_buf, num_bits);
@@ -200,20 +216,22 @@ static const struct attribute_group *m10bmc_sec_attr_groups[] = {static void log_error_regs (struct m10bmc_sec *sec,u32 doorbell) { +const struct m10bmc_csr_map *csr_map = sec->m10bmc->info->csr_map;u32 auth_result;dev_err (sec->dev,"RSU error status: 0x%08x\n" , doorbell); -if (!m10bmc_sys_read (sec->m10bmc,M10BMC_AUTH_RESULT , &auth_result)) +if (!m10bmc_sys_read (sec->m10bmc, csr_map->auth_result, &auth_result))dev_err (sec->dev,"RSU auth result: 0x%08x\n" , auth_result); }static enum fw_upload_err rsu_check_idle (struct m10bmc_sec *sec) { +const struct m10bmc_csr_map *csr_map = sec->m10bmc->info->csr_map;u32 doorbell;int ret; - ret =m10bmc_sys_read (sec->m10bmc,M10BMC_DOORBELL , &doorbell); + ret =m10bmc_sys_read (sec->m10bmc, csr_map->doorbell, &doorbell);if (ret)return FW_UPLOAD_ERR_RW_ERROR ;
@@ -246,11 +264,12 @@ static inline bool rsu_start_done(u32 doorbell) static enum fw_upload_err rsu_update_init(struct m10bmc_sec *sec) { + const struct m10bmc_csr_map *csr_map = sec->m10bmc->info->csr_map; u32 doorbell, status; int ret; ret = regmap_update_bits(sec->m10bmc->regmap, - M10BMC_SYS_BASE + M10BMC_DOORBELL, + csr_map->base + csr_map->doorbell, DRBL_RSU_REQUEST | DRBL_HOST_STATUS, DRBL_RSU_REQUEST | FIELD_PREP(DRBL_HOST_STATUS,
@@ -259,7 +278,7 @@ static enum fw_upload_err rsu_update_init(struct m10bmc_sec *sec)return FW_UPLOAD_ERR_RW_ERROR ; ret = regmap_read_poll_timeout(sec->m10bmc->regmap, - M10BMC_SYS_BASE + M10BMC_DOORBELL, + csr_map->base + csr_map->doorbell, doorbell, rsu_start_done(doorbell), NIOS_HANDSHAKE_INTERVAL_US,
@@ -286,11 +305,12 @@ static enum fw_upload_err rsu_update_init(struct m10bmc_sec *sec)static enum fw_upload_err rsu_prog_ready (struct m10bmc_sec *sec) { +const struct m10bmc_csr_map *csr_map = sec->m10bmc->info->csr_map;unsigned long poll_timeout;u32 doorbell, progress;int ret; - ret =m10bmc_sys_read (sec->m10bmc,M10BMC_DOORBELL , &doorbell); + ret =m10bmc_sys_read (sec->m10bmc, csr_map->doorbell, &doorbell);if (ret)return FW_UPLOAD_ERR_RW_ERROR ;
@@ -300,7 +320,7 @@ static enum fw_upload_err rsu_prog_ready(struct m10bmc_sec *sec)if (time_after (jiffies, poll_timeout))break ; - ret =m10bmc_sys_read (sec->m10bmc,M10BMC_DOORBELL , &doorbell); + ret =m10bmc_sys_read (sec->m10bmc, csr_map->doorbell, &doorbell);if (ret)return FW_UPLOAD_ERR_RW_ERROR ; }
@@ -319,11 +339,12 @@ static enum fw_upload_err rsu_prog_ready(struct m10bmc_sec *sec)static enum fw_upload_err rsu_send_data (struct m10bmc_sec *sec) { +const struct m10bmc_csr_map *csr_map = sec->m10bmc->info->csr_map;u32 doorbell;int ret; ret =regmap_update_bits (sec->m10bmc->regmap, -M10BMC_SYS_BASE +M10BMC_DOORBELL , + csr_map->base + csr_map->doorbell,DRBL_HOST_STATUS ,FIELD_PREP (DRBL_HOST_STATUS ,HOST_STATUS_WRITE_DONE ));
@@ -331,7 +352,7 @@ static enum fw_upload_err rsu_send_data(struct m10bmc_sec *sec)return FW_UPLOAD_ERR_RW_ERROR ; ret = regmap_read_poll_timeout(sec->m10bmc->regmap, - M10BMC_SYS_BASE + M10BMC_DOORBELL, + csr_map->base + csr_map->doorbell, doorbell, rsu_prog(doorbell) != RSU_PROG_READY, NIOS_HANDSHAKE_INTERVAL_US,
@@ -360,7 +381,9 @@ static enum fw_upload_err rsu_send_data(struct m10bmc_sec *sec)static int rsu_check_complete (struct m10bmc_sec *sec,u32 *doorbell) { -if (m10bmc_sys_read (sec->m10bmc,M10BMC_DOORBELL , doorbell)) +const struct m10bmc_csr_map *csr_map = sec->m10bmc->info->csr_map; + +if (m10bmc_sys_read (sec->m10bmc, csr_map->doorbell, doorbell))return -EIO ;switch (rsu_stat (*doorbell)) {
@@ -389,10 +412,11 @@ static int rsu_check_complete(struct m10bmc_sec *sec, u32 *doorbell)static enum fw_upload_err rsu_cancel (struct m10bmc_sec *sec) { +const struct m10bmc_csr_map *csr_map = sec->m10bmc->info->csr_map;u32 doorbell;int ret; - ret =m10bmc_sys_read (sec->m10bmc,M10BMC_DOORBELL , &doorbell); + ret =m10bmc_sys_read (sec->m10bmc, csr_map->doorbell, &doorbell);if (ret)return FW_UPLOAD_ERR_RW_ERROR ;
@@ -400,7 +424,7 @@ static enum fw_upload_err rsu_cancel(struct m10bmc_sec *sec)return FW_UPLOAD_ERR_BUSY ; ret =regmap_update_bits (sec->m10bmc->regmap, -M10BMC_SYS_BASE +M10BMC_DOORBELL , + csr_map->base + csr_map->doorbell,DRBL_HOST_STATUS ,FIELD_PREP (DRBL_HOST_STATUS ,HOST_STATUS_ABORT_RSU ));
@@ -445,6 +469,7 @@ static enum fw_upload_err m10bmc_sec_write(struct fw_upload *fwl, const u8 *data u32 offset, u32 size, u32 *written) { struct m10bmc_sec *sec = fwl->dd_handle; +const struct m10bmc_csr_map *csr_map = sec->m10bmc->info->csr_map;u32 blk_size, doorbell, extra_offset;unsigned int stride, extra =0 ;int ret;
@@ -453,7 +478,7 @@ static enum fw_upload_err m10bmc_sec_write(struct fw_upload *fwl, const u8 *dataif (sec->cancel_request)return rsu_cancel (sec); - ret =m10bmc_sys_read (sec->m10bmc,M10BMC_DOORBELL , &doorbell); + ret =m10bmc_sys_read (sec->m10bmc, csr_map->doorbell, &doorbell);if (ret) {return FW_UPLOAD_ERR_RW_ERROR ; }else if (rsu_prog (doorbell) !=RSU_PROG_READY ) {
drivers/mfd/intel-m10-bmc-core.c +5 -5
@@ -19,7 +19,7 @@ static ssize_t bmc_version_show(struct device *dev,unsigned int val;int ret; - ret =m10bmc_sys_read (ddata,M10BMC_BUILD_VER , &val); + ret =m10bmc_sys_read (ddata, ddata->info->csr_map->build_version, &val);if (ret)return ret;
@@ -34,7 +34,7 @@ static ssize_t bmcfw_version_show(struct device *dev,unsigned int val;int ret; - ret =m10bmc_sys_read (ddata,NIOS2_FW_VERSION , &val); + ret =m10bmc_sys_read (ddata, ddata->info->csr_map->fw_version, &val);if (ret)return ret;
@@ -49,11 +49,11 @@ static ssize_t mac_address_show(struct device *dev,unsigned int macaddr_low, macaddr_high;int ret; - ret =m10bmc_sys_read (ddata,M10BMC_MAC_LOW , &macaddr_low); + ret =m10bmc_sys_read (ddata, ddata->info->csr_map->mac_low, &macaddr_low);if (ret)return ret; - ret =m10bmc_sys_read (ddata,M10BMC_MAC_HIGH , &macaddr_high); + ret =m10bmc_sys_read (ddata, ddata->info->csr_map->mac_high, &macaddr_high);if (ret)return ret;
@@ -74,7 +74,7 @@ static ssize_t mac_count_show(struct device *dev,unsigned int macaddr_high;int ret; - ret =m10bmc_sys_read (ddata,M10BMC_MAC_HIGH , &macaddr_high); + ret =m10bmc_sys_read (ddata, ddata->info->csr_map->mac_high, &macaddr_high);if (ret)return ret;
drivers/mfd/intel-m10-bmc-spi.c +23 -0
@@ -91,6 +91,26 @@ static int intel_m10_bmc_spi_probe(struct spi_device *spi)return m10bmc_dev_init (ddata, info); } +static const struct m10bmc_csr_map m10bmc_n3000_csr_map = { + .base =M10BMC_SYS_BASE , + .build_version =M10BMC_BUILD_VER , + .fw_version =NIOS2_FW_VERSION , + .mac_low =M10BMC_MAC_LOW , + .mac_high =M10BMC_MAC_HIGH , + .doorbell =M10BMC_DOORBELL , + .auth_result =M10BMC_AUTH_RESULT , + .bmc_prog_addr =BMC_PROG_ADDR , + .bmc_reh_addr =BMC_REH_ADDR , + .bmc_magic =BMC_PROG_MAGIC , + .sr_prog_addr =SR_PROG_ADDR , + .sr_reh_addr =SR_REH_ADDR , + .sr_magic =SR_PROG_MAGIC , + .pr_prog_addr =PR_PROG_ADDR , + .pr_reh_addr =PR_REH_ADDR , + .pr_magic =PR_PROG_MAGIC , + .rsu_update_counter =STAGING_FLASH_COUNT , +}; +static struct mfd_cell m10bmc_d5005_subdevs[] = { { .name ="d5005bmc-hwmon" }, { .name ="d5005bmc-sec-update" },
@@ -109,16 +129,19 @@ static struct mfd_cell m10bmc_n5010_subdevs[] = {static const struct intel_m10bmc_platform_info m10bmc_spi_n3000 = { .cells = m10bmc_pacn3000_subdevs, .n_cells =ARRAY_SIZE (m10bmc_pacn3000_subdevs), + .csr_map = &m10bmc_n3000_csr_map, };static const struct intel_m10bmc_platform_info m10bmc_spi_d5005 = { .cells = m10bmc_d5005_subdevs, .n_cells =ARRAY_SIZE (m10bmc_d5005_subdevs), + .csr_map = &m10bmc_n3000_csr_map, };static const struct intel_m10bmc_platform_info m10bmc_spi_n5010 = { .cells = m10bmc_n5010_subdevs, .n_cells =ARRAY_SIZE (m10bmc_n5010_subdevs), + .csr_map = &m10bmc_n3000_csr_map, };static const struct spi_device_id m10bmc_spi_id[] = {
include/linux/mfd/intel-m10-bmc.h +34 -4
@@ -121,14 +121,39 @@/* Address of 4KB inverted bit vector containing staging area FLASH count */ #define STAGING_FLASH_COUNT 0x17ffb000 +/** +* struct m10bmc_csr_map - Intel MAX 10 BMC CSR register map +*/ +struct m10bmc_csr_map { +unsigned int base; +unsigned int build_version; +unsigned int fw_version; +unsigned int mac_low; +unsigned int mac_high; +unsigned int doorbell; +unsigned int auth_result; +unsigned int bmc_prog_addr; +unsigned int bmc_reh_addr; +unsigned int bmc_magic; +unsigned int sr_prog_addr; +unsigned int sr_reh_addr; +unsigned int sr_magic; +unsigned int pr_prog_addr; +unsigned int pr_reh_addr; +unsigned int pr_magic; +unsigned int rsu_update_counter; +}; +/** * struct intel_m10bmc_platform_info - Intel MAX 10 BMC platform specific information * @cells: MFD cells * @n_cells: MFD cells ARRAY_SIZE() +* @csr_map: the mappings for register definition of MAX10 BMC */ struct intel_m10bmc_platform_info {struct mfd_cell *cells;int n_cells; +const struct m10bmc_csr_map *csr_map; };/**
@@ -167,12 +192,17 @@ m10bmc_raw_read(struct intel_m10bmc *m10bmc, unsigned int addr,* The base of the system registers could be configured by HW developers, and * in HW SPEC, the base is not added to the addresses of the system registers. * -* This macro helps to simplify the accessing of the system registers. And if +* This function helps to simplify the accessing of the system registers. And if * the base is reconfigured in HW, SW developers could simply change the -* M10BMC_SYS_BASE accordingly. +* csr_map's base accordingly. */ -#define m10bmc_sys_read (m10bmc, offset, val) \ - m10bmc_raw_read(m10bmc, M10BMC_SYS_BASE + (offset), val) +static inline int m10bmc_sys_read (struct intel_m10bmc *m10bmc,unsigned int offset, +unsigned int *val) +{ +const struct m10bmc_csr_map *csr_map = m10bmc->info->csr_map; + +return m10bmc_raw_read (m10bmc, csr_map->base + offset, val); +}/* * MAX10 BMC Core support
Signature · 1 line
2.30.2
Re: [PATCH v6 05/11] mfd: intel-m10-bmc: Support multiple CSR register layouts
Quoted 12 lines · Ilpo Järvinen
There are different addresses for the MAX10 CSR registers. Introducing a new data structure
m10bmc_csr_mapfor the register definition of MAX10 CSR.Provide the
csr_mapfor SPI.Co-developed-by Tianfei zhang <[email protected]>Signed-off-by Tianfei zhang <[email protected]>Reviewed-by Russ Weight <[email protected]>Reviewed-by Xu Yilun <[email protected]>Acked-for-MFD-by Lee Jones <[email protected]>Signed-off-by Ilpo Järvinen <[email protected]>
Quoted 6 lines
--- drivers/fpga/intel-m10-bmc-sec-update.c | 73 +++++++++++++++++-------- drivers/mfd/intel-m10-bmc-core.c | 10 ++-- drivers/mfd/intel-m10-bmc-spi.c | 23 ++++++++ include/linux/mfd/intel-m10-bmc.h | 38 +++++++++++-- 4 files changed, 111 insertions(+), 33 deletions(-)
Applied, thanks
Signature · 1 line
Lee Jones [李琼斯]
PATCH v6 6/11 fpga: intel-m10-bmc: Rework flash read/write
In reply to Ilpo JärvinenAccess to flash staging area is different for N6000 from that of the SPI interfaced counterparts. To make it easier to differentiate flash access path, move read/write into new functions where the new access path can be easily placed into. Rework the unaligned access such the behavior it matches for both read and write.
This change also renames m10bmc_sec_write() to m10bmc_sec_fw_write() as it would have a name conflict otherwise.
--- drivers/fpga/intel-m10-bmc-sec-update.c | 143 +++++++++++++----------- 1 file changed, 79 insertions(+), 64 deletions(-)
drivers/fpga/intel-m10-bmc-sec-update.c +79 -64
@@ -31,6 +31,65 @@ static DEFINE_XARRAY_ALLOC(fw_upload_xa);#define REH_MAGIC GENMASK(15, 0)#define REH_SHA_NUM_BYTES GENMASK(31, 16) +static int m10bmc_sec_write (struct m10bmc_sec *sec,const u8 *buf,u32 offset,u32 size) +{ +struct intel_m10bmc *m10bmc = sec->m10bmc; +unsigned int stride =regmap_get_reg_stride (m10bmc->regmap); +u32 write_count = size / stride; +u32 leftover_offset = write_count * stride; +u32 leftover_size = size - leftover_offset; +u32 leftover_tmp =0 ; +int ret; + +if (WARN_ON_ONCE (stride >sizeof (leftover_tmp))) +return -EINVAL ; + + ret =regmap_bulk_write (m10bmc->regmap,M10BMC_STAGING_BASE + offset, + buf + offset, write_count); +if (ret) +return ret; + +/* If size is not aligned to stride, handle the remainder bytes with regmap_write() */ +if (leftover_size) { +memcpy (&leftover_tmp, buf + leftover_offset, leftover_size); + ret =regmap_write (m10bmc->regmap,M10BMC_STAGING_BASE + offset + leftover_offset, + leftover_tmp); +if (ret) +return ret; + } + +return 0 ; +} + +static int m10bmc_sec_read (struct m10bmc_sec *sec,u8 *buf,u32 addr,u32 size) +{ +struct intel_m10bmc *m10bmc = sec->m10bmc; +unsigned int stride =regmap_get_reg_stride (m10bmc->regmap); +u32 read_count = size / stride; +u32 leftover_offset = read_count * stride; +u32 leftover_size = size - leftover_offset; +u32 leftover_tmp; +int ret; + +if (WARN_ON_ONCE (stride >sizeof (leftover_tmp))) +return -EINVAL ; + + ret =regmap_bulk_read (m10bmc->regmap, addr, buf, read_count); +if (ret) +return ret; + +/* If size is not aligned to stride, handle the remainder bytes with regmap_read() */ +if (leftover_size) { + ret =regmap_read (m10bmc->regmap, addr + leftover_offset, &leftover_tmp); +if (ret) +return ret; +memcpy (buf + leftover_offset, &leftover_tmp, leftover_size); + } + +return 0 ; +} + +static ssize_t show_root_entry_hash (struct device *dev,u32 exp_magic,u32 prog_addr,u32 reh_addr,char *buf)
@@ -38,11 +97,9 @@ show_root_entry_hash(struct device *dev, u32 exp_magic,struct m10bmc_sec *sec =dev_get_drvdata (dev);int sha_num_bytes, i, ret, cnt =0 ;u8 hash[REH_SHA384_SIZE ]; -unsigned int stride;u32 magic; - stride =regmap_get_reg_stride (sec->m10bmc->regmap); - ret =m10bmc_raw_read (sec->m10bmc, prog_addr, &magic); + ret =m10bmc_sec_read (sec, (u8 *)&magic, prog_addr,sizeof (magic));if (ret)return ret;
@@ -50,19 +107,16 @@ show_root_entry_hash(struct device *dev, u32 exp_magic,return sysfs_emit (buf,"hash not programmed\n" ); sha_num_bytes =FIELD_GET (REH_SHA_NUM_BYTES , magic) /8 ; -if ((sha_num_bytes % stride) || - (sha_num_bytes !=REH_SHA256_SIZE && - sha_num_bytes !=REH_SHA384_SIZE )) { +if (sha_num_bytes !=REH_SHA256_SIZE && + sha_num_bytes !=REH_SHA384_SIZE ) {dev_err (sec->dev,"%s bad sha num bytes %d\n" , __func__, sha_num_bytes);return -EINVAL ; } - ret =regmap_bulk_read (sec->m10bmc->regmap, reh_addr, - hash, sha_num_bytes / stride); + ret =m10bmc_sec_read (sec, hash, reh_addr, sha_num_bytes);if (ret) { -dev_err (dev,"failed to read root entry hash: %x cnt %x: %d\n" , - reh_addr, sha_num_bytes / stride, ret); +dev_err (dev,"failed to read root entry hash\n" );return ret; }
@@ -98,27 +152,16 @@ DEVICE_ATTR_SEC_REH_RO(pr);static ssize_t show_canceled_csk (struct device *dev,u32 addr,char *buf) { -unsigned int i, stride, size =CSK_32ARRAY_SIZE *sizeof (u32); +unsigned int i, size =CSK_32ARRAY_SIZE *sizeof (u32);struct m10bmc_sec *sec =dev_get_drvdata (dev);DECLARE_BITMAP (csk_map,CSK_BIT_LEN );__le32 csk_le32[CSK_32ARRAY_SIZE ];u32 csk32[CSK_32ARRAY_SIZE ];int ret; - stride =regmap_get_reg_stride (sec->m10bmc->regmap); -if (size % stride) { -dev_err (sec->dev, -"CSK vector size (0x%x) not aligned to stride (0x%x)\n" , - size, stride); -WARN_ON_ONCE (1 ); -return -EINVAL ; - } - - ret =regmap_bulk_read (sec->m10bmc->regmap, addr, csk_le32, - size / stride); + ret =m10bmc_sec_read (sec, (u8 *)&csk_le32, addr, size);if (ret) { -dev_err (sec->dev,"failed to read CSK vector: %x cnt %x: %d\n" , - addr, size / stride, ret); +dev_err (sec->dev,"failed to read CSK vector\n" );return ret; }
@@ -157,31 +200,20 @@ static ssize_t flash_count_show(struct device *dev, {struct m10bmc_sec *sec =dev_get_drvdata (dev);const struct m10bmc_csr_map *csr_map = sec->m10bmc->info->csr_map; -unsigned int stride, num_bits; +unsigned int num_bits;u8 *flash_buf;int cnt, ret; - stride =regmap_get_reg_stride (sec->m10bmc->regmap); num_bits =FLASH_COUNT_SIZE *8 ; -if (FLASH_COUNT_SIZE % stride) { -dev_err (sec->dev, -"FLASH_COUNT_SIZE (0x%x) not aligned to stride (0x%x)\n" , -FLASH_COUNT_SIZE , stride); -WARN_ON_ONCE (1 ); -return -EINVAL ; - } - flash_buf =kmalloc (FLASH_COUNT_SIZE ,GFP_KERNEL );if (!flash_buf)return -ENOMEM ; - ret =regmap_bulk_read (sec->m10bmc->regmap, csr_map->rsu_update_counter, - flash_buf,FLASH_COUNT_SIZE / stride); + ret =m10bmc_sec_read (sec, flash_buf, csr_map->rsu_update_counter, +FLASH_COUNT_SIZE );if (ret) { -dev_err (sec->dev, -"failed to read flash count: %x cnt %x: %d\n" , - csr_map->rsu_update_counter,FLASH_COUNT_SIZE / stride, ret); +dev_err (sec->dev,"failed to read flash count\n" ); goto exit_free; } cnt = num_bits -bitmap_weight ((unsigned long *)flash_buf, num_bits);
@@ -465,20 +497,19 @@ static enum fw_upload_err m10bmc_sec_prepare(struct fw_upload *fwl,#define WRITE_BLOCK_SIZE 0x4000/* Default write-block size is 0x4000 bytes */ -static enum fw_upload_err m10bmc_sec_write (struct fw_upload *fwl,const u8 *data, -u32 offset,u32 size,u32 *written) +static enum fw_upload_err m10bmc_sec_fw_write (struct fw_upload *fwl,const u8 *data, +u32 offset,u32 size,u32 *written) {struct m10bmc_sec *sec = fwl->dd_handle;const struct m10bmc_csr_map *csr_map = sec->m10bmc->info->csr_map; -u32 blk_size, doorbell, extra_offset; -unsigned int stride, extra =0 ; +struct intel_m10bmc *m10bmc = sec->m10bmc; +u32 blk_size, doorbell;int ret; - stride =regmap_get_reg_stride (sec->m10bmc->regmap);if (sec->cancel_request)return rsu_cancel (sec); - ret =m10bmc_sys_read (sec->m10bmc, csr_map->doorbell, &doorbell); + ret =m10bmc_sys_read (m10bmc, csr_map->doorbell, &doorbell);if (ret) {return FW_UPLOAD_ERR_RW_ERROR ; }else if (rsu_prog (doorbell) !=RSU_PROG_READY ) {
@@ -486,28 +517,12 @@ static enum fw_upload_err m10bmc_sec_write(struct fw_upload *fwl, const u8 *datareturn FW_UPLOAD_ERR_HW_ERROR ; } -WARN_ON_ONCE (WRITE_BLOCK_SIZE % stride); +WARN_ON_ONCE (WRITE_BLOCK_SIZE %regmap_get_reg_stride (m10bmc->regmap)); blk_size =min_t (u32,WRITE_BLOCK_SIZE , size); - ret =regmap_bulk_write (sec->m10bmc->regmap, -M10BMC_STAGING_BASE + offset, - (void *)data + offset, - blk_size / stride); + ret =m10bmc_sec_write (sec, data, offset, blk_size);if (ret)return FW_UPLOAD_ERR_RW_ERROR ; -/* -* If blk_size is not aligned to stride, then handle the extra -* bytes with regmap_write. -*/ -if (blk_size % stride) { - extra_offset = offset +ALIGN_DOWN (blk_size, stride); -memcpy (&extra, (u8 *)(data + extra_offset), blk_size % stride); - ret =regmap_write (sec->m10bmc->regmap, -M10BMC_STAGING_BASE + extra_offset, extra); -if (ret) -return FW_UPLOAD_ERR_RW_ERROR ; - } - *written = blk_size;return FW_UPLOAD_ERR_NONE ; }
@@ -568,7 +583,7 @@ static void m10bmc_sec_cleanup(struct fw_upload *fwl)static const struct fw_upload_ops m10bmc_ops = { .prepare = m10bmc_sec_prepare, - .write = m10bmc_sec_write, + .write = m10bmc_sec_fw_write, .poll_complete = m10bmc_sec_poll_complete, .cancel = m10bmc_sec_cancel, .cleanup = m10bmc_sec_cleanup,
Signature · 1 line
2.30.2
Re: [PATCH v6 06/11] fpga: intel-m10-bmc: Rework flash read/write
Quoted 15 lines · Ilpo Järvinen
Access to flash staging area is different for N6000 from that of the SPI interfaced counterparts. To make it easier to differentiate flash access path, move read/write into new functions where the new access path can be easily placed into. Rework the unaligned access such the behavior it matches for both read and write.
This change also renames
m10bmc_sec_write()tom10bmc_sec_fw_write()as it would have a name conflict otherwise.Co-developed-by Tianfei zhang <[email protected]>Signed-off-by Tianfei zhang <[email protected]>Co-developed-by Russ Weight <[email protected]>Signed-off-by Russ Weight <[email protected]>Acked-by Xu Yilun <[email protected]>Signed-off-by Ilpo Järvinen <[email protected]>
Quoted 3 lines
--- drivers/fpga/intel-m10-bmc-sec-update.c | 143 +++++++++++++----------- 1 file changed, 79 insertions(+), 64 deletions(-)
Applied, thanks
Signature · 1 line
Lee Jones [李琼斯]
PATCH v6 7/11 mfd: intel-m10-bmc: Prefix register defines with M10BMC_N3000
In reply to Ilpo JärvinenPrefix the M10BMC defines register defines with M10BMC_N3000 to make it more obvious these are related to some board type. All current non-N3000 board types have the same layout so they'll be reused. The less generic makes it more obvious they're not meant for the generic/interface agnostic code.
--- drivers/mfd/intel-m10-bmc-core.c | 14 +++---- drivers/mfd/intel-m10-bmc-spi.c | 52 ++++++++++++------------ include/linux/mfd/intel-m10-bmc.h | 66 +++++++++++++++---------------- 3 files changed, 66 insertions(+), 66 deletions(-)
drivers/mfd/intel-m10-bmc-core.c +7 -7
@@ -58,12 +58,12 @@ static ssize_t mac_address_show(struct device *dev,return ret;return sysfs_emit (buf,"%02x:%02x:%02x:%02x:%02x:%02x\n" , - (u8 )FIELD_GET (M10BMC_MAC_BYTE1 , macaddr_low), - (u8 )FIELD_GET (M10BMC_MAC_BYTE2 , macaddr_low), - (u8 )FIELD_GET (M10BMC_MAC_BYTE3 , macaddr_low), - (u8 )FIELD_GET (M10BMC_MAC_BYTE4 , macaddr_low), - (u8 )FIELD_GET (M10BMC_MAC_BYTE5 , macaddr_high), - (u8 )FIELD_GET (M10BMC_MAC_BYTE6 , macaddr_high)); + (u8 )FIELD_GET (M10BMC_N3000_MAC_BYTE1 , macaddr_low), + (u8 )FIELD_GET (M10BMC_N3000_MAC_BYTE2 , macaddr_low), + (u8 )FIELD_GET (M10BMC_N3000_MAC_BYTE3 , macaddr_low), + (u8 )FIELD_GET (M10BMC_N3000_MAC_BYTE4 , macaddr_low), + (u8 )FIELD_GET (M10BMC_N3000_MAC_BYTE5 , macaddr_high), + (u8 )FIELD_GET (M10BMC_N3000_MAC_BYTE6 , macaddr_high)); }static DEVICE_ATTR_RO (mac_address);
@@ -78,7 +78,7 @@ static ssize_t mac_count_show(struct device *dev,if (ret)return ret; -return sysfs_emit (buf,"%u\n" , (u8 )FIELD_GET (M10BMC_MAC_COUNT , macaddr_high)); +return sysfs_emit (buf,"%u\n" , (u8 )FIELD_GET (M10BMC_N3000_MAC_COUNT , macaddr_high)); }static DEVICE_ATTR_RO (mac_count);
drivers/mfd/intel-m10-bmc-spi.c +26 -26
81 lines not on this page · raw message
include/linux/mfd/intel-m10-bmc.h +33 -33
91 lines not on this page · raw message
Signature · 1 line
2.30.2
Re: [PATCH v6 07/11] mfd: intel-m10-bmc: Prefix register defines with M10BMC_N3000
Quoted 6 lines · Ilpo Järvinen
Prefix the M10BMC defines register defines with
M10BMC_N3000to make it more obvious these are related to some board type. All current non-N3000 board types have the same layout so they'll be reused. The less generic makes it more obvious they're not meant for the generic/interface agnostic code.
Quoted 8 lines
Reviewed-by Russ Weight <[email protected]>Reviewed-by Xu Yilun <[email protected]>Signed-off-by Ilpo Järvinen <[email protected]>--- drivers/mfd/intel-m10-bmc-core.c | 14 +++---- drivers/mfd/intel-m10-bmc-spi.c | 52 ++++++++++++------------ include/linux/mfd/intel-m10-bmc.h | 66 +++++++++++++++---------------- 3 files changed, 66 insertions(+), 66 deletions(-)
Applied, thanks
Signature · 1 line
Lee Jones [李琼斯]
PATCH v6 8/11 fpga: m10bmc-sec: Create helpers for rsu status/progress checks
In reply to Ilpo JärvinenRSU_STAT_* and RSU_PROG_* checks are done in more than one place in the sec update code. Move the checks into new helper functions.
No function changes intended.
--- drivers/fpga/intel-m10-bmc-sec-update.c | 59 +++++++++++++------------ 1 file changed, 31 insertions(+), 28 deletions(-)
drivers/fpga/intel-m10-bmc-sec-update.c +31 -28
@@ -257,6 +257,28 @@ static void log_error_regs(struct m10bmc_sec *sec, u32 doorbell)dev_err (sec->dev,"RSU auth result: 0x%08x\n" , auth_result); } +static bool rsu_status_ok (u32 status) +{ +return (status ==RSU_STAT_NORMAL || + status ==RSU_STAT_NIOS_OK || + status ==RSU_STAT_USER_OK || + status ==RSU_STAT_FACTORY_OK ); +} + +static bool rsu_progress_done (u32 progress) +{ +return (progress ==RSU_PROG_IDLE || + progress ==RSU_PROG_RSU_DONE ); +} + +static bool rsu_progress_busy (u32 progress) +{ +return (progress ==RSU_PROG_AUTHENTICATING || + progress ==RSU_PROG_COPYING || + progress ==RSU_PROG_UPDATE_CANCEL || + progress ==RSU_PROG_PROGRAM_KEY_HASH ); +} +static enum fw_upload_err rsu_check_idle (struct m10bmc_sec *sec) {const struct m10bmc_csr_map *csr_map = sec->m10bmc->info->csr_map;
@@ -267,8 +289,7 @@ static enum fw_upload_err rsu_check_idle(struct m10bmc_sec *sec)if (ret)return FW_UPLOAD_ERR_RW_ERROR ; -if (rsu_prog (doorbell) !=RSU_PROG_IDLE && -rsu_prog (doorbell) !=RSU_PROG_RSU_DONE ) { +if (!rsu_progress_done (rsu_prog (doorbell))) {log_error_regs (sec, doorbell);return FW_UPLOAD_ERR_BUSY ; }
@@ -288,7 +309,7 @@ static inline bool rsu_start_done(u32 doorbell)return true; progress =rsu_prog (doorbell); -if (progress !=RSU_PROG_IDLE && progress !=RSU_PROG_RSU_DONE ) +if (!rsu_progress_done (progress))return true;return false;
@@ -397,13 +418,7 @@ static enum fw_upload_err rsu_send_data(struct m10bmc_sec *sec)return FW_UPLOAD_ERR_RW_ERROR ; } -switch (rsu_stat (doorbell)) { -case RSU_STAT_NORMAL : -case RSU_STAT_NIOS_OK : -case RSU_STAT_USER_OK : -case RSU_STAT_FACTORY_OK : -break ; -default : +if (!rsu_status_ok (rsu_stat (doorbell))) {log_error_regs (sec, doorbell);return FW_UPLOAD_ERR_HW_ERROR ; }
@@ -418,28 +433,16 @@ static int rsu_check_complete(struct m10bmc_sec *sec, u32 *doorbell)if (m10bmc_sys_read (sec->m10bmc, csr_map->doorbell, doorbell))return -EIO ; -switch (rsu_stat (*doorbell)) { -case RSU_STAT_NORMAL : -case RSU_STAT_NIOS_OK : -case RSU_STAT_USER_OK : -case RSU_STAT_FACTORY_OK : -break ; -default : +if (!rsu_status_ok (rsu_stat (*doorbell)))return -EINVAL ; - } -switch (rsu_prog (*doorbell)) { -case RSU_PROG_IDLE : -case RSU_PROG_RSU_DONE : +if (rsu_progress_done (rsu_prog (*doorbell)))return 0 ; -case RSU_PROG_AUTHENTICATING : -case RSU_PROG_COPYING : -case RSU_PROG_UPDATE_CANCEL : -case RSU_PROG_PROGRAM_KEY_HASH : + +if (rsu_progress_busy (rsu_prog (*doorbell)))return -EAGAIN ; -default : -return -EINVAL ; - } + +return -EINVAL ; }static enum fw_upload_err rsu_cancel (struct m10bmc_sec *sec)
Signature · 1 line
2.30.2
Re: [PATCH v6 08/11] fpga: m10bmc-sec: Create helpers for rsu status/progress checks
Quoted 11 lines · Ilpo Järvinen
RSU_STAT_* and RSU_PROG_* checks are done in more than one place in the sec update code. Move the checks into new helper functions.
No function changes intended.
Co-developed-by Tianfei zhang <[email protected]>Signed-off-by Tianfei zhang <[email protected]>Co-developed-by Russ Weight <[email protected]>Signed-off-by Russ Weight <[email protected]>Acked-by Xu Yilun <[email protected]>Signed-off-by Ilpo Järvinen <[email protected]>
Quoted 3 lines
--- drivers/fpga/intel-m10-bmc-sec-update.c | 59 +++++++++++++------------ 1 file changed, 31 insertions(+), 28 deletions(-)
Applied, thanks
Signature · 1 line
Lee Jones [李琼斯]
PATCH v6 9/11 fpga: m10bmc-sec: Make rsu status type specific
In reply to Ilpo JärvinenThe rsu status field moves from the doorbell register to the auth result register in the PMCI implementation of the MAX10 BMC. In order to prepare for that, refactor the sec update driver code to have a type specific ops that provides ->rsu_status().
--- drivers/fpga/intel-m10-bmc-sec-update.c | 109 +++++++++++++++++------- include/linux/mfd/intel-m10-bmc.h | 1 - 2 files changed, 78 insertions(+), 32 deletions(-)
drivers/fpga/intel-m10-bmc-sec-update.c +78 -31
@@ -14,6 +14,12 @@#include <linux/platform_device.h> #include <linux/slab.h> +struct m10bmc_sec ; + +struct m10bmc_sec_ops { +int (*rsu_status)(struct m10bmc_sec *sec); +}; +struct m10bmc_sec {struct device *dev;struct intel_m10bmc *m10bmc;
@@ -21,6 +27,7 @@ struct m10bmc_sec {char *fw_name;u32 fw_name_id;bool cancel_request; +const struct m10bmc_sec_ops *ops; };static DEFINE_XARRAY_ALLOC (fw_upload_xa);
@@ -251,12 +258,25 @@ static void log_error_regs(struct m10bmc_sec *sec, u32 doorbell)const struct m10bmc_csr_map *csr_map = sec->m10bmc->info->csr_map;u32 auth_result; -dev_err (sec->dev,"RSU error status: 0x%08x\n" , doorbell); +dev_err (sec->dev,"Doorbell: 0x%08x\n" , doorbell);if (!m10bmc_sys_read (sec->m10bmc, csr_map->auth_result, &auth_result))dev_err (sec->dev,"RSU auth result: 0x%08x\n" , auth_result); } +static int m10bmc_sec_n3000_rsu_status (struct m10bmc_sec *sec) +{ +const struct m10bmc_csr_map *csr_map = sec->m10bmc->info->csr_map; +u32 doorbell; +int ret; + + ret =m10bmc_sys_read (sec->m10bmc, csr_map->doorbell, &doorbell); +if (ret) +return ret; + +return FIELD_GET (DRBL_RSU_STATUS , doorbell); +} +static bool rsu_status_ok (u32 status) { return (status == RSU_STAT_NORMAL ||
@@ -279,6 +299,26 @@ static bool rsu_progress_busy(u32 progress) progress == RSU_PROG_PROGRAM_KEY_HASH); } +static int m10bmc_sec_progress_status (struct m10bmc_sec *sec,u32 *doorbell_reg, +u32 *progress,u32 *status) +{ +const struct m10bmc_csr_map *csr_map = sec->m10bmc->info->csr_map; +int ret; + + ret =m10bmc_sys_read (sec->m10bmc, csr_map->doorbell, doorbell_reg); +if (ret) +return ret; + + ret = sec->ops->rsu_status (sec); +if (ret <0 ) +return ret; + + *status = ret; + *progress =rsu_prog (*doorbell_reg); + +return 0 ; +} +static enum fw_upload_err rsu_check_idle (struct m10bmc_sec *sec) {const struct m10bmc_csr_map *csr_map = sec->m10bmc->info->csr_map;
@@ -297,18 +337,14 @@ static enum fw_upload_err rsu_check_idle(struct m10bmc_sec *sec)return FW_UPLOAD_ERR_NONE ; } -static inline bool rsu_start_done (u32 doorbell) +static inline bool rsu_start_done (u32 doorbell_reg,u32 progress,u32 status) { -u32 status, progress; - -if (doorbell &DRBL_RSU_REQUEST ) +if (doorbell_reg &DRBL_RSU_REQUEST )return false; - status =rsu_stat (doorbell);if (status ==RSU_STAT_ERASE_FAIL || status ==RSU_STAT_WEAROUT )return true; - progress =rsu_prog (doorbell);if (!rsu_progress_done (progress))return true;
@@ -318,8 +354,8 @@ static inline bool rsu_start_done(u32 doorbell)static enum fw_upload_err rsu_update_init (struct m10bmc_sec *sec) {const struct m10bmc_csr_map *csr_map = sec->m10bmc->info->csr_map; -u32 doorbell, status; -int ret; +u32 doorbell_reg, progress, status; +int ret, err; ret = regmap_update_bits(sec->m10bmc->regmap, csr_map->base + csr_map->doorbell,
@@ -330,26 +366,25 @@ static enum fw_upload_err rsu_update_init(struct m10bmc_sec *sec)if (ret)return FW_UPLOAD_ERR_RW_ERROR ; - ret =regmap_read_poll_timeout (sec->m10bmc->regmap, - csr_map->base + csr_map->doorbell, - doorbell, -rsu_start_done (doorbell), -NIOS_HANDSHAKE_INTERVAL_US , -NIOS_HANDSHAKE_TIMEOUT_US ); + ret =read_poll_timeout (m10bmc_sec_progress_status, err, + err <0 ||rsu_start_done (doorbell_reg, progress, status), +NIOS_HANDSHAKE_INTERVAL_US , +NIOS_HANDSHAKE_TIMEOUT_US , + false, + sec, &doorbell_reg, &progress, &status);if (ret == -ETIMEDOUT ) { -log_error_regs (sec, doorbell); +log_error_regs (sec, doorbell_reg);return FW_UPLOAD_ERR_TIMEOUT ; - }else if (ret) { + }else if (err) {return FW_UPLOAD_ERR_RW_ERROR ; } - status =rsu_stat (doorbell);if (status ==RSU_STAT_WEAROUT ) {dev_warn (sec->dev,"Excessive flash update count detected\n" );return FW_UPLOAD_ERR_WEAROUT ; }else if (status ==RSU_STAT_ERASE_FAIL ) { -log_error_regs (sec, doorbell); +log_error_regs (sec, doorbell_reg);return FW_UPLOAD_ERR_HW_ERROR ; }
@@ -393,7 +428,7 @@ static enum fw_upload_err rsu_prog_ready(struct m10bmc_sec *sec)static enum fw_upload_err rsu_send_data (struct m10bmc_sec *sec) {const struct m10bmc_csr_map *csr_map = sec->m10bmc->info->csr_map; -u32 doorbell; +u32 doorbell_reg, status;int ret; ret = regmap_update_bits(sec->m10bmc->regmap,
@@ -406,40 +441,45 @@ static enum fw_upload_err rsu_send_data(struct m10bmc_sec *sec) ret =regmap_read_poll_timeout (sec->m10bmc->regmap, csr_map->base + csr_map->doorbell, - doorbell, -rsu_prog (doorbell) !=RSU_PROG_READY , + doorbell_reg, +rsu_prog (doorbell_reg) !=RSU_PROG_READY ,NIOS_HANDSHAKE_INTERVAL_US ,NIOS_HANDSHAKE_TIMEOUT_US );if (ret == -ETIMEDOUT ) { -log_error_regs (sec, doorbell); +log_error_regs (sec, doorbell_reg);return FW_UPLOAD_ERR_TIMEOUT ; }else if (ret) {return FW_UPLOAD_ERR_RW_ERROR ; } -if (!rsu_status_ok (rsu_stat (doorbell))) { -log_error_regs (sec, doorbell); + ret = sec->ops->rsu_status (sec); +if (ret <0 ) +return ret; + status = ret; + +if (!rsu_status_ok (status)) { +log_error_regs (sec, doorbell_reg);return FW_UPLOAD_ERR_HW_ERROR ; }return FW_UPLOAD_ERR_NONE ; } -static int rsu_check_complete (struct m10bmc_sec *sec,u32 *doorbell) +static int rsu_check_complete (struct m10bmc_sec *sec,u32 *doorbell_reg) { -const struct m10bmc_csr_map *csr_map = sec->m10bmc->info->csr_map; +u32 progress, status; -if (m10bmc_sys_read (sec->m10bmc, csr_map->doorbell, doorbell)) +if (m10bmc_sec_progress_status (sec, doorbell_reg, &progress, &status))return -EIO ; -if (!rsu_status_ok (rsu_stat (*doorbell))) +if (!rsu_status_ok (status))return -EINVAL ; -if (rsu_progress_done (rsu_prog (*doorbell))) +if (rsu_progress_done (progress))return 0 ; -if (rsu_progress_busy (rsu_prog (*doorbell))) +if (rsu_progress_busy (progress))return -EAGAIN ;return -EINVAL ;
@@ -592,6 +632,10 @@ static const struct fw_upload_ops m10bmc_ops = { .cleanup = m10bmc_sec_cleanup, }; +static const struct m10bmc_sec_ops m10sec_n3000_ops = { + .rsu_status = m10bmc_sec_n3000_rsu_status, +}; +#define SEC_UPDATE_LEN_MAX 32static int m10bmc_sec_probe (struct platform_device *pdev) {
@@ -607,6 +651,7 @@ static int m10bmc_sec_probe(struct platform_device *pdev) sec->dev = &pdev->dev; sec->m10bmc =dev_get_drvdata (pdev->dev.parent); + sec->ops = (struct m10bmc_sec_ops *)platform_get_device_id (pdev)->driver_data;dev_set_drvdata (&pdev->dev, sec); ret = xa_alloc(&fw_upload_xa, &sec->fw_name_id, sec,
@@ -654,9 +699,11 @@ static int m10bmc_sec_remove(struct platform_device *pdev)static const struct platform_device_id intel_m10bmc_sec_ids[] = { { .name ="n3000bmc-sec-update" , + .driver_data = (kernel_ulong_t)&m10sec_n3000_ops, }, { .name ="d5005bmc-sec-update" , + .driver_data = (kernel_ulong_t)&m10sec_n3000_ops, }, { } };
include/linux/mfd/intel-m10-bmc.h +0 -1
@@ -91,7 +91,6 @@#define HOST_STATUS_ABORT_RSU 0x2#define rsu_prog (doorbell) FIELD_GET(DRBL_RSU_PROGRESS, doorbell) -#define rsu_stat (doorbell) FIELD_GET(DRBL_RSU_STATUS, doorbell)/* interval 100ms and timeout 5s */ #define NIOS_HANDSHAKE_INTERVAL_US (100 * 1000)
Signature · 1 line
2.30.2
Re: [PATCH v6 09/11] fpga: m10bmc-sec: Make rsu status type specific
Quoted 10 lines · Ilpo Järvinen
The rsu status field moves from the doorbell register to the auth result register in the PMCI implementation of the MAX10 BMC. In order to prepare for that, refactor the sec update driver code to have a type specific ops that provides ->rsu_status().
Co-developed-by Tianfei zhang <[email protected]>Signed-off-by Tianfei zhang <[email protected]>Co-developed-by Russ Weight <[email protected]>Signed-off-by Russ Weight <[email protected]>Signed-off-by Ilpo Järvinen <[email protected]>
Quoted 264 lines
--- drivers/fpga/intel-m10-bmc-sec-update.c | 109 +++++++++++++++++------- include/linux/mfd/intel-m10-bmc.h | 1 - 2 files changed, 78 insertions(+), 32 deletions(-)drivers/fpga/intel-m10-bmc-sec-update.c +78
-31@@ -14,6 +14,12 @@#include <linux/platform_device.h> #include <linux/slab.h> +struct m10bmc_sec ; + +struct m10bmc_sec_ops { +int (*rsu_status)(struct m10bmc_sec *sec); +}; +struct m10bmc_sec {struct device *dev;struct intel_m10bmc *m10bmc;@@ -21,6 +27,7 @@ struct m10bmc_sec {char *fw_name;u32 fw_name_id;bool cancel_request; +const struct m10bmc_sec_ops *ops; };static DEFINE_XARRAY_ALLOC (fw_upload_xa);@@ -251,12 +258,25 @@ static void log_error_regs(struct m10bmc_sec *sec, u32 doorbell)const struct m10bmc_csr_map *csr_map = sec->m10bmc->info->csr_map;u32 auth_result; -dev_err (sec->dev,"RSU error status: 0x%08x\n" , doorbell); +dev_err (sec->dev,"Doorbell: 0x%08x\n" , doorbell);if (!m10bmc_sys_read (sec->m10bmc, csr_map->auth_result, &auth_result))dev_err (sec->dev,"RSU auth result: 0x%08x\n" , auth_result); } +static int m10bmc_sec_n3000_rsu_status (struct m10bmc_sec *sec) +{ +const struct m10bmc_csr_map *csr_map = sec->m10bmc->info->csr_map; +u32 doorbell; +int ret; + + ret =m10bmc_sys_read (sec->m10bmc, csr_map->doorbell, &doorbell); +if (ret) +return ret; + +return FIELD_GET (DRBL_RSU_STATUS , doorbell); +} +static bool rsu_status_ok (u32 status) { return (status == RSU_STAT_NORMAL ||@@ -279,6 +299,26 @@ static bool rsu_progress_busy(u32 progress) progress == RSU_PROG_PROGRAM_KEY_HASH); } +static int m10bmc_sec_progress_status (struct m10bmc_sec *sec,u32 *doorbell_reg, +u32 *progress,u32 *status) +{ +const struct m10bmc_csr_map *csr_map = sec->m10bmc->info->csr_map; +int ret; + + ret =m10bmc_sys_read (sec->m10bmc, csr_map->doorbell, doorbell_reg); +if (ret) +return ret; + + ret = sec->ops->rsu_status (sec); +if (ret <0 ) +return ret; + + *status = ret; + *progress =rsu_prog (*doorbell_reg); + +return 0 ; +} +static enum fw_upload_err rsu_check_idle (struct m10bmc_sec *sec) {const struct m10bmc_csr_map *csr_map = sec->m10bmc->info->csr_map;@@ -297,18 +337,14 @@ static enum fw_upload_err rsu_check_idle(struct m10bmc_sec *sec)return FW_UPLOAD_ERR_NONE ; } -static inline bool rsu_start_done (u32 doorbell) +static inline bool rsu_start_done (u32 doorbell_reg,u32 progress,u32 status) { -u32 status, progress; - -if (doorbell &DRBL_RSU_REQUEST ) +if (doorbell_reg &DRBL_RSU_REQUEST )return false; - status =rsu_stat (doorbell);if (status ==RSU_STAT_ERASE_FAIL || status ==RSU_STAT_WEAROUT )return true; - progress =rsu_prog (doorbell);if (!rsu_progress_done (progress))return true;@@ -318,8 +354,8 @@ static inline bool rsu_start_done(u32 doorbell)static enum fw_upload_err rsu_update_init (struct m10bmc_sec *sec) {const struct m10bmc_csr_map *csr_map = sec->m10bmc->info->csr_map; -u32 doorbell, status; -int ret; +u32 doorbell_reg, progress, status; +int ret, err; ret = regmap_update_bits(sec->m10bmc->regmap, csr_map->base + csr_map->doorbell,@@ -330,26 +366,25 @@ static enum fw_upload_err rsu_update_init(struct m10bmc_sec *sec)if (ret)return FW_UPLOAD_ERR_RW_ERROR ; - ret =regmap_read_poll_timeout (sec->m10bmc->regmap, - csr_map->base + csr_map->doorbell, - doorbell, -rsu_start_done (doorbell), -NIOS_HANDSHAKE_INTERVAL_US , -NIOS_HANDSHAKE_TIMEOUT_US ); + ret =read_poll_timeout (m10bmc_sec_progress_status, err, + err <0 ||rsu_start_done (doorbell_reg, progress, status), +NIOS_HANDSHAKE_INTERVAL_US , +NIOS_HANDSHAKE_TIMEOUT_US , + false, + sec, &doorbell_reg, &progress, &status);if (ret == -ETIMEDOUT ) { -log_error_regs (sec, doorbell); +log_error_regs (sec, doorbell_reg);return FW_UPLOAD_ERR_TIMEOUT ; - }else if (ret) { + }else if (err) {return FW_UPLOAD_ERR_RW_ERROR ; } - status =rsu_stat (doorbell);if (status ==RSU_STAT_WEAROUT ) {dev_warn (sec->dev,"Excessive flash update count detected\n" );return FW_UPLOAD_ERR_WEAROUT ; }else if (status ==RSU_STAT_ERASE_FAIL ) { -log_error_regs (sec, doorbell); +log_error_regs (sec, doorbell_reg);return FW_UPLOAD_ERR_HW_ERROR ; }@@ -393,7 +428,7 @@ static enum fw_upload_err rsu_prog_ready(struct m10bmc_sec *sec)static enum fw_upload_err rsu_send_data (struct m10bmc_sec *sec) {const struct m10bmc_csr_map *csr_map = sec->m10bmc->info->csr_map; -u32 doorbell; +u32 doorbell_reg, status;int ret; ret = regmap_update_bits(sec->m10bmc->regmap,@@ -406,40 +441,45 @@ static enum fw_upload_err rsu_send_data(struct m10bmc_sec *sec) ret =regmap_read_poll_timeout (sec->m10bmc->regmap, csr_map->base + csr_map->doorbell, - doorbell, -rsu_prog (doorbell) !=RSU_PROG_READY , + doorbell_reg, +rsu_prog (doorbell_reg) !=RSU_PROG_READY ,NIOS_HANDSHAKE_INTERVAL_US ,NIOS_HANDSHAKE_TIMEOUT_US );if (ret == -ETIMEDOUT ) { -log_error_regs (sec, doorbell); +log_error_regs (sec, doorbell_reg);return FW_UPLOAD_ERR_TIMEOUT ; }else if (ret) {return FW_UPLOAD_ERR_RW_ERROR ; } -if (!rsu_status_ok (rsu_stat (doorbell))) { -log_error_regs (sec, doorbell); + ret = sec->ops->rsu_status (sec); +if (ret <0 ) +return ret; + status = ret; + +if (!rsu_status_ok (status)) { +log_error_regs (sec, doorbell_reg);return FW_UPLOAD_ERR_HW_ERROR ; }return FW_UPLOAD_ERR_NONE ; } -static int rsu_check_complete (struct m10bmc_sec *sec,u32 *doorbell) +static int rsu_check_complete (struct m10bmc_sec *sec,u32 *doorbell_reg) { -const struct m10bmc_csr_map *csr_map = sec->m10bmc->info->csr_map; +u32 progress, status; -if (m10bmc_sys_read (sec->m10bmc, csr_map->doorbell, doorbell)) +if (m10bmc_sec_progress_status (sec, doorbell_reg, &progress, &status))return -EIO ; -if (!rsu_status_ok (rsu_stat (*doorbell))) +if (!rsu_status_ok (status))return -EINVAL ; -if (rsu_progress_done (rsu_prog (*doorbell))) +if (rsu_progress_done (progress))return 0 ; -if (rsu_progress_busy (rsu_prog (*doorbell))) +if (rsu_progress_busy (progress))return -EAGAIN ;return -EINVAL ;@@ -592,6 +632,10 @@ static const struct fw_upload_ops m10bmc_ops = { .cleanup = m10bmc_sec_cleanup, }; +static const struct m10bmc_sec_ops m10sec_n3000_ops = { + .rsu_status = m10bmc_sec_n3000_rsu_status, +}; +#define SEC_UPDATE_LEN_MAX 32static int m10bmc_sec_probe (struct platform_device *pdev) {@@ -607,6 +651,7 @@ static int m10bmc_sec_probe(struct platform_device *pdev) sec->dev = &pdev->dev; sec->m10bmc =dev_get_drvdata (pdev->dev.parent); + sec->ops = (struct m10bmc_sec_ops *)platform_get_device_id (pdev)->driver_data;dev_set_drvdata (&pdev->dev, sec); ret = xa_alloc(&fw_upload_xa, &sec->fw_name_id, sec,@@ -654,9 +699,11 @@ static int m10bmc_sec_remove(struct platform_device *pdev)static const struct platform_device_id intel_m10bmc_sec_ids[] = { { .name ="n3000bmc-sec-update" , + .driver_data = (kernel_ulong_t)&m10sec_n3000_ops, }, { .name ="d5005bmc-sec-update" , + .driver_data = (kernel_ulong_t)&m10sec_n3000_ops, }, { } };include/linux/mfd/intel-m10-bmc.h +0
-1@@ -91,7 +91,6 @@#define HOST_STATUS_ABORT_RSU 0x2#define rsu_prog (doorbell) FIELD_GET(DRBL_RSU_PROGRESS, doorbell) -#define rsu_stat (doorbell) FIELD_GET(DRBL_RSU_STATUS, doorbell)/* interval 100ms and timeout 5s */ #define NIOS_HANDSHAKE_INTERVAL_US (100 * 1000)Signature · 1 line
2.30.2
Re: [PATCH v6 09/11] fpga: m10bmc-sec: Make rsu status type specific
In reply to Ilpo JärvinenQuoted 10 lines · Ilpo Järvinen
The rsu status field moves from the doorbell register to the auth result register in the PMCI implementation of the MAX10 BMC. In order to prepare for that, refactor the sec update driver code to have a type specific ops that provides ->rsu_status().
Co-developed-by Tianfei zhang <[email protected]>Signed-off-by Tianfei zhang <[email protected]>Co-developed-by Russ Weight <[email protected]>Signed-off-by Russ Weight <[email protected]>Signed-off-by Ilpo Järvinen <[email protected]>
Quoted 4 lines
--- drivers/fpga/intel-m10-bmc-sec-update.c | 109 +++++++++++++++++------- include/linux/mfd/intel-m10-bmc.h | 1 - 2 files changed, 78 insertions(+), 32 deletions(-)
Applied, thanks
Signature · 1 line
Lee Jones [李琼斯]
PATCH v6 10/11 mfd: intel-m10-bmc: Add PMCI driver
In reply to Ilpo JärvinenAdd the mfd driver for the Platform Management Component Interface (PMCI) based interface of Intel MAX10 BMC controller.
PMCI is a software-visible interface, connected to card BMC which provided the basic functionality of read/write BMC register. The access to the register is done indirectly via a hardware controller/bridge that handles read/write/clear commands and acknowledgments for the commands.
Previously, intel-m10-bmc provided sysfs under /sys/bus/spi/devices/... which is generalized in this change because not all MAX10 BMC appear under SPI anymore.
--- .../ABI/testing/sysfs-driver-intel-m10-bmc | 8 +- drivers/mfd/Kconfig | 12 + drivers/mfd/Makefile | 1 + drivers/mfd/intel-m10-bmc-pmci.c | 219 ++++++++++++++++++ include/linux/mfd/intel-m10-bmc.h | 28 +++ 5 files changed, 264 insertions(+), 4 deletions(-) create mode 100644 drivers/mfd/intel-m10-bmc-pmci.c
Documentation/ABI/testing/sysfs-driver-intel-m10-bmc +4 -4
@@ -1,4 +1,4 @@ -What: /sys/bus/spi/devices/.../bmc_version +What: /sys/bus/.../drivers/intel-m10-bmc/.../bmc_version Date: June 2020 KernelVersion: 5.10 Contact: Xu Yilun <[email protected]>
@@ -6,7 +6,7 @@ Description: Read only. Returns the hardware build version of Intel MAX10 BMC chip. Format: "0x%x". -What: /sys/bus/spi/devices/.../bmcfw_version +What: /sys/bus/.../drivers/intel-m10-bmc/.../bmcfw_version Date: June 2020 KernelVersion: 5.10 Contact: Xu Yilun <[email protected]>
@@ -14,7 +14,7 @@ Description: Read only. Returns the firmware version of Intel MAX10 BMC chip. Format: "0x%x". -What: /sys/bus/spi/devices/.../mac_address +What: /sys/bus/.../drivers/intel-m10-bmc/.../mac_address Date: January 2021 KernelVersion: 5.12 Contact: Russ Weight <[email protected]>
@@ -25,7 +25,7 @@ Description: Read only. Returns the first MAC address in a block space. Format: "%02x:%02x:%02x:%02x:%02x:%02x". -What: /sys/bus/spi/devices/.../mac_count +What: /sys/bus/.../drivers/intel-m10-bmc/.../mac_count Date: January 2021 KernelVersion: 5.12 Contact: Russ Weight <[email protected]>
drivers/mfd/Kconfig +12 -0
@@ -2238,6 +2238,18 @@ config MFD_INTEL_M10_BMC_SPI additional drivers must be enabled in order to use the functionality of the device. +config MFD_INTEL_M10_BMC_PMCI + tristate "Intel MAX 10 Board Management Controller with PMCI" + depends on FPGA_DFL + select MFD_INTEL_M10_BMC_CORE + select REGMAP + help + Support for the Intel MAX 10 board management controller via PMCI. + + This driver provides common support for accessing the device, + additional drivers must be enabled in order to use the functionality + of the device. + config MFD_RSMU_I2C tristate "Renesas Synchronization Management Unit with I2C" depends on I2C && OF
drivers/mfd/Makefile +1 -0
@@ -274,6 +274,7 @@ obj-$(CONFIG_MFD_SIMPLE_MFD_I2C) += simple-mfd-i2c.o obj-$(CONFIG_MFD_INTEL_M10_BMC_CORE) += intel-m10-bmc-core.o obj-$(CONFIG_MFD_INTEL_M10_BMC_SPI) += intel-m10-bmc-spi.o +obj-$(CONFIG_MFD_INTEL_M10_BMC_PMCI) += intel-m10-bmc-pmci.o obj-$(CONFIG_MFD_ATC260X) += atc260x-core.o obj-$(CONFIG_MFD_ATC260X_I2C) += atc260x-i2c.o
drivers/mfd/intel-m10-bmc-pmci.c new file +219 -0
219 lines not on this page · raw message
include/linux/mfd/intel-m10-bmc.h +28 -0
@@ -120,6 +120,34 @@/* Address of 4KB inverted bit vector containing staging area FLASH count */ #define M10BMC_N3000_STAGING_FLASH_COUNT 0x17ffb000 +#define M10BMC_N6000_INDIRECT_BASE 0x400 + +#define M10BMC_N6000_SYS_BASE 0x0 +#define M10BMC_N6000_SYS_END 0xfff + +#define M10BMC_N6000_DOORBELL 0x1c0 +#define M10BMC_N6000_AUTH_RESULT 0x1c4 + +#define M10BMC_N6000_BUILD_VER 0x0 +#define NIOS2_N6000_FW_VERSION 0x4 +#define M10BMC_N6000_MAC_LOW 0x20 +#define M10BMC_N6000_MAC_HIGH (M10BMC_N6000_MAC_LOW + 4) + +/* Addresses for security related data in FLASH */ +#define M10BMC_N6000_BMC_REH_ADDR 0x7ffc004 +#define M10BMC_N6000_BMC_PROG_ADDR 0x7ffc000 +#define M10BMC_N6000_BMC_PROG_MAGIC 0x5746 + +#define M10BMC_N6000_SR_REH_ADDR 0x7ffd004 +#define M10BMC_N6000_SR_PROG_ADDR 0x7ffd000 +#define M10BMC_N6000_SR_PROG_MAGIC 0x5253 + +#define M10BMC_N6000_PR_REH_ADDR 0x7ffe004 +#define M10BMC_N6000_PR_PROG_ADDR 0x7ffe000 +#define M10BMC_N6000_PR_PROG_MAGIC 0x5250 + +#define M10BMC_N6000_STAGING_FLASH_COUNT 0x7ff5000 +/** * struct m10bmc_csr_map - Intel MAX 10 BMC CSR register map */
Signature · 1 line
2.30.2
Re: [PATCH v6 10/11] mfd: intel-m10-bmc: Add PMCI driver
Quoted 21 lines · Ilpo Järvinen
Add the mfd driver for the Platform Management Component Interface (PMCI) based interface of Intel MAX10 BMC controller.
PMCI is a software-visible interface, connected to card BMC which provided the basic functionality of read/write BMC register. The access to the register is done indirectly via a hardware controller/bridge that handles read/write/clear commands and acknowledgments for the commands.
Previously, intel-m10-bmc provided sysfs under
/sys/bus/spi/devices/... which is generalized in this change because not all MAX10 BMC appear under SPI anymore.Co-developed-by Tianfei zhang <[email protected]>Signed-off-by Tianfei zhang <[email protected]>Co-developed-by Russ Weight <[email protected]>Signed-off-by Russ Weight <[email protected]>Co-developed-by Matthew Gerlach <[email protected]>Signed-off-by Matthew Gerlach <[email protected]>Reviewed-by Xu Yilun <[email protected]>Signed-off-by Ilpo Järvinen <[email protected]>
Quoted 8 lines
--- .../ABI/testing/sysfs-driver-intel-m10-bmc | 8 +- drivers/mfd/Kconfig | 12 + drivers/mfd/Makefile | 1 + drivers/mfd/intel-m10-bmc-pmci.c | 219 ++++++++++++++++++ include/linux/mfd/intel-m10-bmc.h | 28 +++ 5 files changed, 264 insertions(+), 4 deletions(-) create mode 100644 drivers/mfd/intel-m10-bmc-pmci.c
Applied, thanks
Signature · 1 line
Lee Jones [李琼斯]
PATCH v6 11/11 fpga: m10bmc-sec: Add support for N6000
In reply to Ilpo JärvinenAdd support for PMCI-based flash access path and N6000 sec update support. Access to flash staging area is different for N6000 from that of the SPI interfaced counterparts.
Introduce intel_m10bmc_flash_bulk_ops to allow interface specific differentiations for the flash access path for sec update and make m10bmc_sec_read/write() in sec update driver to use the new operations. The .flash_mutex serializes read/read. Flash update (erase+write) must use ->lock/unlock_write() to prevent reads during update (reads would timeout on setting flash MUX as BMC will prevent it).
Create a type specific RSU status reg handler for N6000 because the field has moved from doorbell to auth result register.
If a failure is detected while altering the flash MUX, it seems safer to try to set it back and doesn't seem harmful. Likely there are enough troubles in that case anyway so setting it back fails too (which is harmless sans the small extra delay) or just confirms that the value wasn't changed.
--- drivers/fpga/intel-m10-bmc-sec-update.c | 51 ++++- drivers/mfd/intel-m10-bmc-pmci.c | 242 +++++++++++++++++++++++- include/linux/mfd/intel-m10-bmc.h | 51 +++++ 3 files changed, 336 insertions(+), 8 deletions(-)
drivers/fpga/intel-m10-bmc-sec-update.c +46 -5
@@ -48,6 +48,9 @@ static int m10bmc_sec_write(struct m10bmc_sec *sec, const u8 *buf, u32 offset, uu32 leftover_tmp =0 ;int ret; +if (sec->m10bmc->flash_bulk_ops) +return sec->m10bmc->flash_bulk_ops->write (m10bmc, buf, offset, size); +if (WARN_ON_ONCE (stride >sizeof (leftover_tmp)))return -EINVAL ;
@@ -78,6 +81,9 @@ static int m10bmc_sec_read(struct m10bmc_sec *sec, u8 *buf, u32 addr, u32 size)u32 leftover_tmp;int ret; +if (sec->m10bmc->flash_bulk_ops) +return sec->m10bmc->flash_bulk_ops->read (m10bmc, buf, addr, size); +if (WARN_ON_ONCE (stride >sizeof (leftover_tmp)))return -EINVAL ;
@@ -277,6 +283,19 @@ static int m10bmc_sec_n3000_rsu_status(struct m10bmc_sec *sec)return FIELD_GET (DRBL_RSU_STATUS , doorbell); } +static int m10bmc_sec_n6000_rsu_status (struct m10bmc_sec *sec) +{ +const struct m10bmc_csr_map *csr_map = sec->m10bmc->info->csr_map; +u32 auth_result; +int ret; + + ret =m10bmc_sys_read (sec->m10bmc, csr_map->auth_result, &auth_result); +if (ret) +return ret; + +return FIELD_GET (AUTH_RESULT_RSU_STATUS , auth_result); +} +static bool rsu_status_ok (u32 status) { return (status == RSU_STAT_NORMAL ||
@@ -520,22 +539,33 @@ static enum fw_upload_err m10bmc_sec_prepare(struct fw_upload *fwl,if (!size || size >M10BMC_STAGING_SIZE )return FW_UPLOAD_ERR_INVALID_SIZE ; +if (sec->m10bmc->flash_bulk_ops) +if (sec->m10bmc->flash_bulk_ops->lock_write (sec->m10bmc)) +return FW_UPLOAD_ERR_BUSY ; + ret =rsu_check_idle (sec);if (ret !=FW_UPLOAD_ERR_NONE ) -return ret; + goto unlock_flash; ret =rsu_update_init (sec);if (ret !=FW_UPLOAD_ERR_NONE ) -return ret; + goto unlock_flash; ret =rsu_prog_ready (sec);if (ret !=FW_UPLOAD_ERR_NONE ) -return ret; + goto unlock_flash; -if (sec->cancel_request) -return rsu_cancel (sec); +if (sec->cancel_request) { + ret =rsu_cancel (sec); + goto unlock_flash; + }return FW_UPLOAD_ERR_NONE ; + +unlock_flash: +if (sec->m10bmc->flash_bulk_ops) + sec->m10bmc->flash_bulk_ops->unlock_write (sec->m10bmc); +return ret; }#define WRITE_BLOCK_SIZE 0x4000/* Default write-block size is 0x4000 bytes */
@@ -622,6 +652,9 @@ static void m10bmc_sec_cleanup(struct fw_upload *fwl)struct m10bmc_sec *sec = fwl->dd_handle; (void )rsu_cancel (sec); + +if (sec->m10bmc->flash_bulk_ops) + sec->m10bmc->flash_bulk_ops->unlock_write (sec->m10bmc); }static const struct fw_upload_ops m10bmc_ops = {
@@ -636,6 +669,10 @@ static const struct m10bmc_sec_ops m10sec_n3000_ops = { .rsu_status = m10bmc_sec_n3000_rsu_status, }; +static const struct m10bmc_sec_ops m10sec_n6000_ops = { + .rsu_status = m10bmc_sec_n6000_rsu_status, +}; +#define SEC_UPDATE_LEN_MAX 32static int m10bmc_sec_probe (struct platform_device *pdev) {
@@ -705,6 +742,10 @@ static const struct platform_device_id intel_m10bmc_sec_ids[] = { .name = "d5005bmc-sec-update", .driver_data = (kernel_ulong_t)&m10sec_n3000_ops, }, + { + .name = "n6000bmc-sec-update", + .driver_data = (kernel_ulong_t)&m10sec_n6000_ops, + }, { } };MODULE_DEVICE_TABLE (platform, intel_m10bmc_sec_ids);
drivers/mfd/intel-m10-bmc-pmci.c +239 -3
299 lines not on this page · raw message
include/linux/mfd/intel-m10-bmc.h +51 -0
79 lines not on this page · raw message
Signature · 1 line
2.30.2
Lee Jones
maintainerEnjoy!
The following changes since commit 1b929c02afd37871d5afb9d498426f83432e71c2:
Linux 6.2-rc1 (2022-12-25 13:41:39 -0800)
are available in the Git repository at:
git://git.kernel.org/pub/scm/linux/kernel/git/lee/mfd.git ib-mfd-fpga-hwmon-6.3
for you to fetch changes up to 869b9eddf0b38a22c27a400e2fa849d2ff2aa7e1:
mfd: intel-m10-bmc: Add PMCI driver (2023-01-27 10:47:11 +0000)
----------------------------------------------------------------
Ilpo Järvinen (10):
mfd: intel-m10-bmc: Add missing includes to header
mfd: intel-m10-bmc: Create m10bmc_platform_info for type specific info
mfd: intel-m10-bmc: Rename the local variables
mfd: intel-m10-bmc: Split into core and spi specific parts
mfd: intel-m10-bmc: Support multiple CSR register layouts
fpga: intel-m10-bmc: Rework flash read/write
mfd: intel-m10-bmc: Prefix register defines with M10BMC_N3000
fpga: m10bmc-sec: Create helpers for rsu status/progress checks
fpga: m10bmc-sec: Make rsu status type specific
mfd: intel-m10-bmc: Add PMCI driver
.../ABI/testing/sysfs-driver-intel-m10-bmc | 8 +- MAINTAINERS | 2 +- drivers/fpga/Kconfig | 2 +- drivers/fpga/intel-m10-bmc-sec-update.c | 364 +++++++++++++-------- drivers/hwmon/Kconfig | 2 +- drivers/mfd/Kconfig | 32 +- drivers/mfd/Makefile | 5 +- drivers/mfd/intel-m10-bmc-core.c | 122 +++++++ drivers/mfd/intel-m10-bmc-pmci.c | 219 +++++++++++++ drivers/mfd/intel-m10-bmc-spi.c | 168 ++++++++++ drivers/mfd/intel-m10-bmc.c | 238 -------------- include/linux/mfd/intel-m10-bmc.h | 154 ++++++--- 12 files changed, 888 insertions(+), 428 deletions(-) create mode 100644 drivers/mfd/intel-m10-bmc-core.c create mode 100644 drivers/mfd/intel-m10-bmc-pmci.c create mode 100644 drivers/mfd/intel-m10-bmc-spi.c delete mode 100644 drivers/mfd/intel-m10-bmc.c
Signature · 1 line
Lee Jones [李琼斯]
Lee Jones
maintainerIgnore this - I forgot to sign it!
Quoted 47 lines · Lee Jones
Enjoy!
The following changes since commit
1b929c02afd37871d5afb9d498426f83432e71c2:Linux 6.2-rc1 (2022-12-25 13:41:39 -0800)
are available in the Git repository at:
git://git.kernel.org/pub/scm/linux/kernel/git/lee/mfd.gitib-mfd-fpga-hwmon-6.3for you to fetch changes up to
869b9eddf0b38a22c27a400e2fa849d2ff2aa7e1:mfd: intel-m10-bmc: Add PMCI driver (2023-01-27 10:47:11 +0000)
----------------------------------------------------------------
Ilpo Järvinen (10):
mfd: intel-m10-bmc: Add missing includes to header
mfd: intel-m10-bmc: Createm10bmc_platform_infofor type specific info
mfd: intel-m10-bmc: Rename the local variables
mfd: intel-m10-bmc: Split into core and spi specific parts
mfd: intel-m10-bmc: Support multiple CSR register layouts
fpga: intel-m10-bmc: Rework flash read/write
mfd: intel-m10-bmc: Prefix register defines withM10BMC_N3000
fpga: m10bmc-sec: Create helpers for rsu status/progress checks
fpga: m10bmc-sec: Make rsu status type specific
mfd: intel-m10-bmc: Add PMCI driver.../ABI/testing/sysfs-driver-intel-m10-bmc | 8 +- MAINTAINERS | 2 +- drivers/fpga/Kconfig | 2 +- drivers/fpga/intel-m10-bmc-sec-update.c | 364 +++++++++++++-------- drivers/hwmon/Kconfig | 2 +- drivers/mfd/Kconfig | 32 +- drivers/mfd/Makefile | 5 +- drivers/mfd/intel-m10-bmc-core.c | 122 +++++++ drivers/mfd/intel-m10-bmc-pmci.c | 219 +++++++++++++ drivers/mfd/intel-m10-bmc-spi.c | 168 ++++++++++ drivers/mfd/intel-m10-bmc.c | 238 -------------- include/linux/mfd/intel-m10-bmc.h | 154 ++++++--- 12 files changed, 888 insertions(+), 428 deletions(-) create mode 100644 drivers/mfd/intel-m10-bmc-core.c create mode 100644 drivers/mfd/intel-m10-bmc-pmci.c create mode 100644 drivers/mfd/intel-m10-bmc-spi.c delete mode 100644 drivers/mfd/intel-m10-bmc.cSignature · 1 line
Lee Jones [李琼斯]
Signature · 1 line
Lee Jones [李琼斯]
Quoted 14 lines · Lee Jones
Enjoy!
The following changes since commit
1b929c02afd37871d5afb9d498426f83432e71c2:Linux 6.2-rc1 (2022-12-25 13:41:39 -0800)
are available in the Git repository at:
git://git.kernel.org/pub/scm/linux/kernel/git/lee/mfd.gitib-mfd-fpga-hwmon-6.3for you to fetch changes up to
869b9eddf0b38a22c27a400e2fa849d2ff2aa7e1:mfd: intel-m10-bmc: Add PMCI driver (2023-01-27 10:47:11 +0000)
Quoted 12 lines
----------------------------------------------------------------
Ilpo Järvinen (10):
mfd: intel-m10-bmc: Add missing includes to header
mfd: intel-m10-bmc: Createm10bmc_platform_infofor type specific info
mfd: intel-m10-bmc: Rename the local variables
mfd: intel-m10-bmc: Split into core and spi specific parts
mfd: intel-m10-bmc: Support multiple CSR register layouts
fpga: intel-m10-bmc: Rework flash read/write
mfd: intel-m10-bmc: Prefix register defines withM10BMC_N3000
fpga: m10bmc-sec: Create helpers for rsu status/progress checks
fpga: m10bmc-sec: Make rsu status type specific
mfd: intel-m10-bmc: Add PMCI driver
Hi Lee,
Thanks. I was left to wonder is there some particular reason for why 11/11 was not taken among the others? Did I perhaps end up giving a wrong impression in the cover letter that it wouldn't have been complete yet?
Signature · 1 line
i.
Lee Jones
maintainer[GIT PULL] Immutable branch between MFD, FPGA and HWMON due for the v6.3 merge window
In reply to Ilpo JärvinenEnjoy!
The following changes since commit 1b929c02afd37871d5afb9d498426f83432e71c2:
Linux 6.2-rc1 (2022-12-25 13:41:39 -0800)
are available in the Git repository at:
git://git.kernel.org/pub/scm/linux/kernel/git/lee/mfd.git tags/ib-mfd-fpga-hwmon-v6.3
for you to fetch changes up to 869b9eddf0b38a22c27a400e2fa849d2ff2aa7e1:
mfd: intel-m10-bmc: Add PMCI driver (2023-01-27 10:47:11 +0000)
----------------------------------------------------------------
Immutable branch between MFD, FPGA and HWMON due for the v6.3 merge window
----------------------------------------------------------------
Ilpo Järvinen (10):
mfd: intel-m10-bmc: Add missing includes to header
mfd: intel-m10-bmc: Create m10bmc_platform_info for type specific info
mfd: intel-m10-bmc: Rename the local variables
mfd: intel-m10-bmc: Split into core and spi specific parts
mfd: intel-m10-bmc: Support multiple CSR register layouts
fpga: intel-m10-bmc: Rework flash read/write
mfd: intel-m10-bmc: Prefix register defines with M10BMC_N3000
fpga: m10bmc-sec: Create helpers for rsu status/progress checks
fpga: m10bmc-sec: Make rsu status type specific
mfd: intel-m10-bmc: Add PMCI driver
.../ABI/testing/sysfs-driver-intel-m10-bmc | 8 +- MAINTAINERS | 2 +- drivers/fpga/Kconfig | 2 +- drivers/fpga/intel-m10-bmc-sec-update.c | 364 +++++++++++++-------- drivers/hwmon/Kconfig | 2 +- drivers/mfd/Kconfig | 32 +- drivers/mfd/Makefile | 5 +- drivers/mfd/intel-m10-bmc-core.c | 122 +++++++ drivers/mfd/intel-m10-bmc-pmci.c | 219 +++++++++++++ drivers/mfd/intel-m10-bmc-spi.c | 168 ++++++++++ drivers/mfd/intel-m10-bmc.c | 238 -------------- include/linux/mfd/intel-m10-bmc.h | 154 ++++++--- 12 files changed, 888 insertions(+), 428 deletions(-) create mode 100644 drivers/mfd/intel-m10-bmc-core.c create mode 100644 drivers/mfd/intel-m10-bmc-pmci.c create mode 100644 drivers/mfd/intel-m10-bmc-spi.c delete mode 100644 drivers/mfd/intel-m10-bmc.c
Signature · 1 line
Lee Jones [李琼斯]
Xu Yilun
maintainerRe: [GIT PULL] Immutable branch between MFD, FPGA and HWMON due for the v6.3 merge window
Quoted 9 lines · Lee Jones
Enjoy!
The following changes since commit
1b929c02afd37871d5afb9d498426f83432e71c2:Linux 6.2-rc1 (2022-12-25 13:41:39 -0800)
are available in the Git repository at:
git://git.kernel.org/pub/scm/linux/kernel/git/lee/mfd.gittags/ib-mfd-fpga-hwmon-v6.3
I've already pulled it to fpga tree and pushed to Greg as the merge window is near.
Patch #11 is left. I could make another pull request if it got acked by Lee soon, or we wait for the next cycle.
Thanks,
Yilun
Quoted 41 lines
for you to fetch changes up to
869b9eddf0b38a22c27a400e2fa849d2ff2aa7e1:mfd: intel-m10-bmc: Add PMCI driver (2023-01-27 10:47:11 +0000)
----------------------------------------------------------------
Immutable branch between MFD, FPGA and HWMON due for the v6.3 merge window----------------------------------------------------------------
Ilpo Järvinen (10):
mfd: intel-m10-bmc: Add missing includes to header
mfd: intel-m10-bmc: Createm10bmc_platform_infofor type specific info
mfd: intel-m10-bmc: Rename the local variables
mfd: intel-m10-bmc: Split into core and spi specific parts
mfd: intel-m10-bmc: Support multiple CSR register layouts
fpga: intel-m10-bmc: Rework flash read/write
mfd: intel-m10-bmc: Prefix register defines withM10BMC_N3000
fpga: m10bmc-sec: Create helpers for rsu status/progress checks
fpga: m10bmc-sec: Make rsu status type specific
mfd: intel-m10-bmc: Add PMCI driver.../ABI/testing/sysfs-driver-intel-m10-bmc | 8 +- MAINTAINERS | 2 +- drivers/fpga/Kconfig | 2 +- drivers/fpga/intel-m10-bmc-sec-update.c | 364 +++++++++++++-------- drivers/hwmon/Kconfig | 2 +- drivers/mfd/Kconfig | 32 +- drivers/mfd/Makefile | 5 +- drivers/mfd/intel-m10-bmc-core.c | 122 +++++++ drivers/mfd/intel-m10-bmc-pmci.c | 219 +++++++++++++ drivers/mfd/intel-m10-bmc-spi.c | 168 ++++++++++ drivers/mfd/intel-m10-bmc.c | 238 -------------- include/linux/mfd/intel-m10-bmc.h | 154 ++++++--- 12 files changed, 888 insertions(+), 428 deletions(-) create mode 100644 drivers/mfd/intel-m10-bmc-core.c create mode 100644 drivers/mfd/intel-m10-bmc-pmci.c create mode 100644 drivers/mfd/intel-m10-bmc-spi.c delete mode 100644 drivers/mfd/intel-m10-bmc.cSignature · 1 line
Lee Jones [李琼斯]
Lee Jones
maintainer[GIT PULL v2] Immutable branch between MFD, FPGA and HWMON due for the v6.3 merge window
In reply to Ilpo JärvinenNew PR containing the final (11/11) patch.
Apologies for the oversight.
The following changes since commit 1b929c02afd37871d5afb9d498426f83432e71c2:
Linux 6.2-rc1 (2022-12-25 13:41:39 -0800)
are available in the Git repository at:
git://git.kernel.org/pub/scm/linux/kernel/git/lee/mfd.git tags/ib-mfd-fpga-hwmon-v6.3-1
for you to fetch changes up to acf63c458b55ecfb2015b33dd6ba3cc8fbc1c5d3:
fpga: m10bmc-sec: Add support for N6000 (2023-01-30 08:14:02 +0000)
----------------------------------------------------------------
Immutable branch between MFD, FPGA and HWMON due for the v6.3 merge window
----------------------------------------------------------------
Ilpo Järvinen (11):
mfd: intel-m10-bmc: Add missing includes to header
mfd: intel-m10-bmc: Create m10bmc_platform_info for type specific info
mfd: intel-m10-bmc: Rename the local variables
mfd: intel-m10-bmc: Split into core and spi specific parts
mfd: intel-m10-bmc: Support multiple CSR register layouts
fpga: intel-m10-bmc: Rework flash read/write
mfd: intel-m10-bmc: Prefix register defines with M10BMC_N3000
fpga: m10bmc-sec: Create helpers for rsu status/progress checks
fpga: m10bmc-sec: Make rsu status type specific
mfd: intel-m10-bmc: Add PMCI driver
fpga: m10bmc-sec: Add support for N6000
.../ABI/testing/sysfs-driver-intel-m10-bmc | 8 +- MAINTAINERS | 2 +- drivers/fpga/Kconfig | 2 +- drivers/fpga/intel-m10-bmc-sec-update.c | 415 ++++++++++++------- drivers/hwmon/Kconfig | 2 +- drivers/mfd/Kconfig | 32 +- drivers/mfd/Makefile | 5 +- drivers/mfd/intel-m10-bmc-core.c | 122 ++++++ drivers/mfd/intel-m10-bmc-pmci.c | 455 +++++++++++++++++++++ drivers/mfd/intel-m10-bmc-spi.c | 168 ++++++++ drivers/mfd/intel-m10-bmc.c | 238 ----------- include/linux/mfd/intel-m10-bmc.h | 205 ++++++++-- 12 files changed, 1221 insertions(+), 433 deletions(-) create mode 100644 drivers/mfd/intel-m10-bmc-core.c create mode 100644 drivers/mfd/intel-m10-bmc-pmci.c create mode 100644 drivers/mfd/intel-m10-bmc-spi.c delete mode 100644 drivers/mfd/intel-m10-bmc.c
Signature · 1 line
Lee Jones [李琼斯]