-stable regression in Intel graphics, introduced in Linux 5.10.9

Hi,

There is a regression in Linux 5.10.9 that does not happen in 5.10.8. It is still there as of 5.11.1

This regression consists in graphics artifacts that will *only* start appearing after resuming from suspend. They don't happen immediately after resuming from suspend either, but after some minutes.

My system has integrated intel graphics
00:02.0 VGA compatible controller: Intel Corporation 4th Generation Core Processor Family Integrated Graphics Controller (rev 06) (prog-if 00 [VGA controller])
CPU: Intel(R) Core(TM) i3-4170T CPU @ 3.20GHz

For reference, this is the list of i915 commits that went into 5.10.9.

commit ecca0c675bdecebdeb2f2eb76fb33520c441dacf

Author: Chris Wilson <[email protected]>
Date:   Mon Jan 11 22:52:19 2021 +0000

drm/i915/gt: Restore clear-residual mitigations for Ivybridge, Baytrail

commit 09aa9e45863e9e25dfbf350bae89fc3c2964482c upstream.

commit de3f572607c29f7fdd1bfd754646d08e32db0249

Author: Imre Deak <[email protected]>
Date:   Wed Dec 9 17:39:52 2020 +0200

drm/i915/icl: Fix initing the DSI DSC power refcount during HW readout

commit 2af5268180410b874fc06be91a1b2fbb22b1be0c upstream.

commit 54c9246a47fa8559c3ec6da2048e976a4b8750f6

Author: Hans de Goede <[email protected]>
Date:   Wed Nov 18 13:40:58 2020 +0100

drm/i915/dsi: Use unconditional msleep for the panel_on_delay when there is no reset-deassert MIPI-sequence

commit 00cb645fd7e29bdd20967cd20fa8f77bcdf422f9 upstream.

commit 0a34addcdbd9e03e3f3d09bcd5a1719d90b2d637

Author: Jani Nikula <[email protected]>
Date:   Fri Jan 8 17:28:41 2021 +0200

drm/i915/backlight: fix CPU mode backlight takeover on LPT

commit bb83d5fb550bb7db75b29e6342417fda2bbb691c upstream.

commit 48b8c6689efa7cd65a72f620940a4f234b944b73

Author: Chris Wilson <[email protected]>
Date:   Mon Jan 11 22:52:18 2021 +0000

drm/i915/gt: Limit VFE threads based on GT

commit ffaf97899c4a58b9fefb11534f730785443611a8 upstream.

commit 481e27f050732b8c680f26287dd44967fddf9a79

Author: Chris Wilson <[email protected]>
Date:   Mon Jan 11 22:52:20 2021 +0000

drm/i915: Allow the sysadmin to override security mitigations

commit 984cadea032b103c5824a5f29d0a36b3e9df6333 upstream.

Regards

Is this the same issue reported here:

	https://lore.kernel.org/r/[email protected]

?

If so, is this a problem in 5.11 as well?

thanks,

greg k-h
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Hi,

I see in the original email:
https://lore.kernel.org/stable/3423617.kz1aARBMGD@archlinux/

That Diego is using the iGPU part of a Haswell CPU, so yes this is almost certainly the same issue.

Diego as I already mentioned to another arch user, it would be good if the arch kernel-maintainers can pick-up these 3 commits from the drm-intel tree as downstream patches for now:

e627d5923cae ("drm/i915/gt: One more flush for Baytrail clear residuals") d30bbd62b1bf ("drm/i915/gt: Flush before changing register state") 1914911f4aa0 ("drm/i915/gt: Correct surface base address for renderclear")

We (Fedora) have added these as downstream patches for now and we have multiple reports that these resolve the problem.

Chris, can you please send the 2nd and 3th commit of the above list on their way to Linus ASAP, so that Greg can add them to the stable series?

ATM only the 1st commit is in Linus tree (unless the others have landed with different hashes?)

Regards,

Hans

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I have queued the first one up now, thanks.

greg k-h
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I just tested current mainline (which already contains the three commits mentioned in the bugzilla), and the problems have disappeared.

Regards.

I do not see all 3 commits in Linus's tree already, am I missing something?

What are the git ids that you are looking at?

thanks,

greg k-h
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I used grep on the git log, the commits are there but seem to have different commit ids (except for the first one)

commit e627d5923cae93fa4188f4c4afba6486169a1337

Author: Chris Wilson <[email protected]>
Date:   Tue Jan 19 11:07:57 2021 +0000

drm/i915/gt: One more flush for Baytrail clear residuals

commit d5109f739c9f14a3bda249cb48b16de1065932f0

Author: Chris Wilson <[email protected]>
Date:   Mon Jan 25 22:02:47 2021 +0000

drm/i915/gt: Flush before changing register state

commit 81ce8f04aa96f7f6cae05770f68b5d15be91f5a2

Author: Chris Wilson <[email protected]>
Date:   Wed Feb 10 12:27:28 2021 +0000

drm/i915/gt: Correct surface base address for renderclear

Ugh, have I mentioned recently just how badly I think the drm developers handle their git trees? It's a constant mess to unwind that stuff...

{sigh}

Now queued up.

greg k-h
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