dt-bindings: Improve phandle-array schemas
Subsystems (67)
Rob Herring
maintainerPATCH 1/1 dt-bindings: Improve phandle-array schemas
The 'phandle-array' type is a bit ambiguous. It can be either just an array of phandles or an array of phandles plus args. Many schemas for phandle-array properties aren't clear in the schema which case applies though the description usually describes it.
The array of phandles case boils down to needing:
items:
maxItems: 1
The phandle plus args cases should typically take this form:
items:
- items:
- description: A phandle
- description: 1st arg cell
- description: 2nd arg cell
With this change, some examples need updating so that the bracketing of property values matches the schema.
--- .../devicetree/bindings/arm/cpus.yaml | 2 + .../devicetree/bindings/arm/idle-states.yaml | 80 +++++++++---------- .../devicetree/bindings/arm/pmu.yaml | 2 + .../bindings/ata/sata_highbank.yaml | 3 + .../bus/allwinner,sun50i-a64-de2.yaml | 5 +- .../bindings/crypto/intel,ixp4xx-crypto.yaml | 15 +++- .../allwinner,sun4i-a10-display-engine.yaml | 2 + .../display/mediatek/mediatek,hdmi.yaml | 5 +- .../devicetree/bindings/display/msm/gpu.yaml | 2 + .../bindings/display/renesas,du.yaml | 10 ++- .../display/rockchip/rockchip-drm.yaml | 2 + .../display/sprd/sprd,display-subsystem.yaml | 2 + .../bindings/display/ti/ti,am65x-dss.yaml | 3 +- .../devicetree/bindings/dma/dma-router.yaml | 2 + .../bindings/dma/st,stm32-dmamux.yaml | 2 +- .../bindings/dvfs/performance-domain.yaml | 1 - .../bindings/interconnect/qcom,rpmh.yaml | 2 + .../interrupt-controller/arm,gic-v3.yaml | 6 +- .../interrupt-controller/ti,sci-inta.yaml | 2 + .../bindings/iommu/mediatek,iommu.yaml | 6 +- .../bindings/iommu/renesas,ipmmu-vmsa.yaml | 6 ++ .../leds/backlight/led-backlight.yaml | 2 + .../allwinner,sun4i-a10-video-engine.yaml | 4 + .../bindings/media/nxp,imx8mq-mipi-csi2.yaml | 10 +-- .../devicetree/bindings/media/ti,cal.yaml | 4 + .../memory-controllers/mediatek,smi-larb.yaml | 2 +- .../samsung,exynos5422-dmc.yaml | 2 + .../net/allwinner,sun4i-a10-emac.yaml | 4 + .../bindings/net/can/bosch,c_can.yaml | 8 +- .../bindings/net/can/fsl,flexcan.yaml | 12 +-- .../devicetree/bindings/net/dsa/dsa-port.yaml | 2 + .../devicetree/bindings/net/fsl,fec.yaml | 8 +- .../bindings/net/intel,ixp4xx-ethernet.yaml | 15 +++- .../bindings/net/intel,ixp4xx-hss.yaml | 33 ++++++-- .../bindings/net/nxp,dwmac-imx.yaml | 4 + .../bindings/net/socionext,uniphier-ave4.yaml | 4 + .../devicetree/bindings/net/stm32-dwmac.yaml | 4 + .../bindings/net/ti,k3-am654-cpsw-nuss.yaml | 5 ++ .../bindings/net/wireless/mediatek,mt76.yaml | 4 + .../devicetree/bindings/opp/opp-v2-base.yaml | 2 + .../devicetree/bindings/perf/arm,dsu-pmu.yaml | 2 + .../bindings/phy/intel,combo-phy.yaml | 8 ++ .../devicetree/bindings/phy/ti,omap-usb2.yaml | 4 + .../pinctrl/aspeed,ast2500-pinctrl.yaml | 2 + .../bindings/pinctrl/canaan,k210-fpioa.yaml | 4 + .../pinctrl/mediatek,mt65xx-pinctrl.yaml | 2 + .../bindings/pinctrl/st,stm32-pinctrl.yaml | 10 ++- .../bindings/power/power-domain.yaml | 4 + .../bindings/power/renesas,apmu.yaml | 2 + .../power/rockchip,power-controller.yaml | 2 + .../bindings/power/supply/cw2015_battery.yaml | 6 +- .../bindings/power/supply/power-supply.yaml | 2 + .../bindings/regulator/regulator.yaml | 2 + .../bindings/regulator/st,stm32-booster.yaml | 2 +- .../bindings/remoteproc/qcom,adsp.yaml | 6 ++ .../bindings/remoteproc/st,stm32-rproc.yaml | 33 ++++++-- .../bindings/remoteproc/ti,k3-dsp-rproc.yaml | 2 + .../bindings/remoteproc/ti,k3-r5f-rproc.yaml | 2 + .../remoteproc/ti,omap-remoteproc.yaml | 19 +++-- .../bindings/soc/samsung/exynos-usi.yaml | 4 + .../bindings/sound/samsung,aries-wm8994.yaml | 2 + .../bindings/sound/samsung,midas-audio.yaml | 3 +- .../bindings/sound/st,stm32-sai.yaml | 8 +- .../thermal/thermal-cooling-devices.yaml | 6 +- .../bindings/thermal/thermal-idle.yaml | 8 +- .../bindings/usb/nvidia,tegra-xudc.yaml | 2 +- 66 files changed, 317 insertions(+), 119 deletions(-)
Documentation/devicetree/bindings/arm/cpus.yaml +2 -0
@@ -243,6 +243,8 @@ properties: cpu-idle-states: $ref: '/schemas/types.yaml#/definitions/phandle-array' + items: + maxItems: 1 description: | List of phandles to idle state nodes supported by this cpu (see ./idle-states.yaml).
Documentation/devicetree/bindings/arm/idle-states.yaml +40 -40
224 lines not on this page · raw message
Documentation/devicetree/bindings/arm/pmu.yaml +2 -0
@@ -66,6 +66,8 @@ properties: interrupt-affinity: $ref: /schemas/types.yaml#/definitions/phandle-array + items: + maxItems: 1 description: When using SPIs, specifies a list of phandles to CPU nodes corresponding directly to the affinity of
Documentation/devicetree/bindings/ata/sata_highbank.yaml +3 -0
@@ -51,6 +51,9 @@ properties: $ref: /schemas/types.yaml#/definitions/phandle-array minItems: 1 maxItems: 8 + items: + minItems: 2 + maxItems: 2 calxeda,tx-atten: description: |
Documentation/devicetree/bindings/bus/allwinner,sun50i-a64-de2.yaml +4 -1
@@ -35,7 +35,10 @@ properties: The SRAM that needs to be claimed to access the display engine bus. $ref: /schemas/types.yaml#/definitions/phandle-array - maxItems: 1 + items: + - items: + - description: phandle to SRAM + - description: register value for device ranges: true
Documentation/devicetree/bindings/crypto/intel,ixp4xx-crypto.yaml +12 -3
@@ -22,19 +22,28 @@ properties: intel,npe-handle: $ref: '/schemas/types.yaml#/definitions/phandle-array' - maxItems: 1 + items: + - items: + - description: phandle to the NPE this crypto engine + - description: the NPE instance number description: phandle to the NPE this crypto engine is using, the cell describing the NPE instance to be used. queue-rx: $ref: /schemas/types.yaml#/definitions/phandle-array - maxItems: 1 + items: + - items: + - description: phandle to the RX queue on the NPE + - description: the queue instance number description: phandle to the RX queue on the NPE, the cell describing the queue instance to be used. queue-txready: $ref: /schemas/types.yaml#/definitions/phandle-array - maxItems: 1 + items: + - items: + - description: phandle to the TX READY queue on the NPE + - description: the queue instance number description: phandle to the TX READY queue on the NPE, the cell describing the queue instance to be used.
Documentation/devicetree/bindings/display/allwinner,sun4i-a10-display-engine.yaml +2 -0
@@ -69,6 +69,8 @@ properties: $ref: /schemas/types.yaml#/definitions/phandle-array minItems: 1 maxItems: 2 + items: + maxItems: 1 description: | Available display engine frontends (DE 1.0) or mixers (DE 2.0/3.0) available.
Documentation/devicetree/bindings/display/mediatek/mediatek,hdmi.yaml +4 -1
@@ -51,7 +51,10 @@ properties: mediatek,syscon-hdmi: $ref: '/schemas/types.yaml#/definitions/phandle-array' - maxItems: 1 + items: + - items: + - description: phandle to system configuration registers + - description: register offset in the system configuration registers description: | phandle link and register offset to the system configuration registers.
Documentation/devicetree/bindings/display/msm/gpu.yaml +2 -0
@@ -64,6 +64,8 @@ properties: $ref: /schemas/types.yaml#/definitions/phandle-array minItems: 1 maxItems: 4 + items: + maxItems: 1 description: | phandles to one or more reserved on-chip SRAM regions. phandle to the On Chip Memory (OCMEM) that's present on some a3xx and
Documentation/devicetree/bindings/display/renesas,du.yaml +7 -3
@@ -76,17 +76,21 @@ properties: renesas,cmms: $ref: "/schemas/types.yaml#/definitions/phandle-array" + items: + maxItems: 1 description: A list of phandles to the CMM instances present in the SoC, one for each available DU channel. renesas,vsps: $ref: "/schemas/types.yaml#/definitions/phandle-array" + items: + items: + - description: phandle to VSP instance that serves the DU channel + - description: Channel index identifying the LIF instance in that VSP description: A list of phandle and channel index tuples to the VSPs that handle the - memory interfaces for the DU channels. The phandle identifies the VSP - instance that serves the DU channel, and the channel index identifies - the LIF instance in that VSP. + memory interfaces for the DU channels. required: - compatible
Documentation/devicetree/bindings/display/rockchip/rockchip-drm.yaml +2 -0
@@ -21,6 +21,8 @@ properties: ports: $ref: /schemas/types.yaml#/definitions/phandle-array + items: + maxItems: 1 description: | Should contain a list of phandles pointing to display interface port of vop devices. vop definitions as defined in
Documentation/devicetree/bindings/display/sprd/sprd,display-subsystem.yaml +2 -0
@@ -45,6 +45,8 @@ properties: ports: $ref: /schemas/types.yaml#/definitions/phandle-array + items: + maxItems: 1 description: Should contain a list of phandles pointing to display interface port of DPU devices.
Documentation/devicetree/bindings/display/ti/ti,am65x-dss.yaml +1 -2
@@ -88,8 +88,7 @@ properties: The DSS DPI output port node from video port 2 ti,am65x-oldi-io-ctrl: - $ref: "/schemas/types.yaml#/definitions/phandle-array" - maxItems: 1 + $ref: "/schemas/types.yaml#/definitions/phandle" description: phandle to syscon device node mapping OLDI IO_CTRL registers. The mapped range should point to OLDI_DAT0_IO_CTRL, map it and
Documentation/devicetree/bindings/dma/dma-router.yaml +2 -0
@@ -24,6 +24,8 @@ properties: dma-masters: $ref: /schemas/types.yaml#/definitions/phandle-array + items: + maxItems: 1 description: Array of phandles to the DMA controllers the router can direct the signal to.
Documentation/devicetree/bindings/dma/st,stm32-dmamux.yaml +1 -1
@@ -46,7 +46,7 @@ examples: #dma-cells = <3>; dma-requests = <128>; dma-channels = <16>; - dma-masters = <&dma1 &dma2>; + dma-masters = <&dma1>, <&dma2>; clocks = <&timer_clk>; };
Documentation/devicetree/bindings/dvfs/performance-domain.yaml +0 -1
@@ -43,7 +43,6 @@ properties: performance-domains: $ref: '/schemas/types.yaml#/definitions/phandle-array' - maxItems: 1 description: A phandle and performance domain specifier as defined by bindings of the performance controller/provider specified by phandle.
Documentation/devicetree/bindings/interconnect/qcom,rpmh.yaml +2 -0
@@ -121,6 +121,8 @@ properties: qcom,bcm-voters: $ref: /schemas/types.yaml#/definitions/phandle-array + items: + maxItems: 1 description: | List of phandles to qcom,bcm-voter nodes that are required by this interconnect to send RPMh commands.
Documentation/devicetree/bindings/interrupt-controller/arm,gic-v3.yaml +4 -2
@@ -138,6 +138,8 @@ properties: properties: affinity: $ref: /schemas/types.yaml#/definitions/phandle-array + items: + maxItems: 1 description: Should be a list of phandles to CPU nodes (as described in Documentation/devicetree/bindings/arm/cpus.yaml).
@@ -273,11 +275,11 @@ examples: ppi-partitions { part0: interrupt-partition-0 { - affinity = <&cpu0 &cpu2>; + affinity = <&cpu0>, <&cpu2>; }; part1: interrupt-partition-1 { - affinity = <&cpu1 &cpu3>; + affinity = <&cpu1>, <&cpu3>; }; }; };
Documentation/devicetree/bindings/interrupt-controller/ti,sci-inta.yaml +2 -0
@@ -77,6 +77,8 @@ properties: ti,unmapped-event-sources: $ref: /schemas/types.yaml#/definitions/phandle-array + items: + maxItems: 1 description: Array of phandles to DMA controllers where the unmapped events originate.
Documentation/devicetree/bindings/iommu/mediatek,iommu.yaml +4 -2
@@ -101,6 +101,8 @@ properties: $ref: /schemas/types.yaml#/definitions/phandle-array minItems: 1 maxItems: 32 + items: + maxItems: 1 description: | List of phandle to the local arbiters in the current Socs. Refer to bindings/memory-controllers/mediatek,smi-larb.yaml. It must sort
@@ -167,8 +169,8 @@ examples: interrupts = <GIC_SPI 139 IRQ_TYPE_LEVEL_LOW>; clocks = <&infracfg CLK_INFRA_M4U>; clock-names = "bclk"; - mediatek,larbs = <&larb0 &larb1 &larb2 - &larb3 &larb4 &larb5>; + mediatek,larbs = <&larb0>, <&larb1>, <&larb2>, + <&larb3>, <&larb4>, <&larb5>; #iommu-cells = <1>; };
Documentation/devicetree/bindings/iommu/renesas,ipmmu-vmsa.yaml +6 -0
@@ -66,6 +66,12 @@ properties: renesas,ipmmu-main: $ref: /schemas/types.yaml#/definitions/phandle-array + items: + - items: + - description: phandle to main IPMMU + - description: the interrupt bit number associated with the particular + cache IPMMU device. The interrupt bit number needs to match the main + IPMMU IMSSTR register. Only used by cache IPMMU instances. description: Reference to the main IPMMU phandle plus 1 cell. The cell is the interrupt bit number associated with the particular cache IPMMU
Documentation/devicetree/bindings/leds/backlight/led-backlight.yaml +2 -0
@@ -23,6 +23,8 @@ properties: leds: description: A list of LED nodes $ref: /schemas/types.yaml#/definitions/phandle-array + items: + maxItems: 1 brightness-levels: description:
Documentation/devicetree/bindings/media/allwinner,sun4i-a10-video-engine.yaml +4 -0
@@ -48,6 +48,10 @@ properties: allwinner,sram: $ref: /schemas/types.yaml#/definitions/phandle-array + items: + - items: + - description: phandle to SRAM + - description: register value for device description: Phandle to the device SRAM iommus:
Documentation/devicetree/bindings/media/nxp,imx8mq-mipi-csi2.yaml +5 -5
@@ -58,11 +58,11 @@ properties: req_gpr is the gpr register offset of RX_ENABLE for the mipi phy. $ref: /schemas/types.yaml#/definitions/phandle-array items: - items: - - description: The 'gpr' is the phandle to general purpose register node. - - description: The 'req_gpr' is the gpr register offset containing - CSI2_1_RX_ENABLE or CSI2_2_RX_ENABLE respectively. - maximum: 0xff + - items: + - description: The 'gpr' is the phandle to general purpose register node. + - description: The 'req_gpr' is the gpr register offset containing + CSI2_1_RX_ENABLE or CSI2_2_RX_ENABLE respectively. + maximum: 0xff interconnects: maxItems: 1
Documentation/devicetree/bindings/media/ti,cal.yaml +4 -0
@@ -48,6 +48,10 @@ properties: ti,camerrx-control: $ref: "/schemas/types.yaml#/definitions/phandle-array" + items: + - items: + - description: phandle to device control module + - description: offset to the control_camerarx_core register description: phandle to the device control module and offset to the control_camerarx_core register
Documentation/devicetree/bindings/memory-controllers/mediatek,smi-larb.yaml +1 -1
@@ -52,7 +52,7 @@ properties: maxItems: 1 mediatek,smi: - $ref: /schemas/types.yaml#/definitions/phandle-array + $ref: /schemas/types.yaml#/definitions/phandle description: a phandle to the smi_common node. mediatek,larb-id:
Documentation/devicetree/bindings/memory-controllers/samsung,exynos5422-dmc.yaml +2 -0
@@ -45,6 +45,8 @@ properties: $ref: '/schemas/types.yaml#/definitions/phandle-array' minItems: 1 maxItems: 16 + items: + maxItems: 1 description: phandles of the PPMU events used by the controller. device-handle:
Documentation/devicetree/bindings/net/allwinner,sun4i-a10-emac.yaml +4 -0
@@ -29,6 +29,10 @@ properties: allwinner,sram: description: Phandle to the device SRAM $ref: /schemas/types.yaml#/definitions/phandle-array + items: + - items: + - description: phandle to SRAM + - description: register value for device required: - compatible
Documentation/devicetree/bindings/net/can/bosch,c_can.yaml +4 -4
@@ -56,10 +56,10 @@ properties: offset). $ref: /schemas/types.yaml#/definitions/phandle-array items: - items: - - description: The phandle to the system control region. - - description: The register offset. - - description: The CAN instance number. + - items: + - description: The phandle to the system control region. + - description: The register offset. + - description: The CAN instance number. resets: maxItems: 1
Documentation/devicetree/bindings/net/can/fsl,flexcan.yaml +6 -6
@@ -84,12 +84,12 @@ properties: req_bit is the bit offset of CAN stop request. $ref: /schemas/types.yaml#/definitions/phandle-array items: - items: - - description: The 'gpr' is the phandle to general purpose register node. - - description: The 'req_gpr' is the gpr register offset of CAN stop request. - maximum: 0xff - - description: The 'req_bit' is the bit offset of CAN stop request. - maximum: 0x1f + - items: + - description: The 'gpr' is the phandle to general purpose register node. + - description: The 'req_gpr' is the gpr register offset of CAN stop request. + maximum: 0xff + - description: The 'req_bit' is the bit offset of CAN stop request. + maximum: 0x1f fsl,clk-source: description: |
Documentation/devicetree/bindings/net/dsa/dsa-port.yaml +2 -0
@@ -34,6 +34,8 @@ properties: full routing information must be given, not just the one hop routes to neighbouring switches $ref: /schemas/types.yaml#/definitions/phandle-array + items: + maxItems: 1 ethernet: description:
Documentation/devicetree/bindings/net/fsl,fec.yaml +5 -3
@@ -158,11 +158,13 @@ properties: fsl,stop-mode: $ref: /schemas/types.yaml#/definitions/phandle-array + items: + - items: + - description: phandle to general purpose register node + - description: the gpr register offset for ENET stop request + - description: the gpr bit offset for ENET stop request description: Register bits of stop mode control, the format is <&gpr req_gpr req_bit>. - gpr is the phandle to general purpose register node. - req_gpr is the gpr register offset for ENET stop request. - req_bit is the gpr bit offset for ENET stop request. mdio: $ref: mdio.yaml#
Documentation/devicetree/bindings/net/intel,ixp4xx-ethernet.yaml +12 -3
@@ -29,12 +29,18 @@ properties: queue-rx: $ref: '/schemas/types.yaml#/definitions/phandle-array' - maxItems: 1 + items: + - items: + - description: phandle to the RX queue node + - description: RX queue instance to use description: phandle to the RX queue on the NPE queue-txready: $ref: '/schemas/types.yaml#/definitions/phandle-array' - maxItems: 1 + items: + - items: + - description: phandle to the TX READY queue node + - description: TX READY queue instance to use description: phandle to the TX READY queue on the NPE phy-mode: true
@@ -43,7 +49,10 @@ properties: intel,npe-handle: $ref: '/schemas/types.yaml#/definitions/phandle-array' - maxItems: 1 + items: + - items: + - description: phandle to the NPE this ethernet instance is using + - description: the NPE instance to use description: phandle to the NPE this ethernet instance is using and the instance to use in the second cell
Documentation/devicetree/bindings/net/intel,ixp4xx-hss.yaml +28 -5
@@ -25,39 +25,62 @@ properties: intel,npe-handle: $ref: '/schemas/types.yaml#/definitions/phandle-array' - maxItems: 1 + items: + items: + - description: phandle to the NPE this HSS instance is using + - description: the NPE instance number description: phandle to the NPE this HSS instance is using and the instance to use in the second cell intel,queue-chl-rxtrig: $ref: '/schemas/types.yaml#/definitions/phandle-array' - maxItems: 1 + items: + - items: + - description: phandle to the RX trigger queue on the NPE + - description: the queue instance number description: phandle to the RX trigger queue on the NPE intel,queue-chl-txready: $ref: '/schemas/types.yaml#/definitions/phandle-array' - maxItems: 1 + items: + - items: + - description: phandle to the TX ready queue on the NPE + - description: the queue instance number description: phandle to the TX ready queue on the NPE intel,queue-pkt-rx: $ref: '/schemas/types.yaml#/definitions/phandle-array' - maxItems: 1 + items: + - items: + - description: phandle to the RX queue on the NPE + - description: the queue instance number description: phandle to the packet RX queue on the NPE intel,queue-pkt-tx: $ref: '/schemas/types.yaml#/definitions/phandle-array' maxItems: 4 + items: + items: + - description: phandle to the TX queue on the NPE + - description: the queue instance number description: phandle to the packet TX0, TX1, TX2 and TX3 queues on the NPE intel,queue-pkt-rxfree: $ref: '/schemas/types.yaml#/definitions/phandle-array' maxItems: 4 + items: + items: + - description: phandle to the RXFREE queue on the NPE + - description: the queue instance number description: phandle to the packet RXFREE0, RXFREE1, RXFREE2 and RXFREE3 queues on the NPE intel,queue-pkt-txdone: $ref: '/schemas/types.yaml#/definitions/phandle-array' - maxItems: 1 + items: + - items: + - description: phandle to the TXDONE queue on the NPE + - description: the queue instance number description: phandle to the packet TXDONE queue on the NPE cts-gpios:
Documentation/devicetree/bindings/net/nxp,dwmac-imx.yaml +4 -0
@@ -54,6 +54,10 @@ properties: intf_mode: $ref: /schemas/types.yaml#/definitions/phandle-array + items: + - items: + - description: phandle to the GPR syscon + - description: the offset of the GPR register description: Should be phandle/offset pair. The phandle to the syscon node which encompases the GPR register, and the offset of the GPR register.
Documentation/devicetree/bindings/net/socionext,uniphier-ave4.yaml +4 -0
@@ -66,6 +66,10 @@ properties: socionext,syscon-phy-mode: $ref: /schemas/types.yaml#/definitions/phandle-array + items: + - items: + - description: phandle to syscon that configures phy mode + - description: ID of MAC instance description: A phandle to syscon with one argument that configures phy mode. The argument is the ID of MAC instance.
Documentation/devicetree/bindings/net/stm32-dwmac.yaml +4 -0
@@ -74,6 +74,10 @@ properties: st,syscon: $ref: "/schemas/types.yaml#/definitions/phandle-array" + items: + - items: + - description: phandle to the syscon node which encompases the glue register + - description: offset of the control register description: Should be phandle/offset pair. The phandle to the syscon node which encompases the glue register, and the offset of the control register
Documentation/devicetree/bindings/net/ti,k3-am654-cpsw-nuss.yaml +5 -0
@@ -136,6 +136,11 @@ properties: ti,syscon-efuse: $ref: /schemas/types.yaml#/definitions/phandle-array + items: + - items: + - description: Phandle to the system control device node which + provides access to efuse + - description: offset to efuse registers??? description: Phandle to the system control device node which provides access to efuse IO range with MAC addresses
Documentation/devicetree/bindings/net/wireless/mediatek,mt76.yaml +4 -0
@@ -54,6 +54,10 @@ properties: mediatek,mtd-eeprom: $ref: /schemas/types.yaml#/definitions/phandle-array + items: + - items: + - description: phandle to MTD partition + - description: offset containing EEPROM data description: Phandle to a MTD partition + offset containing EEPROM data
Documentation/devicetree/bindings/opp/opp-v2-base.yaml +2 -0
@@ -177,6 +177,8 @@ patternProperties: for the functioning of the current device at the current OPP (where this property is present). $ref: /schemas/types.yaml#/definitions/phandle-array + items: + maxItems: 1 patternProperties: '^opp-microvolt-':
Documentation/devicetree/bindings/perf/arm,dsu-pmu.yaml +2 -0
@@ -35,6 +35,8 @@ properties: $ref: /schemas/types.yaml#/definitions/phandle-array minItems: 1 maxItems: 12 + items: + maxItems: 1 description: List of phandles for the CPUs connected to this DSU instance. required:
Documentation/devicetree/bindings/phy/intel,combo-phy.yaml +8 -0
@@ -47,10 +47,18 @@ properties: intel,syscfg: $ref: /schemas/types.yaml#/definitions/phandle-array + items: + - items: + - description: phandle to Chip configuration registers + - description: ComboPhy instance id description: Chip configuration registers handle and ComboPhy instance id intel,hsio: $ref: /schemas/types.yaml#/definitions/phandle-array + items: + - items: + - description: phandle to HSIO registers + - description: ComboPhy instance id description: HSIO registers handle and ComboPhy instance id on NOC intel,aggregation:
Documentation/devicetree/bindings/phy/ti,omap-usb2.yaml +4 -0
@@ -45,6 +45,10 @@ properties: syscon-phy-power: $ref: /schemas/types.yaml#/definitions/phandle-array + items: + - items: + - description: phandle to the system control module + - description: register offset to power on/off the PHY description: phandle/offset pair. Phandle to the system control module and register offset to power on/off the PHY.
Documentation/devicetree/bindings/pinctrl/aspeed,ast2500-pinctrl.yaml +2 -0
@@ -29,6 +29,8 @@ properties: aspeed,external-nodes: minItems: 2 maxItems: 2 + items: + maxItems: 1 $ref: /schemas/types.yaml#/definitions/phandle-array description: | A cell of phandles to external controller nodes:
Documentation/devicetree/bindings/pinctrl/canaan,k210-fpioa.yaml +4 -0
@@ -39,6 +39,10 @@ properties: canaan,k210-sysctl-power: $ref: /schemas/types.yaml#/definitions/phandle-array + items: + - items: + - description: phandle of the K210 system controller node + - description: offset of its power domain control register description: | phandle of the K210 system controller node and offset of its power domain control register.
Documentation/devicetree/bindings/pinctrl/mediatek,mt65xx-pinctrl.yaml +2 -0
@@ -44,6 +44,8 @@ properties: mediatek,pctl-regmap: $ref: /schemas/types.yaml#/definitions/phandle-array + items: + maxItems: 1 minItems: 1 maxItems: 2 description: |
Documentation/devicetree/bindings/pinctrl/st,stm32-pinctrl.yaml +6 -4
@@ -41,11 +41,13 @@ properties: maxItems: 1 st,syscfg: - description: Should be phandle/offset/mask - - Phandle to the syscon node which includes IRQ mux selection. - - The offset of the IRQ mux selection register. - - The field mask of IRQ mux, needed if different of 0xf. + description: Phandle+args to the syscon node which includes IRQ mux selection. $ref: "/schemas/types.yaml#/definitions/phandle-array" + items: + - items: + - description: syscon node which includes IRQ mux selection + - description: The offset of the IRQ mux selection register + - description: The field mask of IRQ mux, needed if different of 0xf st,package: description:
Documentation/devicetree/bindings/power/power-domain.yaml +4 -0
@@ -29,6 +29,8 @@ properties: domain-idle-states: $ref: /schemas/types.yaml#/definitions/phandle-array + items: + maxItems: 1 description: | Phandles of idle states that defines the available states for the power-domain provider. The idle state definitions are compatible with the
@@ -42,6 +44,8 @@ properties: operating-points-v2: $ref: /schemas/types.yaml#/definitions/phandle-array + items: + maxItems: 1 description: Phandles to the OPP tables of power domains provided by a power domain provider. If the provider provides a single power domain only or all
Documentation/devicetree/bindings/power/renesas,apmu.yaml +2 -0
@@ -35,6 +35,8 @@ properties: cpus: $ref: /schemas/types.yaml#/definitions/phandle-array + items: + maxItems: 1 description: | Array of phandles pointing to CPU cores, which should match the order of CPU cores used by the WUPCR and PSTR registers in the Advanced Power
Documentation/devicetree/bindings/power/rockchip,power-controller.yaml +2 -0
@@ -129,6 +129,8 @@ $defs: pm_qos: $ref: /schemas/types.yaml#/definitions/phandle-array + items: + maxItems: 1 description: | A number of phandles to qos blocks which need to be saved and restored while power domain switches state.
Documentation/devicetree/bindings/power/supply/cw2015_battery.yaml +3 -3
@@ -14,6 +14,9 @@ description: | phandle in monitored-battery. If specified the driver uses the charge-full-design-microamp-hours property of the battery. +allOf: + - $ref: power-supply.yaml# + properties: compatible: const: cellwise,cw2015
@@ -37,9 +40,6 @@ properties: minimum: 250 power-supplies: - description: - Specifies supplies used for charging the battery connected to this gauge - $ref: /schemas/types.yaml#/definitions/phandle-array minItems: 1 maxItems: 8 # Should be enough
Documentation/devicetree/bindings/power/supply/power-supply.yaml +2 -0
@@ -12,6 +12,8 @@ maintainers: properties: power-supplies: $ref: /schemas/types.yaml#/definitions/phandle-array + items: + maxItems: 1 description: This property is added to a supply in order to list the devices which supply it power, referenced by their phandles.
Documentation/devicetree/bindings/regulator/regulator.yaml +2 -0
@@ -213,6 +213,8 @@ properties: is 2-way - all coupled regulators should be linked with each other. A regulator should not be coupled with its supplier. $ref: "/schemas/types.yaml#/definitions/phandle-array" + items: + maxItems: 1 regulator-coupled-max-spread: description: Array of maximum spread between voltages of coupled regulators
Documentation/devicetree/bindings/regulator/st,stm32-booster.yaml +1 -1
@@ -23,7 +23,7 @@ properties: - st,stm32mp1-booster st,syscfg: - $ref: "/schemas/types.yaml#/definitions/phandle-array" + $ref: "/schemas/types.yaml#/definitions/phandle" description: phandle to system configuration controller. vdda-supply:
Documentation/devicetree/bindings/remoteproc/qcom,adsp.yaml +6 -0
@@ -115,6 +115,12 @@ properties: qcom,halt-regs: $ref: /schemas/types.yaml#/definitions/phandle-array + items: + - items: + - description: Phandle reference to a syscon representing TCSR + - description: offsets within syscon for q6 halt registers + - description: offsets within syscon for modem halt registers + - description: offsets within syscon for nc halt registers description: Phandle reference to a syscon representing TCSR followed by the three offsets within syscon for q6, modem and nc halt registers.
Documentation/devicetree/bindings/remoteproc/st,stm32-rproc.yaml +25 -8
@@ -29,17 +29,22 @@ properties: st,syscfg-holdboot: description: remote processor reset hold boot - - Phandle of syscon block. - - The offset of the hold boot setting register. - - The field mask of the hold boot. $ref: "/schemas/types.yaml#/definitions/phandle-array" - maxItems: 1 + items: + - items: + - description: Phandle of syscon block + - description: The offset of the hold boot setting register + - description: The field mask of the hold boot st,syscfg-tz: description: Reference to the system configuration which holds the RCC trust zone mode $ref: "/schemas/types.yaml#/definitions/phandle-array" - maxItems: 1 + items: + - items: + - description: Phandle of syscon block + - description: FIXME + - description: FIXME interrupts: description: Should contain the WWDG1 watchdog reset interrupt
@@ -93,20 +98,32 @@ properties: $ref: "/schemas/types.yaml#/definitions/phandle-array" description: | Reference to the system configuration which holds the remote - maxItems: 1 + items: + - items: + - description: Phandle of syscon block + - description: FIXME + - description: FIXME st,syscfg-m4-state: $ref: "/schemas/types.yaml#/definitions/phandle-array" description: | Reference to the tamp register which exposes the Cortex-M4 state. - maxItems: 1 + items: + - items: + - description: Phandle of syscon block with the tamp register + - description: FIXME + - description: FIXME st,syscfg-rsc-tbl: $ref: "/schemas/types.yaml#/definitions/phandle-array" description: | Reference to the tamp register which references the Cortex-M4 resource table address. - maxItems: 1 + items: + - items: + - description: Phandle of syscon block with the tamp register + - description: FIXME + - description: FIXME st,auto-boot: $ref: /schemas/types.yaml#/definitions/flag
Documentation/devicetree/bindings/remoteproc/ti,k3-dsp-rproc.yaml +2 -0
@@ -79,6 +79,8 @@ properties: $ref: /schemas/types.yaml#/definitions/phandle-array minItems: 1 maxItems: 4 + items: + maxItems: 1 description: | phandles to one or more reserved on-chip SRAM regions. The regions should be defined as child nodes of the respective SRAM node, and
Documentation/devicetree/bindings/remoteproc/ti,k3-r5f-rproc.yaml +2 -0
@@ -189,6 +189,8 @@ patternProperties: $ref: /schemas/types.yaml#/definitions/phandle-array minItems: 1 maxItems: 4 + items: + maxItems: 1 description: | phandles to one or more reserved on-chip SRAM regions. The regions should be defined as child nodes of the respective SRAM node, and
Documentation/devicetree/bindings/remoteproc/ti,omap-remoteproc.yaml +12 -7
@@ -123,13 +123,14 @@ properties: ti,bootreg: $ref: /schemas/types.yaml#/definitions/phandle-array - description: | - Should be a triple of the phandle to the System Control - Configuration region that contains the boot address - register, the register offset of the boot address - register within the System Control module, and the bit - shift within the register. This property is required for - all the DSP instances on OMAP4, OMAP5 and DRA7xx SoCs. + items: + - items: + - description: phandle to the System Control Configuration region + - description: register offset of the boot address register + - description: the bit shift within the register + description: + This property is required for all the DSP instances on OMAP4, OMAP5 + and DRA7xx SoCs. ti,autosuspend-delay-ms: description: |
@@ -140,6 +141,8 @@ properties: ti,timers: $ref: /schemas/types.yaml#/definitions/phandle-array + items: + maxItems: 1 description: | One or more phandles to OMAP DMTimer nodes, that serve as System/Tick timers for the OS running on the remote
@@ -156,6 +159,8 @@ properties: ti,watchdog-timers: $ref: /schemas/types.yaml#/definitions/phandle-array + items: + maxItems: 1 description: | One or more phandles to OMAP DMTimer nodes, used to serve as Watchdog timers for the processor cores. This
Documentation/devicetree/bindings/soc/samsung/exynos-usi.yaml +4 -0
@@ -48,6 +48,10 @@ properties: samsung,sysreg: $ref: /schemas/types.yaml#/definitions/phandle-array + items: + - items: + - description: phandle to System Register syscon node + - description: offset of SW_CONF register for this USI controller description: Should be phandle/offset pair. The phandle to System Register syscon node (for the same domain where this USI controller resides) and the offset
Documentation/devicetree/bindings/sound/samsung,aries-wm8994.yaml +2 -0
@@ -27,6 +27,8 @@ properties: sound-dai: minItems: 2 maxItems: 2 + items: + maxItems: 1 $ref: /schemas/types.yaml#/definitions/phandle-array description: | phandles to the I2S controller and bluetooth codec,
Documentation/devicetree/bindings/sound/samsung,midas-audio.yaml +1 -2
@@ -21,8 +21,7 @@ properties: type: object properties: sound-dai: - $ref: /schemas/types.yaml#/definitions/phandle-array - maxItems: 1 + $ref: /schemas/types.yaml#/definitions/phandle description: phandle to the I2S controller required: - sound-dai
Documentation/devicetree/bindings/sound/st,stm32-sai.yaml +5 -3
@@ -102,9 +102,11 @@ patternProperties: By default SAI sub-block is in asynchronous mode. Must contain the phandle and index of the SAI sub-block providing the synchronization. - allOf: - - $ref: /schemas/types.yaml#/definitions/phandle-array - - maxItems: 1 + $ref: /schemas/types.yaml#/definitions/phandle-array + items: + - items: + - description: phandle of the SAI sub-block + - description: index of the SAI sub-block st,iec60958: description:
Documentation/devicetree/bindings/thermal/thermal-cooling-devices.yaml +3 -3
@@ -66,9 +66,9 @@ examples: compatible = "qcom,kryo385"; reg = <0x0 0x0>; enable-method = "psci"; - cpu-idle-states = <&LITTLE_CPU_SLEEP_0 - &LITTLE_CPU_SLEEP_1 - &CLUSTER_SLEEP_0>; + cpu-idle-states = <&LITTLE_CPU_SLEEP_0>, + <&LITTLE_CPU_SLEEP_1>, + <&CLUSTER_SLEEP_0>; capacity-dmips-mhz = <607>; dynamic-power-coefficient = <100>; qcom,freq-domain = <&cpufreq_hw 0>;
Documentation/devicetree/bindings/thermal/thermal-idle.yaml +4 -4
@@ -37,8 +37,8 @@ properties: exit-latency-us: description: | - The exit latency constraint in microsecond for the injected idle state - for the device. It is the latency constraint to apply when selecting an + The exit latency constraint in microsecond for the injected idle state + for the device. It is the latency constraint to apply when selecting an idle state from among all the present ones. required:
@@ -65,7 +65,7 @@ examples: capacity-dmips-mhz = <1024>; dynamic-power-coefficient = <436>; #cooling-cells = <2>; /* min followed by max */ - cpu-idle-states = <&CPU_SLEEP &CLUSTER_SLEEP>; + cpu-idle-states = <&CPU_SLEEP>, <&CLUSTER_SLEEP>; thermal-idle { #cooling-cells = <2>; duration-us = <10000>;
@@ -81,7 +81,7 @@ examples: capacity-dmips-mhz = <1024>; dynamic-power-coefficient = <436>; #cooling-cells = <2>; /* min followed by max */ - cpu-idle-states = <&CPU_SLEEP &CLUSTER_SLEEP>; + cpu-idle-states = <&CPU_SLEEP>, <&CLUSTER_SLEEP>; thermal-idle { #cooling-cells = <2>; duration-us = <10000>;
Documentation/devicetree/bindings/usb/nvidia,tegra-xudc.yaml +1 -1
@@ -83,7 +83,7 @@ properties: - const: ss nvidia,xusb-padctl: - $ref: /schemas/types.yaml#/definitions/phandle-array + $ref: /schemas/types.yaml#/definitions/phandle description: phandle to the XUSB pad controller that is used to configure the USB pads used by the XUDC controller.
Signature · 1 line
2.32.0
Quoted 83 lines · Rob Herring
The 'phandle-array' type is a bit ambiguous. It can be either just an array of phandles or an array of phandles plus args. Many schemas for phandle-array properties aren't clear in the schema which case applies though the description usually describes it.
The array of phandles case boils down to needing:
items:
maxItems: 1The phandle plus args cases should typically take this form:
items:
- items:
- description: A phandle
- description: 1st arg cell
- description: 2nd arg cellWith this change, some examples need updating so that the bracketing of property values matches the schema.
Cc Damien Le Moal <[email protected]>Cc Herbert Xu <[email protected]>Cc "David S. Miller" <[email protected]>Cc Chun-Kuang Hu <[email protected]>Cc Philipp Zabel <[email protected]>Cc Laurent Pinchart <[email protected]>Cc Kieran Bingham <[email protected]>Cc Vinod Koul <[email protected]>Cc Georgi Djakov <[email protected]>Cc Thomas Gleixner <[email protected]>Cc Marc Zyngier <[email protected]>Cc Joerg Roedel <[email protected]>Cc Lee Jones <[email protected]>Cc Daniel Thompson <[email protected]>Cc Jingoo Han <[email protected]>Cc Pavel Machek <[email protected]>Cc Mauro Carvalho Chehab <[email protected]>Cc Krzysztof Kozlowski <[email protected]>Cc Jakub Kicinski <[email protected]>Cc Wolfgang Grandegger <[email protected]>Cc Marc Kleine-Budde <[email protected]>Cc Andrew Lunn <[email protected]>Cc Vivien Didelot <[email protected]>Cc Florian Fainelli <[email protected]>Cc Vladimir Oltean <[email protected]>Cc Kalle Valo <[email protected]>Cc Viresh Kumar <[email protected]>Cc Stephen Boyd <[email protected]>Cc Kishon Vijay Abraham I <[email protected]>Cc Linus Walleij <[email protected]>Cc "Rafael J. Wysocki" <[email protected]>Cc Kevin Hilman <[email protected]>Cc Ulf Hansson <[email protected]>Cc Sebastian Reichel <[email protected]>Cc Mark Brown <[email protected]>Cc Mathieu Poirier <[email protected]>Cc Daniel Lezcano <[email protected]>Cc Zhang Rui <[email protected]>Cc Greg Kroah-Hartman <[email protected]>Cc Thierry Reding <[email protected]>Cc Jonathan Hunter <[email protected]>Cc Sudeep Holla <[email protected]>Cc Geert Uytterhoeven <[email protected]>Signed-off-by Rob Herring <[email protected]>---
[...]
Quoted 2 lines
.../bindings/net/can/bosch,c_can.yaml | 8 +- .../bindings/net/can/fsl,flexcan.yaml | 12 +--
For the net/can/ bindings:
regards,
Marc
Signature · 4 lines
Pengutronix e.K. | Marc Kleine-Budde | Embedded Linux | https://www.pengutronix.de | Vertretung West/Dortmund | Phone: +49-231-2826-924 | Amtsgericht Hildesheim, HRA 2686 | Fax: +49-5121-206917-5555 |
Quoted 12 lines · Rob Herring
The 'phandle-array' type is a bit ambiguous. It can be either just an array of phandles or an array of phandles plus args. Many schemas for phandle-array properties aren't clear in the schema which case applies though the description usually describes it.
The array of phandles case boils down to needing:
items:
maxItems: 1The phandle plus args cases should typically take this form:
Quoted 9 lines
items:
- items:
- description: A phandle
- description: 1st arg cell
- description: 2nd arg cellWith this change, some examples need updating so that the bracketing of property values matches the schema.
Samsung and memory controller bits look good:
Best regards,
Krzysztof
Quoted 18 lines · Rob Herring
The 'phandle-array' type is a bit ambiguous. It can be either just an array of phandles or an array of phandles plus args. Many schemas for phandle-array properties aren't clear in the schema which case applies though the description usually describes it.
The array of phandles case boils down to needing:
items:
maxItems: 1The phandle plus args cases should typically take this form:
items:
- items:
- description: A phandle
- description: 1st arg cell
- description: 2nd arg cell
Quoted 6 lines
With this change, some examples need updating so that the bracketing of property values matches the schema.
.../devicetree/bindings/opp/opp-v2-base.yaml | 2 + .../bindings/power/power-domain.yaml | 4 +
Signature · 1 line
viresh
Quoted 74 lines · Rob Herring
The 'phandle-array' type is a bit ambiguous. It can be either just an array of phandles or an array of phandles plus args. Many schemas for phandle-array properties aren't clear in the schema which case applies though the description usually describes it.
The array of phandles case boils down to needing:
items:
maxItems: 1The phandle plus args cases should typically take this form:
items:
- items:
- description: A phandle
- description: 1st arg cell
- description: 2nd arg cellWith this change, some examples need updating so that the bracketing of property values matches the schema.
Cc Damien Le Moal <[email protected]>Cc Herbert Xu <[email protected]>Cc "David S. Miller" <[email protected]>Cc Chun-Kuang Hu <[email protected]>Cc Philipp Zabel <[email protected]>Cc Laurent Pinchart <[email protected]>Cc Kieran Bingham <[email protected]>Cc Vinod Koul <[email protected]>Cc Georgi Djakov <[email protected]>Cc Thomas Gleixner <[email protected]>Cc Marc Zyngier <[email protected]>Cc Joerg Roedel <[email protected]>Cc Lee Jones <[email protected]>Cc Daniel Thompson <[email protected]>Cc Jingoo Han <[email protected]>Cc Pavel Machek <[email protected]>Cc Mauro Carvalho Chehab <[email protected]>Cc Krzysztof Kozlowski <[email protected]>Cc Jakub Kicinski <[email protected]>Cc Wolfgang Grandegger <[email protected]>Cc Marc Kleine-Budde <[email protected]>Cc Andrew Lunn <[email protected]>Cc Vivien Didelot <[email protected]>Cc Florian Fainelli <[email protected]>Cc Vladimir Oltean <[email protected]>Cc Kalle Valo <[email protected]>Cc Viresh Kumar <[email protected]>Cc Stephen Boyd <[email protected]>Cc Kishon Vijay Abraham I <[email protected]>Cc Linus Walleij <[email protected]>Cc "Rafael J. Wysocki" <[email protected]>Cc Kevin Hilman <[email protected]>Cc Ulf Hansson <[email protected]>Cc Sebastian Reichel <[email protected]>Cc Mark Brown <[email protected]>Cc Mathieu Poirier <[email protected]>Cc Daniel Lezcano <[email protected]>Cc Zhang Rui <[email protected]>Cc Greg Kroah-Hartman <[email protected]>Cc Thierry Reding <[email protected]>Cc Jonathan Hunter <[email protected]>Cc Sudeep Holla <[email protected]>Cc Geert Uytterhoeven <[email protected]>
Quoted 8 lines
Hi Rob,
Quoted 18 lines · Rob Herring
The 'phandle-array' type is a bit ambiguous. It can be either just an array of phandles or an array of phandles plus args. Many schemas for phandle-array properties aren't clear in the schema which case applies though the description usually describes it.
The array of phandles case boils down to needing:
items:
maxItems: 1The phandle plus args cases should typically take this form:
items:
- items:
- description: A phandle
- description: 1st arg cell
- description: 2nd arg cell
Quoted 4 lines
With this change, some examples need updating so that the bracketing of property values matches the schema.
Signed-off-by Rob Herring <[email protected]>
The Renesas parts look good to me.
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- [email protected]
In personal conversations with technical people, I call myself a hacker. But when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
Quoted 83 lines · Rob Herring
The 'phandle-array' type is a bit ambiguous. It can be either just an array of phandles or an array of phandles plus args. Many schemas for phandle-array properties aren't clear in the schema which case applies though the description usually describes it.
The array of phandles case boils down to needing:
items:
maxItems: 1The phandle plus args cases should typically take this form:
items:
- items:
- description: A phandle
- description: 1st arg cell
- description: 2nd arg cellWith this change, some examples need updating so that the bracketing of property values matches the schema.
Cc Damien Le Moal <[email protected]>Cc Herbert Xu <[email protected]>Cc "David S. Miller" <[email protected]>Cc Chun-Kuang Hu <[email protected]>Cc Philipp Zabel <[email protected]>Cc Laurent Pinchart <[email protected]>Cc Kieran Bingham <[email protected]>Cc Vinod Koul <[email protected]>Cc Georgi Djakov <[email protected]>Cc Thomas Gleixner <[email protected]>Cc Marc Zyngier <[email protected]>Cc Joerg Roedel <[email protected]>Cc Lee Jones <[email protected]>Cc Daniel Thompson <[email protected]>Cc Jingoo Han <[email protected]>Cc Pavel Machek <[email protected]>Cc Mauro Carvalho Chehab <[email protected]>Cc Krzysztof Kozlowski <[email protected]>Cc Jakub Kicinski <[email protected]>Cc Wolfgang Grandegger <[email protected]>Cc Marc Kleine-Budde <[email protected]>Cc Andrew Lunn <[email protected]>Cc Vivien Didelot <[email protected]>Cc Florian Fainelli <[email protected]>Cc Vladimir Oltean <[email protected]>Cc Kalle Valo <[email protected]>Cc Viresh Kumar <[email protected]>Cc Stephen Boyd <[email protected]>Cc Kishon Vijay Abraham I <[email protected]>Cc Linus Walleij <[email protected]>Cc "Rafael J. Wysocki" <[email protected]>Cc Kevin Hilman <[email protected]>Cc Ulf Hansson <[email protected]>Cc Sebastian Reichel <[email protected]>Cc Mark Brown <[email protected]>Cc Mathieu Poirier <[email protected]>Cc Daniel Lezcano <[email protected]>Cc Zhang Rui <[email protected]>Cc Greg Kroah-Hartman <[email protected]>Cc Thierry Reding <[email protected]>Cc Jonathan Hunter <[email protected]>Cc Sudeep Holla <[email protected]>Cc Geert Uytterhoeven <[email protected]>Signed-off-by Rob Herring <[email protected]>
Quoted 1 line
---
For CPUs and PM domains:
Kind regards
Uffe
Vladimir Oltean
maintainerQuoted 21 lines · Rob Herring
The 'phandle-array' type is a bit ambiguous. It can be either just an array of phandles or an array of phandles plus args. Many schemas for phandle-array properties aren't clear in the schema which case applies though the description usually describes it.
The array of phandles case boils down to needing:
items:
maxItems: 1The phandle plus args cases should typically take this form:
items:
- items:
- description: A phandle
- description: 1st arg cell
- description: 2nd arg cellWith this change, some examples need updating so that the bracketing of property values matches the schema.
---
(...)
Documentation/devicetree/bindings/net/dsa/dsa-port.yaml properties: · line 41
Quoted 13 lines
Documentation/devicetree/bindings/net/dsa/dsa-port.yaml +2
-0@@ -34,6 +34,8 @@ properties: full routing information must be given, not just the one hop routes to neighbouring switches $ref: /schemas/types.yaml#/definitions/phandle-array + items: + maxItems: 1 ethernet: description:
For better or worse, the mainline cases of this property all take the form of:
arch/arm64/boot/dts/marvell/armada-3720-turris-mox.dts
link = <&switch1port9 &switch2port9>; link = <&switch1port10 &switch0port10>; arch/arm/boot/dts/vf610-zii-dev-rev-b.dts link = <&switch1port6 &switch2port9>; link = <&switch1port5 &switch0port5>; arch/arm/boot/dts/vf610-zii-scu4-aib.dts link = <&switch1port10 &switch3port10 &switch2port10>; link = <&switch3port10 &switch2port10>; link = <&switch1port9 &switch0port10>;
So not really an array of phandles.
Rob Herring
maintainerQuoted 58 lines · Vladimir Oltean
Quoted 21 lines · Rob Herring
The 'phandle-array' type is a bit ambiguous. It can be either just an array of phandles or an array of phandles plus args. Many schemas for phandle-array properties aren't clear in the schema which case applies though the description usually describes it.
The array of phandles case boils down to needing:
items:
maxItems: 1The phandle plus args cases should typically take this form:
items:
- items:
- description: A phandle
- description: 1st arg cell
- description: 2nd arg cellWith this change, some examples need updating so that the bracketing of property values matches the schema.
---(...)
Documentation/devicetree/bindings/net/dsa/dsa-port.yaml properties: · line 41
Quoted 13 lines
Documentation/devicetree/bindings/net/dsa/dsa-port.yaml +2
-0@@ -34,6 +34,8 @@ properties: full routing information must be given, not just the one hop routes to neighbouring switches $ref: /schemas/types.yaml#/definitions/phandle-array + items: + maxItems: 1 ethernet: description:For better or worse, the mainline cases of this property all take the form of:
arch/arm64/boot/dts/marvell/armada-3720-turris-mox.dtslink = <&switch1port9 &switch2port9>; link = <&switch1port10 &switch0port10>;
arch/arm/boot/dts/vf610-zii-dev-rev-b.dts
link = <&switch1port6
&switch2port9>;
link = <&switch1port5
&switch0port5>;arch/arm/boot/dts/vf610-zii-scu4-aib.dtslink = <&switch1port10 &switch3port10 &switch2port10>; link = <&switch3port10 &switch2port10>; link = <&switch1port9 &switch0port10>;
Quoted 1 line
So not really an array of phandles.
Either form is an array. The DT yaml encoding maintains the bracketing, so how the schema is defined matters. To some extent the tools will process the schema to support both forms of bracketing, but this has turned out to be fragile and just doesn't work for phandle arrays. I'm working on further changes that will get rid of the yaml encoded DT format and validate DTB files directly. These obviously have no bracketing and needing the DTS source files to change goes away. However, to be able to construct the internal format for validation, I do need the schemas to have more information on what exactly the phandle-array contains.
Rob
Quoted 21 lines · Rob Herring
The 'phandle-array' type is a bit ambiguous. It can be either just an array of phandles or an array of phandles plus args. Many schemas for phandle-array properties aren't clear in the schema which case applies though the description usually describes it.
The array of phandles case boils down to needing:
items:
maxItems: 1The phandle plus args cases should typically take this form:
items:
- items:
- description: A phandle
- description: 1st arg cell
- description: 2nd arg cellWith this change, some examples need updating so that the bracketing of property values matches the schema.
[..]
Quoted 1 line
.../bindings/interconnect/qcom,rpmh.yaml | 2 +
Arnaud POULIQUEN
maintainerHello Rob,
Quoted 83 lines · Rob Herring
The 'phandle-array' type is a bit ambiguous. It can be either just an array of phandles or an array of phandles plus args. Many schemas for phandle-array properties aren't clear in the schema which case applies though the description usually describes it.
The array of phandles case boils down to needing:
items:
maxItems: 1The phandle plus args cases should typically take this form:
items:
- items:
- description: A phandle
- description: 1st arg cell
- description: 2nd arg cellWith this change, some examples need updating so that the bracketing of property values matches the schema.
Cc Damien Le Moal <[email protected]>Cc Herbert Xu <[email protected]>Cc "David S. Miller" <[email protected]>Cc Chun-Kuang Hu <[email protected]>Cc Philipp Zabel <[email protected]>Cc Laurent Pinchart <[email protected]>Cc Kieran Bingham <[email protected]>Cc Vinod Koul <[email protected]>Cc Georgi Djakov <[email protected]>Cc Thomas Gleixner <[email protected]>Cc Marc Zyngier <[email protected]>Cc Joerg Roedel <[email protected]>Cc Lee Jones <[email protected]>Cc Daniel Thompson <[email protected]>Cc Jingoo Han <[email protected]>Cc Pavel Machek <[email protected]>Cc Mauro Carvalho Chehab <[email protected]>Cc Krzysztof Kozlowski <[email protected]>Cc Jakub Kicinski <[email protected]>Cc Wolfgang Grandegger <[email protected]>Cc Marc Kleine-Budde <[email protected]>Cc Andrew Lunn <[email protected]>Cc Vivien Didelot <[email protected]>Cc Florian Fainelli <[email protected]>Cc Vladimir Oltean <[email protected]>Cc Kalle Valo <[email protected]>Cc Viresh Kumar <[email protected]>Cc Stephen Boyd <[email protected]>Cc Kishon Vijay Abraham I <[email protected]>Cc Linus Walleij <[email protected]>Cc "Rafael J. Wysocki" <[email protected]>Cc Kevin Hilman <[email protected]>Cc Ulf Hansson <[email protected]>Cc Sebastian Reichel <[email protected]>Cc Mark Brown <[email protected]>Cc Mathieu Poirier <[email protected]>Cc Daniel Lezcano <[email protected]>Cc Zhang Rui <[email protected]>Cc Greg Kroah-Hartman <[email protected]>Cc Thierry Reding <[email protected]>Cc Jonathan Hunter <[email protected]>Cc Sudeep Holla <[email protected]>Cc Geert Uytterhoeven <[email protected]>Signed-off-by Rob Herring <[email protected]>---
[...]
Quoted 1 line
.../bindings/remoteproc/st,stm32-rproc.yaml | 33 ++++++--
[...]
Quoted 19 lines
Documentation/devicetree/bindings/remoteproc/st,stm32-rproc.yaml +5
-4@@ -29,17 +29,22 @@ properties: st,syscfg-holdboot: description: remote processor reset hold boot - - Phandle of syscon block. - - The offset of the hold boot setting register. - - The field mask of the hold boot. $ref: "/schemas/types.yaml#/definitions/phandle-array" - maxItems: 1 + items: + - items: + - description: Phandle of syscon block + - description: The offset of the hold boot setting register + - description: The field mask of the hold boot
Documentation/devicetree/bindings/remoteproc/st,stm32-rproc.yaml properties: · line 47
Quoted 10 lines
Documentation/devicetree/bindings/remoteproc/st,stm32-rproc.yaml +5
-1st,syscfg-tz: description: Reference to the system configuration which holds the RCC trust zone mode $ref: "/schemas/types.yaml#/definitions/phandle-array" - maxItems: 1 + items: + - items: + - description: Phandle of syscon block + - description: FIXME + - description: FIXME
- description: The offset of the trust zone setting register
- description: The field mask of the trust zone state
Documentation/devicetree/bindings/remoteproc/st,stm32-rproc.yaml properties: · line 105
Quoted 13 lines
Documentation/devicetree/bindings/remoteproc/st,stm32-rproc.yaml +5
-1interrupts: description: Should contain the WWDG1 watchdog reset interrupt@@ -93,20 +98,32 @@ properties: $ref: "/schemas/types.yaml#/definitions/phandle-array" description: | Reference to the system configuration which holds the remote - maxItems: 1 + items: + - items: + - description: Phandle of syscon block + - description: FIXME + - description: FIXME
- description: The offset of the power setting register
- description: The field mask of the PDDS selection
Documentation/devicetree/bindings/remoteproc/st,stm32-rproc.yaml properties: · line 115
Quoted 11 lines
Documentation/devicetree/bindings/remoteproc/st,stm32-rproc.yaml +5
-1st,syscfg-m4-state: $ref: "/schemas/types.yaml#/definitions/phandle-array" description: | Reference to the tamp register which exposes the Cortex-M4 state. - maxItems: 1 + items: + - items: + - description: Phandle of syscon block with the tamp register + - description: FIXME + - description: FIXME
- description: The offset of the tamp register
- description: The field mask of the Cortex-M4 state
Documentation/devicetree/bindings/remoteproc/st,stm32-rproc.yaml properties: · line 126
Quoted 12 lines
Documentation/devicetree/bindings/remoteproc/st,stm32-rproc.yaml +5
-1st,syscfg-rsc-tbl: $ref: "/schemas/types.yaml#/definitions/phandle-array" description: | Reference to the tamp register which references the Cortex-M4 resource table address. - maxItems: 1 + items: + - items: + - description: Phandle of syscon block with the tamp register + - description: FIXME + - description: FIXME
- description: The offset of the tamp register
- description: The field mask of the Cortex-M4 resource table address
Please tell me if you prefer that I fix this in a dedicated patch.
Thanks,
Arnaud
Rob Herring
maintainerQuoted 172 lines · Arnaud POULIQUEN
Hello Rob,
Quoted 83 lines · Rob Herring
The 'phandle-array' type is a bit ambiguous. It can be either just an array of phandles or an array of phandles plus args. Many schemas for phandle-array properties aren't clear in the schema which case applies though the description usually describes it.
The array of phandles case boils down to needing:
items:
maxItems: 1The phandle plus args cases should typically take this form:
items:
- items:
- description: A phandle
- description: 1st arg cell
- description: 2nd arg cellWith this change, some examples need updating so that the bracketing of property values matches the schema.
Cc Damien Le Moal <[email protected]>Cc Herbert Xu <[email protected]>Cc "David S. Miller" <[email protected]>Cc Chun-Kuang Hu <[email protected]>Cc Philipp Zabel <[email protected]>Cc Laurent Pinchart <[email protected]>Cc Kieran Bingham <[email protected]>Cc Vinod Koul <[email protected]>Cc Georgi Djakov <[email protected]>Cc Thomas Gleixner <[email protected]>Cc Marc Zyngier <[email protected]>Cc Joerg Roedel <[email protected]>Cc Lee Jones <[email protected]>Cc Daniel Thompson <[email protected]>Cc Jingoo Han <[email protected]>Cc Pavel Machek <[email protected]>Cc Mauro Carvalho Chehab <[email protected]>Cc Krzysztof Kozlowski <[email protected]>Cc Jakub Kicinski <[email protected]>Cc Wolfgang Grandegger <[email protected]>Cc Marc Kleine-Budde <[email protected]>Cc Andrew Lunn <[email protected]>Cc Vivien Didelot <[email protected]>Cc Florian Fainelli <[email protected]>Cc Vladimir Oltean <[email protected]>Cc Kalle Valo <[email protected]>Cc Viresh Kumar <[email protected]>Cc Stephen Boyd <[email protected]>Cc Kishon Vijay Abraham I <[email protected]>Cc Linus Walleij <[email protected]>Cc "Rafael J. Wysocki" <[email protected]>Cc Kevin Hilman <[email protected]>Cc Ulf Hansson <[email protected]>Cc Sebastian Reichel <[email protected]>Cc Mark Brown <[email protected]>Cc Mathieu Poirier <[email protected]>Cc Daniel Lezcano <[email protected]>Cc Zhang Rui <[email protected]>Cc Greg Kroah-Hartman <[email protected]>Cc Thierry Reding <[email protected]>Cc Jonathan Hunter <[email protected]>Cc Sudeep Holla <[email protected]>Cc Geert Uytterhoeven <[email protected]>Signed-off-by Rob Herring <[email protected]>---
[...]
Quoted 1 line
.../bindings/remoteproc/st,stm32-rproc.yaml | 33 ++++++--[...]
Quoted 19 lines
Documentation/devicetree/bindings/remoteproc/st,stm32-rproc.yaml +5
-4@@ -29,17 +29,22 @@ properties: st,syscfg-holdboot: description: remote processor reset hold boot - - Phandle of syscon block. - - The offset of the hold boot setting register. - - The field mask of the hold boot. $ref: "/schemas/types.yaml#/definitions/phandle-array" - maxItems: 1 + items: + - items: + - description: Phandle of syscon block + - description: The offset of the hold boot setting register + - description: The field mask of the hold bootDocumentation/devicetree/bindings/remoteproc/st,stm32-rproc.yaml properties: · line 47
Quoted 10 lines
Documentation/devicetree/bindings/remoteproc/st,stm32-rproc.yaml +5
-1st,syscfg-tz: description: Reference to the system configuration which holds the RCC trust zone mode $ref: "/schemas/types.yaml#/definitions/phandle-array" - maxItems: 1 + items: + - items: + - description: Phandle of syscon block + - description: FIXME + - description: FIXME- description: The offset of the trust zone setting register
- description: The field mask of the trust zone stateDocumentation/devicetree/bindings/remoteproc/st,stm32-rproc.yaml properties: · line 105
Quoted 13 lines
Documentation/devicetree/bindings/remoteproc/st,stm32-rproc.yaml +5
-1interrupts: description: Should contain the WWDG1 watchdog reset interrupt@@ -93,20 +98,32 @@ properties: $ref: "/schemas/types.yaml#/definitions/phandle-array" description: | Reference to the system configuration which holds the remote - maxItems: 1 + items: + - items: + - description: Phandle of syscon block + - description: FIXME + - description: FIXME- description: The offset of the power setting register
- description: The field mask of the PDDS selectionDocumentation/devicetree/bindings/remoteproc/st,stm32-rproc.yaml properties: · line 115
Quoted 11 lines
Documentation/devicetree/bindings/remoteproc/st,stm32-rproc.yaml +5
-1st,syscfg-m4-state: $ref: "/schemas/types.yaml#/definitions/phandle-array" description: | Reference to the tamp register which exposes the Cortex-M4 state. - maxItems: 1 + items: + - items: + - description: Phandle of syscon block with the tamp register + - description: FIXME + - description: FIXME- description: The offset of the tamp register
- description: The field mask of the Cortex-M4 stateDocumentation/devicetree/bindings/remoteproc/st,stm32-rproc.yaml properties: · line 126
Quoted 12 lines
Documentation/devicetree/bindings/remoteproc/st,stm32-rproc.yaml +5
-1st,syscfg-rsc-tbl: $ref: "/schemas/types.yaml#/definitions/phandle-array" description: | Reference to the tamp register which references the Cortex-M4 resource table address. - maxItems: 1 + items: + - items: + - description: Phandle of syscon block with the tamp register + - description: FIXME + - description: FIXME
Quoted 4 lines
- description: The offset of the tamp register
- description: The field mask of the Cortex-M4 resource table addressPlease tell me if you prefer that I fix this in a dedicated patch.
Thanks! I'll fold this into this patch.
Rob
Quoted 4 lines · Rob Herring
The 'phandle-array' type is a bit ambiguous. It can be either just an array of phandles or an array of phandles plus args. Many schemas for phandle-array properties aren't clear in the schema which case applies though the description usually describes it.
Quoting Rob Herring (2022-01-18 17:50:38)
Quoted 20 lines
The 'phandle-array' type is a bit ambiguous. It can be either just an array of phandles or an array of phandles plus args. Many schemas for phandle-array properties aren't clear in the schema which case applies though the description usually describes it.
The array of phandles case boils down to needing:
items:
maxItems: 1The phandle plus args cases should typically take this form:
items:
- items:
- description: A phandle
- description: 1st arg cell
- description: 2nd arg cellWith this change, some examples need updating so that the bracketing of property values matches the schema.
[..]
Quoted 2 lines
Signed-off-by Rob Herring <[email protected]>---
Quoted 12 lines · Rob Herring
The 'phandle-array' type is a bit ambiguous. It can be either just an array of phandles or an array of phandles plus args. Many schemas for phandle-array properties aren't clear in the schema which case applies though the description usually describes it.
The array of phandles case boils down to needing:
items:
maxItems: 1The phandle plus args cases should typically take this form:
Quoted 8 lines
items:
- items:
- description: A phandle
- description: 1st arg cell
- description: 2nd arg cellWith this change, some examples need updating so that the bracketing of property values matches the schema.
Signature · 1 line
~Vinod
Quoted 6 lines · Rob Herring
The 'phandle-array' type is a bit ambiguous. It can be either just an array of phandles or an array of phandles plus args. Many schemas for phandle-array properties aren't clear in the schema which case applies though the description usually describes it.
Hi Rob,
I have few questions below.
(...)
Quoted 5 lines
Documentation/devicetree/bindings/sound/samsung,midas-audio.yaml +0
-0
Documentation/devicetree/bindings/sound/samsung,midas-audio.yaml properties: · line 27
Quoted 9 lines
Documentation/devicetree/bindings/sound/samsung,midas-audio.yaml +1
-2@@ -21,8 +21,7 @@ properties: type: object properties: sound-dai: - $ref: /schemas/types.yaml#/definitions/phandle-array - maxItems: 1 + $ref: /schemas/types.yaml#/definitions/phandle description: phandle to the I2S controller required: - sound-dai
This passes the example only because the example was simplified to hide dtschema errors.
The cpu dai node is like:
cpu {
sound-dai = <&i2s0 0>;
};and this fails with errors missing phandle tag in 0.
I am converting rest of Samsung audio bindings to dtschema and have trouble expressing this. How schema should express such cpu node?
Best regards,
Krzysztof
Rob Herring
maintainerQuoted 34 lines · Krzysztof Kozlowski
Quoted 6 lines · Rob Herring
The 'phandle-array' type is a bit ambiguous. It can be either just an array of phandles or an array of phandles plus args. Many schemas for phandle-array properties aren't clear in the schema which case applies though the description usually describes it.
Hi Rob,
I have few questions below.
(...)
Quoted 5 lines
Documentation/devicetree/bindings/sound/samsung,midas-audio.yaml +0
-0Documentation/devicetree/bindings/sound/samsung,midas-audio.yaml properties: · line 27
Quoted 9 lines
Documentation/devicetree/bindings/sound/samsung,midas-audio.yaml +1
-2@@ -21,8 +21,7 @@ properties: type: object properties: sound-dai: - $ref: /schemas/types.yaml#/definitions/phandle-array - maxItems: 1 + $ref: /schemas/types.yaml#/definitions/phandle description: phandle to the I2S controller required: - sound-daiThis passes the example only because the example was simplified to hide dtschema errors.
The cpu dai node is like:
Quoted 8 lines
cpu { sound-dai = <&i2s0 0>; };and this fails with errors missing phandle tag in 0.
I am converting rest of Samsung audio bindings to dtschema and have trouble expressing this. How schema should express such cpu node?
The above hunk should be reverted. I'll drop that hunk.
Rob