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arm64: dts: qcom: sc7280: Introduce herobrine-rev1

PATCH Applied Douglas Anderson 4 participants 21 messages Jan 25, 2022 – Feb 3, 2022

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#0 lore raw

v2 cover arm64: dts: qcom: sc7280: Introduce herobrine-rev1

This series adds support for herobrine-rev1. Note that it's likely that with the introduction of -rev1 we can drop -rev0 support, but we'll keep it for now (though we won't try to "fit it in" and share code with it).

This series is confirmed to boot herobrine-rev1 atop mainline, commit 0280e3c58f92 ("Merge tag 'nfs-for-5.17-1' of
git://git.linux-nfs.org/projects/anna/linux-nfs"), though it requires a hack to work around a misconfigured DMA for i2c14
(https://crrev.com/c/3378660)

Changes in v2:
- memory-region syntax change as per Stephen.
- ("Factor gpio.h include to sc7280.dtsi") new for v2
- Herobrine compatible on one line, not two
- Wording change in comments for components enabled per-board
- Always sort "bias" above "drive-strength" in pinctrl.
- Properly sort "hub_en" pinctrl.
- Two comments moved from multiline to single line.
- Space after "/delete-property/"

Douglas Anderson (5):
arm64: dts: qcom: sc7280: Fix gmu unit address
arm64: dts: qcom: sc7280: Move herobrine-r0 to its own dts
arm64: dts: qcom: sc7280: Factor out Chrome common fragment
arm64: dts: qcom: sc7280: Factor gpio.h include to sc7280.dtsi
arm64: dts: qcom: sc7280: Add herobrine-r1

 arch/arm64/boot/dts/qcom/Makefile             |    3 +-
 .../boot/dts/qcom/sc7280-chrome-common.dtsi   |   97 ++
 .../qcom/sc7280-herobrine-herobrine-r0.dts    | 1350 +++++++++++++++++
 .../qcom/sc7280-herobrine-herobrine-r1.dts    |  313 ++++
 arch/arm64/boot/dts/qcom/sc7280-herobrine.dts |   14 -
 .../arm64/boot/dts/qcom/sc7280-herobrine.dtsi | 1056 +++----------
 arch/arm64/boot/dts/qcom/sc7280-idp.dtsi      |   76 +-
 arch/arm64/boot/dts/qcom/sc7280-qcard.dtsi    |  553 +++++++
 arch/arm64/boot/dts/qcom/sc7280.dtsi          |    3 +-
 9 files changed, 2530 insertions(+), 935 deletions(-)
 create mode 100644 arch/arm64/boot/dts/qcom/sc7280-chrome-common.dtsi
 create mode 100644 arch/arm64/boot/dts/qcom/sc7280-herobrine-herobrine-r0.dts
 create mode 100644 arch/arm64/boot/dts/qcom/sc7280-herobrine-herobrine-r1.dts
 delete mode 100644 arch/arm64/boot/dts/qcom/sc7280-herobrine.dts
 create mode 100644 arch/arm64/boot/dts/qcom/sc7280-qcard.dtsi
Signature · 1 line
2.35.0.rc0.227.g00780c9af4-goog
#1 lore raw

PATCH v2 1/5 arm64: dts: qcom: sc7280: Fix gmu unit address

When processing sc7280 device trees, I can see:

Warning (simple_bus_reg): /soc@0/gmu@3d69000:
simple-bus unit address format error, expected "3d6a000"

There's a clear typo in the node name. Fix it.

Fixes 96c471970b7b ("arm64: dts: qcom: sc7280: Add gpu support")

---

(no changes since v1)

 arch/arm64/boot/dts/qcom/sc7280.dtsi | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)
arch/arm64/boot/dts/qcom/sc7280.dtsi +1 -1
index 937c2e0e93eb..eab7a8505053 100644
@@ -1790,7 +1790,7 @@ opp-550000000 {
 			};
 		};
 
-		gmu: gmu@3d69000 {
+		gmu: gmu@3d6a000 {
 			compatible="qcom,adreno-gmu-635.0", "qcom,adreno-gmu";
 			reg = <0 0x03d6a000 0 0x34000>,
 				<0 0x3de0000 0 0x10000>,
Signature · 1 line
2.35.0.rc0.227.g00780c9af4-goog
#2 lore raw

Re: [PATCH v2 1/5] arm64: dts: qcom: sc7280: Fix gmu unit address

Quoted 23 lines · Douglas Anderson

When processing sc7280 device trees, I can see:

Warning (simple_bus_reg): /soc@0/gmu@3d69000:
simple-bus unit address format error, expected "3d6a000"

There's a clear typo in the node name. Fix it.

Fixes 96c471970b7b ("arm64: dts: qcom: sc7280: Add gpu support")

---

(no changes since v1)

  arch/arm64/boot/dts/qcom/sc7280.dtsi | 2 +-
  1 file changed, 1 insertion(+), 1 deletion(-)
arch/arm64/boot/dts/qcom/sc7280.dtsi +0 -0
index 937c2e0e93eb..eab7a8505053 100644

arch/arm64/boot/dts/qcom/sc7280.dtsi opp-550000000 { · line 1796

Quoted 8 lines
arch/arm64/boot/dts/qcom/sc7280.dtsi +1 -1
@@ -1790,7 +1790,7 @@ opp-550000000 {
  			};
  		};
 
-		gmu: gmu@3d69000 {
+		gmu: gmu@3d6a000 {
  			compatible="qcom,adreno-gmu-635.0", "qcom,adreno-gmu";
  			reg = <0 0x03d6a000 0 0x34000>,
  				<0 0x3de0000 0 0x10000>,

My bad! Thanks for the fix.

fwiw, Reviewed-by: Akhil P Oommen <[email protected]>

-Akhil.

#3 lore raw

PATCH v2 2/5 arm64: dts: qcom: sc7280: Move herobrine-r0 to its own dts

In reply to Douglas Anderson

The upcoming herobrine-r1 board is really not very similar to herobrine-r0. Let's get rid of the "herobrine.dtsi" file and stick all the content in the -r0 dts file directly. We'll also rename the dts so it's obvious that it's just for -r0.

While renaming, let's actually name the file so it's obvious that "herobrine" is both the name of the board and the name of the "baseboard". In other words "herobrine" is an actual board but also often used as the name of a whole class of similar boards that forked from a design. While "herobrine-herobrine" is a bit of mouthful it makes it more obvious which things are part of an actual board rather than the baseboard.

NOTE: herobrine-rev0's days are likely doomed and this device tree is likely to be deleted in the future.

---

(no changes since v1)

 arch/arm64/boot/dts/qcom/Makefile                  |  2 +-
 ...rine.dtsi => sc7280-herobrine-herobrine-r0.dts} |  6 ++++++
 arch/arm64/boot/dts/qcom/sc7280-herobrine.dts      | 14 --------------
 3 files changed, 7 insertions(+), 15 deletions(-)
 rename arch/arm64/boot/dts/qcom/{sc7280-herobrine.dtsi => sc7280-herobrine-herobrine-r0.dts} (99%)
 delete mode 100644 arch/arm64/boot/dts/qcom/sc7280-herobrine.dts
arch/arm64/boot/dts/qcom/Makefile +1 -1
index f7232052d286..9db743826391 100644
@@ -82,7 +82,7 @@ dtb-$(CONFIG_ARCH_QCOM)	+= sc7180-trogdor-pompom-r3.dtb
 dtb-$(CONFIG_ARCH_QCOM)	+= sc7180-trogdor-pompom-r3-lte.dtb
 dtb-$(CONFIG_ARCH_QCOM)	+= sc7180-trogdor-r1.dtb
 dtb-$(CONFIG_ARCH_QCOM)	+= sc7180-trogdor-r1-lte.dtb
-dtb-$(CONFIG_ARCH_QCOM)	+= sc7280-herobrine.dtb
+dtb-$(CONFIG_ARCH_QCOM)	+= sc7280-herobrine-herobrine-r0.dtb
 dtb-$(CONFIG_ARCH_QCOM)	+= sc7280-idp.dtb
 dtb-$(CONFIG_ARCH_QCOM)	+= sc7280-idp2.dtb
 dtb-$(CONFIG_ARCH_QCOM)	+= sc7280-crd.dtb
arch/arm64/boot/dts/qcom/sc7280-herobrine-herobrine-r0.dts renamed from arch/arm64/boot/dts/qcom/sc7280-herobrine.dtsi +6 -0
similarity index 99%
rename from arch/arm64/boot/dts/qcom/sc7280-herobrine.dtsi
rename to arch/arm64/boot/dts/qcom/sc7280-herobrine-herobrine-r0.dts
index 4619fa9fcacd..8676c93590b5 100644
@@ -22,6 +22,12 @@
 #include "pm8350c.dtsi"
 #include "pmk8350.dtsi"
 
+/ {
+	model = "Google Herobrine (rev0)";
+	compatible = "google,herobrine",
+		     "qcom,sc7280";
+};
+
 /*
  * Reserved memory changes
  *
arch/arm64/boot/dts/qcom/sc7280-herobrine.dts deleted +0 -14
deleted file mode 100644
index 7a92679a688b..000000000000
@@ -1,14 +0,0 @@
-// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
-/*
- * Google Herobrine board device tree source
- *
- * Copyright 2021 Google LLC.
- */
-
-#include "sc7280-herobrine.dtsi"
-
-/ {
-	model = "Google Herobrine";
-	compatible = "google,herobrine",
-		     "qcom,sc7280";
-};
Signature · 1 line
2.35.0.rc0.227.g00780c9af4-goog
#4 lore raw

PATCH v2 3/5 arm64: dts: qcom: sc7280: Factor out Chrome common fragment

In reply to Douglas Anderson

This factors out a device tree fragment from some sc7280 device trees. It represents the device tree bits that should be included for "Chrome" based sc7280 boards. On these boards the bootloader (Coreboot
+ Depthcharge) configures things slightly different than the bootloader that Qualcomm provides. The modem firmware on these boards also works differently than on other Qulacomm products and thus the reserved memory map needs to be adjusted.

NOTES:
- This is _not_ quite a no-op change. The "herobrine" and "idp" fragments here were different and it looks like someone simply forgot to update the herobrine version. This updates a few numbers to match IDP. This will also cause the pmk8350_pon to be disabled on idp/crd, which I belive is a correct change.
- At the moment this assumes LTE skus. Once it's clearer how WiFi SKUs will work (how much of the memory map they can reclaim) we may add an extra fragment that will rejigger one way or the other.

---

Changes in v2:
- memory-region syntax change as per Stephen.

 .../boot/dts/qcom/sc7280-chrome-common.dtsi   | 97 +++++++++++++++++++
 .../qcom/sc7280-herobrine-herobrine-r0.dts    | 70 +------------
 arch/arm64/boot/dts/qcom/sc7280-idp.dtsi      | 75 +-------------
 3 files changed, 101 insertions(+), 141 deletions(-)
 create mode 100644 arch/arm64/boot/dts/qcom/sc7280-chrome-common.dtsi
arch/arm64/boot/dts/qcom/sc7280-chrome-common.dtsi new file +97 -0
new file mode 100644
index 000000000000..9f4a9c263c35
@@ -0,0 +1,97 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * sc7280 fragment for devices with Chrome bootloader
+ *
+ * This file mainly tries to abstract out the memory protections put into
+ * place by the Chrome bootloader which are different than what's put into
+ * place by Qualcomm's typical bootloader. It also has a smattering of other
+ * things that will hold true for any conceivable Chrome design
+ *
+ * Copyright 2022 Google LLC.
+ */
+
+/*
+ * Reserved memory changes
+ *
+ * Delete all unused memory nodes and define the peripheral memory regions
+ * required by the setup for Chrome boards.
+ */
+
+/delete-node/ &hyp_mem;
+/delete-node/ &xbl_mem;
+/delete-node/ &reserved_xbl_uefi_log;
+/delete-node/ &sec_apps_mem;
+
+/ {
+	reserved-memory {
+		adsp_mem: memory@86700000 {
+			reg = <0x0 0x86700000 0x0 0x2800000>;
+			no-map;
+		};
+
+		camera_mem: memory@8ad00000 {
+			reg = <0x0 0x8ad00000 0x0 0x500000>;
+			no-map;
+		};
+
+		venus_mem: memory@8b200000 {
+			reg = <0x0 0x8b200000 0x0 0x500000>;
+			no-map;
+		};
+
+		mpss_mem: memory@8b800000 {
+			reg = <0x0 0x8b800000 0x0 0xf600000>;
+			no-map;
+		};
+
+		wpss_mem: memory@9ae00000 {
+			reg = <0x0 0x9ae00000 0x0 0x1900000>;
+			no-map;
+		};
+
+		mba_mem: memory@9c700000 {
+			reg = <0x0 0x9c700000 0x0 0x200000>;
+			no-map;
+		};
+	};
+};
+
+/* The PMIC PON code isn't compatible w/ how Chrome EC/BIOS handle things. */
+&pmk8350_pon {
+	status = "disabled";
+};
+
+/*
+ * Chrome designs always boot from SPI flash hooked up to the qspi.
+ *
+ * It's expected that all boards will support "dual SPI" at 37.5 MHz.
+ * If some boards need a different speed or have a package that allows
+ * Quad SPI together with WP then those boards can easily override.
+ */
+&qspi {
+	status = "okay";
+	pinctrl-names = "default";
+	pinctrl-0 = <&qspi_clk>, <&qspi_cs0>, <&qspi_data01>;
+
+	spi_flash: flash@0 {
+		compatible = "jedec,spi-nor";
+		reg = <0>;
+
+		spi-max-frequency = <37500000>;
+		spi-tx-bus-width = <2>;
+		spi-rx-bus-width = <2>;
+	};
+};
+
+/* Modem setup is different on Chrome setups than typical Qualcomm setup */
+&remoteproc_mpss {
+	status = "okay";
+	compatible = "qcom,sc7280-mss-pil";
+	iommus = <&apps_smmu 0x124 0x0>, <&apps_smmu 0x488 0x7>;
+	memory-region = <&mba_mem>, <&mpss_mem>;
+};
+
+/* Increase the size from 2.5MB to 8MB */
+&rmtfs_mem {
+	reg = <0x0 0x9c900000 0x0 0x800000>;
+};
arch/arm64/boot/dts/qcom/sc7280-herobrine-herobrine-r0.dts +2 -68

95 lines not on this page · raw message

arch/arm64/boot/dts/qcom/sc7280-idp.dtsi +2 -73

99 lines not on this page · raw message

Signature · 1 line
2.35.0.rc0.227.g00780c9af4-goog
#5 lore raw

Re: (subset) [PATCH v2 3/5] arm64: dts: qcom: sc7280: Factor out Chrome common fragment

Quoted 9 lines · Douglas Anderson

This factors out a device tree fragment from some sc7280 device trees. It represents the device tree bits that should be included for "Chrome" based sc7280 boards. On these boards the bootloader (Coreboot
+ Depthcharge) configures things slightly different than the bootloader that Qualcomm provides. The modem firmware on these boards also works differently than on other Qulacomm products and thus the reserved memory map needs to be adjusted.

[...]

Applied, thanks!

[3/5] arm64: dts: qcom: sc7280: Factor out Chrome common fragment

      commit: 90c856602e0346ce9ff234062e86a198d71fa723

Best regards,

Signature · 1 line
Bjorn Andersson <[email protected]>
#6 lore raw

PATCH v2 4/5 arm64: dts: qcom: sc7280: Factor gpio.h include to sc7280.dtsi

In reply to Douglas Anderson

Though sc7280 itself doesn't need any of the defines in gpio.h, it's highly likely that the actual boards will use them. Let's add the include to the sc7280.dtsi file so that boards don't need to do it.

---

Changes in v2:
- ("Factor gpio.h include to sc7280.dtsi") new for v2

 arch/arm64/boot/dts/qcom/sc7280-herobrine-herobrine-r0.dts | 1 -
 arch/arm64/boot/dts/qcom/sc7280-idp.dtsi                   | 1 -
 arch/arm64/boot/dts/qcom/sc7280.dtsi                       | 1 +
 3 files changed, 1 insertion(+), 2 deletions(-)
arch/arm64/boot/dts/qcom/sc7280-herobrine-herobrine-r0.dts +0 -1
index 67680a13c234..ad4fe288b53c 100644
@@ -7,7 +7,6 @@
 
 /dts-v1/;
 
-#include <dt-bindings/gpio/gpio.h>
 #include <dt-bindings/iio/qcom,spmi-adc7-pmk8350.h>
 #include <dt-bindings/iio/qcom,spmi-adc7-pmr735a.h>
 #include <dt-bindings/input/gpio-keys.h>
arch/arm64/boot/dts/qcom/sc7280-idp.dtsi +0 -1
index 98c8f39ce459..ec9836f4019e 100644
@@ -5,7 +5,6 @@
  * Copyright (c) 2021, The Linux Foundation. All rights reserved.
  */
 
-#include <dt-bindings/gpio/gpio.h>
 #include <dt-bindings/iio/qcom,spmi-adc7-pmk8350.h>
 #include <dt-bindings/input/linux-event-codes.h>
 #include "sc7280.dtsi"
arch/arm64/boot/dts/qcom/sc7280.dtsi +1 -0
index eab7a8505053..02aff23d025e 100644
@@ -10,6 +10,7 @@
 #include <dt-bindings/clock/qcom,gpucc-sc7280.h>
 #include <dt-bindings/clock/qcom,rpmh.h>
 #include <dt-bindings/clock/qcom,videocc-sc7280.h>
+#include <dt-bindings/gpio/gpio.h>
 #include <dt-bindings/interconnect/qcom,sc7280.h>
 #include <dt-bindings/interrupt-controller/arm-gic.h>
 #include <dt-bindings/mailbox/qcom-ipcc.h>
Signature · 1 line
2.35.0.rc0.227.g00780c9af4-goog
Reviewed-by on v2 4/5
#7 lore raw

Re: [PATCH v2 4/5] arm64: dts: qcom: sc7280: Factor gpio.h include to sc7280.dtsi

Quoting Douglas Anderson (2022-01-25 14:44:21)

Quoted 7 lines

Though sc7280 itself doesn't need any of the defines in gpio.h, it's highly likely that the actual boards will use them. Let's add the include to the sc7280.dtsi file so that boards don't need to do it.

---

#8 lore raw

PATCH v2 5/5 arm64: dts: qcom: sc7280: Add herobrine-r1

In reply to Douglas Anderson

Add the new herobrine-r1. Note that this is pretty much a re-design compared to herobrine-r0 so we don't attempt any dtsi to share stuff between them.

This patch attempts to define things at 3 levels:

1. The Qcard level. Herobrine includes a Qcard PCB and the Qcard PCB is supposed to be the same (modulo stuffing options) across multiple boards, so trying to define what's there hopefully makes sense. NOTE that newer "CRD" boards from Qualcomm also use Qcard. When support for CRD3 is added hopefully it can use the Qcard include (and perhaps we should even evaluate it using herobrine.dtsi?)
2. The herobrine "baseboard" level. Right now most stuff is here with the exception of things that we _know_ will be different per board. We know that not all boards will have the same set of eMMC, nvme, and SD. We also know that the exact pin names are likely to be different.
3. The actual "board" level, AKA herobrine-rev1.

NOTES:
- This boots to command prompt, but no eDP yet since eDP hasn't been added to sc7280.dtsi yet.
- This assumes LTE for now. Once it's clear how WiFi-only SKUs will work we expect some small changes.

---

Changes in v2:
- Herobrine compatible on one line, not two
- Wording change in comments for components enabled per-board
- Always sort "bias" above "drive-strength" in pinctrl.
- Properly sort "hub_en" pinctrl.
- Two comments moved from multiline to single line.
- Space after "/delete-property/"

 arch/arm64/boot/dts/qcom/Makefile             |   1 +
 .../qcom/sc7280-herobrine-herobrine-r0.dts    |   3 +-
 .../qcom/sc7280-herobrine-herobrine-r1.dts    | 313 +++++++
 .../arm64/boot/dts/qcom/sc7280-herobrine.dtsi | 778 ++++++++++++++++++
 arch/arm64/boot/dts/qcom/sc7280-qcard.dtsi    | 553 +++++++++++++
 5 files changed, 1646 insertions(+), 2 deletions(-)
 create mode 100644 arch/arm64/boot/dts/qcom/sc7280-herobrine-herobrine-r1.dts
 create mode 100644 arch/arm64/boot/dts/qcom/sc7280-herobrine.dtsi
 create mode 100644 arch/arm64/boot/dts/qcom/sc7280-qcard.dtsi
arch/arm64/boot/dts/qcom/Makefile +1 -0
index 9db743826391..54998e108092 100644
@@ -83,6 +83,7 @@ dtb-$(CONFIG_ARCH_QCOM)	+= sc7180-trogdor-pompom-r3-lte.dtb
 dtb-$(CONFIG_ARCH_QCOM)	+= sc7180-trogdor-r1.dtb
 dtb-$(CONFIG_ARCH_QCOM)	+= sc7180-trogdor-r1-lte.dtb
 dtb-$(CONFIG_ARCH_QCOM)	+= sc7280-herobrine-herobrine-r0.dtb
+dtb-$(CONFIG_ARCH_QCOM)	+= sc7280-herobrine-herobrine-r1.dtb
 dtb-$(CONFIG_ARCH_QCOM)	+= sc7280-idp.dtb
 dtb-$(CONFIG_ARCH_QCOM)	+= sc7280-idp2.dtb
 dtb-$(CONFIG_ARCH_QCOM)	+= sc7280-crd.dtb
arch/arm64/boot/dts/qcom/sc7280-herobrine-herobrine-r0.dts +1 -2
index ad4fe288b53c..e19eea1cb69a 100644
@@ -25,8 +25,7 @@
 
 / {
 	model = "Google Herobrine (rev0)";
-	compatible = "google,herobrine",
-		     "qcom,sc7280";
+	compatible = "google,herobrine-rev0", "qcom,sc7280";
 };
 
 / {
arch/arm64/boot/dts/qcom/sc7280-herobrine-herobrine-r1.dts new file +313 -0

313 lines not on this page · raw message

arch/arm64/boot/dts/qcom/sc7280-herobrine.dtsi new file +778 -0

778 lines not on this page · raw message

arch/arm64/boot/dts/qcom/sc7280-qcard.dtsi new file +553 -0

553 lines not on this page · raw message

Signature · 1 line
2.35.0.rc0.227.g00780c9af4-goog
#9 lore raw

Re: [PATCH v2 5/5] arm64: dts: qcom: sc7280: Add herobrine-r1

Quoting Douglas Anderson (2022-01-25 14:44:22)

Quoted 10 lines
arch/arm64/boot/dts/qcom/sc7280-herobrine-herobrine-r1.dts new file +4 -0
new file mode 100644
index 000000000000..f95273052da0
@@ -0,0 +1,313 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Google Herobrine board device tree source
+ *

arch/arm64/boot/dts/qcom/sc7280-herobrine-herobrine-r1.dts line 14

Quoted 10 lines
arch/arm64/boot/dts/qcom/sc7280-herobrine-herobrine-r1.dts new file +10 -0
+ * Copyright 2022 Google LLC.
+ */
+
+/dts-v1/;
+
+#include "sc7280-herobrine.dtsi"
+
+/ {
+       model = "Google Herobrine (rev1+)";
+       compatible = "google,herobrine", "qcom,sc7280";

Can we stop adding "qcom,sc7280" to the board compatible string? It looks out of place. It's the compatible for the SoC and should really be the compatible for the /soc node.

Quoted 7 lines
arch/arm64/boot/dts/qcom/sc7280-herobrine-herobrine-r1.dts new file +7 -0
+};
+
+/* ADDITIONS TO NODES DEFINED IN PARENT DEVICE TREE FILES */
+
+&ap_spi_fp {
+       status = "okay";
+};

[...]

Quoted 10 lines
arch/arm64/boot/dts/qcom/sc7280-herobrine.dtsi new file +4 -0
new file mode 100644
index 000000000000..24c34ddebd18
@@ -0,0 +1,778 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Google Herobrine baseboard device tree source
+ *

[...]

Quoted 10 lines
arch/arm64/boot/dts/qcom/sc7280-herobrine.dtsi new file +10 -0
+
+               vin-supply = <&ppvar_sys>;
+       };
+
+       pp3300_codec: pp3300-codec-regulator {
+               compatible = "regulator-fixed";
+               regulator-name = "pp3300_codec";
+
+               regulator-min-microvolt = <3300000>;
+               regulator-max-microvolt = <3300000>;

arch/arm64/boot/dts/qcom/sc7280-herobrine.dtsi line 97

Quoted 10 lines
arch/arm64/boot/dts/qcom/sc7280-herobrine.dtsi new file +10 -0
+
+               gpio = <&tlmm 105 GPIO_ACTIVE_HIGH>;
+               enable-active-high;
+               pinctrl-names = "default";
+               pinctrl-0 = <&en_pp3300_codec>;
+
+               vin-supply = <&pp3300_z1>;
+       };
+
+       pp3300_left_in_mlb: pp3300-left-in-mlb {

Sometimes '-regulator' is left out. Is that intentional? I suppose it would be better if every node had regulator postfix, but it may be too long of a node name?

Quoted 7 lines
arch/arm64/boot/dts/qcom/sc7280-herobrine.dtsi new file +7 -0
+               compatible = "regulator-fixed";
+               regulator-name = "pp3300_left_in_mlb";
+
+               regulator-min-microvolt = <3300000>;
+               regulator-max-microvolt = <3300000>;
+
+               gpio = <&tlmm 80 GPIO_ACTIVE_HIGH>;
#10 lore raw

Re: [PATCH v2 5/5] arm64: dts: qcom: sc7280: Add herobrine-r1

Hi,

Quoted 18 lines · Stephen Boyd

Quoting Douglas Anderson (2022-01-25 14:44:22)

Quoted 16 lines
arch/arm64/boot/dts/qcom/sc7280-herobrine-herobrine-r1.dts new file +10 -0
new file mode 100644
index 000000000000..f95273052da0
@@ -0,0 +1,313 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Google Herobrine board device tree source
+ *
+ * Copyright 2022 Google LLC.
+ */
+
+/dts-v1/;
+
+#include "sc7280-herobrine.dtsi"
Quoted 8 lines

arch/arm64/boot/dts/qcom/sc7280-herobrine-herobrine-r1.dts line 14

Quoted 4 lines
arch/arm64/boot/dts/qcom/sc7280-herobrine-herobrine-r1.dts new file +4 -0
+
+/ {
+       model = "Google Herobrine (rev1+)";
+       compatible = "google,herobrine", "qcom,sc7280";

Can we stop adding "qcom,sc7280" to the board compatible string? It looks out of place. It's the compatible for the SoC and should really be the compatible for the /soc node.

I don't have any objections, but I feel like this is the type of thing I'd like Bjorn to have the final say on. What say you, Bjorn?

Quoted 5 lines

arch/arm64/boot/dts/qcom/sc7280-herobrine-herobrine-r1.dts line 15

Quoted 1 line
arch/arm64/boot/dts/qcom/sc7280-herobrine-herobrine-r1.dts new file +1 -0
+       pp3300_left_in_mlb: pp3300-left-in-mlb {

Sometimes '-regulator' is left out. Is that intentional? I suppose it would be better if every node had regulator postfix, but it may be too long of a node name?

Huh, you're right. No, it's not intentional. It looks like it was that way on herobrine-rev0 too... It also looks like it's missing on "pp3300-hub" on trogdor.

Happy to add "-regulator" in the herobrine / trogdor nodes that need it. I'll probably do it as a follow-on patch if that works OK? Then I can just clean them all up at once...

-Doug

#11 lore raw

Re: [PATCH v2 5/5] arm64: dts: qcom: sc7280: Add herobrine-r1

Quoted 30 lines · Doug Anderson

Hi,

Quoted 18 lines · Stephen Boyd

Quoting Douglas Anderson (2022-01-25 14:44:22)

Quoted 16 lines
arch/arm64/boot/dts/qcom/sc7280-herobrine-herobrine-r1.dts new file +10 -0
new file mode 100644
index 000000000000..f95273052da0
@@ -0,0 +1,313 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Google Herobrine board device tree source
+ *
+ * Copyright 2022 Google LLC.
+ */
+
+/dts-v1/;
+
+#include "sc7280-herobrine.dtsi"
Quoted 8 lines

arch/arm64/boot/dts/qcom/sc7280-herobrine-herobrine-r1.dts line 14

Quoted 4 lines
arch/arm64/boot/dts/qcom/sc7280-herobrine-herobrine-r1.dts new file +4 -0
+
+/ {
+       model = "Google Herobrine (rev1+)";
+       compatible = "google,herobrine", "qcom,sc7280";

Can we stop adding "qcom,sc7280" to the board compatible string? It looks out of place. It's the compatible for the SoC and should really be the compatible for the /soc node.

Quoted 3 lines

I don't have any objections, but I feel like this is the type of thing I'd like Bjorn to have the final say on. What say you, Bjorn?

One practical case I can think of right away, where this matters is in cpufreq-dt-plat.c where we blocklist qcom,sc7280.

I don't know if we rely on this in any other places, but I'm not keen on seeing a bunch of board-specific compatibles sprinkled throughout the implementation - it's annoying enough having to add each platform to these drivers.

Regards,
Bjorn

Quoted 16 lines
Quoted 6 lines

arch/arm64/boot/dts/qcom/sc7280-herobrine-herobrine-r1.dts line 15

Quoted 2 lines
arch/arm64/boot/dts/qcom/sc7280-herobrine-herobrine-r1.dts new file +1 -0
+       pp3300_left_in_mlb: pp3300-left-in-mlb {

Sometimes '-regulator' is left out. Is that intentional? I suppose it would be better if every node had regulator postfix, but it may be too long of a node name?

Huh, you're right. No, it's not intentional. It looks like it was that way on herobrine-rev0 too... It also looks like it's missing on "pp3300-hub" on trogdor.

Happy to add "-regulator" in the herobrine / trogdor nodes that need it. I'll probably do it as a follow-on patch if that works OK? Then I can just clean them all up at once...

-Doug

#12 lore raw

Re: [PATCH v2 5/5] arm64: dts: qcom: sc7280: Add herobrine-r1

Quoting Bjorn Andersson (2022-01-25 19:01:31)

Quoted 36 lines · Doug Anderson
Quoted 31 lines

Hi,

Quoted 18 lines · Stephen Boyd

Quoting Douglas Anderson (2022-01-25 14:44:22)

Quoted 16 lines
arch/arm64/boot/dts/qcom/sc7280-herobrine-herobrine-r1.dts new file +10 -0
new file mode 100644
index 000000000000..f95273052da0
@@ -0,0 +1,313 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Google Herobrine board device tree source
+ *
+ * Copyright 2022 Google LLC.
+ */
+
+/dts-v1/;
+
+#include "sc7280-herobrine.dtsi"
Quoted 8 lines

arch/arm64/boot/dts/qcom/sc7280-herobrine-herobrine-r1.dts line 14

Quoted 4 lines
arch/arm64/boot/dts/qcom/sc7280-herobrine-herobrine-r1.dts new file +4 -0
+
+/ {
+       model = "Google Herobrine (rev1+)";
+       compatible = "google,herobrine", "qcom,sc7280";

Can we stop adding "qcom,sc7280" to the board compatible string? It looks out of place. It's the compatible for the SoC and should really be the compatible for the /soc node.

Quoted 3 lines

I don't have any objections, but I feel like this is the type of thing I'd like Bjorn to have the final say on. What say you, Bjorn?

Quoted 7 lines

One practical case I can think of right away, where this matters is in cpufreq-dt-plat.c where we blocklist qcom,sc7280.

I don't know if we rely on this in any other places, but I'm not keen on seeing a bunch of board-specific compatibles sprinkled throughout the implementation - it's annoying enough having to add each platform to these drivers.

Looking at sc7180, grep only shows cpufreq-dt-plat.c

 $ git grep qcom,sc7180\" -- drivers
 drivers/cpufreq/cpufreq-dt-platdev.c:   { .compatible = "qcom,sc7180", },

Simplest solution would be to look at / and /soc for a compatible string.

 $ git grep -W 'soc[^:]*{' -- arch/arm*/boot/dts/ | grep compatible |
grep -v "simple-bus"

doesn't show many hits. The first hit is "ti,omap-infra" which is actually inside an soc node, but even then I don't see anything that matches the cpufreq-dt-plat.c lists.

----8<-----

(quoted diff) +0 -0

b/drivers/cpufreq/cpufreq-dt-platdev.c
index ca1d103ec449..32bfe453f8b4 100644

drivers/cpufreq/cpufreq-dt-platdev.c +7 -3
@@ -179,25 +179,29 @@ static bool __init cpu0_node_has_opp_v2_prop(void)
 static int __init cpufreq_dt_platdev_init(void)
 {
 	struct device_node *np = of_find_node_by_path("/");
+	struct device_node *soc_np = of_find_node_by_path("/soc");
 	const struct of_device_id *match;
 	const void *data = NULL;
 
-	if (!np)
+	if (!np && !soc_np)
 		return -ENODEV;
 
 	match = of_match_node(allowlist, np);
-	if (match) {
+	if (match || (match = of_match_node(allowlist, soc_np))) {
 		data = match->data;
 		goto create_pdev;
 	}
 
-	if (cpu0_node_has_opp_v2_prop() && !of_match_node(blocklist, np))
+	if (cpu0_node_has_opp_v2_prop() && !of_match_node(blocklist, np) &&
+	    !of_match_node(blocklist, soc_np))
 		goto create_pdev;
 
+	of_node_put(soc_np);
 	of_node_put(np);
 	return -ENODEV;
 
 create_pdev:
+	of_node_put(soc_np);
 	of_node_put(np);
 	return PTR_ERR_OR_ZERO(platform_device_register_data(NULL, "cpufreq-dt",
 			       -1, data,
#13 lore raw

Re: [PATCH v2 5/5] arm64: dts: qcom: sc7280: Add herobrine-r1

Quoted 40 lines · Stephen Boyd

Quoting Bjorn Andersson (2022-01-25 19:01:31)

Quoted 39 lines · Doug Anderson
Quoted 31 lines

Hi,

Quoted 18 lines · Stephen Boyd

Quoting Douglas Anderson (2022-01-25 14:44:22)

Quoted 16 lines
arch/arm64/boot/dts/qcom/sc7280-herobrine-herobrine-r1.dts new file +10 -0
new file mode 100644
index 000000000000..f95273052da0
@@ -0,0 +1,313 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Google Herobrine board device tree source
+ *
+ * Copyright 2022 Google LLC.
+ */
+
+/dts-v1/;
+
+#include "sc7280-herobrine.dtsi"
Quoted 8 lines

arch/arm64/boot/dts/qcom/sc7280-herobrine-herobrine-r1.dts line 14

Quoted 4 lines
arch/arm64/boot/dts/qcom/sc7280-herobrine-herobrine-r1.dts new file +4 -0
+
+/ {
+       model = "Google Herobrine (rev1+)";
+       compatible = "google,herobrine", "qcom,sc7280";

Can we stop adding "qcom,sc7280" to the board compatible string? It looks out of place. It's the compatible for the SoC and should really be the compatible for the /soc node.

Quoted 3 lines

I don't have any objections, but I feel like this is the type of thing I'd like Bjorn to have the final say on. What say you, Bjorn?

One practical case I can think of right away, where this matters is in cpufreq-dt-plat.c where we blocklist qcom,sc7280.

Quoted 7 lines
Quoted 4 lines

I don't know if we rely on this in any other places, but I'm not keen on seeing a bunch of board-specific compatibles sprinkled throughout the implementation - it's annoying enough having to add each platform to these drivers.

Looking at sc7180, grep only shows cpufreq-dt-plat.c

Good, then we handle all other platform specifics in drivers using platform-specific compatibles.

Quoted 6 lines
 $ git grep qcom,sc7180\" -- drivers
 drivers/cpufreq/cpufreq-dt-platdev.c:   { .compatible = "qcom,sc7180", },

Simplest solution would be to look at / and /soc for a compatible string.

You mean that / would contain the device's compatible and /soc the soc's compatible? I'm afraid I don't see how this would help you - you still need the compatible in the dts, just now in two places.

Either we leave it as is - which follows my interpretation of what the DT spec says - or we (and the DT maitainers) agree that it shouldn't be there (because this dtb won't run on any random qcom,sc7180 anyways) at all.

Regards,
Bjorn

Quoted 46 lines
 $ git grep -W 'soc[^:]*{' -- arch/arm*/boot/dts/ | grep compatible |
grep -v "simple-bus"

doesn't show many hits. The first hit is "ti,omap-infra" which is actually inside an soc node, but even then I don't see anything that matches the cpufreq-dt-plat.c lists.

----8<-----

drivers/cpufreq/cpufreq-dt-platdev.c +7 -3
index ca1d103ec449..32bfe453f8b4 100644
@@ -179,25 +179,29 @@ static bool __init cpu0_node_has_opp_v2_prop(void)
 static int __init cpufreq_dt_platdev_init(void)
 {
 	struct device_node *np = of_find_node_by_path("/");
+	struct device_node *soc_np = of_find_node_by_path("/soc");
 	const struct of_device_id *match;
 	const void *data = NULL;
 
-	if (!np)
+	if (!np && !soc_np)
 		return -ENODEV;
 
 	match = of_match_node(allowlist, np);
-	if (match) {
+	if (match || (match = of_match_node(allowlist, soc_np))) {
 		data = match->data;
 		goto create_pdev;
 	}
 
-	if (cpu0_node_has_opp_v2_prop() && !of_match_node(blocklist, np))
+	if (cpu0_node_has_opp_v2_prop() && !of_match_node(blocklist, np) &&
+	    !of_match_node(blocklist, soc_np))
 		goto create_pdev;
 
+	of_node_put(soc_np);
 	of_node_put(np);
 	return -ENODEV;
 
 create_pdev:
+	of_node_put(soc_np);
 	of_node_put(np);
 	return PTR_ERR_OR_ZERO(platform_device_register_data(NULL, "cpufreq-dt",
 			       -1, data,
#14 lore raw

Re: [PATCH v2 5/5] arm64: dts: qcom: sc7280: Add herobrine-r1

Hi,

Quoted 66 lines · Bjorn Andersson
Quoted 40 lines · Stephen Boyd

Quoting Bjorn Andersson (2022-01-25 19:01:31)

Quoted 39 lines · Doug Anderson
Quoted 31 lines

Hi,

Quoted 18 lines · Stephen Boyd

Quoting Douglas Anderson (2022-01-25 14:44:22)

Quoted 16 lines
arch/arm64/boot/dts/qcom/sc7280-herobrine-herobrine-r1.dts new file +10 -0
new file mode 100644
index 000000000000..f95273052da0
@@ -0,0 +1,313 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Google Herobrine board device tree source
+ *
+ * Copyright 2022 Google LLC.
+ */
+
+/dts-v1/;
+
+#include "sc7280-herobrine.dtsi"
Quoted 8 lines

arch/arm64/boot/dts/qcom/sc7280-herobrine-herobrine-r1.dts line 14

Quoted 4 lines
arch/arm64/boot/dts/qcom/sc7280-herobrine-herobrine-r1.dts new file +4 -0
+
+/ {
+       model = "Google Herobrine (rev1+)";
+       compatible = "google,herobrine", "qcom,sc7280";

Can we stop adding "qcom,sc7280" to the board compatible string? It looks out of place. It's the compatible for the SoC and should really be the compatible for the /soc node.

Quoted 3 lines

I don't have any objections, but I feel like this is the type of thing I'd like Bjorn to have the final say on. What say you, Bjorn?

One practical case I can think of right away, where this matters is in cpufreq-dt-plat.c where we blocklist qcom,sc7280.

Quoted 7 lines
Quoted 4 lines

I don't know if we rely on this in any other places, but I'm not keen on seeing a bunch of board-specific compatibles sprinkled throughout the implementation - it's annoying enough having to add each platform to these drivers.

Looking at sc7180, grep only shows cpufreq-dt-plat.c

Good, then we handle all other platform specifics in drivers using platform-specific compatibles.

Quoted 6 lines
 $ git grep qcom,sc7180\" -- drivers
 drivers/cpufreq/cpufreq-dt-platdev.c:   { .compatible = "qcom,sc7180", },

Simplest solution would be to look at / and /soc for a compatible string.

You mean that / would contain the device's compatible and /soc the soc's compatible? I'm afraid I don't see how this would help you - you still need the compatible in the dts, just now in two places.

Quoted 4 lines

Either we leave it as is - which follows my interpretation of what the DT spec says - or we (and the DT maitainers) agree that it shouldn't be there (because this dtb won't run on any random qcom,sc7180 anyways) at all.

I'm curious what part of the DT spec says that we should have the SoC in there? I know I've always done it, but it's always just been following the examples of what was done before. When talking about the root node, I see this in the devicetree-specification-v0.4-rc1 spec:

---

Specifies a list of platform architectures with which this platform is compatible. This property can be used by operating systems in selecting platform specific code. The recommended form of the property value is: "manufacturer,model"

For example:
compatible = "fsl,mpc8572ds"

---

That doesn't say anything about putting the SoC there.

I would also note that I'd be at least moderately inclined to land things as-is and deal with this in a follow-up patch, though I'm happy to spin if that's what people agree upon too. This is not a new problem and so it doesn't seem like it makes sense to glom dealing with it into this patch series...

-Doug

#15 lore raw

Re: [PATCH v2 5/5] arm64: dts: qcom: sc7280: Add herobrine-r1

Hi,

Quoted 23 lines · Doug Anderson
Quoted 5 lines

Either we leave it as is - which follows my interpretation of what the DT spec says - or we (and the DT maitainers) agree that it shouldn't be there (because this dtb won't run on any random qcom,sc7180 anyways) at all.

I'm curious what part of the DT spec says that we should have the SoC in there? I know I've always done it, but it's always just been following the examples of what was done before. When talking about the root node, I see this in the devicetree-specification-v0.4-rc1 spec:

---

Specifies a list of platform architectures with which this platform is compatible. This property can be used by operating systems in selecting platform specific code. The recommended form of the property value is: "manufacturer,model"

For example:
compatible = "fsl,mpc8572ds"

---

Quoted 8 lines

That doesn't say anything about putting the SoC there.

I would also note that I'd be at least moderately inclined to land things as-is and deal with this in a follow-up patch, though I'm happy to spin if that's what people agree upon too. This is not a new problem and so it doesn't seem like it makes sense to glom dealing with it into this patch series...

I noticed that you applied the first 4 patches in the series (thanks!) but not this one. Are we waiting to get agreement on this before landing? As per above, I think it'd be OK to land as-is and then I'm happy to do a follow-up patch to clean this up since this isn't a new issue. Having this patch outstanding makes it a little confusing with the other cleanup patches that I'm posting... ;-)

Thanks!

-Doug

#16 lore raw

Re: [PATCH v2 5/5] arm64: dts: qcom: sc7280: Add herobrine-r1

Hi,

Quoted 36 lines · Doug Anderson

Hi,

Quoted 23 lines · Doug Anderson
Quoted 5 lines

Either we leave it as is - which follows my interpretation of what the DT spec says - or we (and the DT maitainers) agree that it shouldn't be there (because this dtb won't run on any random qcom,sc7180 anyways) at all.

I'm curious what part of the DT spec says that we should have the SoC in there? I know I've always done it, but it's always just been following the examples of what was done before. When talking about the root node, I see this in the devicetree-specification-v0.4-rc1 spec:

---

Specifies a list of platform architectures with which this platform is compatible. This property can be used by operating systems in selecting platform specific code. The recommended form of the property value is: "manufacturer,model"

For example:
compatible = "fsl,mpc8572ds"

---

Quoted 8 lines

That doesn't say anything about putting the SoC there.

I would also note that I'd be at least moderately inclined to land things as-is and deal with this in a follow-up patch, though I'm happy to spin if that's what people agree upon too. This is not a new problem and so it doesn't seem like it makes sense to glom dealing with it into this patch series...

Quoted 6 lines

I noticed that you applied the first 4 patches in the series (thanks!) but not this one. Are we waiting to get agreement on this before landing? As per above, I think it'd be OK to land as-is and then I'm happy to do a follow-up patch to clean this up since this isn't a new issue. Having this patch outstanding makes it a little confusing with the other cleanup patches that I'm posting... ;-)

I didn't hear anything and I was sending a new version of the cleanup patch series, so I:

* Added this last patch to the end of the cleanup series.

* Addressed the "-regulator" suffix issue that Stephen pointed out.

* Didn't remove the SoC compatible from the top-level node in this patch, but added follow-on patches in the series that do it.

Hopefully that looks good to everyone. I removed both of Stephen's and Matthias's review tags from the v3 version.

https://lore.kernel.org/r/20220202132301.v3.12.I5604b7af908e8bbe709ac037a6a8a6ba8a2bfa94@changeid

-Doug

#17 lore raw

Re: [PATCH v2 5/5] arm64: dts: qcom: sc7280: Add herobrine-r1

In reply to Bjorn Andersson

Quoting Bjorn Andersson (2022-01-31 08:41:47)

Quoted 56 lines · Stephen Boyd
Quoted 41 lines

Quoting Bjorn Andersson (2022-01-25 19:01:31)

Quoted 39 lines · Doug Anderson
Quoted 31 lines

Hi,

Quoted 18 lines · Stephen Boyd

Quoting Douglas Anderson (2022-01-25 14:44:22)

Quoted 16 lines
arch/arm64/boot/dts/qcom/sc7280-herobrine-herobrine-r1.dts new file +10 -0
new file mode 100644
index 000000000000..f95273052da0
@@ -0,0 +1,313 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Google Herobrine board device tree source
+ *
+ * Copyright 2022 Google LLC.
+ */
+
+/dts-v1/;
+
+#include "sc7280-herobrine.dtsi"
Quoted 8 lines

arch/arm64/boot/dts/qcom/sc7280-herobrine-herobrine-r1.dts line 14

Quoted 4 lines
arch/arm64/boot/dts/qcom/sc7280-herobrine-herobrine-r1.dts new file +4 -0
+
+/ {
+       model = "Google Herobrine (rev1+)";
+       compatible = "google,herobrine", "qcom,sc7280";

Can we stop adding "qcom,sc7280" to the board compatible string? It looks out of place. It's the compatible for the SoC and should really be the compatible for the /soc node.

Quoted 3 lines

I don't have any objections, but I feel like this is the type of thing I'd like Bjorn to have the final say on. What say you, Bjorn?

One practical case I can think of right away, where this matters is in cpufreq-dt-plat.c where we blocklist qcom,sc7280.

Quoted 7 lines
Quoted 4 lines

I don't know if we rely on this in any other places, but I'm not keen on seeing a bunch of board-specific compatibles sprinkled throughout the implementation - it's annoying enough having to add each platform to these drivers.

Looking at sc7180, grep only shows cpufreq-dt-plat.c

Good, then we handle all other platform specifics in drivers using platform-specific compatibles.

Quoted 3 lines
 $ git grep qcom,sc7180\" -- drivers
 drivers/cpufreq/cpufreq-dt-platdev.c:   { .compatible = "qcom,sc7180", },
Quoted 7 lines
Quoted 3 lines

Simplest solution would be to look at / and /soc for a compatible string.

You mean that / would contain the device's compatible and /soc the soc's compatible? I'm afraid I don't see how this would help you - you still need the compatible in the dts, just now in two places.

I'd like / to contain the board compatible string and /soc to contain the SoC's compatible string. The two strings are different. In this case the board compatible at the root would be "google,trogdor-lazor" and the soc node compatible would be "qcom,sc7180".

Quoted 6 lines

Either we leave it as is - which follows my interpretation of what the DT spec says - or we (and the DT maitainers) agree that it shouldn't be there (because this dtb won't run on any random qcom,sc7180 anyways) at all.

Sure. Hopefully DT maintainers can chime in here.

As you say, this dtb won't run on any random board that has a qcom,sc7180 SoC placed on the PCB so having it in the root node compatible is redundant at the least.

#18 lore raw

Re: [PATCH v2 5/5] arm64: dts: qcom: sc7280: Add herobrine-r1

In reply to Stephen Boyd

Hi,

drivers/cpufreq/cpufreq-dt-platdev.c static bool __init cpu0_node_has_opp_v2_prop(void) · line 182

Quoted 12 lines · Stephen Boyd

----8<-----

drivers/cpufreq/cpufreq-dt-platdev.c +1 -0
index ca1d103ec449..32bfe453f8b4 100644
@@ -179,25 +179,29 @@ static bool __init cpu0_node_has_opp_v2_prop(void)
 static int __init cpufreq_dt_platdev_init(void)
 {
        struct device_node *np = of_find_node_by_path("/");
+       struct device_node *soc_np = of_find_node_by_path("/soc");

Seems that some device trees have "/soc" and others "/soc@0". For at least a little context, see commit a1875bf98290 ("arm64: dts: qcom:
sdm845: Add unit name to soc node"). Since (presumably) this would only be for newer SoCs then I guess you should search for "/soc@0"? ...and then if we ever have a SoC that's not @0 then we would have to iterate through all SoCs

-Doug

#19 lore raw

Re: [PATCH v2 5/5] arm64: dts: qcom: sc7280: Add herobrine-r1

Quoting Doug Anderson (2022-01-31 08:44:35)

Quoted 14 lines

Hi,

Quoted 11 lines · Stephen Boyd

----8<-----

drivers/cpufreq/cpufreq-dt-platdev.c +0 -0
index ca1d103ec449..32bfe453f8b4 100644
@@ -179,25 +179,29 @@ static bool __init cpu0_node_has_opp_v2_prop(void)
 static int __init cpufreq_dt_platdev_init(void)
 {
        struct device_node *np = of_find_node_by_path("/");
Quoted 9 lines

drivers/cpufreq/cpufreq-dt-platdev.c static bool __init cpu0_node_has_opp_v2_prop(void) · line 182

Quoted 1 line
drivers/cpufreq/cpufreq-dt-platdev.c +1 -0
+       struct device_node *soc_np = of_find_node_by_path("/soc");

Seems that some device trees have "/soc" and others "/soc@0". For at least a little context, see commit a1875bf98290 ("arm64: dts: qcom:
sdm845: Add unit name to soc node"). Since (presumably) this would only be for newer SoCs then I guess you should search for "/soc@0"? ...and then if we ever have a SoC that's not @0 then we would have to iterate through all SoCs

Yes. We can probably just use of_find_node_by_name(NULL, "soc") instead though and then if there are multiple soc nodes in the future we can iterate over all the soc nodes with for_each_of_allnodes_from() and make this logic more complicated. I'd rather not implement any of that complicated logic until we need to though.

#20 lore raw

Re: (subset) [PATCH v2 0/5] arm64: dts: qcom: sc7280: Introduce herobrine-rev1

In reply to Douglas Anderson
Quoted 5 lines · Douglas Anderson

This series adds support for herobrine-rev1. Note that it's likely that with the introduction of -rev1 we can drop -rev0 support, but we'll keep it for now (though we won't try to "fit it in" and share code with it).

Quoted 7 lines

This series is confirmed to boot herobrine-rev1 atop mainline, commit 0280e3c58f92 ("Merge tag 'nfs-for-5.17-1' of
git://git.linux-nfs.org/projects/anna/linux-nfs"), though it requires a hack to work around a misconfigured DMA for i2c14
(https://crrev.com/c/3378660)

[...]

Applied, thanks!

[1/5] arm64: dts: qcom: sc7280: Fix gmu unit address

      commit: 142a4d995c6adb6bf5b22166f51b525e83c96661
[2/5] arm64: dts: qcom: sc7280: Move herobrine-r0 to its own dts
      commit: 61a6262f95e0c400baee59ced0721f49ffca604c
[3/5] arm64: dts: qcom: sc7280: Factor out Chrome common fragment
      commit: 56eead37681511d3bd5c5869cf2878865942ba75
[4/5] arm64: dts: qcom: sc7280: Factor gpio.h include to sc7280.dtsi
      commit: 40ab97eb383dfd9de37d049883a8707397a478b1

Best regards,

Signature · 1 line
Bjorn Andersson <[email protected]>