Add sata nodes to rk356x

From: Frank Wunderlich <[email protected]>

This Series converts the binding for ahci-platform to yaml and adds sata nodes to rockchip rk356x device trees.

---

v6:
- add fix for spear1340
- fix indentation of examples
- add compatible marvell,berlin2-ahci
- change maximum of ports-implemented
- add select to exclude qcom compatibles
- drop marvell,armada-380-ahci
it is not handled in the ahci-platform.c but ahci_mvebu.c and incompatible due to missing phys/target-supply

v5:
DTS:
- drop broadcom-patch as it is already applied
- add fix for marvell
YAML:
- change subject
- drop brcm,iproc-ahci from standalone enum
- fix reg address in example 2
- move clocknames next to clocks, regnames to reg
- drop interrupts description
- drop newline from dma-coherent
- drop max-items from ports-implemented
- min2max in child phys
- fix identation for compatible and sata-common
- add additionalProperties=false for subnodes
- pipe for paragraphs and newline after title
- add maximum for ports-implemented (found only 0x1 as its value)
- add phy-names to sata-ports
v4:
YAML binding:
- fix min vs. max
- fix indention of examples
- move up sata-common.yaml
- reorder compatible
- add descriptions/maxitems
- fix compatible-structure
- fix typo in example achi vs. ahci
- add clock-names and reg-names
DTS-Patches:
- drop newline in dts
- re-add clock-names
- add soc specific compatible
- fix sata nodename in arch/arm64/boot/dts/broadcom/northstar2/ns2.dtsi
v3:
- add conversion to sata-series
- fix some errors in dt_binding_check and dtbs_check
- move to unevaluated properties = false
- add power-domain to yaml
- move sata0 to rk3568.dtsi
- drop clock-names and interrupt-names

Frank Wunderlich (6):
dt-bindings: ata: ahci-platform: Convert DT bindings to yaml
arm64: dts: marvell: Fix anyOf conditional failed
ARM: dts: spear13xx: Fix sata node name
dt-bindings: ata: ahci-platform: Add power-domains property
dt-bindings: ata: ahci-platform: Add rk3568-dwc-ahci compatible
arm64: dts: rockchip: Add sata nodes to rk356x

 .../devicetree/bindings/ata/ahci-platform.txt |  79 --------
 .../bindings/ata/ahci-platform.yaml           | 189 ++++++++++++++++++
 arch/arm/boot/dts/spear1310.dtsi              |   6 +-
 arch/arm/boot/dts/spear1340-evb.dts           |   2 +-
 arch/arm/boot/dts/spear1340.dtsi              |   2 +-
 .../arm64/boot/dts/marvell/armada-7040-db.dts |   1 +
 .../boot/dts/marvell/armada-7040-mochabin.dts |   2 +
 .../marvell/armada-8040-clearfog-gt-8k.dts    |   1 +
 .../arm64/boot/dts/marvell/armada-8040-db.dts |   2 +
 .../boot/dts/marvell/armada-8040-mcbin.dtsi   |   1 +
 .../dts/marvell/armada-8040-puzzle-m801.dts   |   2 +
 arch/arm64/boot/dts/marvell/armada-cp11x.dtsi |   2 +
 arch/arm64/boot/dts/marvell/cn9130-crb-B.dts  |   1 +
 arch/arm64/boot/dts/marvell/cn9131-db.dtsi    |   1 +
 arch/arm64/boot/dts/marvell/cn9132-db.dtsi    |   1 +
 arch/arm64/boot/dts/rockchip/rk3568.dtsi      |  14 ++
 arch/arm64/boot/dts/rockchip/rk356x.dtsi      |  28 +++
 17 files changed, 250 insertions(+), 84 deletions(-)
 delete mode 100644 Documentation/devicetree/bindings/ata/ahci-platform.txt
 create mode 100644 Documentation/devicetree/bindings/ata/ahci-platform.yaml

2.25.1

From: Frank Wunderlich <[email protected]>

Create a yaml file for dtbs_check from the old txt binding.

---

v6:
- fix indentation of examples
- add compatible marvell,berlin2-ahci
- change maximum of ports-implemented
- add select to exclude qcom compatibles
- drop marvell,armada-380-ahci
it is not handled in the ahci-platform.c but ahci_mvebu.c and incompatible due to missing phys/target-supply

v5:
- change subject
- drop brcm,iproc-ahci from standalone enum
- fix reg address in example 2
- move clocknames next to clocks, regnames to reg
- drop interrupts description
- drop newline from dma-coherent
- drop max-items from ports-implemented
- min2max in child phys
- fix identation for compatible and sata-common
- add additionalProperties=false for subnodes
- pipe for paragraphs and newline after title
- add maximum for ports-implemented (found only 0x1 as its value)
- add phy-names to sata-ports

v4:
- fix min vs. max
- fix indention of examples
- move up sata-common.yaml
- reorder compatible
- add descriptions/maxitems
- fix compatible-structure
- fix typo in example achi vs. ahci
- add clock-names and reg-names
- fix ns2 errors in separate patch
v3:
- add conversion to sata-series
- fix some errors in dt_binding_check and dtbs_check
- move to unevaluated properties = false

arch/arm/boot/dts/qcom-apq8064.dtsi had caused errors for clock-count
---

have not added reviewed-by from v5 because i have changed patch too much

---
 .../devicetree/bindings/ata/ahci-platform.txt |  79 --------
 .../bindings/ata/ahci-platform.yaml           | 182 ++++++++++++++++++
 2 files changed, 182 insertions(+), 79 deletions(-)
 delete mode 100644 Documentation/devicetree/bindings/ata/ahci-platform.txt
 create mode 100644 Documentation/devicetree/bindings/ata/ahci-platform.yaml

deleted file mode 100644
index 77091a277642..000000000000
@@ -1,79 +0,0 @@
-* AHCI SATA Controller
-
-SATA nodes are defined to describe on-chip Serial ATA controllers.
-Each SATA controller should have its own node.
-
-It is possible, but not required, to represent each port as a sub-node.
-It allows to enable each port independently when dealing with multiple
-PHYs.
-
-Required properties:
-- compatible        : compatible string, one of:
-  - "brcm,iproc-ahci"
-  - "hisilicon,hisi-ahci"
-  - "cavium,octeon-7130-ahci"
-  - "ibm,476gtr-ahci"
-  - "marvell,armada-380-ahci"
-  - "marvell,armada-3700-ahci"
-  - "snps,dwc-ahci"
-  - "snps,spear-ahci"
-  - "generic-ahci"
-- interrupts        : <interrupt mapping for SATA IRQ>
-- reg               : <registers mapping>
-
-Please note that when using "generic-ahci" you must also specify a SoC specific
-compatible:
-	compatible = "manufacturer,soc-model-ahci", "generic-ahci";
-
-Optional properties:
-- dma-coherent      : Present if dma operations are coherent
-- clocks            : a list of phandle + clock specifier pairs
-- resets            : a list of phandle + reset specifier pairs
-- target-supply     : regulator for SATA target power
-- phy-supply        : regulator for PHY power
-- phys              : reference to the SATA PHY node
-- phy-names         : must be "sata-phy"
-- ahci-supply       : regulator for AHCI controller
-- ports-implemented : Mask that indicates which ports that the HBA supports
-		      are available for software to use. Useful if PORTS_IMPL
-		      is not programmed by the BIOS, which is true with
-		      some embedded SOC's.
-
-Required properties when using sub-nodes:
-- #address-cells    : number of cells to encode an address
-- #size-cells       : number of cells representing the size of an address
-
-Sub-nodes required properties:
-- reg		    : the port number
-And at least one of the following properties:
-- phys		    : reference to the SATA PHY node
-- target-supply     : regulator for SATA target power
-
-Examples:
-        sata@ffe08000 {
-		compatible = "snps,spear-ahci";
-		reg = <0xffe08000 0x1000>;
-		interrupts = <115>;
-        };
-
-With sub-nodes:
-	sata@f7e90000 {
-		compatible = "marvell,berlin2q-achi", "generic-ahci";
-		reg = <0xe90000 0x1000>;
-		interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
-		clocks = <&chip CLKID_SATA>;
-		#address-cells = <1>;
-		#size-cells = <0>;
-
-		sata0: sata-port@0 {
-			reg = <0>;
-			phys = <&sata_phy 0>;
-			target-supply = <&reg_sata0>;
-		};
-
-		sata1: sata-port@1 {
-			reg = <1>;
-			phys = <&sata_phy 1>;
-			target-supply = <&reg_sata1>;;
-		};
-	};

2.25.1

Applied, thanks!

From: Frank Wunderlich <[email protected]>

after converting the ahci-platform binding to yaml the following files reporting "'anyOf' conditional failed" on

sata@540000: sata-port@0

armada-7040-db.dts
armada-8040-clearfog-gt-8k.dts
armada-8040-mcbin.dts
armada-8040-mcbin-singleshot.dts
cn9130-db.dts
cn9130-db-B.dts
cn9131-db.dts
cn9131-db-B.dts
cn9132-db.dts
cn9132-db-B.dts

the following files reporting 'anyOf' conditional failed on

sata@540000: sata-port@1

cn9132-db.dts
cn9132-db-B.dts
cn9130-crb-B.dts

'phys' is a required property
'target-supply' is a required property
From schema: Documentation/devicetree/bindings/ata/ahci-platform.yaml

This is caused by defining sata-ports incomplete in armada-cp11x.dtsi and overriding only a subset of ports with the needed phys/target-supply property.

Fix this by disabling the node-templates and enabling the needed nodes.

---
v5: add fixes-tag

the dtsi uses a macro for the node-label defined in armada-common.dtsi

CP11X_LABEL(sata0): sata@540000 {

so i hope i catched all right nodes to be enabled... have enabled all cpX_sata0 sata-portY childs

---
 arch/arm64/boot/dts/marvell/armada-7040-db.dts             | 1 +
 arch/arm64/boot/dts/marvell/armada-7040-mochabin.dts       | 2 ++
 arch/arm64/boot/dts/marvell/armada-8040-clearfog-gt-8k.dts | 1 +
 arch/arm64/boot/dts/marvell/armada-8040-db.dts             | 2 ++
 arch/arm64/boot/dts/marvell/armada-8040-mcbin.dtsi         | 1 +
 arch/arm64/boot/dts/marvell/armada-8040-puzzle-m801.dts    | 2 ++
 arch/arm64/boot/dts/marvell/armada-cp11x.dtsi              | 2 ++
 arch/arm64/boot/dts/marvell/cn9130-crb-B.dts               | 1 +
 arch/arm64/boot/dts/marvell/cn9131-db.dtsi                 | 1 +
 arch/arm64/boot/dts/marvell/cn9132-db.dtsi                 | 1 +
 10 files changed, 14 insertions(+)

index cd326fe224ce..f8b1b46a03b3 100644
@@ -215,6 +215,7 @@ &cp0_sata0 {
 	sata-port@1 {
 		phys = <&cp0_comphy3 1>;
 		phy-names = "cp0-sata0-1-phy";
+		status = "okay";
 	};
 };
 

index f3b0d57a24a3..7529018f9b72 100644
@@ -436,12 +436,14 @@ &cp0_sata0 {
 	sata-port@0 {
 		phys = <&cp0_comphy2 0>;
 		phy-names = "cp0-sata0-0-phy";
+		status = "okay";
 	};
 
 	/* M.2-2250 B-key (J39) */
 	sata-port@1 {
 		phys = <&cp0_comphy3 1>;
 		phy-names = "cp0-sata0-1-phy";
+		status = "okay";
 	};
 };
 

index 8729c6467303..5bb429abb1de 100644
@@ -476,6 +476,7 @@ &cp1_sata0 {
 	sata-port@1 {
 		phys = <&cp1_comphy0 1>;
 		phy-names = "cp1-sata0-1-phy";
+		status = "okay";
 	};
 };
 

index f2e8e0df8865..b33d64babcd9 100644
@@ -146,10 +146,12 @@ &cp0_sata0 {
 	sata-port@0 {
 		phys = <&cp0_comphy1 0>;
 		phy-names = "cp0-sata0-0-phy";
+		status = "okay";
 	};
 	sata-port@1 {
 		phys = <&cp0_comphy3 1>;
 		phy-names = "cp0-sata0-1-phy";
+		status = "okay";
 	};
 };
 

index adbfecc678b5..2be4d67cbf16 100644
@@ -246,6 +246,7 @@ &cp0_sata0 {
 	sata-port@1 {
 		phys = <&cp0_comphy5 1>;
 		phy-names = "cp0-sata0-1-phy";
+		status = "okay";
 	};
 };
 

index dac85fa748de..03f9cc3a895f 100644
@@ -409,11 +409,13 @@ &cp0_sata0 {
 	sata-port@0 {
 		phys = <&cp0_comphy2 0>;
 		phy-names = "cp0-sata0-0-phy";
+		status = "okay";
 	};
 
 	sata-port@1 {
 		phys = <&cp0_comphy5 1>;
 		phy-names = "cp0-sata0-1-phy";
+		status = "okay";
 	};
 };
 

index 3bd2182817fb..a2cc85d2adce 100644
@@ -342,10 +342,12 @@ CP11X_LABEL(sata0): sata@540000 {
 
 			sata-port@0 {
 				reg = <0>;
+				status = "disabled";
 			};
 
 			sata-port@1 {
 				reg = <1>;
+				status = "disabled";
 			};
 		};
 

index 0904cb0309ae..34194745f79e 100644
@@ -28,6 +28,7 @@ sata-port@0 {
 		status = "okay";
 		/* Generic PHY, providing serdes lanes */
 		phys = <&cp0_comphy2 0>;
+		status = "okay";
 	};
 };
 

index f995b1bcda01..e6566dac885e 100644
@@ -127,6 +127,7 @@ &cp1_sata0 {
 	sata-port@1 {
 		/* Generic PHY, providing serdes lanes */
 		phys = <&cp1_comphy5 1>;
+		status = "okay";
 	};
 };
 

index 3f1795fb4fe7..5f9614bf2a0f 100644
@@ -175,6 +175,7 @@ &cp2_sata0 {
 	sata-port@0 {
 		/* Generic PHY, providing serdes lanes */
 		phys = <&cp2_comphy2 0>;
+		status = "okay";
 	};
 };
 

2.25.1

From: Frank Wunderlich <[email protected]>

After converting the binding to yaml the node name does not match the standard pattern, change it.

arch/arm/boot/dts/spear1340-evb.dt.yaml: ahci@b1000000:
$nodename:0: 'ahci@b1000000' does not match '^sata(@.*)?$'
From schema: Documentation/devicetree/bindings/ata/ahci-platform.yaml

---
 arch/arm/boot/dts/spear1310.dtsi    | 6 +++---
 arch/arm/boot/dts/spear1340-evb.dts | 2 +-
 arch/arm/boot/dts/spear1340.dtsi    | 2 +-
 3 files changed, 5 insertions(+), 5 deletions(-)

index 2f746a9428a7..8702c290ed8a 100644
@@ -50,7 +50,7 @@ miphy2: miphy@eb808000 {
 			status = "disabled";
 		};
 
-		ahci0: ahci@b1000000 {
+		ahci0: sata@b1000000 {
 			compatible = "snps,spear-ahci";
 			reg = <0xb1000000 0x10000>;
 			interrupts = <0 68 0x4>;

@@ -59,7 +59,7 @@ ahci0: ahci@b1000000 {
 			status = "disabled";
 		};
 
-		ahci1: ahci@b1800000 {
+		ahci1: sata@b1800000 {
 			compatible = "snps,spear-ahci";
 			reg = <0xb1800000 0x10000>;
 			interrupts = <0 69 0x4>;

@@ -68,7 +68,7 @@ ahci1: ahci@b1800000 {
 			status = "disabled";
 		};
 
-		ahci2: ahci@b4000000 {
+		ahci2: sata@b4000000 {
 			compatible = "snps,spear-ahci";
 			reg = <0xb4000000 0x10000>;
 			interrupts = <0 70 0x4>;

index fd194ebeedc9..65c757cd3718 100644
@@ -112,7 +112,7 @@ pcie {
 			};
 		};
 
-		ahci@b1000000 {
+		sata@b1000000 {
 			status = "okay";
 		};
 

index 827e887afbda..f45f3046f1c8 100644
@@ -33,7 +33,7 @@ miphy0: miphy@eb800000 {
 			status = "disabled";
 		};
 
-		ahci0: ahci@b1000000 {
+		ahci0: sata@b1000000 {
 			compatible = "snps,spear-ahci";
 			reg = <0xb1000000 0x10000>;
 			interrupts = <0 72 0x4>;

2.25.1

I don't think this is correct. The above patch is correct. The first patch in this series changes the names and that's where things break.

I think you could have added these patches before changing to yaml and then nothing would ever have broken.

Since this isn't a big deal anyway, I think you can just drop the Fixes tag here, and other dts patches you have.

viresh

Hi,

thanks for for checking the spear-patch.

it's right that my binding will break it, but the nodes are not named the right way. And i used the commit that introduces the wrong node-names.
Maybe fixes-tag is wrong in this case.

regards Frank

I'm pretty sure Viresh just meant the Fixes tag is not right.

Rob

The problem is that people will try and backport this patch of yours to earlier stable kernels, because it has a Fixes tag, while the kernel isn't really broken then and there is no need to backport anything. This patch (and others in series) are just fine, just drop the Fixes tag.

Right.

viresh

From: Frank Wunderlich <[email protected]>

Some SoC using power-domains property so add it here

---
changes in v5: added reviewed by
changes in v4: none
changes in v3:
- new patch

---
 Documentation/devicetree/bindings/ata/ahci-platform.yaml | 3 +++
 1 file changed, 3 insertions(+)

index e71bfb04d7f1..a02f6d12773e 100644
@@ -108,6 +108,9 @@ properties:
       some embedded SoCs.
     maximum: 0x1f
 
+  power-domains:
+    maxItems: 1
+
   resets:
     maxItems: 1
 

2.25.1

Applied, thanks!

From: Frank Wunderlich <[email protected]>

Add SoC specific compatible for rk3568 ahci controller

---
v6:
change subject to dwc instead of dwc3

---
 Documentation/devicetree/bindings/ata/ahci-platform.yaml | 4 ++++
 1 file changed, 4 insertions(+)

index a02f6d12773e..c146ab8e14e5 100644
@@ -49,6 +49,10 @@ properties:
               - marvell,berlin2-ahci
               - marvell,berlin2q-ahci
           - const: generic-ahci
+      - items:
+          - enum:
+              - rockchip,rk3568-dwc-ahci
+          - const: snps,dwc-ahci
       - enum:
           - cavium,octeon-7130-ahci
           - hisilicon,hisi-ahci

2.25.1

Applied, thanks!

From: Frank Wunderlich <[email protected]>

RK356x supports up to 3 sata controllers which were compatible with the existing snps,dwc-ahci binding.

---
changes in v4:
- drop newline in dts
- re-add clock-names
- add soc specific compatible
changes in v3:
- fix combphy error by moving sata0 to rk3568.dtsi
- remove clock-names and interrupt-names
changes in v2:
- added sata0 + 1, but have only tested sata2

---
 arch/arm64/boot/dts/rockchip/rk3568.dtsi | 14 ++++++++++++
 arch/arm64/boot/dts/rockchip/rk356x.dtsi | 28 ++++++++++++++++++++++++
 2 files changed, 42 insertions(+)

index 5b0f528d6818..3e07d9f6a2d1 100644
@@ -8,6 +8,20 @@
 / {
 	compatible = "rockchip,rk3568";
 
+	sata0: sata@fc000000 {
+		compatible = "rockchip,rk3568-dwc-ahci", "snps,dwc-ahci";
+		reg = <0 0xfc000000 0 0x1000>;
+		clocks = <&cru ACLK_SATA0>, <&cru CLK_SATA0_PMALIVE>,
+			 <&cru CLK_SATA0_RXOOB>;
+		clock-names = "sata", "pmalive", "rxoob";
+		interrupts = <GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH>;
+		phys = <&combphy0 PHY_TYPE_SATA>;
+		phy-names = "sata-phy";
+		ports-implemented = <0x1>;
+		power-domains = <&power RK3568_PD_PIPE>;
+		status = "disabled";
+	};
+
 	pipe_phy_grf0: syscon@fdc70000 {
 		compatible = "rockchip,rk3568-pipe-phy-grf", "syscon";
 		reg = <0x0 0xfdc70000 0x0 0x1000>;

index 7cdef800cb3c..264dd030e703 100644
@@ -230,6 +230,34 @@ scmi_shmem: sram@0 {
 		};
 	};
 
+	sata1: sata@fc400000 {
+		compatible = "rockchip,rk3568-dwc-ahci", "snps,dwc-ahci";
+		reg = <0 0xfc400000 0 0x1000>;
+		clocks = <&cru ACLK_SATA1>, <&cru CLK_SATA1_PMALIVE>,
+			 <&cru CLK_SATA1_RXOOB>;
+		clock-names = "sata", "pmalive", "rxoob";
+		interrupts = <GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH>;
+		phys = <&combphy1 PHY_TYPE_SATA>;
+		phy-names = "sata-phy";
+		ports-implemented = <0x1>;
+		power-domains = <&power RK3568_PD_PIPE>;
+		status = "disabled";
+	};
+
+	sata2: sata@fc800000 {
+		compatible = "rockchip,rk3568-dwc-ahci", "snps,dwc-ahci";
+		reg = <0 0xfc800000 0 0x1000>;
+		clocks = <&cru ACLK_SATA2>, <&cru CLK_SATA2_PMALIVE>,
+			 <&cru CLK_SATA2_RXOOB>;
+		clock-names = "sata", "pmalive", "rxoob";
+		interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>;
+		phys = <&combphy2 PHY_TYPE_SATA>;
+		phy-names = "sata-phy";
+		ports-implemented = <0x1>;
+		power-domains = <&power RK3568_PD_PIPE>;
+		status = "disabled";
+	};
+
 	gic: interrupt-controller@fd400000 {
 		compatible = "arm,gic-v3";
 		reg = <0x0 0xfd400000 0 0x10000>, /* GICD */

2.25.1

Rob,

I saw you took patches 1, 4 and 5. What about the others ? Are you taking them or should I take them through the ATA tree ?

Damien Le Moal
Western Digital Research

Hi Damien,

Am 12. März 2022 09:00:53 MEZ schrieb Damien Le Moal <[email protected]>:

Imho the dts "fixes" should be tested by someone having such board or at least be reviewed.

I only fixed the binding warnings,but i'm not sure it breaks hardware as i cannot test function.

Afaik last part should go through Heikos tree.

regards Frank

It's all dts changes, so they should go via the sub-arch trees.

Rob

Applied, thanks!

[6/6] arm64: dts: rockchip: Add sata nodes to rk356x

      commit: b2e5612f6ea23c87397e50f8d976cd8c95e3ed17

Best regards,

Heiko Stuebner <[email protected]>