add support for VSC7512 control over SPI

The patch set in general is to add support for the VSC7512, and eventually the VSC7511, VSC7513 and VSC7514 devices controlled over SPI. Specifically this patch set enables pinctrl, serial gpio expander access, and control of an internal and an external MDIO bus.

I have mentioned previously:
The hardware setup I'm using for development is a beaglebone black, with jumpers from SPI0 to the microchip VSC7512 dev board. The microchip dev board has been modified to not boot from flash, but wait for SPI. An ethernet cable is connected from the beaglebone ethernet to port 0 of the dev board. Network functionality will be included in a future patch set.

The device tree I'm using is included in the documentation, so I'll not include that in this cover letter. I have exported the serial GPIOs to the LEDs, and verified functionality via
"echo heartbeat > sys/class/leds/port0led/trigger"

/ {
	vscleds {
		compatible = "gpio-leds";
		vscled@0 {
			label = "port0led";
			gpios = <&sgpio_out1 0 0 GPIO_ACTIVE_LOW>;
			default-state = "off";
		};
		vscled@1 {
			label = "port0led1";
			gpios = <&sgpio_out1 0 1 GPIO_ACTIVE_LOW>;
			default-state = "off";
		};
[ ... ]
	};
};

I verified module functionality with modprobe ocelot-soc; modprobe pinctrl-ocelot;
modprobe pinctrl-microchip-sgpio;

I only have hardware to test the last patch, so any testers are welcome. I've been extra cautious about the ocelot_regmap_from_resource helper function, both before and after the last patch. I accidentally broke it in the past and would like to avoid doing so again.

RFC history:
v16
* Add reviewed-by tags (patches 1-6)
* Utilize resource_size() (patch 8/8)
* One more round of missed includes (patch 8/8)
* Remove pinctrl-ocelot module patch, which was applied in v6.0-rc1

v15
* Add missed includes
* Fix punctuation and function convention inside comments
* Utilize spi_message_init_with_transfers() instead of spi_message_add_tail()
* Remove unnecessary "< 0" comparisons
* Utilize HZ_PER_MHZ instead of magic numbers

v14
* Add header guards to include/linux/mfd/ocelot.h and drivers/mfd/ocelot.h
* Lines extended to 100 chars (patch 9/9)
* Remove unnecessary "dev" and "spi" elements from ocelot_ddata structure
* Add doc comments for ocelot_ddata
* Add Reviewed and Acked tags
* Submit to MFD instead of net-next

v13
* Suggestions from Andy for code cleanup, missed includes, forward declarations, module names.
* Fix x86 allmodconfig build
* MFD module name is now ocelot-soc
* Add module names to Kconfig for pinctrl changes

v12
* Suggestions from Vladimir, Andy, Randy, and Rob. Thanks as always!
* Utilize dev_get_regmap to clean up interfaces
* MFD_OCELOT can be a module

v11
* Suggestions from Rob and Andy. Thanks!
* Add pinctrl module functionality back and fixing those features
* Fix aarch64 compiler error

v10
* Fix warning by removing unused function

v9
* Submitting as a PATCH instead of an RFC
* Remove switch functionality - will be a separate patch set
* Remove Kconfig tristate module options
* Another round of suggestions from Lee, Vladimir, and Andy. Many thanks!
* Add documentation
* Update maintainers

v8
* Applied another round of suggestions from Lee and Vladimir
* Utilize regmap bus reads, which speeds bulk transfers up by an order of magnitude
* Add two additional patches to utilize phylink_generic_validate
* Changed GPL V2 to GPL in licenses where applicable (checkpatch)
* Remove initial hsio/serdes changes from the RFC

v7
* Applied as much as I could from Lee and Vladimir's suggestions. As always, the feedback is greatly appreciated!
* Remove "ocelot_spi" container complication
* Move internal MDIO bus from ocelot_ext to MFD, with a devicetree change to match
* Add initial HSIO support
* Switch to IORESOURCE_REG for resource definitions

v6
* Applied several suggestions from the last RFC from Lee Jones. I hope I didn't miss anything.
* Clean up MFD core - SPI interaction. They no longer use callbacks.
* regmaps get registered to the child device, and don't attempt to get shared. It seems if a regmap is to be shared, that should be solved with syscon, not dev or mfd.

v5
* Restructured to MFD
* Several commits were split out, submitted, and accepted
* pinctrl-ocelot believed to be fully functional (requires commits from the linux-pinctrl tree)
* External MDIO bus believed to be fully functional

v4
* Functional
* Device tree fixes
* Add hooks for pinctrl-ocelot - some functionality by way of sysfs
* Add hooks for pinctrl-microsemi-sgpio - not yet fully functional
* Remove lynx_pcs interface for a generic phylink_pcs. The goal here is to have an ocelot_pcs that will work for each configuration of every port.

v3
* Functional
* Shared MDIO transactions routed through mdio-mscc-miim
* CPU / NPI port enabled by way of vsc7512_enable_npi_port / felix->info->enable_npi_port
* NPI port tagging functional - Requires a CPU port driver that supports frames of 1520 bytes. Verified with a patch to the cpsw driver

v2
* Near functional. No CPU port communication, but control over all external ports
* Cleaned up regmap implementation from v1

v1 (accidentally named vN)
* Initial architecture. Not functional
* General concepts laid out

Colin Foster (8):
mfd: ocelot: add helper to get regmap from a resource
net: mdio: mscc-miim: add ability to be used in a non-mmio
configuration
pinctrl: ocelot: add ability to be used in a non-mmio configuration
pinctrl: microchip-sgpio: allow sgpio driver to be used as a module
pinctrl: microchip-sgpio: add ability to be used in a non-mmio
configuration
resource: add define macro for register address resources
dt-bindings: mfd: ocelot: add bindings for VSC7512
mfd: ocelot: add support for the vsc7512 chip via spi

 .../devicetree/bindings/mfd/mscc,ocelot.yaml  | 160 ++++++++++
 MAINTAINERS                                   |   7 +
 drivers/mfd/Kconfig                           |  21 ++
 drivers/mfd/Makefile                          |   3 +
 drivers/mfd/ocelot-core.c                     | 161 ++++++++++
 drivers/mfd/ocelot-spi.c                      | 299 ++++++++++++++++++
 drivers/mfd/ocelot.h                          |  49 +++
 drivers/net/mdio/mdio-mscc-miim.c             |  42 +--
 drivers/pinctrl/Kconfig                       |   5 +-
 drivers/pinctrl/pinctrl-microchip-sgpio.c     |  14 +-
 drivers/pinctrl/pinctrl-ocelot.c              |  16 +-
 include/linux/ioport.h                        |   5 +
 include/linux/mfd/ocelot.h                    |  62 ++++
 13 files changed, 795 insertions(+), 49 deletions(-)
 create mode 100644 Documentation/devicetree/bindings/mfd/mscc,ocelot.yaml
 create mode 100644 drivers/mfd/ocelot-core.c
 create mode 100644 drivers/mfd/ocelot-spi.c
 create mode 100644 drivers/mfd/ocelot.h
 create mode 100644 include/linux/mfd/ocelot.h

2.25.1

Several ocelot-related modules are designed for MMIO / regmaps. As such, they often use a combination of devm_platform_get_and_ioremap_resource() and devm_regmap_init_mmio().

Operating in an MFD might be different, in that it could be memory mapped, or it could be SPI, I2C... In these cases a fallback to use IORESOURCE_REG instead of IORESOURCE_MEM becomes necessary.

When this happens, there's redundant logic that needs to be implemented in every driver. In order to avoid this redundancy, utilize a single function that, if the MFD scenario is enabled, will perform this fallback logic.

---
v16
* Add Andy Reviewed-by tag

v15
* Add missed errno.h and ioport.h includes
* Add () to function references in both the commit log and comments

v14
* Add header guard
* Change regs type from u32* to void*
* Add Reviewed-by tag

---
 MAINTAINERS                |  5 +++
 include/linux/mfd/ocelot.h | 62 ++++++++++++++++++++++++++++++++++++++
 2 files changed, 67 insertions(+)
 create mode 100644 include/linux/mfd/ocelot.h

index 8a5012ba6ff9..e0732e9f9090 100644
@@ -14741,6 +14741,11 @@ F:	net/dsa/tag_ocelot.c
 F:	net/dsa/tag_ocelot_8021q.c
 F:	tools/testing/selftests/drivers/net/ocelot/*
 
+OCELOT EXTERNAL SWITCH CONTROL
+M:	Colin Foster <[email protected]>
+S:	Supported
+F:	include/linux/mfd/ocelot.h
+
 OCXL (Open Coherent Accelerator Processor Interface OpenCAPI) DRIVER
 M:	Frederic Barrat <[email protected]>
 M:	Andrew Donnellan <[email protected]>

2.25.1

Applied, thanks.

Lee Jones [李琼斯]

Hurray!

Colin, what plans do you have for the rest of VSC7512 upstreaming? Do you need Lee to provide a stable branch for networking to pull, so you can continue development in this kernel release cycle, or do you expect that there won't be dependencies and you can therefore just test on linux-next?

Yay!

My plan was to start sending RFCs on the internal copper phys and get some feedback there. I assume there'll be a couple rounds and I don't expect to hit this next release (if I'm being honest).

So I'll turn this question around to the net people: would a round or two of RFCs that don't cleanly apply to net-next be acceptable? Then I could submit a patch right after the next merge window? I've been dragging these patches around for quite some time, I can do it for another month :-)

Immutable branch now tested and pushed.

See reply to cover-letter.

Lee Jones [李琼斯]

FWIW RFC patches which don't apply cleanly seem perfectly fine to me. Perhaps note the base in the cover letter for those who may want to test them.

We can pull Lee's branch (thanks!) if it turns out the code is ready long before the MW.

Hi Jakub,

I'll quote Vladimir Oltean: "It mostly looks ok to me"

https://lore.kernel.org/netdev/20220912155234.ds73xpn5ijjq3iif@skbuf/

If you pull in Lee's branch I would certainly make use of it in the next 2-3 weeks. I would probably send out the patch set for review in a day or two.

Thanks Lee! I'm looking forward to adding the rest of the functionality soon!

There are a few Ocelot chips that contain the logic for this bus, but are controlled externally. Specifically the VSC7511, 7512, 7513, and 7514. In the externally controlled configurations these registers are not memory-mapped.

Add support for these non-memory-mapped configurations.

---

v16
* Add Andy Reviewed-by tag

v15
* No changes

v14
* Add Reviewed and Acked tags

---
 drivers/net/mdio/mdio-mscc-miim.c | 42 +++++++++----------------------
 1 file changed, 12 insertions(+), 30 deletions(-)

index 08541007b18a..51f68daac152 100644
@@ -12,6 +12,7 @@
 #include <linux/iopoll.h>
 #include <linux/kernel.h>
 #include <linux/mdio/mdio-mscc-miim.h>
+#include <linux/mfd/ocelot.h>
 #include <linux/module.h>
 #include <linux/of_mdio.h>
 #include <linux/phy.h>

@@ -270,44 +271,25 @@ static int mscc_miim_clk_set(struct mii_bus *bus)
 
 static int mscc_miim_probe(struct platform_device *pdev)
 {
-	struct regmap *mii_regmap, *phy_regmap = NULL;
 	struct device_node *np = pdev->dev.of_node;
+	struct regmap *mii_regmap, *phy_regmap;
 	struct device *dev = &pdev->dev;
-	void __iomem *regs, *phy_regs;
 	struct mscc_miim_dev *miim;
-	struct resource *res;
 	struct mii_bus *bus;
 	int ret;
 
-	regs = devm_platform_get_and_ioremap_resource(pdev, 0, NULL);
-	if (IS_ERR(regs)) {
-		dev_err(dev, "Unable to map MIIM registers\n");
-		return PTR_ERR(regs);
-	}
-
-	mii_regmap = devm_regmap_init_mmio(dev, regs, &mscc_miim_regmap_config);
-
-	if (IS_ERR(mii_regmap)) {
-		dev_err(dev, "Unable to create MIIM regmap\n");
-		return PTR_ERR(mii_regmap);
-	}
+	mii_regmap = ocelot_regmap_from_resource(pdev, 0,
+						 &mscc_miim_regmap_config);
+	if (IS_ERR(mii_regmap))
+		return dev_err_probe(dev, PTR_ERR(mii_regmap),
+				     "Unable to create MIIM regmap\n");
 
 	/* This resource is optional */
-	res = platform_get_resource(pdev, IORESOURCE_MEM, 1);
-	if (res) {
-		phy_regs = devm_ioremap_resource(dev, res);
-		if (IS_ERR(phy_regs)) {
-			dev_err(dev, "Unable to map internal phy registers\n");
-			return PTR_ERR(phy_regs);
-		}
-
-		phy_regmap = devm_regmap_init_mmio(dev, phy_regs,
-						   &mscc_miim_phy_regmap_config);
-		if (IS_ERR(phy_regmap)) {
-			dev_err(dev, "Unable to create phy register regmap\n");
-			return PTR_ERR(phy_regmap);
-		}
-	}
+	phy_regmap = ocelot_regmap_from_resource_optional(pdev, 1,
+						 &mscc_miim_phy_regmap_config);
+	if (IS_ERR(phy_regmap))
+		return dev_err_probe(dev, PTR_ERR(phy_regmap),
+				     "Unable to create phy register regmap\n");
 
 	ret = mscc_miim_setup(dev, &bus, "mscc_miim", mii_regmap, 0);
 	if (ret < 0) {

2.25.1

Applied, thanks.

Lee Jones [李琼斯]

There are a few Ocelot chips that contain pinctrl logic, but can be controlled externally. Specifically the VSC7511, 7512, 7513 and 7514. In the externally controlled configurations these registers are not memory-mapped.

Add support for these non-memory-mapped configurations.

---

v16
* Add Andy Reviewed-by tag

v15
* No changes

v14
* Add Reviewed and Acked tags

---
 drivers/pinctrl/pinctrl-ocelot.c | 16 +++++-----------
 1 file changed, 5 insertions(+), 11 deletions(-)

index c5fd154990c8..340ca2373429 100644
@@ -10,6 +10,7 @@
 #include <linux/gpio/driver.h>
 #include <linux/interrupt.h>
 #include <linux/io.h>
+#include <linux/mfd/ocelot.h>
 #include <linux/of_device.h>
 #include <linux/of_irq.h>
 #include <linux/of_platform.h>

@@ -1975,7 +1976,6 @@ static int ocelot_pinctrl_probe(struct platform_device *pdev)
 	struct ocelot_pinctrl *info;
 	struct reset_control *reset;
 	struct regmap *pincfg;
-	void __iomem *base;
 	int ret;
 	struct regmap_config regmap_config = {
 		.reg_bits = 32,

@@ -2004,20 +2004,14 @@ static int ocelot_pinctrl_probe(struct platform_device *pdev)
 				     "Failed to get reset\n");
 	reset_control_reset(reset);
 
-	base = devm_ioremap_resource(dev,
-			platform_get_resource(pdev, IORESOURCE_MEM, 0));
-	if (IS_ERR(base))
-		return PTR_ERR(base);
-
 	info->stride = 1 + (info->desc->npins - 1) / 32;
 
 	regmap_config.max_register = OCELOT_GPIO_SD_MAP * info->stride + 15 * 4;
 
-	info->map = devm_regmap_init_mmio(dev, base, &regmap_config);
-	if (IS_ERR(info->map)) {
-		dev_err(dev, "Failed to create regmap\n");
-		return PTR_ERR(info->map);
-	}
+	info->map = ocelot_regmap_from_resource(pdev, 0, &regmap_config);
+	if (IS_ERR(info->map))
+		return dev_err_probe(dev, PTR_ERR(info->map),
+				     "Failed to create regmap\n");
 	dev_set_drvdata(dev, info->map);
 	info->dev = dev;
 

2.25.1

Applied, thanks.

Lee Jones [李琼斯]

As the commit message suggests, this simply adds the ability to select SGPIO pinctrl as a module. This becomes more practical when the SGPIO hardware exists on an external chip, controlled indirectly by I2C or SPI. This commit enables that level of control.

---

v16
* Add Andy Reviewed-by tag

v14,15
* No changes

---
 drivers/pinctrl/Kconfig                   | 5 ++++-
 drivers/pinctrl/pinctrl-microchip-sgpio.c | 6 +++++-
 2 files changed, 9 insertions(+), 2 deletions(-)

index 1cf74b0c42e5..d768dcf75cf1 100644
@@ -292,7 +292,7 @@ config PINCTRL_MCP23S08
 	  corresponding interrupt-controller.
 
 config PINCTRL_MICROCHIP_SGPIO
-	bool "Pinctrl driver for Microsemi/Microchip Serial GPIO"
+	tristate "Pinctrl driver for Microsemi/Microchip Serial GPIO"
 	depends on OF
 	depends on HAS_IOMEM
 	select GPIOLIB

@@ -310,6 +310,9 @@ config PINCTRL_MICROCHIP_SGPIO
 	  connect control signals from SFP modules and to act as an
 	  LED controller.
 
+	  If compiled as a module, the module name will be
+	  pinctrl-microchip-sgpio.
+
 config PINCTRL_OCELOT
 	tristate "Pinctrl driver for the Microsemi Ocelot and Jaguar2 SoCs"
 	depends on OF

index 6f55bf7d5e05..e56074b7e659 100644
@@ -999,6 +999,7 @@ static const struct of_device_id microchip_sgpio_gpio_of_match[] = {
 		/* sentinel */
 	}
 };
+MODULE_DEVICE_TABLE(of, microchip_sgpio_gpio_of_match);
 
 static struct platform_driver microchip_sgpio_pinctrl_driver = {
 	.driver = {

@@ -1008,4 +1009,7 @@ static struct platform_driver microchip_sgpio_pinctrl_driver = {
 	},
 	.probe = microchip_sgpio_probe,
 };
-builtin_platform_driver(microchip_sgpio_pinctrl_driver);
+module_platform_driver(microchip_sgpio_pinctrl_driver);
+
+MODULE_DESCRIPTION("Microchip SGPIO Pinctrl Driver");
+MODULE_LICENSE("GPL");

2.25.1

Applied, thanks.

Lee Jones [李琼斯]

There are a few Ocelot chips that can contain SGPIO logic, but can be controlled externally. Specifically the VSC7511, 7512, 7513, and 7514. In the externally controlled configurations these registers are not memory-mapped.

Add support for these non-memory-mapped configurations.

---

v16
* Add Andy Reviewed-by tag

v15
* No changes

v14
* Add Reviewed and Acked tags

---
 drivers/pinctrl/pinctrl-microchip-sgpio.c | 8 ++------
 1 file changed, 2 insertions(+), 6 deletions(-)

index e56074b7e659..2b4167a09b3b 100644
@@ -12,6 +12,7 @@
 #include <linux/clk.h>
 #include <linux/gpio/driver.h>
 #include <linux/io.h>
+#include <linux/mfd/ocelot.h>
 #include <linux/mod_devicetable.h>
 #include <linux/module.h>
 #include <linux/pinctrl/pinmux.h>

@@ -904,7 +905,6 @@ static int microchip_sgpio_probe(struct platform_device *pdev)
 	struct reset_control *reset;
 	struct sgpio_priv *priv;
 	struct clk *clk;
-	u32 __iomem *regs;
 	u32 val;
 	struct regmap_config regmap_config = {
 		.reg_bits = 32,

@@ -937,11 +937,7 @@ static int microchip_sgpio_probe(struct platform_device *pdev)
 		return -EINVAL;
 	}
 
-	regs = devm_platform_ioremap_resource(pdev, 0);
-	if (IS_ERR(regs))
-		return PTR_ERR(regs);
-
-	priv->regs = devm_regmap_init_mmio(dev, regs, &regmap_config);
+	priv->regs = ocelot_regmap_from_resource(pdev, 0, &regmap_config);
 	if (IS_ERR(priv->regs))
 		return PTR_ERR(priv->regs);
 

2.25.1

Applied, thanks.

Lee Jones [李琼斯]

DEFINE_RES_ macros have been created for the commonly used resource types, but not IORESOURCE_REG. Add the macro so it can be used in a similar manner to all other resource types.

---

v16
* Add Andy Reviewed-by tag

v15
* No changes

v14
* Add Reviewed tag

---
 include/linux/ioport.h | 5 +++++
 1 file changed, 5 insertions(+)

index 616b683563a9..8a76dca9deee 100644
@@ -172,6 +172,11 @@ enum {
 #define DEFINE_RES_MEM(_start, _size)					\
 	DEFINE_RES_MEM_NAMED((_start), (_size), NULL)
 
+#define DEFINE_RES_REG_NAMED(_start, _size, _name)			\
+	DEFINE_RES_NAMED((_start), (_size), (_name), IORESOURCE_REG)
+#define DEFINE_RES_REG(_start, _size)					\
+	DEFINE_RES_REG_NAMED((_start), (_size), NULL)
+
 #define DEFINE_RES_IRQ_NAMED(_irq, _name)				\
 	DEFINE_RES_NAMED((_irq), 1, (_name), IORESOURCE_IRQ)
 #define DEFINE_RES_IRQ(_irq)						\

2.25.1

Applied, thanks.

Lee Jones [李琼斯]

Add devicetree bindings for SPI-controlled Ocelot chips, specifically the VSC7512.

---

(No changes since v14)

v14
* Add Vladimir Reviewed tag

---
 .../devicetree/bindings/mfd/mscc,ocelot.yaml  | 160 ++++++++++++++++++
 MAINTAINERS                                   |   1 +
 2 files changed, 161 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/mfd/mscc,ocelot.yaml

new file mode 100644
index 000000000000..8bf45a5673a4
@@ -0,0 +1,160 @@
+# SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause */
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/mfd/mscc,ocelot.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Ocelot Externally-Controlled Ethernet Switch
+
+maintainers:
+  - Colin Foster <[email protected]>
+
+description: |
+  The Ocelot ethernet switch family contains chips that have an internal CPU
+  (VSC7513, VSC7514) and chips that don't (VSC7511, VSC7512). All switches have
+  the option to be controlled externally, which is the purpose of this driver.
+
+  The switch family is a multi-port networking switch that supports many
+  interfaces. Additionally, the device can perform pin control, MDIO buses, and
+  external GPIO expanders.
+
+properties:
+  compatible:
+    enum:
+      - mscc,vsc7512
+
+  reg:
+    maxItems: 1
+
+  "#address-cells":
+    const: 1
+
+  "#size-cells":
+    const: 1
+
+  spi-max-frequency:
+    maxItems: 1
+
+patternProperties:
+  "^pinctrl@[0-9a-f]+$":
+    type: object
+    $ref: /schemas/pinctrl/mscc,ocelot-pinctrl.yaml
+
+  "^gpio@[0-9a-f]+$":
+    type: object
+    $ref: /schemas/pinctrl/microchip,sparx5-sgpio.yaml
+    properties:
+      compatible:
+        enum:
+          - mscc,ocelot-sgpio
+
+  "^mdio@[0-9a-f]+$":
+    type: object
+    $ref: /schemas/net/mscc,miim.yaml
+    properties:
+      compatible:
+        enum:
+          - mscc,ocelot-miim
+
+required:
+  - compatible
+  - reg
+  - '#address-cells'
+  - '#size-cells'
+  - spi-max-frequency
+
+additionalProperties: false
+
+examples:
+  - |
+    ocelot_clock: ocelot-clock {
+          compatible = "fixed-clock";
+          #clock-cells = <0>;
+          clock-frequency = <125000000>;
+      };
+
+    spi {
+        #address-cells = <1>;
+        #size-cells = <0>;
+
+        soc@0 {
+            compatible = "mscc,vsc7512";
+            spi-max-frequency = <2500000>;
+            reg = <0>;
+            #address-cells = <1>;
+            #size-cells = <1>;
+
+            mdio@7107009c {
+                compatible = "mscc,ocelot-miim";
+                #address-cells = <1>;
+                #size-cells = <0>;
+                reg = <0x7107009c 0x24>;
+
+                sw_phy0: ethernet-phy@0 {
+                    reg = <0x0>;
+                };
+            };
+
+            mdio@710700c0 {
+                compatible = "mscc,ocelot-miim";
+                pinctrl-names = "default";
+                pinctrl-0 = <&miim1_pins>;
+                #address-cells = <1>;
+                #size-cells = <0>;
+                reg = <0x710700c0 0x24>;
+
+                sw_phy4: ethernet-phy@4 {
+                    reg = <0x4>;
+                };
+            };
+
+            gpio: pinctrl@71070034 {
+                compatible = "mscc,ocelot-pinctrl";
+                gpio-controller;
+                #gpio-cells = <2>;
+                gpio-ranges = <&gpio 0 0 22>;
+                reg = <0x71070034 0x6c>;
+
+                sgpio_pins: sgpio-pins {
+                    pins = "GPIO_0", "GPIO_1", "GPIO_2", "GPIO_3";
+                    function = "sg0";
+                };
+
+                miim1_pins: miim1-pins {
+                    pins = "GPIO_14", "GPIO_15";
+                    function = "miim";
+                };
+            };
+
+            gpio@710700f8 {
+                compatible = "mscc,ocelot-sgpio";
+                #address-cells = <1>;
+                #size-cells = <0>;
+                bus-frequency = <12500000>;
+                clocks = <&ocelot_clock>;
+                microchip,sgpio-port-ranges = <0 15>;
+                pinctrl-names = "default";
+                pinctrl-0 = <&sgpio_pins>;
+                reg = <0x710700f8 0x100>;
+
+                sgpio_in0: gpio@0 {
+                    compatible = "microchip,sparx5-sgpio-bank";
+                    reg = <0>;
+                    gpio-controller;
+                    #gpio-cells = <3>;
+                    ngpios = <64>;
+                };
+
+                sgpio_out1: gpio@1 {
+                    compatible = "microchip,sparx5-sgpio-bank";
+                    reg = <1>;
+                    gpio-controller;
+                    #gpio-cells = <3>;
+                    ngpios = <64>;
+                };
+            };
+        };
+    };
+
+...
+

index e0732e9f9090..a5df3b0b9601 100644
@@ -14744,6 +14744,7 @@ F:	tools/testing/selftests/drivers/net/ocelot/*
 OCELOT EXTERNAL SWITCH CONTROL
 M:	Colin Foster <[email protected]>
 S:	Supported
+F:	Documentation/devicetree/bindings/mfd/mscc,ocelot.yaml
 F:	include/linux/mfd/ocelot.h
 
 OCXL (Open Coherent Accelerator Processor Interface OpenCAPI) DRIVER

2.25.1

Applied, thanks.

Lee Jones [李琼斯]

The VSC7512 is a networking chip that contains several peripherals. Many of these peripherals are currently supported by the VSC7513 and VSC7514 chips, but those run on an internal CPU. The VSC7512 lacks this CPU, and must be controlled externally.

Utilize the existing drivers by referencing the chip as an MFD. Add support for the two MDIO buses, the internal phys, pinctrl, and serial GPIO.

---

v16
* Includes fixups:
* ocelot-core.c add includes device.h, export.h, iopoll.h, ioport,h
* ocelot-spi.c add includes device.h, err.h, errno.h, export.h, mod_devicetable.h, types.h
* Move kconfig.h from ocelot-spi.c to ocelot.h
* Remove unnecessary byteorder.h
* Utilize resource_size() function

v15
* Add missed include bits.h
* Clean _SIZE macros to make them all the same width (e.g. 0x004)
* Remove unnecessary ret = ...; return ret; calls
* Utilize spi_message_init_with_transfers() instead of spi_message_add_tail() calls in the bus_read routine
* Utilize HZ_PER_MHZ from units.h instead of a magic number
* Remove unnecessary err < 0 checks
* Fix typos in comments

v14
* Add Reviewed tag
* Copyright ranges are now "2021-2022"
* 100-char width applied instead of 80
* Remove invalid dev_err_probe return
* Remove "spi" and "dev" elements from ocelot_ddata struct. Since "dev" is available throughout, determine "ddata" and "spi" from there instead of keeping separate references.
* Add header guard in drivers/mfd/ocelot.h
* Document ocelot_ddata struct

---
 MAINTAINERS               |   1 +
 drivers/mfd/Kconfig       |  21 +++
 drivers/mfd/Makefile      |   3 +
 drivers/mfd/ocelot-core.c | 161 ++++++++++++++++++++
 drivers/mfd/ocelot-spi.c  | 299 ++++++++++++++++++++++++++++++++++++++
 drivers/mfd/ocelot.h      |  49 +++++++
 6 files changed, 534 insertions(+)
 create mode 100644 drivers/mfd/ocelot-core.c
 create mode 100644 drivers/mfd/ocelot-spi.c
 create mode 100644 drivers/mfd/ocelot.h

index a5df3b0b9601..90a873dd04b0 100644
@@ -14745,6 +14745,7 @@ OCELOT EXTERNAL SWITCH CONTROL
 M:	Colin Foster <[email protected]>
 S:	Supported
 F:	Documentation/devicetree/bindings/mfd/mscc,ocelot.yaml
+F:	drivers/mfd/ocelot*
 F:	include/linux/mfd/ocelot.h
 
 OCXL (Open Coherent Accelerator Processor Interface OpenCAPI) DRIVER

index abb58ab1a1a4..c3dd1fe8d8c9 100644
@@ -963,6 +963,27 @@ config MFD_MENF21BMC
 	  This driver can also be built as a module. If so the module
 	  will be called menf21bmc.
 
+config MFD_OCELOT
+	tristate "Microsemi Ocelot External Control Support"
+	depends on SPI_MASTER
+	select MFD_CORE
+	select REGMAP_SPI
+	help
+	  Ocelot is a family of networking chips that support multiple ethernet
+	  and fibre interfaces. In addition to networking, they contain several
+	  other functions, including pinctrl, MDIO, and communication with
+	  external chips. While some chips have an internal processor capable of
+	  running an OS, others don't. All chips can be controlled externally
+	  through different interfaces, including SPI, I2C, and PCIe.
+
+	  Say yes here to add support for Ocelot chips (VSC7511, VSC7512,
+	  VSC7513, VSC7514) controlled externally.
+
+	  To compile this driver as a module, choose M here: the module will be
+	  called ocelot-soc.
+
+	  If unsure, say N.
+
 config EZX_PCAP
 	bool "Motorola EZXPCAP Support"
 	depends on SPI_MASTER

index 858cacf659d6..0004b7e86220 100644
@@ -120,6 +120,9 @@ obj-$(CONFIG_MFD_MC13XXX_I2C)	+= mc13xxx-i2c.o
 
 obj-$(CONFIG_MFD_CORE)		+= mfd-core.o
 
+ocelot-soc-objs			:= ocelot-core.o ocelot-spi.o
+obj-$(CONFIG_MFD_OCELOT)	+= ocelot-soc.o
+
 obj-$(CONFIG_EZX_PCAP)		+= ezx-pcap.o
 obj-$(CONFIG_MFD_CPCAP)		+= motorola-cpcap.o
 

2.25.1

Applied, thanks.

Lee Jones [李琼斯]

Enjoy!

[ Well done Colin !! ]

The following changes since commit 568035b01cfb107af8d2e4bd2fb9aea22cf5b868:

Linux 6.0-rc1 (2022-08-14 15:50:18 -0700)

are available in the Git repository at:

git://git.kernel.org/pub/scm/linux/kernel/git/lee/mfd.git ib-mfd-net-pinctrl-v6.0

for you to fetch changes up to f3e893626abeac3cdd9ba41d3395dc6c1b7d5ad6:

mfd: ocelot: Add support for the vsc7512 chip via spi (2022-09-09 07:54:47 +0100)

----------------------------------------------------------------
Immutable branch between MFD Net and Pinctrl due for the v6.0 merge window

----------------------------------------------------------------
Colin Foster (8):
mfd: ocelot: Add helper to get regmap from a resource
net: mdio: mscc-miim: add ability to be used in a non-mmio configuration
pinctrl: ocelot: add ability to be used in a non-mmio configuration
pinctrl: microchip-sgpio: allow sgpio driver to be used as a module
pinctrl: microchip-sgpio: add ability to be used in a non-mmio configuration
resource: add define macro for register address resources
dt-bindings: mfd: ocelot: Add bindings for VSC7512
mfd: ocelot: Add support for the vsc7512 chip via spi

 .../devicetree/bindings/mfd/mscc,ocelot.yaml       | 160 +++++++++++
 MAINTAINERS                                        |   7 +
 drivers/mfd/Kconfig                                |  21 ++
 drivers/mfd/Makefile                               |   3 +
 drivers/mfd/ocelot-core.c                          | 161 +++++++++++
 drivers/mfd/ocelot-spi.c                           | 299 +++++++++++++++++++++
 drivers/mfd/ocelot.h                               |  49 ++++
 drivers/net/mdio/mdio-mscc-miim.c                  |  42 +--
 drivers/pinctrl/Kconfig                            |   5 +-
 drivers/pinctrl/pinctrl-microchip-sgpio.c          |  14 +-
 drivers/pinctrl/pinctrl-ocelot.c                   |  16 +-
 include/linux/ioport.h                             |   5 +
 include/linux/mfd/ocelot.h                         |  62 +++++
 13 files changed, 795 insertions(+), 49 deletions(-)
 create mode 100644 Documentation/devicetree/bindings/mfd/mscc,ocelot.yaml
 create mode 100644 drivers/mfd/ocelot-core.c
 create mode 100644 drivers/mfd/ocelot-spi.c
 create mode 100644 drivers/mfd/ocelot.h
 create mode 100644 include/linux/mfd/ocelot.h

Lee Jones [李琼斯]