drm/msm: adreno: add GMU_BW_VOTE feature flag
Quoted 10 lines · Neil Armstrong
Quoted 9 lines · Dmitry Baryshkov
Quoted 8 lines · Neil Armstrong
The Adreno GMU Management Unit (GNU) can also scale the DDR Bandwidth along the Frequency and Power Domain level, but by default we leave the OPP core vote for the interconnect ddr path.
While scaling via the interconnect path was sufficient, newer GPUs like the A750 requires specific vote paremeters and bandwidth to achieve full functionality.
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While the feature will require some data in
a6xx_info, it's safer to only enable tested platforms with this flag first.Add a new feature enabling DDR Bandwidth vote via GMU.
Squash into the implementation patch.
Which one ? the flag is use in the next 3 patches
First one which uses it
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Signed-off-by Neil Armstrong <[email protected]>--- drivers/gpu/drm/msm/adreno/adreno_gpu.h | 1 + 1 file changed, 1 insertion(+)drivers/gpu/drm/msm/adreno/adreno_gpu.h +1
-0@@ -58,6 +58,7 @@ enum adreno_family {#define ADRENO_FEAT_HAS_HW_APRIV BIT(0)#define ADRENO_FEAT_HAS_CACHED_COHERENT BIT(1)#define ADRENO_FEAT_PREEMPTION BIT(2) +#define ADRENO_FEAT_GMU_BW_VOTE BIT(3)/* Helper for formating the chip_id in the way that userspace tools like * crashdec expect. Signature · 1 line
2.34.1
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With best wishes Dmitry ----- End forwarded message -----
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Quoted 55 lines · Dmitry Baryshkov <[email protected]> 于2024年12月4日周三 16:28写道：
Quoted 10 lines · Neil Armstrong
Quoted 9 lines · Dmitry Baryshkov
Quoted 8 lines · Neil Armstrong
The Adreno GMU Management Unit (GNU) can also scale the DDR Bandwidth along the Frequency and Power Domain level, but by default we leave the OPP core vote for the interconnect ddr path.
While scaling via the interconnect path was sufficient, newer GPUs like the A750 requires specific vote paremeters and bandwidth to achieve full functionality.
Quoted 8 lines
Quoted 6 lines
Quoted 4 lines
While the feature will require some data in
a6xx_info, it's safer to only enable tested platforms with this flag first.Add a new feature enabling DDR Bandwidth vote via GMU.
Squash into the implementation patch.
Which one ? the flag is use in the next 3 patches
First one which uses it
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Signed-off-by Neil Armstrong <[email protected]>--- drivers/gpu/drm/msm/adreno/adreno_gpu.h | 1 + 1 file changed, 1 insertion(+)drivers/gpu/drm/msm/adreno/adreno_gpu.h +1
-0@@ -58,6 +58,7 @@ enum adreno_family {#define ADRENO_FEAT_HAS_HW_APRIV BIT(0)#define ADRENO_FEAT_HAS_CACHED_COHERENT BIT(1)#define ADRENO_FEAT_PREEMPTION BIT(2) +#define ADRENO_FEAT_GMU_BW_VOTE BIT(3)/* Helper for formating the chip_id in the way that userspace tools like * crashdec expect. Quoted 5 lines
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2.34.1--
With best wishes
Dmitry----- End forwarded message -----