perf events fix
Subsystems (2)
Linus,
Please pull the latest perf/urgent git tree from:
git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip.git perf-urgent-2023-09-10
# HEAD: 6f7f984fa85b305799076a1bcec941b9377587de perf/x86/uncore: Correct the number of CHAs on EMR
Work around a firmware bug in the uncore PMU driver, affecting certain Intel systems.
Thanks,
Ingo
------------------>
Kan Liang (1):
perf/x86/uncore: Correct the number of CHAs on EMR
arch/x86/events/intel/uncore_snbep.c | 12 +++++++++++- 1 file changed, 11 insertions(+), 1 deletion(-)
arch/x86/events/intel/uncore_snbep.c +11 -1
@@ -6474,8 +6474,18 @@ void spr_uncore_cpu_init(void) type =uncore_find_type_by_id (uncore_msr_uncores,UNCORE_SPR_CHA );if (type) { +/* +* The value from the discovery table (stored in the type->num_boxes +* of UNCORE_SPR_CHA) is incorrect on some SPR variants because of a +* firmware bug. Using the value from SPR_MSR_UNC_CBO_CONFIG to replace it. +*/ rdmsrl (SPR_MSR_UNC_CBO_CONFIG , num_cbo); - type->num_boxes = num_cbo; +/* +* The MSR doesn't work on the EMR XCC, but the firmware bug doesn't impact +* the EMR XCC. Don't let the value from the MSR replace the existing value. +*/ +if (num_cbo) + type->num_boxes = num_cbo; } spr_uncore_iio_free_running.num_boxes =uncore_type_max_boxes (uncore_msr_uncores,UNCORE_SPR_IIO ); }
The pull request you sent on Sun, 10 Sep 2023 18:20:51 +0200:
The pull request you sent on Sun, 10 Sep 2023 18:20:51 +0200:
Quoted 1 line
git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip.gitperf-urgent-2023-09-10
has been merged into torvalds/linux.git:
https://git.kernel.org/torvalds/c/e79dbf03d87b2d9978d76ddc1c06424b07b215ad
Thank you!
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