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drm/amdgpu: always use legacy tlb flush on cyan_skilfish

PATCH Superseded Lang Yu 2 participants 3 messages Sep 14, 2023

Subsystems (3)
Stable branch DRM drivers Radeon and amdgpu DRM drivers

v1 of 2 Superseded Latest is v2 →

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Lang Yu

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#0 lore raw

PATCH 1/1 drm/amdgpu: always use legacy tlb flush on cyan_skilfish

cyan_skilfish has problems with other flush types.

Signed-off-by Lang Yu <[email protected]>
Cc <[email protected]> # v5.15+
---
 drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c | 7 ++++++-
 1 file changed, 6 insertions(+), 1 deletion(-)
drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c +6 -1
index d3da13f4c80e..27504ac21653 100644
@@ -236,7 +236,8 @@ static void gmc_v10_0_flush_vm_hub(struct amdgpu_device *adev, uint32_t vmid,
 {
 	bool use_semaphore = gmc_v10_0_use_invalidate_semaphore(adev, vmhub);
 	struct amdgpu_vmhub *hub = &adev->vmhub[vmhub];
-	u32 inv_req = hub->vmhub_funcs->get_invalidate_req(vmid, flush_type);
+	u32 inv_req = hub->vmhub_funcs->get_invalidate_req(vmid,
+		      (adev->asic_type != CHIP_CYAN_SKILLFISH) ? flush_type : 0);
 	u32 tmp;
 	/* Use register 17 for GART */
 	const unsigned int eng = 17;

@@ -331,6 +332,8 @@ static void gmc_v10_0_flush_gpu_tlb(struct amdgpu_device *adev, uint32_t vmid,
 
 	int r;
 
+	flush_type = (adev->asic_type != CHIP_CYAN_SKILLFISH) ? : 0;
+
 	/* flush hdp cache */
 	adev->hdp.funcs->flush_hdp(adev, NULL);
 

@@ -426,6 +429,8 @@ static int gmc_v10_0_flush_gpu_tlb_pasid(struct amdgpu_device *adev,
 	struct amdgpu_ring *ring = &adev->gfx.kiq[0].ring;
 	struct amdgpu_kiq *kiq = &adev->gfx.kiq[0];
 
+	flush_type = (adev->asic_type != CHIP_CYAN_SKILLFISH) ? : 0;
+
 	if (amdgpu_emu_mode == 0 && ring->sched.ready) {
 		spin_lock(&adev->gfx.kiq[0].ring_lock);
 		/* 2 dwords flush + 8 dwords fence */
Signature · 1 line
2.25.1
#1 lore raw

[Public]

-----Original Message-----
From: amd-gfx <[email protected]> On Behalf Of Lang Yu
Sent: Thursday, September 14, 2023 3:00 PM
To: [email protected]
Cc: Deucher, Alexander <[email protected]>; Yu, Lang <[email protected]>; Koenig, Christian <[email protected]>; [email protected]
Subject: [PATCH] drm/amdgpu: always use legacy tlb flush on cyan_skilfish

cyan_skilfish has problems with other flush types.

Signed-off-by Lang Yu <[email protected]>
Cc <[email protected]> # v5.15+
---
 drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c | 7 ++++++-
 1 file changed, 6 insertions(+), 1 deletion(-)
drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c +3 -1
index d3da13f4c80e..27504ac21653 100644
@@ -236,7 +236,8 @@ static void gmc_v10_0_flush_vm_hub(struct amdgpu_device *adev, uint32_t vmid,  {
        bool use_semaphore = gmc_v10_0_use_invalidate_semaphore(adev, vmhub);
        struct amdgpu_vmhub *hub = &adev->vmhub[vmhub];
-       u32 inv_req = hub->vmhub_funcs->get_invalidate_req(vmid, flush_type);
+       u32 inv_req = hub->vmhub_funcs->get_invalidate_req(vmid,
+                     (adev->asic_type != CHIP_CYAN_SKILLFISH) ? flush_type : 0);
        u32 tmp;
        /* Use register 17 for GART */
        const unsigned int eng = 17;

@@ -331,6 +332,8 @@ static void gmc_v10_0_flush_gpu_tlb(struct amdgpu_device *adev, uint32_t vmid,
 
        int r;
 
+       flush_type = (adev->asic_type != CHIP_CYAN_SKILLFISH) ? : 0;

Should be flush_type = (adev->asic_type != CHIP_CYAN_SKILLFISH) ? flush_type : 0; here ? +

        /* flush hdp cache */
        adev->hdp.funcs->flush_hdp(adev, NULL);

@@ -426,6 +429,8 @@ static int gmc_v10_0_flush_gpu_tlb_pasid(struct amdgpu_device *adev,

        struct amdgpu_ring *ring = &adev->gfx.kiq[0].ring;
        struct amdgpu_kiq *kiq = &adev->gfx.kiq[0];

+ flush_type = (adev->asic_type != CHIP_CYAN_SKILLFISH) ? : 0;
Should be flush_type = (adev->asic_type != CHIP_CYAN_SKILLFISH) ? flush_type : 0; here ? +

        if (amdgpu_emu_mode == 0 && ring->sched.ready) {
                spin_lock(&adev->gfx.kiq[0].ring_lock);
                /* 2 dwords flush + 8 dwords fence */

--
2.25.1

author
#2 lore raw
Quoted 45 lines · Yifan

[Public]

-----Original Message-----
From: amd-gfx <[email protected]> On Behalf Of Lang Yu
Sent: Thursday, September 14, 2023 3:00 PM
To: [email protected]
Cc: Deucher, Alexander <[email protected]>; Yu, Lang <[email protected]>; Koenig, Christian <[email protected]>; [email protected]
Subject: [PATCH] drm/amdgpu: always use legacy tlb flush on cyan_skilfish

cyan_skilfish has problems with other flush types.

Signed-off-by Lang Yu <[email protected]>
Cc <[email protected]> # v5.15+
---
 drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c | 7 ++++++-
 1 file changed, 6 insertions(+), 1 deletion(-)
drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c +3 -1
index d3da13f4c80e..27504ac21653 100644
@@ -236,7 +236,8 @@ static void gmc_v10_0_flush_vm_hub(struct amdgpu_device *adev, uint32_t vmid,  {
        bool use_semaphore = gmc_v10_0_use_invalidate_semaphore(adev, vmhub);
        struct amdgpu_vmhub *hub = &adev->vmhub[vmhub];
-       u32 inv_req = hub->vmhub_funcs->get_invalidate_req(vmid, flush_type);
+       u32 inv_req = hub->vmhub_funcs->get_invalidate_req(vmid,
+                     (adev->asic_type != CHIP_CYAN_SKILLFISH) ? flush_type : 0);
        u32 tmp;
        /* Use register 17 for GART */
        const unsigned int eng = 17;

@@ -331,6 +332,8 @@ static void gmc_v10_0_flush_gpu_tlb(struct amdgpu_device *adev, uint32_t vmid,
 
        int r;
 
+       flush_type = (adev->asic_type != CHIP_CYAN_SKILLFISH) ? : 0;

Should be flush_type = (adev->asic_type != CHIP_CYAN_SKILLFISH) ? flush_type : 0; here ?

drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c +2 -0
+
        /* flush hdp cache */
        adev->hdp.funcs->flush_hdp(adev, NULL);

@@ -426,6 +429,8 @@ static int gmc_v10_0_flush_gpu_tlb_pasid(struct amdgpu_device *adev,
        struct amdgpu_ring *ring = &adev->gfx.kiq[0].ring;
        struct amdgpu_kiq *kiq = &adev->gfx.kiq[0];
 
+       flush_type = (adev->asic_type != CHIP_CYAN_SKILLFISH) ? : 0;
Quoted 1 line

Should be flush_type = (adev->asic_type != CHIP_CYAN_SKILLFISH) ? flush_type : 0; here ?

Yes, thank you! Will fix it.

Regards,
Lang

Quoted 6 lines
        if (amdgpu_emu_mode == 0 && ring->sched.ready) {
                spin_lock(&adev->gfx.kiq[0].ring_lock);
                /* 2 dwords flush + 8 dwords fence */

--
2.25.1