riscv: sophgo: add pinctrl support for cv1800b
Subsystems (3)
cover riscv: sophgo: add pinctrl support for cv1800b
This series adds pinctrl support for cv1800b reusing the pinctrl-single driver.
Jisheng Zhang (2):
riscv: dts: cv1800b: add pinctrl node for cv1800b
riscv: dts: sophgo: set pinctrl for uart0
arch/riscv/boot/dts/sophgo/cv-pinctrl.h | 19 +++++++++++++++++++ .../boot/dts/sophgo/cv1800b-milkv-duo.dts | 11 +++++++++++ arch/riscv/boot/dts/sophgo/cv1800b.dtsi | 10 ++++++++++ 3 files changed, 40 insertions(+) create mode 100644 arch/riscv/boot/dts/sophgo/cv-pinctrl.h
Signature · 1 line
2.42.0
PATCH 1/2 riscv: dts: cv1800b: add pinctrl node for cv1800b
Add the reset device tree node to cv1800b SoC reusing the pinctrl-single driver.
--- arch/riscv/boot/dts/sophgo/cv-pinctrl.h | 19 +++++++++++++++++++ arch/riscv/boot/dts/sophgo/cv1800b.dtsi | 10 ++++++++++ 2 files changed, 29 insertions(+) create mode 100644 arch/riscv/boot/dts/sophgo/cv-pinctrl.h
arch/riscv/boot/dts/sophgo/cv-pinctrl.h new file +19 -0
@@ -0,0 +1,19 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* +* This header provides constants for pinctrl bindings for Sophgo CV* SoC. +* +* Copyright (C) 2023 Jisheng Zhang <[email protected]> +*/ +#ifndef _DTS_RISCV_SOPHGO_CV_PINCTRL_H +#define _DTS_RISCV_SOPHGO_CV_PINCTRL_H + +#define MUX_M0 0 +#define MUX_M1 1 +#define MUX_M2 2 +#define MUX_M3 3 +#define MUX_M4 4 +#define MUX_M5 5 +#define MUX_M6 6 +#define MUX_M7 7 + +#endif
arch/riscv/boot/dts/sophgo/cv1800b.dtsi +10 -0
@@ -6,6 +6,8 @@ #include <dt-bindings/interrupt-controller/irq.h> #include <dt-bindings/reset/sophgo,cv1800b-reset.h> +#include "cv-pinctrl.h" + / { compatible = "sophgo,cv1800b"; #address-cells = <1>;
@@ -55,6 +57,14 @@ soc { dma-noncoherent; ranges; + pinctrl0: pinctrl@3001000 { + compatible = "pinctrl-single"; + reg = <0x3001000 0x130>; + #pinctrl-cells = <1>; + pinctrl-single,register-width = <32>; + pinctrl-single,function-mask = <0x00000007>; + }; + rst: reset-controller@3003000 { compatible = "sophgo,cv1800b-reset"; reg = <0x03003000 0x1000>;
Signature · 1 line
2.42.0
Re: [PATCH 1/2] riscv: dts: cv1800b: add pinctrl node for cv1800b
Quoted 1 line · Jisheng Zhang
Add the reset device tree node to cv1800b SoC reusing the
^^^^^
I assume you mean pinctrl here?
arch/riscv/boot/dts/sophgo/cv-pinctrl.h
Quoted 14 lines
pinctrl-single driver.
Signed-off-by Jisheng Zhang <[email protected]>--- arch/riscv/boot/dts/sophgo/cv-pinctrl.h | 19 +++++++++++++++++++ arch/riscv/boot/dts/sophgo/cv1800b.dtsi | 10 ++++++++++ 2 files changed, 29 insertions(+) create mode 100644 arch/riscv/boot/dts/sophgo/cv-pinctrl.harch/riscv/boot/dts/sophgo/cv-pinctrl.h new file +0
-0
A couple of questions: Should this go in include/dt-bindings? And is it worth including macros for the actual function mappings, like in the vendor source[1]?
Quoted 34 lines
arch/riscv/boot/dts/sophgo/cv-pinctrl.h new file +19
-0@@ -0,0 +1,19 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* +* This header provides constants for pinctrl bindings for Sophgo CV* SoC. +* +* Copyright (C) 2023 Jisheng Zhang <[email protected]> +*/ +#ifndef _DTS_RISCV_SOPHGO_CV_PINCTRL_H +#define _DTS_RISCV_SOPHGO_CV_PINCTRL_H + +#define MUX_M0 0 +#define MUX_M1 1 +#define MUX_M2 2 +#define MUX_M3 3 +#define MUX_M4 4 +#define MUX_M5 5 +#define MUX_M6 6 +#define MUX_M7 7 + +#endif arch/riscv/boot/dts/sophgo/cv1800b.dtsi +2
-0@@ -6,6 +6,8 @@ #include <dt-bindings/interrupt-controller/irq.h> #include <dt-bindings/reset/sophgo,cv1800b-reset.h> +#include "cv-pinctrl.h" + / { compatible = "sophgo,cv1800b"; #address-cells = <1>;
arch/riscv/boot/dts/sophgo/cv1800b.dtsi soc { · line 66
Quoted 10 lines
arch/riscv/boot/dts/sophgo/cv1800b.dtsi +7
-0@@ -55,6 +57,14 @@ soc { dma-noncoherent; ranges; + pinctrl0: pinctrl@3001000 { + compatible = "pinctrl-single"; + reg = <0x3001000 0x130>; + #pinctrl-cells = <1>; + pinctrl-single,register-width = <32>; + pinctrl-single,function-mask = <0x00000007>; + };
From the vendor driver[2], it looks like this peripheral block only handles pinmuxing, so indeed this looks like a good use of pinctrl-single.
Quoted 4 lines
arch/riscv/boot/dts/sophgo/cv1800b.dtsi +1
-0+ rst: reset-controller@3003000 { compatible = "sophgo,cv1800b-reset"; reg = <0x03003000 0x1000>;
Re: [PATCH 1/2] riscv: dts: cv1800b: add pinctrl node for cv1800b
Quoted 4 lines · Samuel Holland
Quoted 1 line · Jisheng Zhang
Add the reset device tree node to cv1800b SoC reusing the
^^^^^
I assume you mean pinctrl here?
oops copy and paste the commit msg ;) thanks
Quoted 10 lines
Quoted 10 lines
pinctrl-single driver.
Signed-off-by Jisheng Zhang <[email protected]>--- arch/riscv/boot/dts/sophgo/cv-pinctrl.h | 19 +++++++++++++++++++ arch/riscv/boot/dts/sophgo/cv1800b.dtsi | 10 ++++++++++ 2 files changed, 29 insertions(+) create mode 100644 arch/riscv/boot/dts/sophgo/cv-pinctrl.h
Quoted 7 lines
arch/riscv/boot/dts/sophgo/cv-pinctrl.h
Quoted 5 lines
arch/riscv/boot/dts/sophgo/cv-pinctrl.h new file +0
-0A couple of questions: Should this go in
include/dt-bindings? And is it worth
When I cooked this series two weeks ago, I did put it in dt-binding, but then I found commit fe49f2d776f799 ("arm64: dts: ti: Use local header for pinctrl register values"), "These definitions were previously put in the bindings header to avoid code duplication and to provide some context meaning (name), but they do not fit the purpose of bindings." which is suggested and acked by Krzysztof, so I just want to follow the style here.
Quoted 1 line
including macros for the actual function mappings, like in the vendor source[1]?
Do you want something as the following?
#define UART0_TX 0
#define CAM_MCLK1 1
...
#define REG_UART0_TX 0x24
...
pinctrl-single,pins = <REG_UART0_TX UART0_TX>;
Other pinctl-single users just uses the register value directly, I have no preference. But I'd like to get suggestions from DT and pinctl-single maintainers. Hi Rob, Krzysztof, Conor, Tony, what's your opinion?
Quoted 41 lines
Quoted 37 lines
arch/riscv/boot/dts/sophgo/cv-pinctrl.h new file +19
-0@@ -0,0 +1,19 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* +* This header provides constants for pinctrl bindings for Sophgo CV* SoC. +* +* Copyright (C) 2023 Jisheng Zhang <[email protected]> +*/ +#ifndef _DTS_RISCV_SOPHGO_CV_PINCTRL_H +#define _DTS_RISCV_SOPHGO_CV_PINCTRL_H + +#define MUX_M0 0 +#define MUX_M1 1 +#define MUX_M2 2 +#define MUX_M3 3 +#define MUX_M4 4 +#define MUX_M5 5 +#define MUX_M6 6 +#define MUX_M7 7 + +#endif arch/riscv/boot/dts/sophgo/cv1800b.dtsi +2
-0@@ -6,6 +6,8 @@ #include <dt-bindings/interrupt-controller/irq.h> #include <dt-bindings/reset/sophgo,cv1800b-reset.h> +#include "cv-pinctrl.h" + / { compatible = "sophgo,cv1800b"; #address-cells = <1>;@@ -55,6 +57,14 @@ soc { dma-noncoherent; ranges;
Quoted 10 lines
arch/riscv/boot/dts/sophgo/cv1800b.dtsi soc { · line 66
Quoted 7 lines
arch/riscv/boot/dts/sophgo/cv1800b.dtsi +7
-0+ pinctrl0: pinctrl@3001000 { + compatible = "pinctrl-single"; + reg = <0x3001000 0x130>; + #pinctrl-cells = <1>; + pinctrl-single,register-width = <32>; + pinctrl-single,function-mask = <0x00000007>; + };From the vendor driver[2], it looks like this peripheral block only handles pinmuxing, so indeed this looks like a good use of pinctrl-single.
This is deffinitely pinctrl-single style pinmux controller ;)
Quoted 9 lines
Quoted 4 lines
arch/riscv/boot/dts/sophgo/cv1800b.dtsi +1
-0+ rst: reset-controller@3003000 { compatible = "sophgo,cv1800b-reset"; reg = <0x03003000 0x1000>;
Re: [PATCH 1/2] riscv: dts: cv1800b: add pinctrl node for cv1800b
Quoted 42 lines · Jisheng Zhang
Quoted 4 lines · Samuel Holland
Quoted 1 line · Jisheng Zhang
Add the reset device tree node to cv1800b SoC reusing the
^^^^^
I assume you mean pinctrl here?oops copy and paste the commit msg ;) thanks
Quoted 10 lines
Quoted 10 lines
pinctrl-single driver.
Signed-off-by Jisheng Zhang <[email protected]>--- arch/riscv/boot/dts/sophgo/cv-pinctrl.h | 19 +++++++++++++++++++ arch/riscv/boot/dts/sophgo/cv1800b.dtsi | 10 ++++++++++ 2 files changed, 29 insertions(+) create mode 100644 arch/riscv/boot/dts/sophgo/cv-pinctrl.hQuoted 7 lines
arch/riscv/boot/dts/sophgo/cv-pinctrl.h
Quoted 5 lines
arch/riscv/boot/dts/sophgo/cv-pinctrl.h new file +0
-0A couple of questions: Should this go in
include/dt-bindings? And is it worthWhen I cooked this series two weeks ago, I did put it in dt-binding, but then I found commit
fe49f2d776f799("arm64: dts: ti: Use local header for pinctrl register values"), "These definitions were previously put in the bindings header to avoid code duplication and to provide some context meaning (name), but they do not fit the purpose of bindings." which is suggested and acked by Krzysztof, so I just want to follow the style here.Quoted 1 line
including macros for the actual function mappings, like in the vendor source[1]?
Do you want something as the following?
#define
UART0_TX0
#defineCAM_MCLK11
...
Quoted 8 lines
#define
REG_UART0_TX0x24
...pinctrl-single,pins = <
REG_UART0_TXUART0_TX>;Other pinctl-single users just uses the register value directly, I have no preference. But I'd like to get suggestions from DT and pinctl-single maintainers. Hi Rob, Krzysztof, Conor, Tony, what's your opinion?
Basically, if the definitions map directly to registers and are just used to make writing your devicetree easier then they do not belong in a binding. This differs from clock or reset indices, where we essentially make up a set of indices that may or may not correlate to offsets in the hardware as using the register values without any sort of abstraction is not defining an ABI.
Cheers,
Conor.
Quoted 64 lines
Quoted 42 lines
Quoted 37 lines
arch/riscv/boot/dts/sophgo/cv-pinctrl.h new file +19
-0@@ -0,0 +1,19 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* +* This header provides constants for pinctrl bindings for Sophgo CV* SoC. +* +* Copyright (C) 2023 Jisheng Zhang <[email protected]> +*/ +#ifndef _DTS_RISCV_SOPHGO_CV_PINCTRL_H +#define _DTS_RISCV_SOPHGO_CV_PINCTRL_H + +#define MUX_M0 0 +#define MUX_M1 1 +#define MUX_M2 2 +#define MUX_M3 3 +#define MUX_M4 4 +#define MUX_M5 5 +#define MUX_M6 6 +#define MUX_M7 7 + +#endif arch/riscv/boot/dts/sophgo/cv1800b.dtsi +2
-0@@ -6,6 +6,8 @@ #include <dt-bindings/interrupt-controller/irq.h> #include <dt-bindings/reset/sophgo,cv1800b-reset.h> +#include "cv-pinctrl.h" + / { compatible = "sophgo,cv1800b"; #address-cells = <1>;@@ -55,6 +57,14 @@ soc { dma-noncoherent; ranges;Quoted 10 lines
arch/riscv/boot/dts/sophgo/cv1800b.dtsi soc { · line 66
Quoted 7 lines
arch/riscv/boot/dts/sophgo/cv1800b.dtsi +7
-0+ pinctrl0: pinctrl@3001000 { + compatible = "pinctrl-single"; + reg = <0x3001000 0x130>; + #pinctrl-cells = <1>; + pinctrl-single,register-width = <32>; + pinctrl-single,function-mask = <0x00000007>; + };From the vendor driver[2], it looks like this peripheral block only handles pinmuxing, so indeed this looks like a good use of pinctrl-single.
This is deffinitely pinctrl-single style pinmux controller ;)
Quoted 9 lines
Quoted 4 lines
arch/riscv/boot/dts/sophgo/cv1800b.dtsi +1
-0+ rst: reset-controller@3003000 { compatible = "sophgo,cv1800b-reset"; reg = <0x03003000 0x1000>;
Re: [PATCH 1/2] riscv: dts: cv1800b: add pinctrl node for cv1800b
Hi Conor,
Quoted 52 lines · Conor Dooley
Quoted 42 lines · Jisheng Zhang
Quoted 4 lines · Samuel Holland
Quoted 1 line · Jisheng Zhang
Add the reset device tree node to cv1800b SoC reusing the
^^^^^
I assume you mean pinctrl here?oops copy and paste the commit msg ;) thanks
Quoted 10 lines
Quoted 10 lines
pinctrl-single driver.
Signed-off-by Jisheng Zhang <[email protected]>--- arch/riscv/boot/dts/sophgo/cv-pinctrl.h | 19 +++++++++++++++++++ arch/riscv/boot/dts/sophgo/cv1800b.dtsi | 10 ++++++++++ 2 files changed, 29 insertions(+) create mode 100644 arch/riscv/boot/dts/sophgo/cv-pinctrl.hQuoted 7 lines
arch/riscv/boot/dts/sophgo/cv-pinctrl.h
Quoted 5 lines
arch/riscv/boot/dts/sophgo/cv-pinctrl.h new file +0
-0A couple of questions: Should this go in
include/dt-bindings? And is it worthWhen I cooked this series two weeks ago, I did put it in dt-binding, but then I found commit
fe49f2d776f799("arm64: dts: ti: Use local header for pinctrl register values"), "These definitions were previously put in the bindings header to avoid code duplication and to provide some context meaning (name), but they do not fit the purpose of bindings." which is suggested and acked by Krzysztof, so I just want to follow the style here.Quoted 1 line
including macros for the actual function mappings, like in the vendor source[1]?
Do you want something as the following?
#define
UART0_TX0
#defineCAM_MCLK11
...Quoted 8 lines
#define
REG_UART0_TX0x24
...pinctrl-single,pins = <
REG_UART0_TXUART0_TX>;Other pinctl-single users just uses the register value directly, I have no preference. But I'd like to get suggestions from DT and pinctl-single maintainers. Hi Rob, Krzysztof, Conor, Tony, what's your opinion?
Quoted 6 lines
Basically, if the definitions map directly to registers and are just used to make writing your devicetree easier then they do not belong in a binding. This differs from clock or reset indices, where we essentially make up a set of indices that may or may not correlate to offsets in the hardware as using the register values without any sort of abstraction is not defining an ABI.
Right. I should have remembered this policy :)
Regards,
Samuel
Re: [PATCH 1/2] riscv: dts: cv1800b: add pinctrl node for cv1800b
In reply to Jisheng ZhangQuoted 9 lines · Jisheng Zhang
Add the reset device tree node to cv1800b SoC reusing the pinctrl-single driver.
Signed-off-by Jisheng Zhang <[email protected]>--- arch/riscv/boot/dts/sophgo/cv-pinctrl.h | 19 +++++++++++++++++++ arch/riscv/boot/dts/sophgo/cv1800b.dtsi | 10 ++++++++++ 2 files changed, 29 insertions(+)create mode 100644
arch/riscv/boot/dts/sophgo/cv-pinctrl.h
I'm afraid there will not be more cv* chip in coming days. So I would suggest you use "cv1800b-pinctrl.h" first here. If we see more cv* coming, and if they will reuse the definition here, we can consider optimize the filename, what do you think?
BTW, how about defining the file name as "cv1800b.h" and I'm not sure if you will have more macro const definition for other modules?
Quoted 53 lines
arch/riscv/boot/dts/sophgo/cv-pinctrl.h new file +19
-0@@ -0,0 +1,19 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* +* This header provides constants for pinctrl bindings for Sophgo CV* SoC. +* +* Copyright (C) 2023 Jisheng Zhang <[email protected]> +*/ +#ifndef _DTS_RISCV_SOPHGO_CV_PINCTRL_H +#define _DTS_RISCV_SOPHGO_CV_PINCTRL_H + +#define MUX_M0 0 +#define MUX_M1 1 +#define MUX_M2 2 +#define MUX_M3 3 +#define MUX_M4 4 +#define MUX_M5 5 +#define MUX_M6 6 +#define MUX_M7 7 + +#endif arch/riscv/boot/dts/sophgo/cv1800b.dtsi +10
-0@@ -6,6 +6,8 @@ #include <dt-bindings/interrupt-controller/irq.h> #include <dt-bindings/reset/sophgo,cv1800b-reset.h> +#include "cv-pinctrl.h" + / { compatible = "sophgo,cv1800b"; #address-cells = <1>;@@ -55,6 +57,14 @@ soc { dma-noncoherent; ranges; + pinctrl0: pinctrl@3001000 { + compatible = "pinctrl-single"; + reg = <0x3001000 0x130>; + #pinctrl-cells = <1>; + pinctrl-single,register-width = <32>; + pinctrl-single,function-mask = <0x00000007>; + }; + rst: reset-controller@3003000 { compatible = "sophgo,cv1800b-reset"; reg = <0x03003000 0x1000>;
Re: [PATCH 1/2] riscv: dts: cv1800b: add pinctrl node for cv1800b
Quoted 13 lines · Chen Wang
Quoted 9 lines · Jisheng Zhang
Add the reset device tree node to cv1800b SoC reusing the pinctrl-single driver.
Signed-off-by Jisheng Zhang <[email protected]>--- arch/riscv/boot/dts/sophgo/cv-pinctrl.h | 19 +++++++++++++++++++ arch/riscv/boot/dts/sophgo/cv1800b.dtsi | 10 ++++++++++ 2 files changed, 29 insertions(+)create mode 100644
arch/riscv/boot/dts/sophgo/cv-pinctrl.h
Quoted 6 lines
I'm afraid there will not be more cv* chip in coming days. So I would suggest you use "
cv1800b-pinctrl.h" first here. If we see more cv* coming, and if they will reuse the definition here, we can consider optimize the filename, what do you think?BTW, how about defining the file name as "
cv1800b.h" and I'm not sure if you
hmm, cv1800b-pinctrl.h is fine. Only pinctrl related stuff will be put there.
Quoted 53 lines
will have more macro const definition for other modules?
Quoted 51 lines
arch/riscv/boot/dts/sophgo/cv-pinctrl.h new file +19
-0@@ -0,0 +1,19 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* +* This header provides constants for pinctrl bindings for Sophgo CV* SoC. +* +* Copyright (C) 2023 Jisheng Zhang <[email protected]> +*/ +#ifndef _DTS_RISCV_SOPHGO_CV_PINCTRL_H +#define _DTS_RISCV_SOPHGO_CV_PINCTRL_H + +#define MUX_M0 0 +#define MUX_M1 1 +#define MUX_M2 2 +#define MUX_M3 3 +#define MUX_M4 4 +#define MUX_M5 5 +#define MUX_M6 6 +#define MUX_M7 7 + +#endif arch/riscv/boot/dts/sophgo/cv1800b.dtsi +10
-0@@ -6,6 +6,8 @@ #include <dt-bindings/interrupt-controller/irq.h> #include <dt-bindings/reset/sophgo,cv1800b-reset.h> +#include "cv-pinctrl.h" + / { compatible = "sophgo,cv1800b"; #address-cells = <1>;@@ -55,6 +57,14 @@ soc { dma-noncoherent; ranges; + pinctrl0: pinctrl@3001000 { + compatible = "pinctrl-single"; + reg = <0x3001000 0x130>; + #pinctrl-cells = <1>; + pinctrl-single,register-width = <32>; + pinctrl-single,function-mask = <0x00000007>; + }; + rst: reset-controller@3003000 { compatible = "sophgo,cv1800b-reset"; reg = <0x03003000 0x1000>;
Re: [PATCH 1/2] riscv: dts: cv1800b: add pinctrl node for cv1800b
In reply to Jisheng ZhangQuoted 40 lines · Jisheng Zhang
Add the reset device tree node to cv1800b SoC reusing the pinctrl-single driver.
Signed-off-by Jisheng Zhang <[email protected]>--- arch/riscv/boot/dts/sophgo/cv-pinctrl.h | 19 +++++++++++++++++++ arch/riscv/boot/dts/sophgo/cv1800b.dtsi | 10 ++++++++++ 2 files changed, 29 insertions(+)create mode 100644
arch/riscv/boot/dts/sophgo/cv-pinctrl.harch/riscv/boot/dts/sophgo/cv-pinctrl.h new file +19
-0@@ -0,0 +1,19 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* +* This header provides constants for pinctrl bindings for Sophgo CV* SoC. +* +* Copyright (C) 2023 Jisheng Zhang <[email protected]> +*/ +#ifndef _DTS_RISCV_SOPHGO_CV_PINCTRL_H +#define _DTS_RISCV_SOPHGO_CV_PINCTRL_H + +#define MUX_M0 0 +#define MUX_M1 1 +#define MUX_M2 2 +#define MUX_M3 3 +#define MUX_M4 4 +#define MUX_M5 5 +#define MUX_M6 6 +#define MUX_M7 7 + +#endif arch/riscv/boot/dts/sophgo/cv1800b.dtsi +0
-0
arch/riscv/boot/dts/sophgo/cv1800b.dtsi line 7
Quoted 2 lines
arch/riscv/boot/dts/sophgo/cv1800b.dtsi +0
-0@@ -6,6 +6,8 @@ #include <dt-bindings/interrupt-controller/irq.h> #include <dt-bindings/reset/sophgo,cv1800b-reset.h>
Another question:
Does this patch depend on anther patchset "riscv: sophgo: add reset support for cv1800b"?
If so, you may need to add comments in the cover-letter to clarify this. But I'm afraid it does not.
Quoted 21 lines
arch/riscv/boot/dts/sophgo/cv1800b.dtsi +10
-0+#include "cv-pinctrl.h" + / { compatible = "sophgo,cv1800b"; #address-cells = <1>;@@ -55,6 +57,14 @@ soc { dma-noncoherent; ranges; + pinctrl0: pinctrl@3001000 { + compatible = "pinctrl-single"; + reg = <0x3001000 0x130>; + #pinctrl-cells = <1>; + pinctrl-single,register-width = <32>; + pinctrl-single,function-mask = <0x00000007>; + }; + rst: reset-controller@3003000 { compatible = "sophgo,cv1800b-reset"; reg = <0x03003000 0x1000>;
Rob Herring
maintainerRe: [PATCH 1/2] riscv: dts: cv1800b: add pinctrl node for cv1800b
In reply to Jisheng ZhangQuoted 16 lines · Jisheng Zhang
Add the reset device tree node to cv1800b SoC reusing the pinctrl-single driver.
Signed-off-by Jisheng Zhang <[email protected]>--- arch/riscv/boot/dts/sophgo/cv-pinctrl.h | 19 +++++++++++++++++++ arch/riscv/boot/dts/sophgo/cv1800b.dtsi | 10 ++++++++++ 2 files changed, 29 insertions(+) create mode 100644 arch/riscv/boot/dts/sophgo/cv-pinctrl.harch/riscv/boot/dts/sophgo/cv-pinctrl.h new file +0
-0
arch/riscv/boot/dts/sophgo/cv-pinctrl.h line 1
Quoted 1 line
arch/riscv/boot/dts/sophgo/cv-pinctrl.h new file +1
-0@@ -0,0 +1,19 @@ +/* SPDX-License-Identifier: GPL-2.0 */
Please match the licensing of the file(s) that include this. Not that there really anything
Quoted 6 lines
arch/riscv/boot/dts/sophgo/cv-pinctrl.h new file +6
-0+/* +* This header provides constants for pinctrl bindings for Sophgo CV* SoC. +* +* Copyright (C) 2023 Jisheng Zhang <[email protected]> +*/ +#ifndef _DTS_RISCV_SOPHGO_CV_PINCTRL_H
arch/riscv/boot/dts/sophgo/cv-pinctrl.h line 17
Quoted 10 lines
arch/riscv/boot/dts/sophgo/cv-pinctrl.h new file +10
-0+#define _DTS_RISCV_SOPHGO_CV_PINCTRL_H + +#define MUX_M0 0 +#define MUX_M1 1 +#define MUX_M2 2 +#define MUX_M3 3 +#define MUX_M4 4 +#define MUX_M5 5 +#define MUX_M6 6 +#define MUX_M7 7
I find defines with the number in the name to be somewhat pointless.
Quoted 16 lines
arch/riscv/boot/dts/sophgo/cv-pinctrl.h new file +2
-0+ +#endif arch/riscv/boot/dts/sophgo/cv1800b.dtsi +2
-0@@ -6,6 +6,8 @@ #include <dt-bindings/interrupt-controller/irq.h> #include <dt-bindings/reset/sophgo,cv1800b-reset.h> +#include "cv-pinctrl.h" + / { compatible = "sophgo,cv1800b"; #address-cells = <1>;
arch/riscv/boot/dts/sophgo/cv1800b.dtsi soc { · line 66
Quoted 10 lines
arch/riscv/boot/dts/sophgo/cv1800b.dtsi +7
-0@@ -55,6 +57,14 @@ soc { dma-noncoherent; ranges; + pinctrl0: pinctrl@3001000 { + compatible = "pinctrl-single"; + reg = <0x3001000 0x130>; + #pinctrl-cells = <1>; + pinctrl-single,register-width = <32>; + pinctrl-single,function-mask = <0x00000007>; + };
Even more pointless is the defines are not even used.
Quoted 7 lines
arch/riscv/boot/dts/sophgo/cv1800b.dtsi +1
-0+ rst: reset-controller@3003000 { compatible = "sophgo,cv1800b-reset"; reg = <0x03003000 0x1000>;Signature · 1 line
2.42.0
PATCH 2/2 riscv: dts: sophgo: set pinctrl for uart0
In reply to Jisheng ZhangAlthough the mux function is uart by default, add it for completeness.
--- arch/riscv/boot/dts/sophgo/cv1800b-milkv-duo.dts | 11 +++++++++++ 1 file changed, 11 insertions(+)
arch/riscv/boot/dts/sophgo/cv1800b-milkv-duo.dts +11 -0
@@ -33,6 +33,17 @@ &osc { clock-frequency = <25000000>; }; +&pinctrl0 { + uart0_pins: uart0-pins { + pinctrl-single,pins = < + 0x24 MUX_M0 /* UART0_TX */ + 0x28 MUX_M0 /* UART0_RX */ + >; + }; +}; + &uart0 { + pinctrl-names = "default"; + pinctrl-0 = <&uart0_pins>; status = "okay"; };
Signature · 1 line
2.42.0
Quoted 7 lines · Jisheng Zhang
This series adds pinctrl support for cv1800b reusing the pinctrl-single driver.
Jisheng Zhang (2):
riscv: dts: cv1800b: add pinctrl node for cv1800b
riscv: dts: sophgo: set pinctrl for uart0
Quoted 5 lines
arch/riscv/boot/dts/sophgo/cv-pinctrl.h | 19 +++++++++++++++++++ .../boot/dts/sophgo/cv1800b-milkv-duo.dts | 11 +++++++++++ arch/riscv/boot/dts/sophgo/cv1800b.dtsi | 10 ++++++++++ 3 files changed, 40 insertions(+)create mode 100644
arch/riscv/boot/dts/sophgo/cv-pinctrl.h
One question, when we use "pinctrl-single" driver, should we enable CONFIG_PINCTRL_SINGLE? Or just leave it to package vendor to configure by themselves?
Quoted 9 lines · Chen Wang
Quoted 7 lines · Jisheng Zhang
This series adds pinctrl support for cv1800b reusing the pinctrl-single driver.
Jisheng Zhang (2):
riscv: dts: cv1800b: add pinctrl node for cv1800b
riscv: dts: sophgo: set pinctrl for uart0
Quoted 8 lines
Quoted 5 lines
arch/riscv/boot/dts/sophgo/cv-pinctrl.h | 19 +++++++++++++++++++ .../boot/dts/sophgo/cv1800b-milkv-duo.dts | 11 +++++++++++ arch/riscv/boot/dts/sophgo/cv1800b.dtsi | 10 ++++++++++ 3 files changed, 40 insertions(+)create mode 100644
arch/riscv/boot/dts/sophgo/cv-pinctrl.hOne question, when we use "pinctrl-single" driver, should we enable
CONFIG_PINCTRL_SINGLE? Or just leave it to package vendor to configure by
It's better to enable PINCTRL_SINGLE in defconfig. However, per recently pin related xls from milkv github repo, pinctrl-single isn't suitable.
Quoted 7 lines · Jisheng Zhang
This series adds pinctrl support for cv1800b reusing the pinctrl-single driver.
Jisheng Zhang (2):
riscv: dts: cv1800b: add pinctrl node for cv1800b
riscv: dts: sophgo: set pinctrl for uart0
Quoted 9 lines
arch/riscv/boot/dts/sophgo/cv-pinctrl.h | 19 +++++++++++++++++++ .../boot/dts/sophgo/cv1800b-milkv-duo.dts | 11 +++++++++++ arch/riscv/boot/dts/sophgo/cv1800b.dtsi | 10 ++++++++++ 3 files changed, 40 insertions(+) create mode 100644 arch/riscv/boot/dts/sophgo/cv-pinctrl.hSignature · 1 line
2.42.0
Hi, Jisheng,
Could you rebase this patch for the latest kernel?
Regards,
Inochi