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arm64: dts: qcom: x1e80100: QCP/Vivobook/Yoga PCIe fixes

PATCH Applied Johan Hovold 4 participants 30 messages Jul 22, 2024 – Aug 1, 2024

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Johan Hovold

author
#0 lore raw

cover arm64: dts: qcom: x1e80100: QCP/Vivobook/Yoga PCIe fixes

Here's a follow-up series addressing some issues in the QCP, Vivobook and Yoga devicetrees that had been carried over from the x1e80100 CRD dts.

Note that I don't have access to the schematics for these machine so this is based on the qualified assumption that the PHY supplies are the same as on the reference design (and similarly for the PCIe4 pins).

This is fixed for the x1e80100 CRD here:

	https://lore.kernel.org/lkml/[email protected]/

Johan

Johan Hovold (12):
arm64: dts: qcom: x1e80100-qcp: fix PCIe4 PHY supply
arm64: dts: qcom: x1e80100-qcp: fix up PCIe6a pinctrl node
arm64: dts: qcom: x1e80100-qcp: disable PCIe6a perst pull down
arm64: dts: qcom: x1e80100-qcp: fix missing PCIe4 gpios
arm64: dts: qcom: x1e80100-vivobook-s15: fix PCIe4 PHY supply
arm64: dts: qcom: x1e80100-vivobook-s15: fix up PCIe6a pinctrl node
arm64: dts: qcom: x1e80100-vivobook-s15: disable PCIe6a perst pull
down
arm64: dts: qcom: x1e80100-vivobook-s15: fix missing PCIe4 gpios
arm64: dts: qcom: x1e80100-yoga-slim7x: fix PCIe4 PHY supply
arm64: dts: qcom: x1e80100-yoga-slim7x: fix up PCIe6a pinctrl node
arm64: dts: qcom: x1e80100-yoga-slim7x: disable PCIe6a perst pull down
arm64: dts: qcom: x1e80100-yoga-slim7x: fix missing PCIe4 gpios

 .../dts/qcom/x1e80100-asus-vivobook-s15.dts   | 42 +++++++++++++++--
 .../dts/qcom/x1e80100-lenovo-yoga-slim7x.dts  | 45 +++++++++++++++----
 arch/arm64/boot/dts/qcom/x1e80100-qcp.dts     | 45 +++++++++++++++----
 3 files changed, 113 insertions(+), 19 deletions(-)
Signature · 1 line
2.44.2
author
#1 lore raw

PATCH 1/12 arm64: dts: qcom: x1e80100-qcp: fix PCIe4 PHY supply

The PCIe4 PHY is powered by vreg_l3i (not vreg_l3j) on the CRD so assume the same applies to the QCP.

Fixes f9a9c11471da ("arm64: dts: qcom: x1e80100-qcp: Enable more support")
Cc [email protected] # 6.9
Signed-off-by Johan Hovold <[email protected]>
---
 arch/arm64/boot/dts/qcom/x1e80100-qcp.dts | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)
arch/arm64/boot/dts/qcom/x1e80100-qcp.dts +1 -1
index e7758f172d0d..212ed20b3369 100644
@@ -576,7 +576,7 @@ &pcie4 {
 };
 
 &pcie4_phy {
-	vdda-phy-supply = <&vreg_l3j_0p8>;
+	vdda-phy-supply = <&vreg_l3i_0p8>;
 	vdda-pll-supply = <&vreg_l3e_1p2>;
 
 	status = "okay";
Signature · 1 line
2.44.2
Reviewed-by on v1 1/12
#3 lore raw

Re: [PATCH 01/12] arm64: dts: qcom: x1e80100-qcp: fix PCIe4 PHY supply

In reply to Johan Hovold
Quoted 6 lines · Johan Hovold

The PCIe4 PHY is powered by vreg_l3i (not vreg_l3j) on the CRD so assume the same applies to the QCP.

Fixes f9a9c11471da ("arm64: dts: qcom: x1e80100-qcp: Enable more support")
Cc [email protected] # 6.9
Signed-off-by Johan Hovold <[email protected]>
Reviewed-by Abel Vesa <[email protected]>
Quoted 20 lines
---
 arch/arm64/boot/dts/qcom/x1e80100-qcp.dts | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)
arch/arm64/boot/dts/qcom/x1e80100-qcp.dts +1 -1
index e7758f172d0d..212ed20b3369 100644
@@ -576,7 +576,7 @@ &pcie4 {
 };
 
 &pcie4_phy {
-	vdda-phy-supply = <&vreg_l3j_0p8>;
+	vdda-phy-supply = <&vreg_l3i_0p8>;
 	vdda-pll-supply = <&vreg_l3e_1p2>;
 
 	status = "okay";
Signature · 1 line
2.44.2
author
#4 lore raw

PATCH 2/12 arm64: dts: qcom: x1e80100-qcp: fix up PCIe6a pinctrl node

In reply to Johan Hovold

The PCIe6a pinctrl node appears to have been copied from the sc8280xp CRD dts, which has the NVMe on pcie2a and uses some funny indentation.

Fix up the node name to match the x1e80100 use and label and use only tabs for indentation.

Signed-off-by Johan Hovold <[email protected]>
---
 arch/arm64/boot/dts/qcom/x1e80100-qcp.dts | 12 ++++++------
 1 file changed, 6 insertions(+), 6 deletions(-)
arch/arm64/boot/dts/qcom/x1e80100-qcp.dts +6 -6
index 212ed20b3369..86735f07fbb5 100644
@@ -665,7 +665,7 @@ nvme_reg_en: nvme-reg-en-state {
 		bias-disable;
 	};
 
-	pcie6a_default: pcie2a-default-state {
+	pcie6a_default: pcie6a-default-state {
 		clkreq-n-pins {
 			pins = "gpio153";
 			function = "pcie6a_clk";

@@ -681,11 +681,11 @@ perst-n-pins {
 		};
 
 		wake-n-pins {
-		       pins = "gpio154";
-		       function = "gpio";
-		       drive-strength = <2>;
-		       bias-pull-up;
-	       };
+			pins = "gpio154";
+			function = "gpio";
+			drive-strength = <2>;
+			bias-pull-up;
+		};
 	};
 };
Signature · 1 line
2.44.2
Reviewed-by on v1 2/12
#5 lore raw

Re: [PATCH 02/12] arm64: dts: qcom: x1e80100-qcp: fix up PCIe6a pinctrl node

Quoted 8 lines · Johan Hovold

The PCIe6a pinctrl node appears to have been copied from the sc8280xp CRD dts, which has the NVMe on pcie2a and uses some funny indentation.

Fix up the node name to match the x1e80100 use and label and use only tabs for indentation.

Signed-off-by Johan Hovold <[email protected]>

---

Reviewed-by Konrad Dybcio <[email protected]>

Konrad

Reviewed-by on v1 2/12
#6 lore raw

Re: [PATCH 02/12] arm64: dts: qcom: x1e80100-qcp: fix up PCIe6a pinctrl node

In reply to Johan Hovold
Quoted 7 lines · Johan Hovold

The PCIe6a pinctrl node appears to have been copied from the sc8280xp CRD dts, which has the NVMe on pcie2a and uses some funny indentation.

Fix up the node name to match the x1e80100 use and label and use only tabs for indentation.

Signed-off-by Johan Hovold <[email protected]>
Reviewed-by Abel Vesa <[email protected]>
Quoted 37 lines
---
 arch/arm64/boot/dts/qcom/x1e80100-qcp.dts | 12 ++++++------
 1 file changed, 6 insertions(+), 6 deletions(-)
arch/arm64/boot/dts/qcom/x1e80100-qcp.dts +6 -6
index 212ed20b3369..86735f07fbb5 100644
@@ -665,7 +665,7 @@ nvme_reg_en: nvme-reg-en-state {
 		bias-disable;
 	};
 
-	pcie6a_default: pcie2a-default-state {
+	pcie6a_default: pcie6a-default-state {
 		clkreq-n-pins {
 			pins = "gpio153";
 			function = "pcie6a_clk";

@@ -681,11 +681,11 @@ perst-n-pins {
 		};
 
 		wake-n-pins {
-		       pins = "gpio154";
-		       function = "gpio";
-		       drive-strength = <2>;
-		       bias-pull-up;
-	       };
+			pins = "gpio154";
+			function = "gpio";
+			drive-strength = <2>;
+			bias-pull-up;
+		};
 	};
 };
Signature · 1 line
2.44.2
author
#7 lore raw

PATCH 3/12 arm64: dts: qcom: x1e80100-qcp: disable PCIe6a perst pull down

In reply to Johan Hovold

Disable the PCIe6a perst pull-down resistor to save some power.

Signed-off-by Johan Hovold <[email protected]>
---
 arch/arm64/boot/dts/qcom/x1e80100-qcp.dts | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)
arch/arm64/boot/dts/qcom/x1e80100-qcp.dts +1 -1
index 86735f07fbb5..998e5ea2f52e 100644
@@ -677,7 +677,7 @@ perst-n-pins {
 			pins = "gpio152";
 			function = "gpio";
 			drive-strength = <2>;
-			bias-pull-down;
+			bias-disable;
 		};
 
 		wake-n-pins {
Signature · 1 line
2.44.2
Reviewed-by on v1 3/12
#9 lore raw

Re: [PATCH 03/12] arm64: dts: qcom: x1e80100-qcp: disable PCIe6a perst pull down

In reply to Johan Hovold
Quoted 3 lines · Johan Hovold

Disable the PCIe6a perst pull-down resistor to save some power.

Signed-off-by Johan Hovold <[email protected]>
Reviewed-by Abel Vesa <[email protected]>
Quoted 20 lines
---
 arch/arm64/boot/dts/qcom/x1e80100-qcp.dts | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)
arch/arm64/boot/dts/qcom/x1e80100-qcp.dts +1 -1
index 86735f07fbb5..998e5ea2f52e 100644
@@ -677,7 +677,7 @@ perst-n-pins {
 			pins = "gpio152";
 			function = "gpio";
 			drive-strength = <2>;
-			bias-pull-down;
+			bias-disable;
 		};
 
 		wake-n-pins {
Signature · 1 line
2.44.2
author
#10 lore raw

PATCH 4/12 arm64: dts: qcom: x1e80100-qcp: fix missing PCIe4 gpios

In reply to Johan Hovold

Add the missing PCIe4 perst, wake and clkreq GPIOs and pin config.

Fixes f9a9c11471da ("arm64: dts: qcom: x1e80100-qcp: Enable more support")
Cc [email protected] # 6.9
Signed-off-by Johan Hovold <[email protected]>
---
 arch/arm64/boot/dts/qcom/x1e80100-qcp.dts | 29 +++++++++++++++++++++++
 1 file changed, 29 insertions(+)
arch/arm64/boot/dts/qcom/x1e80100-qcp.dts +29 -0
index 998e5ea2f52e..786285af9f33 100644
@@ -572,6 +572,12 @@ &mdss_dp3_phy {
 };
 
 &pcie4 {
+	perst-gpios = <&tlmm 146 GPIO_ACTIVE_LOW>;
+	wake-gpios = <&tlmm 148 GPIO_ACTIVE_LOW>;
+
+	pinctrl-0 = <&pcie4_default>;
+	pinctrl-names = "default";
+
 	status = "okay";
 };
 

@@ -665,6 +671,29 @@ nvme_reg_en: nvme-reg-en-state {
 		bias-disable;
 	};
 
+	pcie4_default: pcie4-default-state {
+		clkreq-n-pins {
+			pins = "gpio147";
+			function = "pcie4_clk";
+			drive-strength = <2>;
+			bias-pull-up;
+		};
+
+		perst-n-pins {
+			pins = "gpio146";
+			function = "gpio";
+			drive-strength = <2>;
+			bias-disable;
+		};
+
+		wake-n-pins {
+			pins = "gpio148";
+			function = "gpio";
+			drive-strength = <2>;
+			bias-pull-up;
+		};
+	};
+
 	pcie6a_default: pcie6a-default-state {
 		clkreq-n-pins {
 			pins = "gpio153";
Signature · 1 line
2.44.2
author
#12 lore raw

PATCH 5/12 arm64: dts: qcom: x1e80100-vivobook-s15: fix PCIe4 PHY supply

In reply to Johan Hovold

The PCIe4 PHY is powered by vreg_l3i (not vreg_l3j) on the CRD reference design so assume the same applies to the Asus Vivobook S15.

Fixes d0e2f8f62dff ("arm64: dts: qcom: Add device tree for ASUS Vivobook S 15")
Signed-off-by Johan Hovold <[email protected]>
---
 arch/arm64/boot/dts/qcom/x1e80100-asus-vivobook-s15.dts | 9 ++++++++-
 1 file changed, 8 insertions(+), 1 deletion(-)
arch/arm64/boot/dts/qcom/x1e80100-asus-vivobook-s15.dts +8 -1
index 7fb980fcb307..f7337251349b 100644
@@ -278,6 +278,13 @@ regulators-6 {
 		vdd-l3-supply = <&vreg_s1f_0p7>;
 		vdd-s1-supply = <&vph_pwr>;
 		vdd-s2-supply = <&vph_pwr>;
+
+		vreg_l3i_0p8: ldo3 {
+			regulator-name = "vreg_l3i_0p8";
+			regulator-min-microvolt = <880000>;
+			regulator-max-microvolt = <920000>;
+			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+		};
 	};
 
 	regulators-7 {

@@ -427,7 +434,7 @@ &pcie4 {
 };
 
 &pcie4_phy {
-	vdda-phy-supply = <&vreg_l3j_0p8>;
+	vdda-phy-supply = <&vreg_l3i_0p8>;
 	vdda-pll-supply = <&vreg_l3e_1p2>;
 
 	status = "okay";
Signature · 1 line
2.44.2
Reviewed-by on v1 5/12
#13 lore raw

Re: [PATCH 05/12] arm64: dts: qcom: x1e80100-vivobook-s15: fix PCIe4 PHY supply

Quoted 6 lines · Johan Hovold

The PCIe4 PHY is powered by vreg_l3i (not vreg_l3j) on the CRD reference design so assume the same applies to the Asus Vivobook S15.

Fixes d0e2f8f62dff ("arm64: dts: qcom: Add device tree for ASUS Vivobook S 15")
Signed-off-by Johan Hovold <[email protected]>

---

Reviewed-by Konrad Dybcio <[email protected]>

Konrad

author
#14 lore raw

PATCH 6/12 arm64: dts: qcom: x1e80100-vivobook-s15: fix up PCIe6a pinctrl node

In reply to Johan Hovold

The PCIe6a pinctrl node appears to have been copied from the sc8280xp CRD dts (via the x1e80100 CRD dts), which has the NVMe on pcie2a.

Fix up the node name to match the x1e80100 use and label.

Signed-off-by Johan Hovold <[email protected]>
---
 arch/arm64/boot/dts/qcom/x1e80100-asus-vivobook-s15.dts | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)
arch/arm64/boot/dts/qcom/x1e80100-asus-vivobook-s15.dts +1 -1
index f7337251349b..ff51dd98351c 100644
@@ -524,7 +524,7 @@ nvme_reg_en: nvme-reg-en-state {
 		bias-disable;
 	};
 
-	pcie6a_default: pcie2a-default-state {
+	pcie6a_default: pcie6a-default-state {
 		clkreq-n-pins {
 			pins = "gpio153";
 			function = "pcie6a_clk";
Signature · 1 line
2.44.2
Reviewed-by on v1 6/12
#15 lore raw

Re: [PATCH 06/12] arm64: dts: qcom: x1e80100-vivobook-s15: fix up PCIe6a pinctrl node

Quoted 7 lines · Johan Hovold

The PCIe6a pinctrl node appears to have been copied from the sc8280xp CRD dts (via the x1e80100 CRD dts), which has the NVMe on pcie2a.

Fix up the node name to match the x1e80100 use and label.

Signed-off-by Johan Hovold <[email protected]>

---

Reviewed-by Konrad Dybcio <[email protected]>

Konrad

author
#16 lore raw

PATCH 7/12 arm64: dts: qcom: x1e80100-vivobook-s15: disable PCIe6a perst pull down

In reply to Johan Hovold

Disable the PCIe6a perst pull-down resistor to save some power.

Signed-off-by Johan Hovold <[email protected]>
---
 arch/arm64/boot/dts/qcom/x1e80100-asus-vivobook-s15.dts | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)
arch/arm64/boot/dts/qcom/x1e80100-asus-vivobook-s15.dts +1 -1
index ff51dd98351c..1eb0abcbf650 100644
@@ -536,7 +536,7 @@ perst-n-pins {
 			pins = "gpio152";
 			function = "gpio";
 			drive-strength = <2>;
-			bias-pull-down;
+			bias-disable;
 		};
 
 		wake-n-pins {
Signature · 1 line
2.44.2
author
#18 lore raw

PATCH 8/12 arm64: dts: qcom: x1e80100-vivobook-s15: fix missing PCIe4 gpios

In reply to Johan Hovold

Add the missing PCIe4 perst, wake and clkreq GPIOs and pin config.

Fixes d0e2f8f62dff ("arm64: dts: qcom: Add device tree for ASUS Vivobook S 15")
Signed-off-by Johan Hovold <[email protected]>
---
 .../dts/qcom/x1e80100-asus-vivobook-s15.dts   | 29 +++++++++++++++++++
 1 file changed, 29 insertions(+)
arch/arm64/boot/dts/qcom/x1e80100-asus-vivobook-s15.dts +29 -0
index 1eb0abcbf650..9caa14dda585 100644
@@ -430,6 +430,12 @@ &mdss_dp3_phy {
 };
 
 &pcie4 {
+	perst-gpios = <&tlmm 146 GPIO_ACTIVE_LOW>;
+	wake-gpios = <&tlmm 148 GPIO_ACTIVE_LOW>;
+
+	pinctrl-0 = <&pcie4_default>;
+	pinctrl-names = "default";
+
 	status = "okay";
 };
 

@@ -524,6 +530,29 @@ nvme_reg_en: nvme-reg-en-state {
 		bias-disable;
 	};
 
+	pcie4_default: pcie4-default-state {
+		clkreq-n-pins {
+			pins = "gpio147";
+			function = "pcie4_clk";
+			drive-strength = <2>;
+			bias-pull-up;
+		};
+
+		perst-n-pins {
+			pins = "gpio146";
+			function = "gpio";
+			drive-strength = <2>;
+			bias-disable;
+		};
+
+		wake-n-pins {
+			pins = "gpio148";
+			function = "gpio";
+			drive-strength = <2>;
+			bias-pull-up;
+		};
+	};
+
 	pcie6a_default: pcie6a-default-state {
 		clkreq-n-pins {
 			pins = "gpio153";
Signature · 1 line
2.44.2
author
#20 lore raw

PATCH 9/12 arm64: dts: qcom: x1e80100-yoga-slim7x: fix PCIe4 PHY supply

In reply to Johan Hovold

The PCIe4 PHY is powered by vreg_l3i (not vreg_l3j) on the CRD reference design so assume the same applies to the Lenovo Yoga Slim 7x.

Fixes 45247fe17db2 ("arm64: dts: qcom: x1e80100: add Lenovo Thinkpad Yoga slim 7x devicetree")
Signed-off-by Johan Hovold <[email protected]>
---
 arch/arm64/boot/dts/qcom/x1e80100-lenovo-yoga-slim7x.dts | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)
arch/arm64/boot/dts/qcom/x1e80100-lenovo-yoga-slim7x.dts +1 -1
index fbff558f5b07..0aeead5658ec 100644
@@ -629,7 +629,7 @@ &pcie4 {
 };
 
 &pcie4_phy {
-	vdda-phy-supply = <&vreg_l3j_0p8>;
+	vdda-phy-supply = <&vreg_l3i_0p8>;
 	vdda-pll-supply = <&vreg_l3e_1p2>;
 
 	status = "okay";
Signature · 1 line
2.44.2
Reviewed-by on v1 9/12
#21 lore raw

Re: [PATCH 09/12] arm64: dts: qcom: x1e80100-yoga-slim7x: fix PCIe4 PHY supply

Quoted 6 lines · Johan Hovold

The PCIe4 PHY is powered by vreg_l3i (not vreg_l3j) on the CRD reference design so assume the same applies to the Lenovo Yoga Slim 7x.

Fixes 45247fe17db2 ("arm64: dts: qcom: x1e80100: add Lenovo Thinkpad Yoga slim 7x devicetree")
Signed-off-by Johan Hovold <[email protected]>

---

Reviewed-by Konrad Dybcio <[email protected]>

Konrad

author
#22 lore raw

PATCH 10/12 arm64: dts: qcom: x1e80100-yoga-slim7x: fix up PCIe6a pinctrl node

In reply to Johan Hovold

The PCIe6a pinctrl node appears to have been copied from the sc8280xp CRD dts (via the x1e80100 CRD dts), which has the NVMe on pcie2a and uses some funny indentation.

Fix up the node name to match the x1e80100 use and label and use only tabs for indentation.

Signed-off-by Johan Hovold <[email protected]>
---
 .../boot/dts/qcom/x1e80100-lenovo-yoga-slim7x.dts    | 12 ++++++------
 1 file changed, 6 insertions(+), 6 deletions(-)
arch/arm64/boot/dts/qcom/x1e80100-lenovo-yoga-slim7x.dts +6 -6
index 0aeead5658ec..dde2957e6dc7 100644
@@ -782,7 +782,7 @@ nvme_reg_en: nvme-reg-en-state {
 		bias-disable;
 	};
 
-	pcie6a_default: pcie2a-default-state {
+	pcie6a_default: pcie6a-default-state {
 		clkreq-n-pins {
 			pins = "gpio153";
 			function = "pcie6a_clk";

@@ -798,11 +798,11 @@ perst-n-pins {
 		};
 
 		wake-n-pins {
-		       pins = "gpio154";
-		       function = "gpio";
-		       drive-strength = <2>;
-		       bias-pull-up;
-	       };
+			pins = "gpio154";
+			function = "gpio";
+			drive-strength = <2>;
+			bias-pull-up;
+		};
 	};
 
 	tpad_default: tpad-default-state {
Signature · 1 line
2.44.2
Reviewed-by on v1 10/12
#23 lore raw

Re: [PATCH 10/12] arm64: dts: qcom: x1e80100-yoga-slim7x: fix up PCIe6a pinctrl node

Quoted 9 lines · Johan Hovold

The PCIe6a pinctrl node appears to have been copied from the sc8280xp CRD dts (via the x1e80100 CRD dts), which has the NVMe on pcie2a and uses some funny indentation.

Fix up the node name to match the x1e80100 use and label and use only tabs for indentation.

Signed-off-by Johan Hovold <[email protected]>

---

Reviewed-by Konrad Dybcio <[email protected]>

Konrad

author
#24 lore raw

PATCH 11/12 arm64: dts: qcom: x1e80100-yoga-slim7x: disable PCIe6a perst pull down

In reply to Johan Hovold

Disable the PCIe6a perst pull-down resistor to save some power.

Signed-off-by Johan Hovold <[email protected]>
---
 arch/arm64/boot/dts/qcom/x1e80100-lenovo-yoga-slim7x.dts | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)
arch/arm64/boot/dts/qcom/x1e80100-lenovo-yoga-slim7x.dts +1 -1
index dde2957e6dc7..f7534623ff77 100644
@@ -794,7 +794,7 @@ perst-n-pins {
 			pins = "gpio152";
 			function = "gpio";
 			drive-strength = <2>;
-			bias-pull-down;
+			bias-disable;
 		};
 
 		wake-n-pins {
Signature · 1 line
2.44.2
author
#26 lore raw

PATCH 12/12 arm64: dts: qcom: x1e80100-yoga-slim7x: fix missing PCIe4 gpios

In reply to Johan Hovold

Add the missing PCIe4 perst, wake and clkreq GPIOs and pin config.

Fixes 45247fe17db2 ("arm64: dts: qcom: x1e80100: add Lenovo Thinkpad Yoga slim 7x devicetree")
Signed-off-by Johan Hovold <[email protected]>
---
 .../dts/qcom/x1e80100-lenovo-yoga-slim7x.dts  | 29 +++++++++++++++++++
 1 file changed, 29 insertions(+)
arch/arm64/boot/dts/qcom/x1e80100-lenovo-yoga-slim7x.dts +29 -0
index f7534623ff77..79fbc5444312 100644
@@ -625,6 +625,12 @@ &mdss_dp3_phy {
 };
 
 &pcie4 {
+	perst-gpios = <&tlmm 146 GPIO_ACTIVE_LOW>;
+	wake-gpios = <&tlmm 148 GPIO_ACTIVE_LOW>;
+
+	pinctrl-0 = <&pcie4_default>;
+	pinctrl-names = "default";
+
 	status = "okay";
 };
 

@@ -782,6 +788,29 @@ nvme_reg_en: nvme-reg-en-state {
 		bias-disable;
 	};
 
+	pcie4_default: pcie4-default-state {
+		clkreq-n-pins {
+			pins = "gpio147";
+			function = "pcie4_clk";
+			drive-strength = <2>;
+			bias-pull-up;
+		};
+
+		perst-n-pins {
+			pins = "gpio146";
+			function = "gpio";
+			drive-strength = <2>;
+			bias-disable;
+		};
+
+		wake-n-pins {
+			pins = "gpio148";
+			function = "gpio";
+			drive-strength = <2>;
+			bias-pull-up;
+		};
+	};
+
 	pcie6a_default: pcie6a-default-state {
 		clkreq-n-pins {
 			pins = "gpio153";
Signature · 1 line
2.44.2
maintainer Applied
#28 lore raw
In reply to Johan Hovold
Quoted 9 lines · Johan Hovold

Here's a follow-up series addressing some issues in the QCP, Vivobook and Yoga devicetrees that had been carried over from the x1e80100 CRD dts.

Note that I don't have access to the schematics for these machine so this is based on the qualified assumption that the PHY supplies are the same as on the reference design (and similarly for the PCIe4 pins).

[...]

Applied, thanks!

[01/12] arm64: dts: qcom: x1e80100-qcp: fix PCIe4 PHY supply

        commit: 708950ab17453dbb1dc7067d1a70991be2efeded
[02/12] arm64: dts: qcom: x1e80100-qcp: fix up PCIe6a pinctrl node
        commit: ed2e81940e00872202f904846d051a384c50c9a1
[03/12] arm64: dts: qcom: x1e80100-qcp: disable PCIe6a perst pull down
        commit: 71f041f7a48b0631a0f069e97e230602fd896de5
[04/12] arm64: dts: qcom: x1e80100-qcp: fix missing PCIe4 gpios
        commit: 489a6e1500edc599fe320858ed664c4f1d08aba2
[05/12] arm64: dts: qcom: x1e80100-vivobook-s15: fix PCIe4 PHY supply
        commit: 5192a0a3d6953f59b754fa4085d0cd488a3dadcf
[06/12] arm64: dts: qcom: x1e80100-vivobook-s15: fix up PCIe6a pinctrl node
        commit: 2ba2614634017847eb622fd25091e3946b17dd97
[07/12] arm64: dts: qcom: x1e80100-vivobook-s15: disable PCIe6a perst pull down
        commit: 2d497a3fad55fd23e2e0d35608b897b825138c4f
[08/12] arm64: dts: qcom: x1e80100-vivobook-s15: fix missing PCIe4 gpios
        commit: 4a8e704c50d3abb6c04848fd869aa6701dc8ba81
[09/12] arm64: dts: qcom: x1e80100-yoga-slim7x: fix PCIe4 PHY supply
        commit: 28e3e1efe9c6319aa39cbe3431a8aeb3992d0a10
[10/12] arm64: dts: qcom: x1e80100-yoga-slim7x: fix up PCIe6a pinctrl node
        commit: 9dd42d3c2a0a0a354b20a87d5dd2049d24186c07
[11/12] arm64: dts: qcom: x1e80100-yoga-slim7x: disable PCIe6a perst pull down
        commit: dfbe556c0121db6de6503501c469cc97b5a76827
[12/12] arm64: dts: qcom: x1e80100-yoga-slim7x: fix missing PCIe4 gpios
        commit: 9a882c4f536782fd7431142edc01c4b921e5612a

Best regards,

Signature · 1 line
Bjorn Andersson <[email protected]>
maintainer Applied
#29 lore raw
In reply to Johan Hovold
Quoted 9 lines · Johan Hovold

Here's a follow-up series addressing some issues in the QCP, Vivobook and Yoga devicetrees that had been carried over from the x1e80100 CRD dts.

Note that I don't have access to the schematics for these machine so this is based on the qualified assumption that the PHY supplies are the same as on the reference design (and similarly for the PCIe4 pins).

[...]

Applied, thanks!

[01/12] arm64: dts: qcom: x1e80100-qcp: fix PCIe4 PHY supply

        commit: f03dd49f884f428ba71efe23383ff842f4f15e0e
[02/12] arm64: dts: qcom: x1e80100-qcp: fix up PCIe6a pinctrl node
        commit: 0aab6eaac72ac140dfc5e0a38bf3178497762e43
[03/12] arm64: dts: qcom: x1e80100-qcp: disable PCIe6a perst pull down
        commit: 12661b333374c892f9053261b4bceb346a709ea4
[04/12] arm64: dts: qcom: x1e80100-qcp: fix missing PCIe4 gpios
        commit: 2ac90e4d2b6d6823ca10642ef39595ff1181c3fa
[05/12] arm64: dts: qcom: x1e80100-vivobook-s15: fix PCIe4 PHY supply
        commit: e89fe0596c62363082cabbaa5ccb38989e714e68
[06/12] arm64: dts: qcom: x1e80100-vivobook-s15: fix up PCIe6a pinctrl node
        commit: c67b3dfd8d69164f70ab3aaff889fca1e536c909
[07/12] arm64: dts: qcom: x1e80100-vivobook-s15: disable PCIe6a perst pull down
        commit: d7ff5d1868d1cfd1c06a601a7cfa2dbb6dba4be9
[08/12] arm64: dts: qcom: x1e80100-vivobook-s15: fix missing PCIe4 gpios
        commit: e7f3f3cbbfef84729ad6c10eb589957e7b28b95a
[09/12] arm64: dts: qcom: x1e80100-yoga-slim7x: fix PCIe4 PHY supply
        commit: b90567c262fc3a3e703f3091499dec799a6147ab
[10/12] arm64: dts: qcom: x1e80100-yoga-slim7x: fix up PCIe6a pinctrl node
        commit: a655dacf2a35a35eadd95f0ba8fe9cf70359eeb9
[11/12] arm64: dts: qcom: x1e80100-yoga-slim7x: disable PCIe6a perst pull down
        commit: 750b8a3b5a4476cf000f3db1fe46293c97fcd979
[12/12] arm64: dts: qcom: x1e80100-yoga-slim7x: fix missing PCIe4 gpios
        commit: 86c71c0e893d58447e4a9e5c0d1c2c0f89c1b9e1

Best regards,

Signature · 1 line
Bjorn Andersson <[email protected]>