iio: adc: Add support for AD4170 series of ADCs
Subsystems (4)
v5 cover iio: adc: Add support for AD4170 series of ADCs
Hello,
This is version 5 of AD4170 support patch set.
Not many changes from v4 to v5 and not waiting as long between the previous and this new version so, keeping both change logs below.
Thank you to all reviewers.
This patch set adds support for Analog Devices AD4170 and similar sigma-delta ADCs.
Patch 1 adds device tree documentation for the parts.
Patch 2 adds basic device support.
Patch 3 adds support for calibration scale.
Patch 4 adds support for calibration bias.
Patch 5 adds support for sample frequency along with filter type configuration. Patch 6 adds support for buffered ADC reading.
Patch 7 adds clock provider support
Patch 8 adds GPIO controller support.
Patch 9 adds internal temperature sensor support.
Patch 10 adds support for external RTD and bridge circuit sensors. Patch 11 adds timestamp channel
Change log v4 -> v5
[device tree changes]
- Dropped interrupt maxItems constraint.
- Spelled out RC acronym in reference-buffer description.
- Require to specify interrupt-names when using interrupts.
- Added interrupt-names to the examples.
- Made adi,excitation-pin properties identical to adi,ad4130.
- Removed interrupt-parent props from the examples.
[Basic driver patch]
- Dropped 'ret' variable set but not used, warned by 0-day test bot.
- Rephrased comment about static_assert to clarify the reason for it's usage.
- Added missing includes.
- Did a few minor code readability improvements, complying with review suggestions.
[Calibration scale/gain patch]
- Squeezed info_mask_separate additions to reduce change diff.
[External sensor patch]
- Tweaked commits/patches to reduce diff.
- Dropped unneeded local variable.
Change log v3 -> v4
[device tree changes]
- Dropped sensor-node and most of defs.
- Updated external sensor props to have similar name and type of adi,ad4130 ones.
- Added constraints for properties for related to external bridge sensor excitation.
[General IIO driver changes]
- Locked device mutex to ensure attribute read correctness on all archs
- Fixed typo unasigned -> unassigned
[Basic driver patch]
- Added previously missing #include <linux/cleanup.h>.
- Moved struct completion declaration to reduce commit diff.
[Calibration scale/gain patch]
[Calibration bias/offset patch]
- No longer restoring calib gain or calib offset on reg write fail.
[Digital filter and sample frequency config patch]
- Use scoped_guard to ensure correct lock release order in ad4170_set_filter_type().
[Buffer support patch]
- Fixed a bug in the filling of the IIO device buffer.
[CLOCK provider patch]
- Explicitly stated that clock divider (CLKDIV) control support is not provided.
- Skipped clock provider register if "#clock-cells" is not present.
[GPIO controller patch]
- Made AD4170 depend on GPIOLIB.
[External sensor patch]
- Update to string adi,sensor-type dt property.
- Adapted external sensor dt prop parsing to work with the updated version of those props.
[New patch - Add timestamp channel]
Link to v4: https://lore.kernel.org/linux-iio/[email protected]/
Link to v3: https://lore.kernel.org/linux-iio/[email protected]/
Link to v2: https://lore.kernel.org/linux-iio/[email protected]/
Link to v1: https://lore.kernel.org/linux-iio/[email protected]/
Ana-Maria Cusco (1):
iio: adc: Add basic support for AD4170
Marcelo Schmitt (10):
dt-bindings: iio: adc: Add AD4170
iio: adc: ad4170: Add support for calibration gain
iio: adc: ad4170: Add support for calibration bias
iio: adc: ad4170: Add digital filter and sample frequency config
support
iio: adc: ad4170: Add support for buffered data capture
iio: adc: ad4170: Add clock provider support
iio: adc: ad4170: Add GPIO controller support
iio: adc: ad4170: Add support for internal temperature sensor
iio: adc: ad4170: Add support for weigh scale and RTD sensors
iio: adc: ad4170: Add timestamp channel
.../bindings/iio/adc/adi,ad4170.yaml | 564 ++++ MAINTAINERS | 8 + drivers/iio/adc/Kconfig | 16 + drivers/iio/adc/Makefile | 1 + drivers/iio/adc/ad4170.c | 2975 +++++++++++++++++ 5 files changed, 3564 insertions(+) create mode 100644 Documentation/devicetree/bindings/iio/adc/adi,ad4170.yaml create mode 100644 drivers/iio/adc/ad4170.c
base-commit: 4c6073fec2fee4827fa0dd8a4ab4e6f7bbc05ee6
Signature · 1 line
2.47.2
PATCH v5 1/11 dt-bindings: iio: adc: Add AD4170
Add device tree documentation for AD4170 and similar sigma-delta ADCs. The AD4170 is a 24-bit, multichannel, sigma-delta ADC.
---
Change log v4 -> v5
- Dropped interrupt maxItems constraint.
- Spelled out RC acronym in reference-buffer description.
- Require to specify interrupt-names when using interrupts.
- Added interrupt-names to the examples.
- Made adi,excitation-pin properties identical to adi,ad4130.
- Removed interrupt-parent props from the examples.
Proposing new types and ways of describing hardware for weigh scale load cells and related sensors external to ADCs can lead to potential better description of how those components connect to the ADC. However, we must use what already exists for properties documenting features that are the same across different devices.
Maybe, we could use generic defs to define adi,excitation-current-n-microamp and adi,excitation-pin and avoid repetition with those. Though, that triggers a dt_binding_check warning. Also, having mixed notation (some prop declarations using defines and others not) seems to not be desirable.
It looks like the only option left is making adi,excitation-pin properties identical to adi,ad4130.
On one hand, dropping adi,excitation-pin defs and making those properties identical to adi,ad4130 preserves their syntax and semantics accross dt-bindings. OTOH, we end up with more text repetition in the doc.
.../bindings/iio/adc/adi,ad4170.yaml | 564 ++++++++++++++++++ MAINTAINERS | 7 + 2 files changed, 571 insertions(+) create mode 100644 Documentation/devicetree/bindings/iio/adc/adi,ad4170.yaml
Documentation/devicetree/bindings/iio/adc/adi,ad4170.yaml new file +564 -0
@@ -0,0 +1,564 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/iio/adc/adi,ad4170.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Analog Devices AD4170 and similar Analog to Digital Converters + +maintainers: + - Marcelo Schmitt <[email protected]> + +description: | + Analog Devices AD4170 series of Sigma-delta Analog to Digital Converters. + Specifications can be found at: + https://www.analog.com/media/en/technical-documentation/data-sheets/ad4170-4.pdf + https://www.analog.com/media/en/technical-documentation/data-sheets/ad4190-4.pdf + https://www.analog.com/media/en/technical-documentation/data-sheets/ad4195-4.pdf + +$ref: /schemas/spi/spi-peripheral-props.yaml# + +$defs: + reference-buffer: + description: | + Enable precharge buffer, full buffer, or skip reference buffering of + the positive/negative voltage reference. Because the output impedance + of the source driving the voltage reference inputs may be dynamic, + resistive/capacitive combinations of those inputs can cause DC gain + errors if the reference inputs go unbuffered into the ADC. Enable + reference buffering if the provided reference source has dynamic high + impedance output. Note the absolute voltage allowed on REFINn+ and REFINn- + inputs is from AVSS - 50 mV to AVDD + 50 mV when the reference buffers are + disabled but narrows to AVSS to AVDD when reference buffering is enabled + or in precharge mode. The valid options for this property are: + 0: Reference precharge buffer. + 1: Full reference buffering. + 2: Bypass reference buffers (buffering disabled). + $ref: /schemas/types.yaml#/definitions/uint32 + enum: [0, 1, 2] + default: 1 + +properties: + compatible: + enum: + - adi,ad4170 + - adi,ad4190 + - adi,ad4195 + + avss-supply: + description: + Reference voltage supply for AVSS. If provided, describes the magnitude + (absolute value) of the negative voltage supplied to the AVSS pin. Since + AVSS must be −2.625V minimum and 0V maximum, the declared supply voltage + must be between 0 and 2.65V. If not provided, AVSS is assumed to be at + system ground (0V). + + avdd-supply: + description: + A supply of 4.75V to 5.25V relative to AVSS that powers the chip (AVDD). + + iovdd-supply: + description: 1.7V to 5.25V reference supply to the serial interface (IOVDD). + + refin1p-supply: + description: REFIN+ supply that can be used as reference for conversion. + + refin1n-supply: + description: REFIN- supply that can be used as reference for conversion. If + provided, describes the magnitude (absolute value) of the negative voltage + supplied to the REFIN- pin. + + refin2p-supply: + description: REFIN2+ supply that can be used as reference for conversion. + + refin2n-supply: + description: REFIN2- supply that can be used as reference for conversion. If + provided, describes the magnitude (absolute value) of the negative voltage + supplied to the REFIN2- pin. + + spi-cpol: true + + spi-cpha: true + + interrupts: + description: + Interrupt for signaling the completion of conversion results. The data + ready signal (RDY) used as interrupt is by default provided on the SDO + pin. Alternatively, it can be provided on the DIG_AUX1 pin in which case + the chip disables the RDY function on SDO. Thus, there can be only one + data ready interrupt enabled at a time. + + interrupt-names: + description: + Specify which pin should be configured as Data Ready interrupt. + enum: + - sdo + - dig_aux1 + + clocks: + maxItems: 1 + description: + Optional external clock source. Can specify either an external clock or + external crystal. + + clock-names: + enum: + - ext-clk + - xtal + default: ext-clk + + '#clock-cells': + const: 0 + + clock-output-names: + maxItems: 1 + + gpio-controller: true + + "#gpio-cells": + const: 2 + description: | + The first cell is for the GPIO number: 0 to 3. + The second cell takes standard GPIO flags. + + ldac-gpios: + description: + GPIO connected to DIG_AUX2 pin to be used as LDAC toggle to control the + transfer of data from the DAC_INPUT_A register to the DAC. + maxItems: 1 + + '#address-cells': + const: 1 + + '#size-cells': + const: 0 + + adi,vbias-pins: + description: Analog inputs to apply a voltage bias of (AVDD − AVSS) / 2 to. + $ref: /schemas/types.yaml#/definitions/uint32-array + minItems: 1 + maxItems: 9 + items: + minimum: 0 + maximum: 8 + +allOf: + # Some devices don't have integrated DAC + - if: + properties: + compatible: + contains: + enum: + - adi,ad4190 + - adi,ad4195 + then: + properties: + ldac-gpios: false + + # Require to specify the interrupt pin when using interrupts + - if: + required: + - interrupts + then: + required: + - interrupt-names + + # If an external clock is set, the internal clock cannot go out and vice versa + - oneOf: + - required: [clocks] + properties: + '#clock-cells': false + - required: ['#clock-cells'] + properties: + clocks: false + +patternProperties: + "^channel@[0-9a-f]$": + $ref: /schemas/iio/adc/adc.yaml# + unevaluatedProperties: false + description: + Represents the external channels which are connected to the ADC. + + properties: + reg: + description: + The channel number. + minimum: 0 + maximum: 15 + + diff-channels: + description: | + This property is used for defining the inputs of a differential + voltage channel. The first value is the positive input and the second + value is the negative input of the channel. + + Besides the analog input pins AIN0 to AIN8, there are special inputs + that can be selected with the following values: + 17: Internal temperature sensor + 18: (AVDD-AVSS)/5 + 19: (IOVDD-DGND)/5 + 20: DAC output + 21: ALDO + 22: DLDO + 23: AVSS + 24: DGND + 25: REFIN+ + 26: REFIN- + 27: REFIN2+ + 28: REFIN2- + 29: REFOUT + For the internal temperature sensor, use the input number for both + inputs (i.e. diff-channels = <17 17>). + items: + enum: [0, 1, 2, 3, 4, 5, 6, 7, 8, 17, 18, 19, 20, 21, 22, 23, 24, 25, + 26, 27, 28, 29] + + adi,reference-select: + description: | + Select the reference source to use when converting on the + specific channel. Valid values are: + 0: REFIN+/REFIN- + 1: REFIN2+/REFIN2− + 2: REFOUT/AVSS (internal reference) + 3: AVDD/AVSS + If not specified, REFOUT/AVSS is used. + $ref: /schemas/types.yaml#/definitions/uint32 + enum: [0, 1, 2, 3] + default: 1 + + adi,positive-reference-buffer: + $ref: '#/$defs/reference-buffer' + + adi,negative-reference-buffer: + $ref: '#/$defs/reference-buffer' + + adi,sensor-type: + description: + The AD4170 and similar designs have features to aid interfacing with + load cell weigh scale, RTD, and thermocouple sensors. Each of those + sensor types requires either distinct wiring configuration or + external circuitry for proper sensor operation and can use different + ADC chip functionality on their setups. A key characteristic of those + external sensors is that they must be excited either by voltage supply + or by ADC chip excitation signals. The sensor can then be read through + a pair of analog inputs. This property specifies which particular + sensor type is connected to the ADC so it can be properly setup and + handled. Omit this property for conventional (not weigh scale, RTD, or + thermocouple) ADC channel setups. + $ref: /schemas/types.yaml#/definitions/string + enum: [ weighscale, rtd, thermocouple ] + + adi,excitation-pin-0: + description: + Analog input to apply excitation current to while the channel + is active. + $ref: /schemas/types.yaml#/definitions/uint32 + minimum: 0 + maximum: 20 + default: 0 + + adi,excitation-pin-1: + description: + Analog input to apply excitation current to while the channel + is active. + $ref: /schemas/types.yaml#/definitions/uint32 + minimum: 0 + maximum: 20 + default: 0 + + adi,excitation-pin-2: + description: + Analog input to apply excitation current to while the channel + is active. + $ref: /schemas/types.yaml#/definitions/uint32 + minimum: 0 + maximum: 20 + default: 0 + + adi,excitation-pin-3: + description: + Analog input to apply excitation current to while the channel + is active. + $ref: /schemas/types.yaml#/definitions/uint32 + minimum: 0 + maximum: 20 + default: 0 + + adi,excitation-current-0-microamp: + description: + Excitation current in microamperes to be applied to pin specified in + adi,excitation-pin-0 while this channel is active. + enum: [0, 10, 50, 100, 250, 500, 1000, 1500] + default: 0 + + adi,excitation-current-1-microamp: + description: + Excitation current in microamperes to be applied to pin specified in + adi,excitation-pin-1 while this channel is active. + enum: [0, 10, 50, 100, 250, 500, 1000, 1500] + default: 0 + + adi,excitation-current-2-microamp: + description: + Excitation current in microamperes to be applied to pin specified in + adi,excitation-pin-2 while this channel is active. + enum: [0, 10, 50, 100, 250, 500, 1000, 1500] + default: 0 + + adi,excitation-current-3-microamp: + description: + Excitation current in microamperes to be applied to pin specified in + adi,excitation-pin-3 while this channel is active. + enum: [0, 10, 50, 100, 250, 500, 1000, 1500] + default: 0 + + adi,excitation-ac: + type: boolean + description: + Whether the external sensor has to be AC or DC excited. When omitted, + it is DC excited. + + allOf: + - oneOf: + - required: [single-channel, common-mode-channel] + properties: + diff-channels: false + - required: [diff-channels] + properties: + single-channel: false + common-mode-channel: false + # Usual ADC channels don't need external circuitry excitation. + - if: + not: + required: + - adi,sensor-type + then: + properties: + adi,excitation-pin-0: false + adi,excitation-pin-1: false + adi,excitation-pin-2: false + adi,excitation-pin-3: false + adi,excitation-current-0-microamp: false + adi,excitation-current-1-microamp: false + adi,excitation-current-2-microamp: false + adi,excitation-current-3-microamp: false + adi,excitation-ac: false + # Weigh scale bridge AC excited with one pair of predefined signals. + - if: + allOf: + - properties: + adi,sensor-type: + contains: + const: weighscale + - required: + - adi,excitation-ac + - adi,excitation-pin-2 + - adi,excitation-pin-3 + - not: + required: + - adi,excitation-current-2-microamp + - adi,excitation-current-3-microamp + then: + properties: + adi,excitation-pin-2: + const: 19 + adi,excitation-pin-3: + const: 20 + # Weigh scale bridge AC excited with two pairs of predefined signals. + - if: + allOf: + - properties: + adi,sensor-type: + contains: + const: weighscale + - required: + - adi,excitation-ac + - adi,excitation-pin-0 + - adi,excitation-pin-1 + - adi,excitation-pin-2 + - adi,excitation-pin-3 + - not: + required: + - adi,excitation-current-0-microamp + - adi,excitation-current-1-microamp + - adi,excitation-current-2-microamp + - adi,excitation-current-3-microamp + then: + properties: + adi,excitation-pin-0: + const: 17 + adi,excitation-pin-1: + const: 18 + adi,excitation-pin-2: + const: 19 + adi,excitation-pin-3: + const: 20 + +required: + - compatible + - reg + - avdd-supply + - iovdd-supply + - spi-cpol + - spi-cpha + +unevaluatedProperties: false + +examples: + - | + #include <dt-bindings/interrupt-controller/irq.h> + spi { + #address-cells = <1>; + #size-cells = <0>; + + adc@0 { + compatible = "adi,ad4170"; + reg = <0>; + spi-max-frequency = <20000000>; + spi-cpol; + spi-cpha; + avdd-supply = <&avdd>; + iovdd-supply = <&iovdd>; + clocks = <&clk>; + clock-names = "xtal"; + interrupts = <0 IRQ_TYPE_EDGE_FALLING>; + interrupt-names = "dig_aux1"; + adi,vbias-pins = <7>; + #address-cells = <1>; + #size-cells = <0>; + + // Sample AIN0 with respect to DGND throughout AVDD/DGND input range + // Pseudo-differential unipolar + channel@0 { + reg = <0>; + single-channel = <0>; + common-mode-channel = <24>; + adi,reference-select = <3>; + }; + // Weigh scale sensor + channel@1 { + reg = <1>; + bipolar; + diff-channels = <1 2>; + adi,reference-select = <0>; + adi,positive-reference-buffer = <0>; + adi,negative-reference-buffer = <0>; + adi,sensor-type = "weighscale"; + adi,excitation-pin-2 = <19>; + adi,excitation-pin-3 = <20>; + adi,excitation-ac; + }; + // RTD sensor + channel@2 { + reg = <2>; + bipolar; + diff-channels = <3 4>; + adi,reference-select = <0>; + adi,sensor-type = "rtd"; + adi,excitation-pin-0 = <5>; + adi,excitation-pin-1 = <6>; + adi,excitation-current-0-microamp = <500>; + adi,excitation-current-1-microamp = <500>; + adi,excitation-ac; + }; + // Thermocouple sensor + channel@3 { + reg = <3>; + bipolar; + diff-channels = <7 8>; + adi,reference-select = <0>; + adi,sensor-type = "thermocouple"; + adi,excitation-pin-0 = <18>; + adi,excitation-current-0-microamp = <500>; + }; + }; + }; + - | + #include <dt-bindings/interrupt-controller/irq.h> + spi { + #address-cells = <1>; + #size-cells = <0>; + + adc@0 { + compatible = "adi,ad4170"; + reg = <0>; + spi-max-frequency = <20000000>; + spi-cpol; + spi-cpha; + avdd-supply = <&avdd>; + iovdd-supply = <&iovdd>; + #clock-cells = <0>; + clock-output-names = "ad4170-clk16mhz"; + interrupts = <0 IRQ_TYPE_EDGE_FALLING>; + interrupt-names = "dig_aux1"; + #address-cells = <1>; + #size-cells = <0>; + + // Sample AIN0 with respect to AIN1 throughout AVDD/AVSS input range + // Differential bipolar. If AVSS < 0V, differential true bipolar + channel@0 { + reg = <0>; + bipolar; + diff-channels = <0 1>; + adi,reference-select = <3>; + }; + // Sample AIN2 with respect to DGND throughout AVDD/DGND input range + // Pseudo-differential unipolar + channel@1 { + reg = <1>; + single-channel = <2>; + common-mode-channel = <24>; + adi,reference-select = <3>; + }; + // Sample AIN3 with respect to 2.5V throughout AVDD/AVSS input range + // Pseudo-differential bipolar + channel@2 { + reg = <2>; + bipolar; + single-channel = <3>; + common-mode-channel = <29>; + adi,reference-select = <3>; + }; + // Sample AIN4 with respect to DGND throughout AVDD/AVSS input range + // Pseudo-differential bipolar + channel@3 { + reg = <3>; + bipolar; + single-channel = <4>; + common-mode-channel = <24>; + adi,reference-select = <3>; + }; + // Sample AIN5 with respect to 2.5V throughout AVDD/AVSS input range + // Pseudo-differential unipolar (AD4170 datasheet page 46 example) + channel@4 { + reg = <4>; + single-channel = <5>; + common-mode-channel = <29>; + adi,reference-select = <3>; + }; + // Sample AIN6 with respect to 2.5V throughout REFIN+/REFIN- input range + // Pseudo-differential bipolar + channel@5 { + reg = <5>; + bipolar; + single-channel = <6>; + common-mode-channel = <29>; + adi,reference-select = <0>; + }; + // Weigh scale sensor + channel@6 { + reg = <6>; + bipolar; + diff-channels = <7 8>; + adi,reference-select = <0>; + adi,sensor-type = "weighscale"; + adi,excitation-pin-0 = <17>; + adi,excitation-pin-1 = <18>; + adi,excitation-pin-2 = <19>; + adi,excitation-pin-3 = <20>; + adi,excitation-ac; + }; + }; + }; +... +
MAINTAINERS +7 -0
@@ -1392,6 +1392,13 @@ F: Documentation/ABI/testing/sysfs-bus-iio-adc-ad4130 F: Documentation/devicetree/bindings/iio/adc/adi,ad4130.yaml F: drivers/iio/adc/ad4130.c +ANALOG DEVICES INC AD4170 DRIVER +M: Marcelo Schmitt <[email protected]> +L: [email protected] +S: Supported +W: https://ez.analog.com/linux-software-drivers +F: Documentation/devicetree/bindings/iio/adc/adi,ad4170.yaml + ANALOG DEVICES INC AD4695 DRIVER M: Michael Hennerich <[email protected]> M: Nuno Sá <[email protected]>
Signature · 1 line
2.47.2
Re: [PATCH v5 01/11] dt-bindings: iio: adc: Add AD4170
Quoted 72 lines · Marcelo Schmitt
Add device tree documentation for AD4170 and similar sigma-delta ADCs. The AD4170 is a 24-bit, multichannel, sigma-delta ADC.
Signed-off-by Marcelo Schmitt <[email protected]>---
Change log v4 -> v5
- Dropped interrupt maxItems constraint.
- Spelled out RC acronym in reference-buffer description.
- Require to specify interrupt-names when using interrupts.
- Added interrupt-names to the examples.
- Made adi,excitation-pin properties identical to adi,ad4130.
- Removed interrupt-parent props from the examples.Proposing new types and ways of describing hardware for weigh scale load cells and related sensors external to ADCs can lead to potential better description of how those components connect to the ADC. However, we must use what already exists for properties documenting features that are the same across different devices.
Maybe, we could use generic defs to define adi,excitation-current-n-microamp and adi,excitation-pin and avoid repetition with those. Though, that triggers a
dt_binding_checkwarning. Also, having mixed notation (some prop declarations using defines and others not) seems to not be desirable.It looks like the only option left is making adi,excitation-pin properties identical to adi,ad4130.
On one hand, dropping adi,excitation-pin defs and making those properties identical to adi,ad4130 preserves their syntax and semantics accross dt-bindings. OTOH, we end up with more text repetition in the doc.
.../bindings/iio/adc/adi,ad4170.yaml | 564 ++++++++++++++++++ MAINTAINERS | 7 + 2 files changed, 571 insertions(+) create mode 100644 Documentation/devicetree/bindings/iio/adc/adi,ad4170.yamlDocumentation/devicetree/bindings/iio/adc/adi,ad4170.yaml new file +29
-0@@ -0,0 +1,564 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/iio/adc/adi,ad4170.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Analog Devices AD4170 and similar Analog to Digital Converters + +maintainers: + - Marcelo Schmitt <[email protected]> + +description: | + Analog Devices AD4170 series of Sigma-delta Analog to Digital Converters. + Specifications can be found at: + https://www.analog.com/media/en/technical-documentation/data-sheets/ad4170-4.pdf + https://www.analog.com/media/en/technical-documentation/data-sheets/ad4190-4.pdf + https://www.analog.com/media/en/technical-documentation/data-sheets/ad4195-4.pdf + +$ref: /schemas/spi/spi-peripheral-props.yaml# + +$defs: + reference-buffer: + description: | + Enable precharge buffer, full buffer, or skip reference buffering of + the positive/negative voltage reference. Because the output impedance + of the source driving the voltage reference inputs may be dynamic, + resistive/capacitive combinations of those inputs can cause DC gain + errors if the reference inputs go unbuffered into the ADC. Enable + reference buffering if the provided reference source has dynamic high
Documentation/devicetree/bindings/iio/adc/adi,ad4170.yaml line 39
Quoted 10 lines
Documentation/devicetree/bindings/iio/adc/adi,ad4170.yaml new file +10
-0+ impedance output. Note the absolute voltage allowed on REFINn+ and REFINn- + inputs is from AVSS - 50 mV to AVDD + 50 mV when the reference buffers are + disabled but narrows to AVSS to AVDD when reference buffering is enabled + or in precharge mode. The valid options for this property are: + 0: Reference precharge buffer. + 1: Full reference buffering. + 2: Bypass reference buffers (buffering disabled). + $ref: /schemas/types.yaml#/definitions/uint32 + enum: [0, 1, 2] + default: 1
Why make this property a uint32, rather than a string where you can use something like "precharge", "full" and "bypass" (or "disabled")? The next similar device could use something slightly different then the binding becomes pretty clunky.
Can you explain why this is a dt property rather than something adjustable at runtime?
Otherwise, what you have here looks sane enough to me - but I'd like to see some comments from Jonathan or David etc about your approach to the excitation properties.
Cheers,
Conor.
Quoted 546 lines
Documentation/devicetree/bindings/iio/adc/adi,ad4170.yaml new file +525
-0+ +properties: + compatible: + enum: + - adi,ad4170 + - adi,ad4190 + - adi,ad4195 + + avss-supply: + description: + Reference voltage supply for AVSS. If provided, describes the magnitude + (absolute value) of the negative voltage supplied to the AVSS pin. Since + AVSS must be −2.625V minimum and 0V maximum, the declared supply voltage + must be between 0 and 2.65V. If not provided, AVSS is assumed to be at + system ground (0V). + + avdd-supply: + description: + A supply of 4.75V to 5.25V relative to AVSS that powers the chip (AVDD). + + iovdd-supply: + description: 1.7V to 5.25V reference supply to the serial interface (IOVDD). + + refin1p-supply: + description: REFIN+ supply that can be used as reference for conversion. + + refin1n-supply: + description: REFIN- supply that can be used as reference for conversion. If + provided, describes the magnitude (absolute value) of the negative voltage + supplied to the REFIN- pin. + + refin2p-supply: + description: REFIN2+ supply that can be used as reference for conversion. + + refin2n-supply: + description: REFIN2- supply that can be used as reference for conversion. If + provided, describes the magnitude (absolute value) of the negative voltage + supplied to the REFIN2- pin. + + spi-cpol: true + + spi-cpha: true + + interrupts: + description: + Interrupt for signaling the completion of conversion results. The data + ready signal (RDY) used as interrupt is by default provided on the SDO + pin. Alternatively, it can be provided on the DIG_AUX1 pin in which case + the chip disables the RDY function on SDO. Thus, there can be only one + data ready interrupt enabled at a time. + + interrupt-names: + description: + Specify which pin should be configured as Data Ready interrupt. + enum: + - sdo + - dig_aux1 + + clocks: + maxItems: 1 + description: + Optional external clock source. Can specify either an external clock or + external crystal. + + clock-names: + enum: + - ext-clk + - xtal + default: ext-clk + + '#clock-cells': + const: 0 + + clock-output-names: + maxItems: 1 + + gpio-controller: true + + "#gpio-cells": + const: 2 + description: | + The first cell is for the GPIO number: 0 to 3. + The second cell takes standard GPIO flags. + + ldac-gpios: + description: + GPIO connected to DIG_AUX2 pin to be used as LDAC toggle to control the + transfer of data from the DAC_INPUT_A register to the DAC. + maxItems: 1 + + '#address-cells': + const: 1 + + '#size-cells': + const: 0 + + adi,vbias-pins: + description: Analog inputs to apply a voltage bias of (AVDD − AVSS) / 2 to. + $ref: /schemas/types.yaml#/definitions/uint32-array + minItems: 1 + maxItems: 9 + items: + minimum: 0 + maximum: 8 + +allOf: + # Some devices don't have integrated DAC + - if: + properties: + compatible: + contains: + enum: + - adi,ad4190 + - adi,ad4195 + then: + properties: + ldac-gpios: false + + # Require to specify the interrupt pin when using interrupts + - if: + required: + - interrupts + then: + required: + - interrupt-names + + # If an external clock is set, the internal clock cannot go out and vice versa + - oneOf: + - required: [clocks] + properties: + '#clock-cells': false + - required: ['#clock-cells'] + properties: + clocks: false + +patternProperties: + "^channel@[0-9a-f]$": + $ref: /schemas/iio/adc/adc.yaml# + unevaluatedProperties: false + description: + Represents the external channels which are connected to the ADC. + + properties: + reg: + description: + The channel number. + minimum: 0 + maximum: 15 + + diff-channels: + description: | + This property is used for defining the inputs of a differential + voltage channel. The first value is the positive input and the second + value is the negative input of the channel. + + Besides the analog input pins AIN0 to AIN8, there are special inputs + that can be selected with the following values: + 17: Internal temperature sensor + 18: (AVDD-AVSS)/5 + 19: (IOVDD-DGND)/5 + 20: DAC output + 21: ALDO + 22: DLDO + 23: AVSS + 24: DGND + 25: REFIN+ + 26: REFIN- + 27: REFIN2+ + 28: REFIN2- + 29: REFOUT + For the internal temperature sensor, use the input number for both + inputs (i.e. diff-channels = <17 17>). + items: + enum: [0, 1, 2, 3, 4, 5, 6, 7, 8, 17, 18, 19, 20, 21, 22, 23, 24, 25, + 26, 27, 28, 29] + + adi,reference-select: + description: | + Select the reference source to use when converting on the + specific channel. Valid values are: + 0: REFIN+/REFIN- + 1: REFIN2+/REFIN2− + 2: REFOUT/AVSS (internal reference) + 3: AVDD/AVSS + If not specified, REFOUT/AVSS is used. + $ref: /schemas/types.yaml#/definitions/uint32 + enum: [0, 1, 2, 3] + default: 1 + + adi,positive-reference-buffer: + $ref: '#/$defs/reference-buffer' + + adi,negative-reference-buffer: + $ref: '#/$defs/reference-buffer' + + adi,sensor-type: + description: + The AD4170 and similar designs have features to aid interfacing with + load cell weigh scale, RTD, and thermocouple sensors. Each of those + sensor types requires either distinct wiring configuration or + external circuitry for proper sensor operation and can use different + ADC chip functionality on their setups. A key characteristic of those + external sensors is that they must be excited either by voltage supply + or by ADC chip excitation signals. The sensor can then be read through + a pair of analog inputs. This property specifies which particular + sensor type is connected to the ADC so it can be properly setup and + handled. Omit this property for conventional (not weigh scale, RTD, or + thermocouple) ADC channel setups. + $ref: /schemas/types.yaml#/definitions/string + enum: [ weighscale, rtd, thermocouple ] + + adi,excitation-pin-0: + description: + Analog input to apply excitation current to while the channel + is active. + $ref: /schemas/types.yaml#/definitions/uint32 + minimum: 0 + maximum: 20 + default: 0 + + adi,excitation-pin-1: + description: + Analog input to apply excitation current to while the channel + is active. + $ref: /schemas/types.yaml#/definitions/uint32 + minimum: 0 + maximum: 20 + default: 0 + + adi,excitation-pin-2: + description: + Analog input to apply excitation current to while the channel + is active. + $ref: /schemas/types.yaml#/definitions/uint32 + minimum: 0 + maximum: 20 + default: 0 + + adi,excitation-pin-3: + description: + Analog input to apply excitation current to while the channel + is active. + $ref: /schemas/types.yaml#/definitions/uint32 + minimum: 0 + maximum: 20 + default: 0 + + adi,excitation-current-0-microamp: + description: + Excitation current in microamperes to be applied to pin specified in + adi,excitation-pin-0 while this channel is active. + enum: [0, 10, 50, 100, 250, 500, 1000, 1500] + default: 0 + + adi,excitation-current-1-microamp: + description: + Excitation current in microamperes to be applied to pin specified in + adi,excitation-pin-1 while this channel is active. + enum: [0, 10, 50, 100, 250, 500, 1000, 1500] + default: 0 + + adi,excitation-current-2-microamp: + description: + Excitation current in microamperes to be applied to pin specified in + adi,excitation-pin-2 while this channel is active. + enum: [0, 10, 50, 100, 250, 500, 1000, 1500] + default: 0 + + adi,excitation-current-3-microamp: + description: + Excitation current in microamperes to be applied to pin specified in + adi,excitation-pin-3 while this channel is active. + enum: [0, 10, 50, 100, 250, 500, 1000, 1500] + default: 0 + + adi,excitation-ac: + type: boolean + description: + Whether the external sensor has to be AC or DC excited. When omitted, + it is DC excited. + + allOf: + - oneOf: + - required: [single-channel, common-mode-channel] + properties: + diff-channels: false + - required: [diff-channels] + properties: + single-channel: false + common-mode-channel: false + # Usual ADC channels don't need external circuitry excitation. + - if: + not: + required: + - adi,sensor-type + then: + properties: + adi,excitation-pin-0: false + adi,excitation-pin-1: false + adi,excitation-pin-2: false + adi,excitation-pin-3: false + adi,excitation-current-0-microamp: false + adi,excitation-current-1-microamp: false + adi,excitation-current-2-microamp: false + adi,excitation-current-3-microamp: false + adi,excitation-ac: false + # Weigh scale bridge AC excited with one pair of predefined signals. + - if: + allOf: + - properties: + adi,sensor-type: + contains: + const: weighscale + - required: + - adi,excitation-ac + - adi,excitation-pin-2 + - adi,excitation-pin-3 + - not: + required: + - adi,excitation-current-2-microamp + - adi,excitation-current-3-microamp + then: + properties: + adi,excitation-pin-2: + const: 19 + adi,excitation-pin-3: + const: 20 + # Weigh scale bridge AC excited with two pairs of predefined signals. + - if: + allOf: + - properties: + adi,sensor-type: + contains: + const: weighscale + - required: + - adi,excitation-ac + - adi,excitation-pin-0 + - adi,excitation-pin-1 + - adi,excitation-pin-2 + - adi,excitation-pin-3 + - not: + required: + - adi,excitation-current-0-microamp + - adi,excitation-current-1-microamp + - adi,excitation-current-2-microamp + - adi,excitation-current-3-microamp + then: + properties: + adi,excitation-pin-0: + const: 17 + adi,excitation-pin-1: + const: 18 + adi,excitation-pin-2: + const: 19 + adi,excitation-pin-3: + const: 20 + +required: + - compatible + - reg + - avdd-supply + - iovdd-supply + - spi-cpol + - spi-cpha + +unevaluatedProperties: false + +examples: + - | + #include <dt-bindings/interrupt-controller/irq.h> + spi { + #address-cells = <1>; + #size-cells = <0>; + + adc@0 { + compatible = "adi,ad4170"; + reg = <0>; + spi-max-frequency = <20000000>; + spi-cpol; + spi-cpha; + avdd-supply = <&avdd>; + iovdd-supply = <&iovdd>; + clocks = <&clk>; + clock-names = "xtal"; + interrupts = <0 IRQ_TYPE_EDGE_FALLING>; + interrupt-names = "dig_aux1"; + adi,vbias-pins = <7>; + #address-cells = <1>; + #size-cells = <0>; + + // Sample AIN0 with respect to DGND throughout AVDD/DGND input range + // Pseudo-differential unipolar + channel@0 { + reg = <0>; + single-channel = <0>; + common-mode-channel = <24>; + adi,reference-select = <3>; + }; + // Weigh scale sensor + channel@1 { + reg = <1>; + bipolar; + diff-channels = <1 2>; + adi,reference-select = <0>; + adi,positive-reference-buffer = <0>; + adi,negative-reference-buffer = <0>; + adi,sensor-type = "weighscale"; + adi,excitation-pin-2 = <19>; + adi,excitation-pin-3 = <20>; + adi,excitation-ac; + }; + // RTD sensor + channel@2 { + reg = <2>; + bipolar; + diff-channels = <3 4>; + adi,reference-select = <0>; + adi,sensor-type = "rtd"; + adi,excitation-pin-0 = <5>; + adi,excitation-pin-1 = <6>; + adi,excitation-current-0-microamp = <500>; + adi,excitation-current-1-microamp = <500>; + adi,excitation-ac; + }; + // Thermocouple sensor + channel@3 { + reg = <3>; + bipolar; + diff-channels = <7 8>; + adi,reference-select = <0>; + adi,sensor-type = "thermocouple"; + adi,excitation-pin-0 = <18>; + adi,excitation-current-0-microamp = <500>; + }; + }; + }; + - | + #include <dt-bindings/interrupt-controller/irq.h> + spi { + #address-cells = <1>; + #size-cells = <0>; + + adc@0 { + compatible = "adi,ad4170"; + reg = <0>; + spi-max-frequency = <20000000>; + spi-cpol; + spi-cpha; + avdd-supply = <&avdd>; + iovdd-supply = <&iovdd>; + #clock-cells = <0>; + clock-output-names = "ad4170-clk16mhz"; + interrupts = <0 IRQ_TYPE_EDGE_FALLING>; + interrupt-names = "dig_aux1"; + #address-cells = <1>; + #size-cells = <0>; + + // Sample AIN0 with respect to AIN1 throughout AVDD/AVSS input range + // Differential bipolar. If AVSS < 0V, differential true bipolar + channel@0 { + reg = <0>; + bipolar; + diff-channels = <0 1>; + adi,reference-select = <3>; + }; + // Sample AIN2 with respect to DGND throughout AVDD/DGND input range + // Pseudo-differential unipolar + channel@1 { + reg = <1>; + single-channel = <2>; + common-mode-channel = <24>; + adi,reference-select = <3>; + }; + // Sample AIN3 with respect to 2.5V throughout AVDD/AVSS input range + // Pseudo-differential bipolar + channel@2 { + reg = <2>; + bipolar; + single-channel = <3>; + common-mode-channel = <29>; + adi,reference-select = <3>; + }; + // Sample AIN4 with respect to DGND throughout AVDD/AVSS input range + // Pseudo-differential bipolar + channel@3 { + reg = <3>; + bipolar; + single-channel = <4>; + common-mode-channel = <24>; + adi,reference-select = <3>; + }; + // Sample AIN5 with respect to 2.5V throughout AVDD/AVSS input range + // Pseudo-differential unipolar (AD4170 datasheet page 46 example) + channel@4 { + reg = <4>; + single-channel = <5>; + common-mode-channel = <29>; + adi,reference-select = <3>; + }; + // Sample AIN6 with respect to 2.5V throughout REFIN+/REFIN- input range + // Pseudo-differential bipolar + channel@5 { + reg = <5>; + bipolar; + single-channel = <6>; + common-mode-channel = <29>; + adi,reference-select = <0>; + }; + // Weigh scale sensor + channel@6 { + reg = <6>; + bipolar; + diff-channels = <7 8>; + adi,reference-select = <0>; + adi,sensor-type = "weighscale"; + adi,excitation-pin-0 = <17>; + adi,excitation-pin-1 = <18>; + adi,excitation-pin-2 = <19>; + adi,excitation-pin-3 = <20>; + adi,excitation-ac; + }; + }; + }; +... +MAINTAINERS +7
-0@@ -1392,6 +1392,13 @@ F: Documentation/ABI/testing/sysfs-bus-iio-adc-ad4130 F: Documentation/devicetree/bindings/iio/adc/adi,ad4130.yaml F: drivers/iio/adc/ad4130.c +ANALOG DEVICES INC AD4170 DRIVER +M: Marcelo Schmitt <[email protected]> +L: [email protected] +S: Supported +W: https://ez.analog.com/linux-software-drivers +F: Documentation/devicetree/bindings/iio/adc/adi,ad4170.yaml + ANALOG DEVICES INC AD4695 DRIVER M: Michael Hennerich <[email protected]> M: Nuno Sá <[email protected]>Signature · 1 line
2.47.2
Re: [PATCH v5 01/11] dt-bindings: iio: adc: Add AD4170
Quoted 6 lines · Conor Dooley
Quoted 5 lines · Marcelo Schmitt
Add device tree documentation for AD4170 and similar sigma-delta ADCs. The AD4170 is a 24-bit, multichannel, sigma-delta ADC.
Signed-off-by Marcelo Schmitt <[email protected]>---
...
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Documentation/devicetree/bindings/iio/adc/adi,ad4170.yaml new file +10
-0+ +$defs: + reference-buffer: + description: | + Enable precharge buffer, full buffer, or skip reference buffering of + the positive/negative voltage reference. Because the output impedance + of the source driving the voltage reference inputs may be dynamic, + resistive/capacitive combinations of those inputs can cause DC gain + errors if the reference inputs go unbuffered into the ADC. Enable + reference buffering if the provided reference source has dynamic highDocumentation/devicetree/bindings/iio/adc/adi,ad4170.yaml line 39
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Documentation/devicetree/bindings/iio/adc/adi,ad4170.yaml new file +10
-0+ impedance output. Note the absolute voltage allowed on REFINn+ and REFINn- + inputs is from AVSS - 50 mV to AVDD + 50 mV when the reference buffers are + disabled but narrows to AVSS to AVDD when reference buffering is enabled + or in precharge mode. The valid options for this property are: + 0: Reference precharge buffer. + 1: Full reference buffering. + 2: Bypass reference buffers (buffering disabled). + $ref: /schemas/types.yaml#/definitions/uint32 + enum: [0, 1, 2] + default: 1
Quoted 4 lines
Why make this property a uint32, rather than a string where you can use something like "precharge", "full" and "bypass" (or "disabled")? The next similar device could use something slightly different then the binding becomes pretty clunky.
Oh, good point. Will make it string type (if going to keep the property).
Quoted 2 lines
Can you explain why this is a dt property rather than something adjustable at runtime?
The reference buffer configuration affects the allowed absolute maximum input ratings of voltage reference supplies. Some bindings (adi,ad7192, adi,ad4130, adi,ad7124) have dt properties for buffering of analog inputs and adi,max11410 has a prop for reference buffering. It looked like adi,ad4170 having a dt prop for reference buf would make it more consistent with other bindings. Though, I'm fine with dropping ad4170 reference buffer props if that would be better.
Thanks,
Marcelo
David Lechner
reviewerRe: [PATCH v5 01/11] dt-bindings: iio: adc: Add AD4170
In reply to Conor DooleyQuoted 91 lines · Conor Dooley
Quoted 72 lines · Marcelo Schmitt
Add device tree documentation for AD4170 and similar sigma-delta ADCs. The AD4170 is a 24-bit, multichannel, sigma-delta ADC.
Signed-off-by Marcelo Schmitt <[email protected]>---
Change log v4 -> v5
- Dropped interrupt maxItems constraint.
- Spelled out RC acronym in reference-buffer description.
- Require to specify interrupt-names when using interrupts.
- Added interrupt-names to the examples.
- Made adi,excitation-pin properties identical to adi,ad4130.
- Removed interrupt-parent props from the examples.Proposing new types and ways of describing hardware for weigh scale load cells and related sensors external to ADCs can lead to potential better description of how those components connect to the ADC. However, we must use what already exists for properties documenting features that are the same across different devices.
Maybe, we could use generic defs to define adi,excitation-current-n-microamp and adi,excitation-pin and avoid repetition with those. Though, that triggers a
dt_binding_checkwarning. Also, having mixed notation (some prop declarations using defines and others not) seems to not be desirable.It looks like the only option left is making adi,excitation-pin properties identical to adi,ad4130.
On one hand, dropping adi,excitation-pin defs and making those properties identical to adi,ad4130 preserves their syntax and semantics accross dt-bindings. OTOH, we end up with more text repetition in the doc.
.../bindings/iio/adc/adi,ad4170.yaml | 564 ++++++++++++++++++ MAINTAINERS | 7 + 2 files changed, 571 insertions(+) create mode 100644 Documentation/devicetree/bindings/iio/adc/adi,ad4170.yamlDocumentation/devicetree/bindings/iio/adc/adi,ad4170.yaml new file +29
-0@@ -0,0 +1,564 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/iio/adc/adi,ad4170.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Analog Devices AD4170 and similar Analog to Digital Converters + +maintainers: + - Marcelo Schmitt <[email protected]> + +description: | + Analog Devices AD4170 series of Sigma-delta Analog to Digital Converters. + Specifications can be found at: + https://www.analog.com/media/en/technical-documentation/data-sheets/ad4170-4.pdf + https://www.analog.com/media/en/technical-documentation/data-sheets/ad4190-4.pdf + https://www.analog.com/media/en/technical-documentation/data-sheets/ad4195-4.pdf + +$ref: /schemas/spi/spi-peripheral-props.yaml# + +$defs: + reference-buffer: + description: | + Enable precharge buffer, full buffer, or skip reference buffering of + the positive/negative voltage reference. Because the output impedance + of the source driving the voltage reference inputs may be dynamic, + resistive/capacitive combinations of those inputs can cause DC gain + errors if the reference inputs go unbuffered into the ADC. Enable + reference buffering if the provided reference source has dynamic highDocumentation/devicetree/bindings/iio/adc/adi,ad4170.yaml line 39
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Documentation/devicetree/bindings/iio/adc/adi,ad4170.yaml new file +10
-0+ impedance output. Note the absolute voltage allowed on REFINn+ and REFINn- + inputs is from AVSS - 50 mV to AVDD + 50 mV when the reference buffers are + disabled but narrows to AVSS to AVDD when reference buffering is enabled + or in precharge mode. The valid options for this property are: + 0: Reference precharge buffer. + 1: Full reference buffering. + 2: Bypass reference buffers (buffering disabled). + $ref: /schemas/types.yaml#/definitions/uint32 + enum: [0, 1, 2] + default: 1Why make this property a uint32, rather than a string where you can use something like "precharge", "full" and "bypass" (or "disabled")? The next similar device could use something slightly different then the binding becomes pretty clunky.
Can you explain why this is a dt property rather than something adjustable at runtime?
Quoted 3 lines
Otherwise, what you have here looks sane enough to me - but I'd like to see some comments from Jonathan or David etc about your approach to the excitation properties.
This looks like something that should be in the devicetree to me. For example if the external reference supply is high impedance, buffering is pretty much required. And using precharge is an application design choice to reduce THD at the expense of other limitations.
Quoted 6 lines
Cheers,
Conor.Quoted 2 lines
Documentation/devicetree/bindings/iio/adc/adi,ad4170.yaml new file +2
-0+ +properties:
...
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Documentation/devicetree/bindings/iio/adc/adi,ad4170.yaml new file +31
-0+allOf: + # Some devices don't have integrated DAC + - if: + properties: + compatible: + contains: + enum: + - adi,ad4190 + - adi,ad4195 + then: + properties: + ldac-gpios: false + + # Require to specify the interrupt pin when using interrupts + - if: + required: + - interrupts + then: + required: + - interrupt-names + + # If an external clock is set, the internal clock cannot go out and vice versa + - oneOf: + - required: [clocks] + properties: + '#clock-cells': false + - required: ['#clock-cells'] + properties: + clocks: false + +patternProperties:
...
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Documentation/devicetree/bindings/iio/adc/adi,ad4170.yaml line 406
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Documentation/devicetree/bindings/iio/adc/adi,ad4170.yaml new file +10
-0+required: + - compatible + - reg + - avdd-supply + - iovdd-supply + - spi-cpol + - spi-cpha + +unevaluatedProperties: false +
It would be more logical to place these before patternProperties (actually really before allOf) so that they are close to the properties that they are referencing.
Jonathan Cameron
maintainerRe: [PATCH v5 01/11] dt-bindings: iio: adc: Add AD4170
Quoted 29 lines
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Documentation/devicetree/bindings/iio/adc/adi,ad4170.yaml new file +10
-0+ +$defs: + reference-buffer: + description: | + Enable precharge buffer, full buffer, or skip reference buffering of + the positive/negative voltage reference. Because the output impedance + of the source driving the voltage reference inputs may be dynamic, + resistive/capacitive combinations of those inputs can cause DC gain + errors if the reference inputs go unbuffered into the ADC. Enable + reference buffering if the provided reference source has dynamic highDocumentation/devicetree/bindings/iio/adc/adi,ad4170.yaml line 39
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Documentation/devicetree/bindings/iio/adc/adi,ad4170.yaml new file +10
-0+ impedance output. Note the absolute voltage allowed on REFINn+ and REFINn- + inputs is from AVSS - 50 mV to AVDD + 50 mV when the reference buffers are + disabled but narrows to AVSS to AVDD when reference buffering is enabled + or in precharge mode. The valid options for this property are: + 0: Reference precharge buffer. + 1: Full reference buffering. + 2: Bypass reference buffers (buffering disabled). + $ref: /schemas/types.yaml#/definitions/uint32 + enum: [0, 1, 2] + default: 1Why make this property a uint32, rather than a string where you can use something like "precharge", "full" and "bypass" (or "disabled")? The next similar device could use something slightly different then the binding becomes pretty clunky.
Can you explain why this is a dt property rather than something adjustable at runtime?
Quoted 9 lines
Quoted 3 lines
Otherwise, what you have here looks sane enough to me - but I'd like to see some comments from Jonathan or David etc about your approach to the excitation properties.
This looks like something that should be in the devicetree to me. For example if the external reference supply is high impedance, buffering is pretty much required. And using precharge is an application design choice to reduce THD at the expense of other limitations.
Agreed that this pretty much only makes sense in DT.
In the ideal world we would have firm rules on when to enable buffering etc and then the DT would describe the impedance of the circuit connected and any other relevant properties and then we'd have the driver enable it only when those rigid rules dictated that we should.
Sadly no such simple rules exist (as far as I know) so we just expose the thing that gets set dependent on someone's judgement of the suitability of the buffering choice given the circuit being connected to the input.
If we pushed it to userspace we'd just end up with a per device blob that dictated the mode to pick on boot and left it like that. So effectively another bit of firmware :(
J
<cropping other comments>
Re: [PATCH v5 01/11] dt-bindings: iio: adc: Add AD4170
Quoted 46 lines · Jonathan Cameron
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Documentation/devicetree/bindings/iio/adc/adi,ad4170.yaml new file +10
-0+ +$defs: + reference-buffer: + description: | + Enable precharge buffer, full buffer, or skip reference buffering of + the positive/negative voltage reference. Because the output impedance + of the source driving the voltage reference inputs may be dynamic, + resistive/capacitive combinations of those inputs can cause DC gain + errors if the reference inputs go unbuffered into the ADC. Enable + reference buffering if the provided reference source has dynamic highDocumentation/devicetree/bindings/iio/adc/adi,ad4170.yaml line 39
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Documentation/devicetree/bindings/iio/adc/adi,ad4170.yaml new file +10
-0+ impedance output. Note the absolute voltage allowed on REFINn+ and REFINn- + inputs is from AVSS - 50 mV to AVDD + 50 mV when the reference buffers are + disabled but narrows to AVSS to AVDD when reference buffering is enabled + or in precharge mode. The valid options for this property are: + 0: Reference precharge buffer. + 1: Full reference buffering. + 2: Bypass reference buffers (buffering disabled). + $ref: /schemas/types.yaml#/definitions/uint32 + enum: [0, 1, 2] + default: 1Why make this property a uint32, rather than a string where you can use something like "precharge", "full" and "bypass" (or "disabled")? The next similar device could use something slightly different then the binding becomes pretty clunky.
Can you explain why this is a dt property rather than something adjustable at runtime?Quoted 9 lines
Quoted 3 lines
Otherwise, what you have here looks sane enough to me - but I'd like to see some comments from Jonathan or David etc about your approach to the excitation properties.
This looks like something that should be in the devicetree to me. For example if the external reference supply is high impedance, buffering is pretty much required. And using precharge is an application design choice to reduce THD at the expense of other limitations.
Agreed that this pretty much only makes sense in DT.
In the ideal world we would have firm rules on when to enable buffering etc and then the DT would describe the impedance of the circuit connected and any other relevant properties and then we'd have the driver enable it only when those rigid rules dictated that we should.
Quoted 7 lines
Sadly no such simple rules exist (as far as I know) so we just expose the thing that gets set dependent on someone's judgement of the suitability of the buffering choice given the circuit being connected to the input.
If we pushed it to userspace we'd just end up with a per device blob that dictated the mode to pick on boot and left it like that. So effectively another bit of firmware :(
Can't remember if I replied to David's mail here or not, I pretty much just asked the question because I didn't understand why the usecase and wanted an explanation for my benefit. Probably makes no sense to explain why a knob exists in the binding when anyone using the device will not need one, but that does mean that at times with these devices that are unfamiliar to me I have to have it explained to me why something is set in stone.
Jonathan Cameron
maintainerRe: [PATCH v5 01/11] dt-bindings: iio: adc: Add AD4170
In reply to Conor DooleyQuoted 4 lines
Otherwise, what you have here looks sane enough to me - but I'd like to see some comments from Jonathan or David etc about your approach to the excitation properties.
They look sane to me. The complexity of devices that handle weigh cells and similar are always a pain. In theory we could have a go at describing the weigh-cell in DT and then try to derive the 'right' settings but that seems like a very complex thing to do. Long time since I did anything with weigh cells, but I think you mostly read the settings to use of a datasheet rather than deriving them from first principles. Thermocouples are similar (I'm not that familiar with RTDs)
As to the handling of the different sensor types - that seems like a sensible way to constrain the binding and end up with sane readable combinations rather than a bunch of excitation settings with no info on what is connected.
Not sure this is the perfect solution, but to me it looks good enough and flexible / general enough to cover a wide range of other devices.
Jonathan
Quoted 3 lines
Cheers,
Conor.
PATCH v5 2/11 iio: adc: Add basic support for AD4170
In reply to Marcelo SchmittFrom: Ana-Maria Cusco <[email protected]>
The AD4170 is a multichannel, low noise, 24-bit precision sigma-delta analog to digital converter. The AD4170 design offers a flexible data acquisition solution with crosspoint multiplexed analog inputs, configurable ADC voltage reference inputs, ultra-low noise integrated PGA, digital filtering, wide range of configurable output data rates, internal oscillator and temperature sensor, four GPIOs, and integrated features for interfacing with load cell weigh scales, RTD, and thermocouple sensors.
Add basic support for the AD4170 ADC with the following features:
- Single-shot read.
- Analog front end PGA configuration.
- Differential and pseudo-differential input configuration.
---
Change log v4 -> v5
- Dropped 'ret' variable set but not used, warned by 0-day test bot.
- Rephrased comment about static_assert to clarify the reason for it's usage.
- Added missing includes.
- Did a few minor code readability improvements, complying with review suggestions.
MAINTAINERS | 1 + drivers/iio/adc/Kconfig | 12 + drivers/iio/adc/Makefile | 1 + drivers/iio/adc/ad4170.c | 1535 ++++++++++++++++++++++++++++++++++++++ 4 files changed, 1549 insertions(+) create mode 100644 drivers/iio/adc/ad4170.c
MAINTAINERS +1 -0
@@ -1398,6 +1398,7 @@ L: [email protected] S: Supported W: https://ez.analog.com/linux-software-drivers F: Documentation/devicetree/bindings/iio/adc/adi,ad4170.yaml +F: drivers/iio/adc/ad4170.c ANALOG DEVICES INC AD4695 DRIVER M: Michael Hennerich <[email protected]>
drivers/iio/adc/Kconfig +12 -0
@@ -84,6 +84,18 @@ config AD4130 To compile this driver as a module, choose M here: the module will be called ad4130. + +config AD4170 + tristate "Analog Device AD4170 ADC Driver" + depends on SPI + select REGMAP_SPI + help + Say yes here to build support for Analog Devices AD4170 SPI analog + to digital converters (ADC). + + To compile this driver as a module, choose M here: the module will be + called ad4170. + config AD4695 tristate "Analog Device AD4695 ADC Driver" depends on SPI
drivers/iio/adc/Makefile +1 -0
@@ -12,6 +12,7 @@ obj-$(CONFIG_AD4000) += ad4000.o obj-$(CONFIG_AD4030) += ad4030.o obj-$(CONFIG_AD4080) += ad4080.o obj-$(CONFIG_AD4130) += ad4130.o +obj-$(CONFIG_AD4170) += ad4170.o obj-$(CONFIG_AD4695) += ad4695.o obj-$(CONFIG_AD4851) += ad4851.o obj-$(CONFIG_AD7091R) += ad7091r-base.o
drivers/iio/adc/ad4170.c new file +1535 -0
1,535 lines not on this page · raw message
Signature · 1 line
2.47.2
Re: [PATCH v5 02/11] iio: adc: Add basic support for AD4170
Quoted 14 lines · Marcelo Schmitt
From: Ana-Maria Cusco <[email protected]>
The AD4170 is a multichannel, low noise, 24-bit precision sigma-delta analog to digital converter. The AD4170 design offers a flexible data acquisition solution with crosspoint multiplexed analog inputs, configurable ADC voltage reference inputs, ultra-low noise integrated PGA, digital filtering, wide range of configurable output data rates, internal oscillator and temperature sensor, four GPIOs, and integrated features for interfacing with load cell weigh scales, RTD, and thermocouple sensors.
Add basic support for the AD4170 ADC with the following features:
- Single-shot read.
- Analog front end PGA configuration.
- Differential and pseudo-differential input configuration.
...
drivers/iio/adc/ad4170.c line 175
Quoted 4 lines
drivers/iio/adc/ad4170.c new file +4
-0+enum ad4170_ref_buf { +AD4170_REF_BUF_PRE ,/* Pre-charge referrence buffer */ +AD4170_REF_BUF_FULL ,/* Full referrence buffering */ +AD4170_REF_BUF_BYPASS /* Bypass referrence buffering */
Doesn't seem like a terminator. Please, leave trailing comma.
drivers/iio/adc/ad4170.c line 182
Quoted 7 lines
drivers/iio/adc/ad4170.c new file +7
-0+}; + +enum ad4170_ref_select { +AD4170_REF_REFIN1 , +AD4170_REF_REFIN2 , +AD4170_REF_REFOUT , +AD4170_REF_AVDD
Ditto.
Quoted 1 line
+};
...
drivers/iio/adc/ad4170.c line 273
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drivers/iio/adc/ad4170.c new file +1
-0+int pins_fn[AD4170_NUM_ANALOG_PINS ];
Can be negative? If so, perhaps a comment like '-1 means no assigned function'.
...
drivers/iio/adc/ad4170.c line 331
Quoted 1 line
drivers/iio/adc/ad4170.c new file +1
-0+return spi_write (st->spi, st->tx_buf, size +2 );
... + sizeof(reg) ?
...
drivers/iio/adc/ad4170.c line 387
Quoted 8 lines
drivers/iio/adc/ad4170.c new file +8
-0+static bool ad4170_setup_eq (struct ad4170_setup *a,struct ad4170_setup *b) +{ +/* +* The use of static_assert() here is to make sure that, if +* struct ad4170_setup is ever changed (e.g. a field is added to the +* struct's declaration), the comparison below is adapted to keep +* comparing each of struct ad4170_setup fields. +*/
Okay. But this also will trigger the case when the field just changes the type. So, it also brings false positives. I really think this is wrong place to put static_assert(). To me it looks like a solving rare problem, if any.
But I leave this to the IIO maintainers.
In my opinion static_assert() makes only sense when memcmp() is being used. Otherwise it has prons and cons.
Quoted 20 lines
drivers/iio/adc/ad4170.c new file +20
-0+static_assert (sizeof (*a) == +sizeof (struct { +u16 misc; +u16 afe; +u16 filter; +u16 filter_fs; +u32 offset; +u32 gain; + })); + +if (a->misc != b->misc || + a->afe != b->afe || + a->filter != b->filter || + a->filter_fs != b->filter_fs || + a->offset != b->offset || + a->gain != b->gain) +return false; + +return true; +}
...
drivers/iio/adc/ad4170.c line 825
Quoted 9 lines
drivers/iio/adc/ad4170.c new file +9
-0+/* +* Some configurations can lead to invalid setups. +* For example, if AVSS = -2.5V, REF_SELECT set to REFOUT (REFOUT/AVSS), +* and pseudo-diff channel configuration set, then the input range +* should go from 0V to +VREF (single-ended - datasheet pg 10), but +* REFOUT/AVSS range would be -2.5V to 0V. +* Check the positive reference is higher than 0V for pseudo-diff +* channels. +*/
Right, the Q is, can refp contain an error code here, rather than negative value? The code above hints that in some case it may, but are all those cases were caught up already? (Comment can be extended to explain this)
Quoted 4 lines
drivers/iio/adc/ad4170.c new file +4
-0+if (refp <=0 ) +return dev_err_probe (dev, -EINVAL , +"REF+ <= GND for pseudo-diff chan %u\n" , + ch_reg);
...
drivers/iio/adc/ad4170.c line 1143
Quoted 11 lines
drivers/iio/adc/ad4170.c new file +11
-0+{ +struct device *dev = &st->spi->dev; +u32 aux; + +/* Optional positive reference buffering */ + aux =AD4170_REF_BUF_FULL ;/* Default to full precharge buffer enabled. */ +fwnode_property_read_u32 (child,"adi,positive-reference-buffer" , &aux); +if (aux <AD4170_REF_BUF_PRE || aux >AD4170_REF_BUF_BYPASS ) +return dev_err_probe (dev, -EINVAL , +"Invalid adi,positive-reference-buffer: %u\n" , + aux);
Note, if you make it like
const char *propname; ... propname = "...";
and use in both places. Alternatively can be done like
return dev_err_probe(dev, -EINVAL, "Invalid %s %u\n", "adi,positive-reference-buffer: ", aux);
This will save a few dozens of bytes in the object file and at runtime.
Same for other similar cases. And I believe I have already pointed that out.
Quoted 25 lines
drivers/iio/adc/ad4170.c new file +25
-0+ + setup->afe |=FIELD_PREP (AD4170_AFE_REF_BUF_P_MSK , aux); + +/* Optional negative reference buffering */ + aux =AD4170_REF_BUF_FULL ;/* Default to full precharge buffer enabled. */ +fwnode_property_read_u32 (child,"adi,negative-reference-buffer" , &aux); +if (aux <AD4170_REF_BUF_PRE || aux >AD4170_REF_BUF_BYPASS ) +return dev_err_probe (dev, -EINVAL , +"Invalid adi,negative-reference-buffer: %u\n" , + aux); + + setup->afe |=FIELD_PREP (AD4170_AFE_REF_BUF_M_MSK , aux); + +/* Optional voltage reference selection */ + aux =AD4170_REF_REFOUT ;/* Default reference selection. */ +fwnode_property_read_u32 (child,"adi,reference-select" , &aux); +if (aux >AD4170_REF_AVDD ) +return dev_err_probe (dev, -EINVAL , +"Invalid reference selected %u\n" , + aux); + + setup->afe |=FIELD_PREP (AD4170_AFE_REF_SELECT_MSK , aux); + +return 0 ; +}
...
drivers/iio/adc/ad4170.c line 1172
Quoted 3 lines
drivers/iio/adc/ad4170.c new file +3
-0+static int ad4170_parse_adc_channel_type (struct device *dev, +struct fwnode_handle *child, +struct iio_chan_spec *chan)
Ditto in this function.
...
Quoted 7 lines
drivers/iio/adc/ad4170.c new file +7
-0+static int ad4170_parse_channel_node (struct iio_dev *indio_dev, +struct fwnode_handle *child, +unsigned int chan_num) +{ +struct ad4170_state *st =iio_priv (indio_dev); +struct device *dev = &st->spi->dev; +struct ad4170_chan_info *chan_info;
drivers/iio/adc/ad4170.c line 1221
Quoted 10 lines
drivers/iio/adc/ad4170.c new file +10
-0+struct ad4170_setup *setup; +struct iio_chan_spec *chan; +unsigned int ref_select; +unsigned int ch_reg; +bool bipolar; +int ret; + + ret =fwnode_property_read_u32 (child,"reg" , &ch_reg); +if (ret) + return dev_err_probe(dev, -EINVAL,
Why not ret?
Quoted 13 lines
drivers/iio/adc/ad4170.c new file +13
-0+ "Failed to read channel reg\n"); + +if (ch_reg >=AD4170_MAX_CHANNELS ) +return dev_err_probe (dev, -EINVAL , +"Channel idx greater than no of channels\n" ); + + chan = &st->chans[chan_num]; + *chan = ad4170_channel_template; + + chan->address = ch_reg; + chan->scan_index = ch_reg; + chan_info = &st->chan_infos[chan->address]; +
drivers/iio/adc/ad4170.c line 1244
Quoted 10 lines
drivers/iio/adc/ad4170.c new file +10
-0+ chan_info->setup_num =AD4170_INVALID_SETUP ; + chan_info->initialized = true; + + setup = &chan_info->setup; + ret =ad4170_parse_reference (st, child, setup); +if (ret) +return ret; + + ret =ad4170_parse_adc_channel_type (dev, child, chan); +if (ret <0 )
What is the meaning of the positive returned value? Why is it not used?
drivers/iio/adc/ad4170.c line 1255
Quoted 11 lines
drivers/iio/adc/ad4170.c new file +11
-0+return ret; + + bipolar =fwnode_property_read_bool (child,"bipolar" ); + setup->afe |=FIELD_PREP (AD4170_AFE_BIPOLAR_MSK , bipolar); +if (bipolar) + chan->scan_type.sign ='s' ; +else + chan->scan_type.sign ='u' ; + + ret =ad4170_validate_channel (st, chan); +if (ret <0 )
Ditto.
Quoted 10 lines
drivers/iio/adc/ad4170.c new file +10
-0+return ret; + + ref_select =FIELD_GET (AD4170_AFE_REF_SELECT_MSK , setup->afe); + ret =ad4170_get_input_range (st, chan, ch_reg, ref_select); +if (ret <0 ) +return dev_err_probe (dev, ret,"Invalid input config\n" ); + + chan_info->input_range_uv = ret; +return 0 ; +}
...
drivers/iio/adc/ad4170.c line 1272
Quoted 7 lines
drivers/iio/adc/ad4170.c new file +6
-0+static int ad4170_parse_channels (struct iio_dev *indio_dev) +{ +struct ad4170_state *st =iio_priv (indio_dev); +struct device *dev = &st->spi->dev; +unsigned int num_channels; +unsigned int chan_num =0 ;
It's better to split, so it will make code robust against potential reuse of the same variable in between.
drivers/iio/adc/ad4170.c line 1276
Quoted 5 lines
drivers/iio/adc/ad4170.c new file +4
-0+int ret; + + num_channels =device_get_child_node_count (dev); +
Unneeded blank line.
Quoted 14 lines
drivers/iio/adc/ad4170.c new file +14
-0+if (num_channels >AD4170_MAX_CHANNELS ) +return dev_err_probe (dev, -EINVAL ,"Too many channels\n" ); + +device_for_each_child_node_scoped (dev, child) { + ret =ad4170_parse_channel_node (indio_dev, child, chan_num++); +if (ret) +return ret; + } + + indio_dev->num_channels = num_channels; + indio_dev->channels = st->chans; + +return 0 ; +}
...
drivers/iio/adc/ad4170.c line 1416
Quoted 2 lines
drivers/iio/adc/ad4170.c new file +2
-0+/* Assume AVSS at GND (0V) if not provided */ + st->vrefs_uv[AD4170_AVSS_SUP ] = ret == -ENODEV ?0 : -ret;
-ret ?!?!
Even if you know that *now* it can't have any other error code, it's quite fragile.
Signature · 2 lines
With Best Regards, Andy Shevchenko
Re: [PATCH v5 02/11] iio: adc: Add basic support for AD4170
Quoted 16 lines · Andy Shevchenko
Quoted 10 lines · Marcelo Schmitt
From: Ana-Maria Cusco <[email protected]>
The AD4170 is a multichannel, low noise, 24-bit precision sigma-delta analog to digital converter. The AD4170 design offers a flexible data acquisition solution with crosspoint multiplexed analog inputs, configurable ADC voltage reference inputs, ultra-low noise integrated PGA, digital filtering, wide range of configurable output data rates, internal oscillator and temperature sensor, four GPIOs, and integrated features for interfacing with load cell weigh scales, RTD, and thermocouple sensors.
Quoted 4 lines
Add basic support for the AD4170 ADC with the following features:
- Single-shot read.
- Analog front end PGA configuration.
- Differential and pseudo-differential input configuration.
Quoted 5 lines
...
drivers/iio/adc/ad4170.c line 331
Quoted 1 line
drivers/iio/adc/ad4170.c new file +1
-0+return spi_write (st->spi, st->tx_buf, size +2 );... + sizeof(reg) ?
The size of the specific ADC register is stored in the size variable. The result of sizeof(reg) can be different on different machines and will probably not be equal to the size of the register in the ADC chip.
Quoted 14 lines
...
drivers/iio/adc/ad4170.c line 387
Quoted 8 lines
drivers/iio/adc/ad4170.c new file +8
-0+static bool ad4170_setup_eq (struct ad4170_setup *a,struct ad4170_setup *b) +{ +/* +* The use of static_assert() here is to make sure that, if +* struct ad4170_setup is ever changed (e.g. a field is added to the +* struct's declaration), the comparison below is adapted to keep +* comparing each of struct ad4170_setup fields. +*/ Okay. But this also will trigger the case when the field just changes the type. So, it also brings false positives. I really think this is wrong place to put
static_assert(). To me it looks like a solving rare problem, if any.
I think it is unlikely that struct ad4170_setup declaration will ever change. The fields match the registers that are associated with a channel setup and the their types match the size of the respective registers. So, I do agree that triggering this assert would be something rare.
Quoted 5 lines
But I leave this to the IIO maintainers.
In my opinion
static_assert()makes only sense whenmemcmp()is being used. Otherwise it has prons and cons.
I think the most relevant reason to have this static_assert would be to keep some consistency with ad4130, ad7124, and ad7173, but no strong opinion about it. Actually, I don't get why static_assert() would only matter if memcmp() was being used. Would it be better to not bother if the fields change type?
Anyway, I'll go with whatever be IIO maintainer's preference.
Quoted 24 lines
Quoted 21 lines
drivers/iio/adc/ad4170.c new file +20
-0+static_assert (sizeof (*a) == +sizeof (struct { +u16 misc; +u16 afe; +u16 filter; +u16 filter_fs; +u32 offset; +u32 gain; + })); + +if (a->misc != b->misc || + a->afe != b->afe || + a->filter != b->filter || + a->filter_fs != b->filter_fs || + a->offset != b->offset || + a->gain != b->gain) +return false; + +return true; +}...
Quoted 13 lines
drivers/iio/adc/ad4170.c line 825
Quoted 9 lines
drivers/iio/adc/ad4170.c new file +9
-0+/* +* Some configurations can lead to invalid setups. +* For example, if AVSS = -2.5V, REF_SELECT set to REFOUT (REFOUT/AVSS), +* and pseudo-diff channel configuration set, then the input range +* should go from 0V to +VREF (single-ended - datasheet pg 10), but +* REFOUT/AVSS range would be -2.5V to 0V. +* Check the positive reference is higher than 0V for pseudo-diff +* channels. +*/ Right, the Q is, can refp contain an error code here, rather than negative value? The code above hints that in some case it may, but are all those cases were caught up already? (Comment can be extended to explain this)
I don't think refp can contain an error code at this point. All regulators are read at ad4170_regulator_setup(). After that setup, st->vrefs_uv[AD4170_<SUPPLY>] will either contain the voltage read from the regulator framework (which is >= 0) or -ENODEV. Then, we check the supply value at the beginning of ad4170_get_input_range() (this function) and error out if the value is -ENODEV. Will extend the comment to explain that.
Quoted 6 lines
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drivers/iio/adc/ad4170.c new file +4
-0+if (refp <=0 ) +return dev_err_probe (dev, -EINVAL , +"REF+ <= GND for pseudo-diff chan %u\n" , + ch_reg);
...
Quoted 5 lines
drivers/iio/adc/ad4170.c line 1416
Quoted 3 lines
drivers/iio/adc/ad4170.c new file +2
-0+/* Assume AVSS at GND (0V) if not provided */ + st->vrefs_uv[AD4170_AVSS_SUP ] = ret == -ENODEV ?0 : -ret;-ret ?!?!
That's because AVSS is never above system ground level (i.e. AVSS is either GND or a negative voltage). But we currently don't have support for reading negative voltages with the regulator framework. So, the current AD4170 support reads a positive value from the regulator, then inverts signal to make it negative :)
Quoted 3 lines
Even if you know that *now* it can't have any other error code, it's quite fragile.
Yeah, I guess ADCs that can take bipolar power supplies are not that common. I couldn't think of any better way to have that, though.
Thanks,
Marcelo
Re: [PATCH v5 02/11] iio: adc: Add basic support for AD4170
Quoted 2 lines · Marcelo Schmitt
Quoted 1 line · Andy Shevchenko
On Tue, Jun 10, 2025 at 05:31:25PM -0300, Marcelo Schmitt wrote:
...
Quoted 7 lines
Quoted 3 lines
drivers/iio/adc/ad4170.c line 331
Quoted 1 line
drivers/iio/adc/ad4170.c new file +1
-0+return spi_write (st->spi, st->tx_buf, size +2 );... + sizeof(reg) ?
The size of the specific ADC register is stored in the size variable. The result of sizeof(reg) can be different on different machines and will probably not be equal to the size of the register in the ADC chip.
Hmm... But shouldn't we have a variable type that respects the sizeof() of the register in HW to keep it there? 2 is magic.
...
Quoted 13 lines
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drivers/iio/adc/ad4170.c new file +4
-0+static bool ad4170_setup_eq (struct ad4170_setup *a,struct ad4170_setup *b) +{ +/* +* The use of static_assert() here is to make sure that, if Quoted 8 lines
drivers/iio/adc/ad4170.c line 387
Quoted 4 lines
drivers/iio/adc/ad4170.c new file +4
-0+* struct ad4170_setup is ever changed (e.g. a field is added to the +* struct's declaration), the comparison below is adapted to keep +* comparing each of struct ad4170_setup fields. +*/ Okay. But this also will trigger the case when the field just changes the type. So, it also brings false positives. I really think this is wrong place to put
static_assert(). To me it looks like a solving rare problem, if any.
Quoted 4 lines
I think it is unlikely that struct
ad4170_setupdeclaration will ever change. The fields match the registers that are associated with a channel setup and the their types match the size of the respective registers. So, I do agree that triggering this assert would be something rare.
Yep, which thinks to me as an unneeded noise in the code, making it harder to read and maintain (in _this_ case).
Quoted 7 lines
Quoted 4 lines
But I leave this to the IIO maintainers.
In my opinion
static_assert()makes only sense whenmemcmp()is being used. Otherwise it has prons and cons.I think the most relevant reason to have this
static_assertwould be to keep some consistency with ad4130, ad7124, and ad7173, but no strong opinion about it.
I would argue that those needs to be revisited for the same reasons as above.
Quoted 25 lines
Actually, I don't get why
static_assert()would only matter ifmemcmp()was being used. Would it be better to not bother if the fields change type?Anyway, I'll go with whatever be IIO maintainer's preference.
Quoted 20 lines
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drivers/iio/adc/ad4170.c new file +20
-0+static_assert (sizeof (*a) == +sizeof (struct { +u16 misc; +u16 afe; +u16 filter; +u16 filter_fs; +u32 offset; +u32 gain; + })); + +if (a->misc != b->misc || + a->afe != b->afe || + a->filter != b->filter || + a->filter_fs != b->filter_fs || + a->offset != b->offset || + a->gain != b->gain) +return false; + +return true; +}
...
Quoted 9 lines
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drivers/iio/adc/ad4170.c line 1416
Quoted 2 lines
drivers/iio/adc/ad4170.c new file +2
-0+/* Assume AVSS at GND (0V) if not provided */ + st->vrefs_uv[AD4170_AVSS_SUP ] = ret == -ENODEV ?0 : -ret;-ret ?!?!
That's because AVSS is never above system ground level (i.e. AVSS is either GND or a negative voltage). But we currently don't have support for reading negative voltages with the regulator framework. So, the current AD4170 support reads a positive value from the regulator, then inverts signal to make it negative :)
This needs a good comment and ideally a TODO item in the regulator framework. (It might be easy to implement by adding a flag without changing the type of
the field, if it's unsigned.)
Quoted 5 lines
Quoted 2 lines
Even if you know that *now* it can't have any other error code, it's quite fragile.
Yeah, I guess ADCs that can take bipolar power supplies are not that common. I couldn't think of any better way to have that, though.
Signature · 2 lines
With Best Regards, Andy Shevchenko
Re: [PATCH v5 02/11] iio: adc: Add basic support for AD4170
Quoted 10 lines · Andy Shevchenko
Quoted 2 lines · Marcelo Schmitt
Quoted 1 line · Andy Shevchenko
On Tue, Jun 10, 2025 at 05:31:25PM -0300, Marcelo Schmitt wrote:
...
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drivers/iio/adc/ad4170.c line 331
Quoted 1 line
drivers/iio/adc/ad4170.c new file +1
-0+return spi_write (st->spi, st->tx_buf, size +2 );... + sizeof(reg) ?
Quoted 7 lines
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The size of the specific ADC register is stored in the size variable. The result of sizeof(reg) can be different on different machines and will probably not be equal to the size of the register in the ADC chip.
Hmm... But shouldn't we have a variable type that respects the
sizeof()of the register in HW to keep it there? 2 is magic.
I'll add a define for that constant.
For clarification, there is a 2 byte instruction phase during which the driver sends the R/W flag and register address. After that, it sends the data to be written to the register. There are 1 byte, 2 byte, and 3 byte long registers. So, the total transfer length is 2 + reg size.
...
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drivers/iio/adc/ad4170.c line 1416
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drivers/iio/adc/ad4170.c new file +2
-0+/* Assume AVSS at GND (0V) if not provided */ + st->vrefs_uv[AD4170_AVSS_SUP ] = ret == -ENODEV ?0 : -ret;-ret ?!?!
Quoted 8 lines
Quoted 4 lines
That's because AVSS is never above system ground level (i.e. AVSS is either GND or a negative voltage). But we currently don't have support for reading negative voltages with the regulator framework. So, the current AD4170 support reads a positive value from the regulator, then inverts signal to make it negative :)
This needs a good comment and ideally a TODO item in the regulator framework. (It might be easy to implement by adding a flag without changing the type of
the field, if it's unsigned.)
I'll add a TODO mark and expand the comment in the driver.
Not sure about sending a patch only adding a TODO to the regulator framework. Aren't developers expected to propose things?
I'm anticipating 'talk is cheap, show me the code' coming.
Thanks,
Marcelo
Re: [PATCH v5 02/11] iio: adc: Add basic support for AD4170
Quoted 4 lines · Marcelo Schmitt
Quoted 3 lines · Andy Shevchenko
Quoted 2 lines · Marcelo Schmitt
Quoted 1 line · Andy Shevchenko
On Tue, Jun 10, 2025 at 05:31:25PM -0300, Marcelo Schmitt wrote:
...
Quoted 3 lines
Not sure about sending a patch only adding a TODO to the regulator framework. Aren't developers expected to propose things?
I'm anticipating 'talk is cheap, show me the code' coming.
This maybe done in a form of the discussion started with the maintainers and stakeholders of regulator framework. It doesn't mean we must have something in the form of the patch right now.
Signature · 2 lines
With Best Regards, Andy Shevchenko
Jonathan Cameron
maintainerRe: [PATCH v5 02/11] iio: adc: Add basic support for AD4170
Quoted 8 lines · On Thu, 12 Jun 2025 21:48:27 +0300 Andy Shevchenko…
Quoted 4 lines · Marcelo Schmitt
Quoted 3 lines · Andy Shevchenko
Quoted 2 lines · Marcelo Schmitt
Quoted 1 line · Andy Shevchenko
On Tue, Jun 10, 2025 at 05:31:25PM -0300, Marcelo Schmitt wrote:
...
Quoted 8 lines
Quoted 3 lines
Not sure about sending a patch only adding a TODO to the regulator framework. Aren't developers expected to propose things?
I'm anticipating 'talk is cheap, show me the code' coming.This maybe done in a form of the discussion started with the maintainers and stakeholders of regulator framework. It doesn't mean we must have something in the form of the patch right now.
Been quite a few years since we last looked at negative regulator voltages. Might be worth a revisit.
J
Jonathan Cameron
maintainerRe: [PATCH v5 02/11] iio: adc: Add basic support for AD4170
In reply to Andy ShevchenkoQuoted 32 lines · On Thu, 12 Jun 2025 15:48:02 +0300 Andy Shevchenko…
Quoted 2 lines · Marcelo Schmitt
Quoted 1 line · Andy Shevchenko
On Tue, Jun 10, 2025 at 05:31:25PM -0300, Marcelo Schmitt wrote:
...
Quoted 7 lines
Quoted 3 lines
drivers/iio/adc/ad4170.c line 331
Quoted 1 line
drivers/iio/adc/ad4170.c new file +1
-0+return spi_write (st->spi, st->tx_buf, size +2 );... + sizeof(reg) ?
The size of the specific ADC register is stored in the size variable. The result of sizeof(reg) can be different on different machines and will probably not be equal to the size of the register in the ADC chip.
Hmm... But shouldn't we have a variable type that respects the
sizeof()of the register in HW to keep it there? 2 is magic....
Quoted 13 lines
Quoted 12 lines
drivers/iio/adc/ad4170.c line 387
Quoted 8 lines
drivers/iio/adc/ad4170.c new file +8
-0+static bool ad4170_setup_eq (struct ad4170_setup *a,struct ad4170_setup *b) +{ +/* +* The use of static_assert() here is to make sure that, if +* struct ad4170_setup is ever changed (e.g. a field is added to the +* struct's declaration), the comparison below is adapted to keep +* comparing each of struct ad4170_setup fields. +*/ Okay. But this also will trigger the case when the field just changes the type. So, it also brings false positives. I really think this is wrong place to put
static_assert(). To me it looks like a solving rare problem, if any.
Quoted 7 lines
Quoted 4 lines
I think it is unlikely that struct
ad4170_setupdeclaration will ever change. The fields match the registers that are associated with a channel setup and the their types match the size of the respective registers. So, I do agree that triggering this assert would be something rare.Yep, which thinks to me as an unneeded noise in the code, making it harder to read and maintain (in _this_ case).
This whole thing with static asserts was a compromise in the original drivers. I'm fine with just dropping it (here at least) and relying on review to pick up changes to these structures.
Jonathan
David Lechner
reviewerRe: [PATCH v5 02/11] iio: adc: Add basic support for AD4170
In reply to Marcelo SchmittQuoted 15 lines · Marcelo Schmitt
From: Ana-Maria Cusco <[email protected]>
The AD4170 is a multichannel, low noise, 24-bit precision sigma-delta analog to digital converter. The AD4170 design offers a flexible data acquisition solution with crosspoint multiplexed analog inputs, configurable ADC voltage reference inputs, ultra-low noise integrated PGA, digital filtering, wide range of configurable output data rates, internal oscillator and temperature sensor, four GPIOs, and integrated features for interfacing with load cell weigh scales, RTD, and thermocouple sensors.
Add basic support for the AD4170 ADC with the following features:
- Single-shot read.
- Analog front end PGA configuration.
- Differential and pseudo-differential input configuration.
...
Quoted 7 lines
drivers/iio/adc/ad4170.c new file +7
-0+static int ad4170_fill_scale_tbl (struct iio_dev *indio_dev, +struct iio_chan_spec const *chan) +{ +struct ad4170_state *st =iio_priv (indio_dev); +struct ad4170_chan_info *chan_info = &st->chan_infos[chan->address]; +struct device *dev = &st->spi->dev; +int bipolar = chan->scan_type.sign =='s' ?1 :0 ;
drivers/iio/adc/ad4170.c line 974
Quoted 10 lines
drivers/iio/adc/ad4170.c new file +10
-0+int precision_bits = chan->scan_type.realbits; +int pga, ainm_voltage, ret; +unsigned long long offset; + + ainm_voltage =0 ; + ret =ad4170_get_ain_voltage_uv (st, chan->channel2, &ainm_voltage); +if (ret <0 ) +return dev_err_probe (dev, ret,"Failed to fill scale table\n" ); + +for (pga =0 ; pga <AD4170_NUM_PGA_OPTIONS ; pga++) {
From what I read in the datasheet, it sounds like if adi,reference-buffer is precharge, then the PGA is bypassed, so there would only be 1 option in that case (gain = 1).
Quoted 65 lines
drivers/iio/adc/ad4170.c new file +65
-0+u64 nv; +unsigned int lshift, rshift; + +/* +* The PGA options are numbered from 0 to 9, with option 0 being +* a gain of 2^0 (no actual gain), and 7 meaning a gain of 2^7. +* Option 8, though, sets a gain of 0.5, so the input signal can +* be attenuated by 2 rather than amplified. Option 9, allows +* the signal to bypass the PGA circuitry (no gain). +* +* The scale factor to get ADC output codes to values in mV +* units is given by: +* _scale = (input_range / gain) / 2^precision +* AD4170 gain is a power of 2 so the above can be written as +* _scale = input_range / 2^(precision + gain) +* Keep the input range in µV to avoid truncating the less +* significan bits when right shifting it so to preserve scale +* precision. +*/ + nv = (u64 )chan_info->input_range_uv *NANO ; + lshift = !!(pga &BIT (3 ));/* handle options 8 and 9 */ + rshift = precision_bits - bipolar + (pga &GENMASK (2 ,0 )) - lshift; + chan_info->scale_tbl[pga][0 ] =0 ; + chan_info->scale_tbl[pga][1 ] =div_u64 (nv >> rshift,MILLI ); + +/* +* If the negative input is not at GND, the conversion result +* (which is relative to IN-) will be offset by the level at IN-. +* Use the scale factor the other way around to go from a known +* voltage to the corresponding ADC output code. +* With that, we are able to get to what would be the output +* code for the voltage at the negative input. +* If the negative input is not fixed, there is no offset. +*/ + offset = ((unsigned long long )abs (ainm_voltage)) *MICRO ; + offset =DIV_ROUND_CLOSEST_ULL (offset, chan_info->scale_tbl[pga][1 ]); + +/* +* After divided by the scale, offset will always fit into 31 +* bits. For _raw + _offset to be relative to GND, the value +* provided as _offset is of opposite sign than the real offset. +*/ +if (ainm_voltage >0 ) + chan_info->offset_tbl[pga] = -(int )(offset); +else + chan_info->offset_tbl[pga] = (int )(offset); + } +return 0 ; +} + +static int ad4170_read_avail (struct iio_dev *indio_dev, +struct iio_chan_spec const *chan, +const int **vals,int *type,int *length, +long info) +{ +struct ad4170_state *st =iio_priv (indio_dev); +struct ad4170_chan_info *chan_info = &st->chan_infos[chan->address]; + +switch (info) { +case IIO_CHAN_INFO_SCALE : + *vals = (int *)chan_info->scale_tbl; + *length =ARRAY_SIZE (chan_info->scale_tbl) *2 ; + *type =IIO_VAL_INT_PLUS_NANO ; +return IIO_AVAIL_LIST ; +default :
drivers/iio/adc/ad4170.c line 1049
Quoted 10 lines
drivers/iio/adc/ad4170.c new file +10
-0+return -EINVAL ; + } +} + +static int ad4170_set_pga (struct ad4170_state *st, +struct iio_chan_spec const *chan,int val,int val2) +{ +struct ad4170_chan_info *chan_info = &st->chan_infos[chan->address]; +struct ad4170_setup *setup = &chan_info->setup; +unsigned int pga;
Likewise, here would also need to check for precharge and only allow gain = 1 in in that case.
Quoted 17 lines
drivers/iio/adc/ad4170.c new file +17
-0+ +for (pga =0 ; pga <AD4170_NUM_PGA_OPTIONS ; pga++) { +if (val == chan_info->scale_tbl[pga][0 ] && + val2 == chan_info->scale_tbl[pga][1 ]) +break ; + } + +if (pga ==AD4170_NUM_PGA_OPTIONS ) +return -EINVAL ; + +guard (mutex)(&st->lock); + setup->afe &= ~AD4170_AFE_PGA_GAIN_MSK ; + setup->afe |=FIELD_PREP (AD4170_AFE_PGA_GAIN_MSK , pga); + +return ad4170_write_channel_setup (st, chan->address, false); +} +
Re: [PATCH v5 02/11] iio: adc: Add basic support for AD4170
Quoted 32 lines · David Lechner
Quoted 15 lines · Marcelo Schmitt
From: Ana-Maria Cusco <[email protected]>
The AD4170 is a multichannel, low noise, 24-bit precision sigma-delta analog to digital converter. The AD4170 design offers a flexible data acquisition solution with crosspoint multiplexed analog inputs, configurable ADC voltage reference inputs, ultra-low noise integrated PGA, digital filtering, wide range of configurable output data rates, internal oscillator and temperature sensor, four GPIOs, and integrated features for interfacing with load cell weigh scales, RTD, and thermocouple sensors.
Add basic support for the AD4170 ADC with the following features:
- Single-shot read.
- Analog front end PGA configuration.
- Differential and pseudo-differential input configuration....
Quoted 13 lines
drivers/iio/adc/ad4170.c new file +13
-0+static int ad4170_fill_scale_tbl (struct iio_dev *indio_dev, +struct iio_chan_spec const *chan) +{ +struct ad4170_state *st =iio_priv (indio_dev); +struct ad4170_chan_info *chan_info = &st->chan_infos[chan->address]; +struct device *dev = &st->spi->dev; +int bipolar = chan->scan_type.sign =='s' ?1 :0 ; +int precision_bits = chan->scan_type.realbits; +int pga, ainm_voltage, ret; +unsigned long long offset; + + ainm_voltage =0 ; + ret =ad4170_get_ain_voltage_uv (st, chan->channel2, &ainm_voltage);
Quoted 9 lines
drivers/iio/adc/ad4170.c line 974
Quoted 4 lines
drivers/iio/adc/ad4170.c new file +4
-0+if (ret <0 ) +return dev_err_probe (dev, ret,"Failed to fill scale table\n" ); + +for (pga =0 ; pga <AD4170_NUM_PGA_OPTIONS ; pga++) {From what I read in the datasheet, it sounds like if adi,reference-buffer is precharge, then the PGA is bypassed, so there would only be 1 option in that case (gain = 1).
Although not explicit in the datasheet, looks like there are two precharge buffers. One precharge buffer is used with the voltage reference inputs and is associated with the adi,positive/negative-reference-buffer dt properties. The configuration of that buffer is set through the REF_BUF_P/M fields of AFE registers. The datasheet doesn't mention the PGA on the section dedicated to describing reference and reference buffering features.
The other places a precharge buffer is mentioned refer to it as 'gain = 1 precharge'. My understanding is that the PGA bypass precharge buffer is a different buffer that is only used when PGA option 9 is set in the PGA_GAIN filed of AFE reg. The PGA bypass precharge buffer would be used in the analog input path while the reference buffers would be used in the reference input path.
Re: [PATCH v5 02/11] iio: adc: Add basic support for AD4170
In reply to Marcelo SchmittHi Marcelo,
kernel test robot noticed the following build warnings:
url: https://github.com/intel-lab-lkp/linux/commits/Marcelo-Schmitt/dt-bindings-iio-adc-Add-AD4170/20250611-101842 base: 4c6073fec2fee4827fa0dd8a4ab4e6f7bbc05ee6 patch link: https://lore.kernel.org/r/48598c0753cccf515addbe85acba3f883ff8f036.1749582679.git.marcelo.schmitt%40analog.com patch subject: [PATCH v5 02/11] iio: adc: Add basic support for AD4170 config: powerpc-randconfig-r072-20250613 (https://download.01.org/0day-ci/archive/20250614/[email protected]/config) compiler: clang version 21.0.0git (https://github.com/llvm/llvm-project f819f46284f2a79790038e1f6649172789734ae8)
If you fix the issue in a separate patch/commit (i.e. not just a new version of the same patch/commit), kindly add following tags
| Reported-by: kernel test robot <[email protected]> | Reported-by: Dan Carpenter <[email protected]> | Closes: https://lore.kernel.org/r/[email protected]/
smatch warnings:drivers/iio/adc/ad4170.c:1181 ad4170_parse_adc_channel_type() warn: passing zero to 'dev_err_probe'
vim +/dev_err_probe +1181 drivers/iio/adc/ad4170.c
dfefd2b2405829 Ana-Maria Cusco 2025-06-10 1170 static int ad4170_parse_adc_channel_type(struct device *dev,
dfefd2b2405829 Ana-Maria Cusco 2025-06-10 1171 struct fwnode_handle *child,
dfefd2b2405829 Ana-Maria Cusco 2025-06-10 1172 struct iio_chan_spec *chan)
dfefd2b2405829 Ana-Maria Cusco 2025-06-10 1173 {
dfefd2b2405829 Ana-Maria Cusco 2025-06-10 1174 int ret, ret2;
dfefd2b2405829 Ana-Maria Cusco 2025-06-10 1175 u32 pins[2];
dfefd2b2405829 Ana-Maria Cusco 2025-06-10 1176
dfefd2b2405829 Ana-Maria Cusco 2025-06-10 1177 /* Parse pseudo-differential channel configuration */
dfefd2b2405829 Ana-Maria Cusco 2025-06-10 1178 ret = fwnode_property_read_u32(child, "single-channel", &pins[0]);
dfefd2b2405829 Ana-Maria Cusco 2025-06-10 1179 ret2 = fwnode_property_read_u32(child, "common-mode-channel", &pins[1]);
dfefd2b2405829 Ana-Maria Cusco 2025-06-10 1180 if (!ret && ret2)
dfefd2b2405829 Ana-Maria Cusco 2025-06-10 @1181 return dev_err_probe(dev, ret,
^^^ret is zero, so this returns success. s/ret/ret2/.
dfefd2b2405829 Ana-Maria Cusco 2025-06-10 1182 "single-ended channels must define common-mode-channel\n");
dfefd2b2405829 Ana-Maria Cusco 2025-06-10 1183
dfefd2b2405829 Ana-Maria Cusco 2025-06-10 1184 if (!ret && !ret2) {
dfefd2b2405829 Ana-Maria Cusco 2025-06-10 1185 chan->differential = false;
dfefd2b2405829 Ana-Maria Cusco 2025-06-10 1186 chan->channel = pins[0];
dfefd2b2405829 Ana-Maria Cusco 2025-06-10 1187 chan->channel2 = pins[1];
dfefd2b2405829 Ana-Maria Cusco 2025-06-10 1188 return 0;
dfefd2b2405829 Ana-Maria Cusco 2025-06-10 1189 }
dfefd2b2405829 Ana-Maria Cusco 2025-06-10 1190 /* Failed to parse pseudo-diff chan props so try diff chan */
dfefd2b2405829 Ana-Maria Cusco 2025-06-10 1191
dfefd2b2405829 Ana-Maria Cusco 2025-06-10 1192 /* Parse differential channel configuration */
dfefd2b2405829 Ana-Maria Cusco 2025-06-10 1193 ret = fwnode_property_read_u32_array(child, "diff-channels", pins,
dfefd2b2405829 Ana-Maria Cusco 2025-06-10 1194 ARRAY_SIZE(pins));
dfefd2b2405829 Ana-Maria Cusco 2025-06-10 1195 if (!ret) {
dfefd2b2405829 Ana-Maria Cusco 2025-06-10 1196 chan->differential = true;
dfefd2b2405829 Ana-Maria Cusco 2025-06-10 1197 chan->channel = pins[0];
dfefd2b2405829 Ana-Maria Cusco 2025-06-10 1198 chan->channel2 = pins[1];
dfefd2b2405829 Ana-Maria Cusco 2025-06-10 1199 return 0;
dfefd2b2405829 Ana-Maria Cusco 2025-06-10 1200 }
dfefd2b2405829 Ana-Maria Cusco 2025-06-10 1201 return dev_err_probe(dev, ret,
dfefd2b2405829 Ana-Maria Cusco 2025-06-10 1202 "Channel must define one of diff-channels or single-channel.\n");
dfefd2b2405829 Ana-Maria Cusco 2025-06-10 1203 }Signature · 2 lines
0-DAY CI Kernel Test Service https://github.com/intel/lkp-tests/wiki
Re: [PATCH v5 02/11] iio: adc: Add basic support for AD4170
Quoted 35 lines · Dan Carpenter
Hi Marcelo,
kernel test robot noticed the following build warnings:
url: https://github.com/intel-lab-lkp/linux/commits/Marcelo-Schmitt/dt-bindings-iio-adc-Add-AD4170/20250611-101842 base: 4c6073fec2fee4827fa0dd8a4ab4e6f7bbc05ee6 patch link: https://lore.kernel.org/r/48598c0753cccf515addbe85acba3f883ff8f036.1749582679.git.marcelo.schmitt%40analog.com patch subject: [PATCH v5 02/11] iio: adc: Add basic support for AD4170 config: powerpc-randconfig-r072-20250613 (https://download.01.org/0day-ci/archive/20250614/[email protected]/config) compiler: clang version 21.0.0git (https://github.com/llvm/llvm-project f819f46284f2a79790038e1f6649172789734ae8)If you fix the issue in a separate patch/commit (i.e. not just a new version of the same patch/commit), kindly add following tags
| Reported-by: kernel test robot <[email protected]> | Reported-by: Dan Carpenter <[email protected]> | Closes: https://lore.kernel.org/r/[email protected]/smatch warnings:
drivers/iio/adc/ad4170.c:1181ad4170_parse_adc_channel_type()warn: passing zero to 'dev_err_probe'vim +/dev_err_probe +1181
drivers/iio/adc/ad4170.cdfefd2b2405829 Ana-Maria Cusco 2025-06-10 1170 static int ad4170_parse_adc_channel_type(struct device *dev, dfefd2b2405829 Ana-Maria Cusco 2025-06-10 1171 struct fwnode_handle *child, dfefd2b2405829 Ana-Maria Cusco 2025-06-10 1172 struct iio_chan_spec *chan) dfefd2b2405829 Ana-Maria Cusco 2025-06-10 1173 { dfefd2b2405829 Ana-Maria Cusco 2025-06-10 1174 int ret, ret2; dfefd2b2405829 Ana-Maria Cusco 2025-06-10 1175 u32 pins[2]; dfefd2b2405829 Ana-Maria Cusco 2025-06-10 1176 dfefd2b2405829 Ana-Maria Cusco 2025-06-10 1177 /* Parse pseudo-differential channel configuration */ dfefd2b2405829 Ana-Maria Cusco 2025-06-10 1178 ret = fwnode_property_read_u32(child, "single-channel", &pins[0]); dfefd2b2405829 Ana-Maria Cusco 2025-06-10 1179 ret2 = fwnode_property_read_u32(child, "common-mode-channel", &pins[1]); dfefd2b2405829 Ana-Maria Cusco 2025-06-10 1180 if (!ret && ret2) dfefd2b2405829 Ana-Maria Cusco 2025-06-10 @1181 return dev_err_probe(dev, ret, ^^^
Quoted 3 lines
ret is zero, so this returns success. s/ret/ret2/.
dfefd2b2405829Ana-Maria Cusco 2025-06-10 1182 "single-ended channels must define common-mode-channel\n");
Instead of ret and ret2 this code should be refactored to use _preperty_present() beforehands and return an error to the caller if it's present but failed to be read or not optional at all.
Quoted 20 lines
dfefd2b2405829 Ana-Maria Cusco 2025-06-10 1184 if (!ret && !ret2) {
dfefd2b2405829 Ana-Maria Cusco 2025-06-10 1185 chan->differential = false;
dfefd2b2405829 Ana-Maria Cusco 2025-06-10 1186 chan->channel = pins[0];
dfefd2b2405829 Ana-Maria Cusco 2025-06-10 1187 chan->channel2 = pins[1];
dfefd2b2405829 Ana-Maria Cusco 2025-06-10 1188 return 0;
dfefd2b2405829 Ana-Maria Cusco 2025-06-10 1189 }
dfefd2b2405829 Ana-Maria Cusco 2025-06-10 1190 /* Failed to parse pseudo-diff chan props so try diff chan */
dfefd2b2405829 Ana-Maria Cusco 2025-06-10 1191
dfefd2b2405829 Ana-Maria Cusco 2025-06-10 1192 /* Parse differential channel configuration */
dfefd2b2405829 Ana-Maria Cusco 2025-06-10 1193 ret = fwnode_property_read_u32_array(child, "diff-channels", pins,
dfefd2b2405829 Ana-Maria Cusco 2025-06-10 1194 ARRAY_SIZE(pins));
dfefd2b2405829 Ana-Maria Cusco 2025-06-10 1195 if (!ret) {
dfefd2b2405829 Ana-Maria Cusco 2025-06-10 1196 chan->differential = true;
dfefd2b2405829 Ana-Maria Cusco 2025-06-10 1197 chan->channel = pins[0];
dfefd2b2405829 Ana-Maria Cusco 2025-06-10 1198 chan->channel2 = pins[1];
dfefd2b2405829 Ana-Maria Cusco 2025-06-10 1199 return 0;
dfefd2b2405829 Ana-Maria Cusco 2025-06-10 1200 }
dfefd2b2405829 Ana-Maria Cusco 2025-06-10 1201 return dev_err_probe(dev, ret,
dfefd2b2405829 Ana-Maria Cusco 2025-06-10 1202 "Channel must define one of diff-channels or single-channel.\n");
dfefd2b2405829 Ana-Maria Cusco 2025-06-10 1203 }Signature · 2 lines
With Best Regards, Andy Shevchenko
PATCH v5 3/11 iio: adc: ad4170: Add support for calibration gain
In reply to Marcelo SchmittAdd support for ADC calibration gain configuration.
---
Change log v4 -> v5
- Squeezed info_mask_separate additions to reduce change diff.
drivers/iio/adc/ad4170.c | 20 ++++++++++++++++++++ 1 file changed, 20 insertions(+)
drivers/iio/adc/ad4170.c +20 -0
@@ -636,6 +636,7 @@ static const struct iio_chan_spec ad4170_channel_template = { .differential = 1, .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | BIT(IIO_CHAN_INFO_SCALE) | + BIT(IIO_CHAN_INFO_CALIBSCALE) | BIT(IIO_CHAN_INFO_OFFSET), .info_mask_separate_available = BIT(IIO_CHAN_INFO_SCALE), .scan_type = {
@@ -950,6 +951,9 @@ static int ad4170_read_raw(struct iio_dev *indio_dev, pga =FIELD_GET (AD4170_AFE_PGA_GAIN_MSK , setup->afe); *val = chan_info->offset_tbl[pga];return IIO_VAL_INT ; +case IIO_CHAN_INFO_CALIBSCALE : + *val = setup->gain; +return IIO_VAL_INT ;default :return -EINVAL ; }
@@ -1064,6 +1068,18 @@ static int ad4170_set_pga(struct ad4170_state *st,return ad4170_write_channel_setup (st, chan->address, false); } +static int ad4170_set_calib_gain (struct ad4170_state *st, +struct iio_chan_spec const *chan,int val) +{ +struct ad4170_chan_info *chan_info = &st->chan_infos[chan->address]; +struct ad4170_setup *setup = &chan_info->setup; + +guard (mutex)(&st->lock); + setup->gain = val; + +return ad4170_write_channel_setup (st, chan->address, false); +} +static int __ad4170_write_raw (struct iio_dev *indio_dev,struct iio_chan_spec const *chan,int val,int val2,long info)
@@ -1073,6 +1089,8 @@ static int __ad4170_write_raw(struct iio_dev *indio_dev,switch (info) {case IIO_CHAN_INFO_SCALE :return ad4170_set_pga (st, chan, val, val2); +case IIO_CHAN_INFO_CALIBSCALE : +return ad4170_set_calib_gain (st, chan, val);default :return -EINVAL ; }
@@ -1099,6 +1117,8 @@ static int ad4170_write_raw_get_fmt(struct iio_dev *indio_dev,switch (info) {case IIO_CHAN_INFO_SCALE :return IIO_VAL_INT_PLUS_NANO ; +case IIO_CHAN_INFO_CALIBSCALE : +return IIO_VAL_INT ;default :return -EINVAL ; }
Signature · 1 line
2.47.2
PATCH v5 4/11 iio: adc: ad4170: Add support for calibration bias
In reply to Marcelo SchmittAdd support for ADC calibration bias/offset configuration.
---
Change log v4 -> v5
- Squeezed info_mask_separate additions to reduce change diff.
drivers/iio/adc/ad4170.c | 19 +++++++++++++++++++ 1 file changed, 19 insertions(+)
drivers/iio/adc/ad4170.c +19 -0
@@ -636,6 +636,7 @@ static const struct iio_chan_spec ad4170_channel_template = { .differential = 1, .info_mask_separate =BIT (IIO_CHAN_INFO_RAW ) |BIT (IIO_CHAN_INFO_SCALE ) | +BIT (IIO_CHAN_INFO_CALIBBIAS ) |BIT (IIO_CHAN_INFO_CALIBSCALE ) | BIT(IIO_CHAN_INFO_OFFSET), .info_mask_separate_available = BIT(IIO_CHAN_INFO_SCALE),
@@ -951,6 +952,9 @@ static int ad4170_read_raw(struct iio_dev *indio_dev, pga =FIELD_GET (AD4170_AFE_PGA_GAIN_MSK , setup->afe); *val = chan_info->offset_tbl[pga];return IIO_VAL_INT ; +case IIO_CHAN_INFO_CALIBBIAS : + *val = setup->offset; +return IIO_VAL_INT ;case IIO_CHAN_INFO_CALIBSCALE : *val = setup->gain;return IIO_VAL_INT ;
@@ -1068,6 +1072,18 @@ static int ad4170_set_pga(struct ad4170_state *st,return ad4170_write_channel_setup (st, chan->address, false); } +static int ad4170_set_calib_offset (struct ad4170_state *st, +struct iio_chan_spec const *chan,int val) +{ +struct ad4170_chan_info *chan_info = &st->chan_infos[chan->address]; +struct ad4170_setup *setup = &chan_info->setup; + +guard (mutex)(&st->lock); + setup->offset = val; + +return ad4170_write_channel_setup (st, chan->address, false); +} +static int ad4170_set_calib_gain (struct ad4170_state *st,struct iio_chan_spec const *chan,int val) {
@@ -1089,6 +1105,8 @@ static int __ad4170_write_raw(struct iio_dev *indio_dev,switch (info) {case IIO_CHAN_INFO_SCALE :return ad4170_set_pga (st, chan, val, val2); +case IIO_CHAN_INFO_CALIBBIAS : +return ad4170_set_calib_offset (st, chan, val);case IIO_CHAN_INFO_CALIBSCALE :return ad4170_set_calib_gain (st, chan, val);default :
@@ -1117,6 +1135,7 @@ static int ad4170_write_raw_get_fmt(struct iio_dev *indio_dev,switch (info) {case IIO_CHAN_INFO_SCALE :return IIO_VAL_INT_PLUS_NANO ; +case IIO_CHAN_INFO_CALIBBIAS :case IIO_CHAN_INFO_CALIBSCALE :return IIO_VAL_INT ;default :
Signature · 1 line
2.47.2
PATCH v5 5/11 iio: adc: ad4170: Add digital filter and sample frequency config support
In reply to Marcelo SchmittAdd support for sinc3, sinc5, and averaged sinc5 digital filters along with sample frequency configuration.
---
No changes from v4.
drivers/iio/adc/ad4170.c | 262 ++++++++++++++++++++++++++++++++++++++- 1 file changed, 259 insertions(+), 3 deletions(-)
drivers/iio/adc/ad4170.c +259 -3
@@ -18,6 +18,7 @@#include <linux/interrupt.h> #include <linux/irq.h> #include <linux/math64.h> +#include <linux/minmax.h> #include <linux/module.h> #include <linux/property.h> #include <linux/regmap.h>
@@ -88,6 +89,9 @@#define AD4170_AFE_BIPOLAR_MSK BIT(4)#define AD4170_AFE_PGA_GAIN_MSK GENMASK(3, 0) +/* AD4170_FILTER_REG */ +#define AD4170_FILTER_FILTER_TYPE_MSK GENMASK(3, 0) +/* AD4170 register constants */ /* AD4170_CHAN_MAP_REG constants */
@@ -113,6 +117,11 @@#define AD4170_ADC_CTRL_MODE_SINGLE 0x4#define AD4170_ADC_CTRL_MODE_IDLE 0x7 +/* AD4170_FILTER_REG constants */ +#define AD4170_FILTER_FILTER_TYPE_SINC5_AVG 0x0 +#define AD4170_FILTER_FILTER_TYPE_SINC5 0x4 +#define AD4170_FILTER_FILTER_TYPE_SINC3 0x6 +/* Device properties and auxiliary constants */ #define AD4170_NUM_ANALOG_PINS 9
@@ -121,6 +130,7 @@#define AD4170_MAX_SETUPS 8#define AD4170_INVALID_SETUP 9#define AD4170_SPI_MAX_XFER_LEN 6 +#define AD4170_DEFAULT_SAMP_RATE (125 * HZ_PER_KHZ)#define AD4170_INT_REF_2_5V 2500000
@@ -129,6 +139,12 @@#define AD4170_NUM_PGA_OPTIONS 10 +/* Digital filter properties */ +#define AD4170_SINC3_MIN_FS 4 +#define AD4170_SINC3_MAX_FS 65532 +#define AD4170_SINC5_MIN_FS 1 +#define AD4170_SINC5_MAX_FS 256 +#define AD4170_GAIN_REG_DEFAULT 0x555555static const unsigned int ad4170_reg_size[] = {
@@ -182,6 +198,12 @@ enum ad4170_ref_select {AD4170_REF_AVDD }; +enum ad4170_filter_type { +AD4170_SINC5_AVG , +AD4170_SINC5 , +AD4170_SINC3 , +}; +enum ad4170_regulator {AD4170_AVDD_SUP ,AD4170_AVSS_SUP ,
@@ -203,6 +225,18 @@ static const char * const ad4170_int_pin_names[] = { [AD4170_INT_PIN_DIG_AUX1] = "dig_aux1", }; +static const unsigned int ad4170_sinc3_filt_fs_tbl[] = { +4 ,8 ,12 ,16 ,20 ,40 ,48 ,80 ,/* 0 - 7 */ +100 ,256 ,500 ,1000 ,5000 ,8332 ,10000 ,25000 ,/* 8 - 15 */ +50000 ,65532 ,/* 16 - 17 */ +}; + +#define AD4170_MAX_FS_TBL_SIZE ARRAY_SIZE(ad4170_sinc3_filt_fs_tbl) + +static const unsigned int ad4170_sinc5_filt_fs_tbl[] = { +1 ,2 ,4 ,8 ,12 ,16 ,20 ,40 ,48 ,80 ,100 ,256 , +}; +struct ad4170_chip_info {const char *name; };
@@ -260,6 +294,12 @@ struct ad4170_chan_info {bool enabled; }; +static const char *const ad4170_filt_names[] = { + [AD4170_SINC5_AVG ] ="sinc5+avg" , + [AD4170_SINC5 ] ="sinc5" , + [AD4170_SINC3 ] ="sinc3" , +}; +struct ad4170_state {struct mutex lock;/* Protect read-modify-write and multi write sequences */ int vrefs_uv[AD4170_MAX_SUP ];
@@ -269,6 +309,7 @@ struct ad4170_state {struct ad4170_chan_info chan_infos[AD4170_MAX_CHANNELS ];struct spi_device *spi;struct regmap *regmap; +int sps_tbl[ARRAY_SIZE (ad4170_filt_names)][AD4170_MAX_FS_TBL_SIZE ][2 ];struct completion completion;int pins_fn[AD4170_NUM_ANALOG_PINS ];u32 int_pin_sel;
@@ -280,6 +321,38 @@ struct ad4170_state {u8 rx_buf[4 ]; }; +static void ad4170_fill_sps_tbl (struct ad4170_state *st) +{ +unsigned int tmp0, tmp1, i; + +/* +* The ODR can be calculated the same way for sinc5+avg, sinc5, and +* sinc3 filter types with the exception that sinc5 filter has a +* narrowed range of allowed FILTER_FS values. +*/ +for (i =0 ; i <ARRAY_SIZE (ad4170_sinc3_filt_fs_tbl); i++) { + tmp0 =div_u64_rem (st->mclk_hz,32 * ad4170_sinc3_filt_fs_tbl[i], + &tmp1); + tmp1 =mult_frac (tmp1,MICRO ,32 * ad4170_sinc3_filt_fs_tbl[i]); +/* Fill sinc5+avg filter SPS table */ + st->sps_tbl[AD4170_SINC5_AVG ][i][0 ] = tmp0;/* Integer part */ + st->sps_tbl[AD4170_SINC5_AVG ][i][1 ] = tmp1;/* Fractional part */ + +/* Fill sinc3 filter SPS table */ + st->sps_tbl[AD4170_SINC3 ][i][0 ] = tmp0;/* Integer part */ + st->sps_tbl[AD4170_SINC3 ][i][1 ] = tmp1;/* Fractional part */ + } +/* Sinc5 filter ODR doesn't use all FILTER_FS bits */ +for (i =0 ; i <ARRAY_SIZE (ad4170_sinc5_filt_fs_tbl); i++) { + tmp0 =div_u64_rem (st->mclk_hz,32 * ad4170_sinc5_filt_fs_tbl[i], + &tmp1); + tmp1 =mult_frac (tmp1,MICRO ,32 * ad4170_sinc5_filt_fs_tbl[i]); +/* Fill sinc5 filter SPS table */ + st->sps_tbl[AD4170_SINC5 ][i][0 ] = tmp0;/* Integer part */ + st->sps_tbl[AD4170_SINC5 ][i][1 ] = tmp1;/* Fractional part */ + } +} +static int ad4170_debugfs_reg_access (struct iio_dev *indio_dev,unsigned int reg,unsigned int writeval,unsigned int *readval)
@@ -630,6 +703,100 @@ static int ad4170_set_channel_enable(struct ad4170_state *st,return 0 ; } +static int __ad4170_get_filter_type (unsigned int filter) +{ +u16 f_conf =FIELD_GET (AD4170_FILTER_FILTER_TYPE_MSK , filter); + +switch (f_conf) { +case AD4170_FILTER_FILTER_TYPE_SINC5_AVG : +return AD4170_SINC5_AVG ; +case AD4170_FILTER_FILTER_TYPE_SINC5 : +return AD4170_SINC5 ; +case AD4170_FILTER_FILTER_TYPE_SINC3 : +return AD4170_SINC3 ; +default : +return -EINVAL ; + } +} + +static int ad4170_set_filter_type (struct iio_dev *indio_dev, +struct iio_chan_spec const *chan, +unsigned int val) +{ +struct ad4170_state *st =iio_priv (indio_dev); +struct ad4170_chan_info *chan_info = &st->chan_infos[chan->address]; +struct ad4170_setup *setup = &chan_info->setup; +unsigned int filter_type_conf; +int ret; + +switch (val) { +case AD4170_SINC5_AVG : + filter_type_conf =AD4170_FILTER_FILTER_TYPE_SINC5_AVG ; +break ; +case AD4170_SINC5 : + filter_type_conf =AD4170_FILTER_FILTER_TYPE_SINC5 ; +break ; +case AD4170_SINC3 : + filter_type_conf =AD4170_FILTER_FILTER_TYPE_SINC3 ; +break ; +default : +return -EINVAL ; + } + +/* +* The filters provide the same ODR for a given filter_fs value but +* there are different minimum and maximum filter_fs limits for each +* filter. The filter_fs value will be adjusted if the current filter_fs +* is out of the limits of the just requested filter. Since the +* filter_fs value affects the ODR (sampling_frequency), changing the +* filter may lead to a change in the sampling frequency. +*/ + scoped_guard(mutex, &st->lock) { +if (!iio_device_claim_direct (indio_dev)) +return -EBUSY ; + +if (val ==AD4170_SINC5_AVG || val ==AD4170_SINC3 ) + setup->filter_fs =clamp (val,AD4170_SINC3_MIN_FS , +AD4170_SINC3_MAX_FS ); +else + setup->filter_fs =clamp (val,AD4170_SINC5_MIN_FS , +AD4170_SINC5_MAX_FS ); + + setup->filter &= ~AD4170_FILTER_FILTER_TYPE_MSK ; + setup->filter |=FIELD_PREP (AD4170_FILTER_FILTER_TYPE_MSK , + filter_type_conf); + + ret =ad4170_write_channel_setup (st, chan->address, false); +iio_device_release_direct (indio_dev); + } + +return ret; +} + +static int ad4170_get_filter_type (struct iio_dev *indio_dev, +struct iio_chan_spec const *chan) +{ +struct ad4170_state *st =iio_priv (indio_dev); +struct ad4170_chan_info *chan_info = &st->chan_infos[chan->address]; +struct ad4170_setup *setup = &chan_info->setup; + +return __ad4170_get_filter_type (setup->filter); +} + +static const struct iio_enum ad4170_filter_type_enum = { + .items = ad4170_filt_names, + .num_items =ARRAY_SIZE (ad4170_filt_names), + .get = ad4170_get_filter_type, + .set = ad4170_set_filter_type, +}; + +static const struct iio_chan_spec_ext_info ad4170_filter_type_ext_info[] = { +IIO_ENUM ("filter_type" ,IIO_SEPARATE , &ad4170_filter_type_enum), +IIO_ENUM_AVAILABLE ("filter_type" ,IIO_SHARED_BY_TYPE , + &ad4170_filter_type_enum), + { } +}; +static const struct iio_chan_spec ad4170_channel_template = { .type =IIO_VOLTAGE , .indexed =1 ,
@@ -638,8 +805,11 @@ static const struct iio_chan_spec ad4170_channel_template = {BIT (IIO_CHAN_INFO_SCALE ) |BIT (IIO_CHAN_INFO_CALIBBIAS ) |BIT (IIO_CHAN_INFO_CALIBSCALE ) | - BIT(IIO_CHAN_INFO_OFFSET), - .info_mask_separate_available = BIT(IIO_CHAN_INFO_SCALE), +BIT (IIO_CHAN_INFO_OFFSET ) | + BIT(IIO_CHAN_INFO_SAMP_FREQ), + .info_mask_separate_available =BIT (IIO_CHAN_INFO_SCALE ) | + BIT(IIO_CHAN_INFO_SAMP_FREQ), + .ext_info = ad4170_filter_type_ext_info, .scan_type = { .realbits = 24, .storagebits = 32,
@@ -931,7 +1101,8 @@ static int ad4170_read_raw(struct iio_dev *indio_dev,struct ad4170_state *st =iio_priv (indio_dev);struct ad4170_chan_info *chan_info = &st->chan_infos[chan->address];struct ad4170_setup *setup = &chan_info->setup; -unsigned int pga; +enum ad4170_filter_type f_type; +unsigned int pga, fs_idx;int ret;guard (mutex)(&st->lock);
@@ -952,6 +1123,27 @@ static int ad4170_read_raw(struct iio_dev *indio_dev, pga =FIELD_GET (AD4170_AFE_PGA_GAIN_MSK , setup->afe); *val = chan_info->offset_tbl[pga];return IIO_VAL_INT ; +case IIO_CHAN_INFO_SAMP_FREQ : + f_type =__ad4170_get_filter_type (setup->filter); +switch (f_type) { +case AD4170_SINC5_AVG : +case AD4170_SINC3 : + fs_idx =find_closest (setup->filter_fs, + ad4170_sinc3_filt_fs_tbl, +ARRAY_SIZE (ad4170_sinc3_filt_fs_tbl)); + *val = st->sps_tbl[f_type][fs_idx][0 ]; + *val2 = st->sps_tbl[f_type][fs_idx][1 ]; +return IIO_VAL_INT_PLUS_MICRO ; +case AD4170_SINC5 : + fs_idx =find_closest (setup->filter_fs, + ad4170_sinc5_filt_fs_tbl, +ARRAY_SIZE (ad4170_sinc5_filt_fs_tbl)); + *val = st->sps_tbl[f_type][fs_idx][0 ]; + *val2 = st->sps_tbl[f_type][fs_idx][1 ]; +return IIO_VAL_INT_PLUS_MICRO ; +default : +return -EINVAL ; + }case IIO_CHAN_INFO_CALIBBIAS : *val = setup->offset;return IIO_VAL_INT ;
@@ -1037,6 +1229,7 @@ static int ad4170_read_avail(struct iio_dev *indio_dev, {struct ad4170_state *st =iio_priv (indio_dev);struct ad4170_chan_info *chan_info = &st->chan_infos[chan->address]; +enum ad4170_filter_type f_type;switch (info) {case IIO_CHAN_INFO_SCALE :
@@ -1044,6 +1237,21 @@ static int ad4170_read_avail(struct iio_dev *indio_dev, *length =ARRAY_SIZE (chan_info->scale_tbl) *2 ; *type =IIO_VAL_INT_PLUS_NANO ;return IIO_AVAIL_LIST ; +case IIO_CHAN_INFO_SAMP_FREQ : + f_type =ad4170_get_filter_type (indio_dev, chan); + *vals = (int *)st->sps_tbl[f_type]; + *type =IIO_VAL_INT_PLUS_MICRO ; +switch (f_type) { +case AD4170_SINC5_AVG : +case AD4170_SINC3 : + *length =ARRAY_SIZE (ad4170_sinc3_filt_fs_tbl) *2 ; +return IIO_AVAIL_LIST ; +case AD4170_SINC5 : + *length =ARRAY_SIZE (ad4170_sinc5_filt_fs_tbl) *2 ; +return IIO_AVAIL_LIST ; +default : +return -EINVAL ; + }default :return -EINVAL ; }
@@ -1072,6 +1280,42 @@ static int ad4170_set_pga(struct ad4170_state *st,return ad4170_write_channel_setup (st, chan->address, false); } +static int ad4170_set_channel_freq (struct ad4170_state *st, +struct iio_chan_spec const *chan,int val, +int val2) +{ +struct ad4170_chan_info *chan_info = &st->chan_infos[chan->address]; +struct ad4170_setup *setup = &chan_info->setup; +enum ad4170_filter_type f_type =__ad4170_get_filter_type (setup->filter); +unsigned int filt_fs_tbl_size, i; + +switch (f_type) { +case AD4170_SINC5_AVG : +case AD4170_SINC3 : + filt_fs_tbl_size =ARRAY_SIZE (ad4170_sinc3_filt_fs_tbl); +break ; +case AD4170_SINC5 : + filt_fs_tbl_size =ARRAY_SIZE (ad4170_sinc5_filt_fs_tbl); +break ; + } + +for (i =0 ; i < filt_fs_tbl_size; i++) { +if (st->sps_tbl[f_type][i][0 ] == val && + st->sps_tbl[f_type][i][1 ] == val2) +break ; + } +if (i == filt_fs_tbl_size) +return -EINVAL ; + +guard (mutex)(&st->lock); +if (f_type ==AD4170_SINC5 ) + setup->filter_fs = ad4170_sinc5_filt_fs_tbl[i]; +else + setup->filter_fs = ad4170_sinc3_filt_fs_tbl[i]; + +return ad4170_write_channel_setup (st, chan->address, false); +} +static int ad4170_set_calib_offset (struct ad4170_state *st,struct iio_chan_spec const *chan,int val) {
@@ -1105,6 +1349,8 @@ static int __ad4170_write_raw(struct iio_dev *indio_dev,switch (info) {case IIO_CHAN_INFO_SCALE :return ad4170_set_pga (st, chan, val, val2); +case IIO_CHAN_INFO_SAMP_FREQ : +return ad4170_set_channel_freq (st, chan, val, val2);case IIO_CHAN_INFO_CALIBBIAS :return ad4170_set_calib_offset (st, chan, val);case IIO_CHAN_INFO_CALIBSCALE :
@@ -1135,6 +1381,8 @@ static int ad4170_write_raw_get_fmt(struct iio_dev *indio_dev,switch (info) {case IIO_CHAN_INFO_SCALE :return IIO_VAL_INT_PLUS_NANO ; +case IIO_CHAN_INFO_SAMP_FREQ : +return IIO_VAL_INT_PLUS_MICRO ;case IIO_CHAN_INFO_CALIBBIAS :case IIO_CHAN_INFO_CALIBSCALE :return IIO_VAL_INT ;
@@ -1364,6 +1612,8 @@ static int ad4170_initial_config(struct iio_dev *indio_dev)unsigned int i;int ret; +ad4170_fill_sps_tbl (st); + ret = regmap_update_bits(st->regmap, AD4170_ADC_CTRL_REG, AD4170_ADC_CTRL_MODE_MSK, FIELD_PREP(AD4170_ADC_CTRL_MODE_MSK,
@@ -1396,6 +1646,12 @@ static int ad4170_initial_config(struct iio_dev *indio_dev)return dev_err_probe (dev, ret,"Failed to write CHAN_MAP_REG\n" ); + ret =ad4170_set_channel_freq (st, chan, +AD4170_DEFAULT_SAMP_RATE ,0 ); +if (ret) +return dev_err_probe (dev, ret, +"Failed to set channel freq\n" ); + ret =ad4170_fill_scale_tbl (indio_dev, chan);if (ret) return dev_err_probe(dev, ret,
Signature · 1 line
2.47.2
David Lechner
reviewerRe: [PATCH v5 05/11] iio: adc: ad4170: Add digital filter and sample frequency config support
Quoted 2 lines · Marcelo Schmitt
Add support for sinc3, sinc5, and averaged sinc5 digital filters along with sample frequency configuration.
Wouldn't mind having a sentence here explaining why post filter control was omitted.
Quoted 3 lines
Signed-off-by Marcelo Schmitt <[email protected]>---
...
drivers/iio/adc/ad4170.c struct ad4170_chan_info { · line 298
Quoted 3 lines
drivers/iio/adc/ad4170.c +2
-0+static const char *const ad4170_filt_names[] = { + [AD4170_SINC5_AVG ] ="sinc5+avg" ,
Do we need to document this as possible type inDocumentation/ABI/testing/sysfs-bus-iio?
Quoted 4 lines
drivers/iio/adc/ad4170.c +4
-0+ [AD4170_SINC5] = "sinc5", + [AD4170_SINC3] = "sinc3", +}; +
PATCH v5 6/11 iio: adc: ad4170: Add support for buffered data capture
In reply to Marcelo SchmittExtend the AD4170 driver to allow buffered data capture in continuous read mode. In continuous read mode, the chip skips the instruction phase and outputs just ADC sample data, enabling faster sample rates to be reached. The internal channel sequencer always starts sampling from channel 0 and channel 0 must be enabled if more than one channel is selected for data capture. The scan mask validation callback checks if the aforementioned condition is met.
---
No changes from v4.
drivers/iio/adc/Kconfig | 2 + drivers/iio/adc/ad4170.c | 215 ++++++++++++++++++++++++++++++++++++++- 2 files changed, 216 insertions(+), 1 deletion(-)
drivers/iio/adc/Kconfig +2 -0
@@ -89,6 +89,8 @@ config AD4170 tristate "Analog Device AD4170 ADC Driver" depends on SPI select REGMAP_SPI + select IIO_BUFFER + select IIO_TRIGGERED_BUFFER help Say yes here to build support for Analog Devices AD4170 SPI analog to digital converters (ADC).
drivers/iio/adc/ad4170.c +214 -1
307 lines not on this page · raw message
Signature · 1 line
2.47.2
Andy Shevchenko
reviewerRe: [PATCH v5 06/11] iio: adc: ad4170: Add support for buffered data capture
Quoted 7 lines · Marcelo Schmitt
Extend the AD4170 driver to allow buffered data capture in continuous read mode. In continuous read mode, the chip skips the instruction phase and outputs just ADC sample data, enabling faster sample rates to be reached. The internal channel sequencer always starts sampling from channel 0 and channel 0 must be enabled if more than one channel is selected for data capture. The scan mask validation callback checks if the aforementioned condition is met.
...
Quoted 6 lines
drivers/iio/adc/ad4170.c +6
-0+static bool ad4170_validate_scan_mask (struct iio_dev *indio_dev, +const unsigned long *scan_mask) +{ +unsigned int masklength =iio_get_masklength (indio_dev); + +/*
drivers/iio/adc/ad4170.c static int ad4170_initial_config(struct iio_dev *indio_dev) · line 1812
Quoted 10 lines
drivers/iio/adc/ad4170.c +10
-0+* The channel sequencer cycles through the enabled channels in +* sequential order, from channel 0 to channel 15, bypassing disabled +* channels. When more than one channel is enabled, channel 0 must +* always be enabled. See datasheet channel_en register description at +* page 95. +*/ +if (bitmap_weight (scan_mask, masklength) >1 ) +return test_bit (0 , scan_mask); + +return bitmap_weight (scan_mask, masklength) ==1 ;
Hopefully compiler is smart enough to see the two calls for the same which can't be modified on the fly, but it definitely can't assume that the mask is one word long, meaning the bitmap API will choose the slow path for them. I would rather take a temporary variable approach.
It also minimizes the risk of race conditions in case something changes the data beneath (which is quite a nasty situation to begin with).
Quoted 1 line
+}
Signature · 2 lines
With Best Regards, Andy Shevchenko
PATCH v5 7/11 iio: adc: ad4170: Add clock provider support
In reply to Marcelo SchmittThe AD4170 chip can use an externally supplied clock at the XTAL2 pin, or an external crystal connected to the XTAL1 and XTAL2 pins. Alternatively, the AD4170 can provide its 16 MHz internal clock at the XTAL2 pin. In addition, the chip has a programmable clock divider that allows dividing the external or internal clock frequency, however, control for that is not provided in this patch. Extend the AD4170 driver so it effectively uses the provided external clock, if any, or supplies its own clock as a clock provider.
---
No changes from v4.
drivers/iio/adc/Kconfig | 1 + drivers/iio/adc/ad4170.c | 147 ++++++++++++++++++++++++++++++++++++++- 2 files changed, 147 insertions(+), 1 deletion(-)
drivers/iio/adc/Kconfig +1 -0
@@ -91,6 +91,7 @@ config AD4170 select REGMAP_SPI select IIO_BUFFER select IIO_TRIGGERED_BUFFER + depends on COMMON_CLK help Say yes here to build support for Analog Devices AD4170 SPI analog to digital converters (ADC).
drivers/iio/adc/ad4170.c +146 -1
207 lines not on this page · raw message
Signature · 1 line
2.47.2
David Lechner
reviewerRe: [PATCH v5 07/11] iio: adc: ad4170: Add clock provider support
Quoted 9 lines · Marcelo Schmitt
The AD4170 chip can use an externally supplied clock at the XTAL2 pin, or an external crystal connected to the XTAL1 and XTAL2 pins. Alternatively, the AD4170 can provide its 16 MHz internal clock at the XTAL2 pin. In addition, the chip has a programmable clock divider that allows dividing the external or internal clock frequency, however, control for that is not provided in this patch. Extend the AD4170 driver so it effectively uses the provided external clock, if any, or supplies its own clock as a clock provider.
...
Quoted 9 lines
drivers/iio/adc/ad4170.c +9
-0+static int ad4170_clock_select (struct iio_dev *indio_dev) +{ +struct ad4170_state *st =iio_priv (indio_dev); +struct device *dev = &st->spi->dev; +struct clk *ext_clk; +int ret; + + ext_clk =devm_clk_get_optional_enabled (dev,NULL ); +if (IS_ERR (ext_clk))
drivers/iio/adc/ad4170.c static int ad4170_parse_channels(struct iio_dev *indio_dev) · line 1730
Quoted 10 lines
drivers/iio/adc/ad4170.c +10
-0+return dev_err_probe (dev,PTR_ERR (ext_clk), +"Failed to get external clock\n" ); + +if (!ext_clk) { +/* Use internal clock reference */ + st->mclk_hz =AD4170_INT_CLOCK_16MHZ ; + st->clock_ctrl |=FIELD_PREP (AD4170_CLOCK_CTRL_CLOCKSEL_MSK , +AD4170_CLOCK_CTRL_CLOCKSEL_INT_OUT ); + +if (!device_property_read_bool (&st->spi->dev,"#clock-cells" ))
This isn't a flag, so device_property_present() is probably more correct.
Quoted 24 lines
drivers/iio/adc/ad4170.c +24
-0+return 0 ; + +return ad4170_register_clk_provider (indio_dev); + } + +/* Read optional clock-names prop to specify the external clock type */ + ret =device_property_match_property_string (dev,"clock-names" , + ad4170_clk_sel, +ARRAY_SIZE (ad4170_clk_sel)); + + ret = ret <0 ?0 : ret;/* Default to external clock if no clock-names */ + st->clock_ctrl |=FIELD_PREP (AD4170_CLOCK_CTRL_CLOCKSEL_MSK , +AD4170_CLOCK_CTRL_CLOCKSEL_EXT + ret); + + st->mclk_hz =clk_get_rate (ext_clk); +if (st->mclk_hz <AD4170_EXT_CLOCK_MHZ_MIN || + st->mclk_hz >AD4170_EXT_CLOCK_MHZ_MAX ) { +return dev_err_probe (dev, -EINVAL , +"Invalid external clock frequency %u\n" , + st->mclk_hz); + } + +return 0 ; +}
Re: [PATCH v5 07/11] iio: adc: ad4170: Add clock provider support
Quoted 1 line · David Lechner
On 6/10/25 3:33 PM, Marcelo Schmitt wrote:
...
Quoted 5 lines
Quoted 1 line
+ if (!device_property_read_bool(&st->spi->dev, "#clock-cells"))
This isn't a flag, so
device_property_present()is probably more correct.Quoted 1 line
+ return 0;
Good catch! +1 to this, it must not be read_bool as it's not a boolean property.
Signature · 2 lines
With Best Regards, Andy Shevchenko
PATCH v5 8/11 iio: adc: ad4170: Add GPIO controller support
In reply to Marcelo SchmittThe AD4170 has four multifunctional pins that can be used as GPIOs. The GPIO functionality can be accessed when the AD4170 chip is not busy performing continuous data capture or handling any other register read/write request. Also, the AD4170 does not provide any interrupt based on GPIO pin states so AD4170 GPIOs can't be used as interrupt sources.
Implement gpio_chip callbacks to make AD4170 GPIO pins controllable through the gpiochip interface.
---
No changes from v4.
drivers/iio/adc/Kconfig | 1 + drivers/iio/adc/ad4170.c | 224 ++++++++++++++++++++++++++++++++++++++- 2 files changed, 224 insertions(+), 1 deletion(-)
drivers/iio/adc/Kconfig +1 -0
@@ -92,6 +92,7 @@ config AD4170 select IIO_BUFFER select IIO_TRIGGERED_BUFFER depends on COMMON_CLK + depends on GPIOLIB help Say yes here to build support for Analog Devices AD4170 SPI analog to digital converters (ADC).
drivers/iio/adc/ad4170.c +223 -1
282 lines not on this page · raw message
Signature · 1 line
2.47.2
Re: [PATCH v5 08/11] iio: adc: ad4170: Add GPIO controller support
Quoted 11 lines · Marcelo Schmitt
The AD4170 has four multifunctional pins that can be used as GPIOs. The GPIO functionality can be accessed when the AD4170 chip is not busy performing continuous data capture or handling any other register read/write request. Also, the AD4170 does not provide any interrupt based on GPIO pin states so AD4170 GPIOs can't be used as interrupt sources.
Implement
gpio_chipcallbacks to make AD4170 GPIO pins controllable through the gpiochip interface.Signed-off-by Marcelo Schmitt <[email protected]>
Looks good to me!
Yours,
Linus Walleij
PATCH v5 9/11 iio: adc: ad4170: Add support for internal temperature sensor
In reply to Marcelo SchmittThe AD4170 has an internal temperature sensor that can be read using the ADC. Whenever possible, configure an IIO channel to provide the chip's temperature.
---
No changes since v3.
drivers/iio/adc/ad4170.c | 72 ++++++++++++++++++++++++++++++++++++++-- 1 file changed, 69 insertions(+), 3 deletions(-)
drivers/iio/adc/ad4170.c +69 -3
@@ -883,6 +883,27 @@ static const struct iio_chan_spec ad4170_channel_template = { }, }; +static const struct iio_chan_spec ad4170_temp_channel_template = { + .type =IIO_TEMP , + .indexed =0 , + .channel =17 , + .channel2 =17 , + .info_mask_separate =BIT (IIO_CHAN_INFO_RAW ) | +BIT (IIO_CHAN_INFO_SCALE ) | +BIT (IIO_CHAN_INFO_OFFSET ) | +BIT (IIO_CHAN_INFO_CALIBSCALE ) | +BIT (IIO_CHAN_INFO_CALIBBIAS ) | +BIT (IIO_CHAN_INFO_SAMP_FREQ ), + .info_mask_separate_available =BIT (IIO_CHAN_INFO_SAMP_FREQ ), + .scan_type = { + .sign ='s' , + .realbits =24 , + .storagebits =32 , + .shift =8 , + .endianness =IIO_BE , + }, +}; +/* * Receives the number of a multiplexed AD4170 input (ain_n), and stores the * voltage (in µV) of the specified input into ain_voltage. If the input number
@@ -1182,9 +1203,27 @@ static int ad4170_read_raw(struct iio_dev *indio_dev,return ret;case IIO_CHAN_INFO_SCALE : pga =FIELD_GET (AD4170_AFE_PGA_GAIN_MSK , setup->afe); - *val = chan_info->scale_tbl[pga][0 ]; - *val2 = chan_info->scale_tbl[pga][1 ]; -return IIO_VAL_INT_PLUS_NANO ; +switch (chan->type) { +case IIO_VOLTAGE : + *val = chan_info->scale_tbl[pga][0 ]; + *val2 = chan_info->scale_tbl[pga][1 ]; +return IIO_VAL_INT_PLUS_NANO ; + +case IIO_TEMP : +/* +* The scale_tbl converts output codes to mV units so +* multiply by MILLI to make the factor convert to µV. +* Then, apply the temperature sensor change sensitivity +* of 477 μV/K. Finally, multiply the result by MILLI +* again to comply with milli degrees Celsius IIO ABI. +*/ + *val =0 ; + *val2 =DIV_ROUND_CLOSEST (chan_info->scale_tbl[pga][1 ] *MILLI ,477 ) * +MILLI ; +return IIO_VAL_INT_PLUS_NANO ; +default : +return -EINVAL ; + }case IIO_CHAN_INFO_OFFSET : pga =FIELD_GET (AD4170_AFE_PGA_GAIN_MSK , setup->afe); *val = chan_info->offset_tbl[pga];
@@ -1834,12 +1873,39 @@ static int ad4170_parse_channels(struct iio_dev *indio_dev)if (num_channels >AD4170_MAX_CHANNELS )return dev_err_probe (dev, -EINVAL ,"Too many channels\n" ); +/* Add one for temperature */ + num_channels =min (num_channels +1 ,AD4170_MAX_CHANNELS ); +device_for_each_child_node_scoped (dev, child) { ret =ad4170_parse_channel_node (indio_dev, child, chan_num++);if (ret)return ret; } +/* +* Add internal temperature sensor channel if the maximum number of +* channels has not been reached. +*/ +if (num_channels <AD4170_MAX_CHANNELS ) { +struct ad4170_setup *setup = &st->chan_infos[chan_num].setup; + + st->chans[chan_num] = ad4170_temp_channel_template; + st->chans[chan_num].address = chan_num; + st->chans[chan_num].scan_index = chan_num; + + st->chan_infos[chan_num].setup_num =AD4170_INVALID_SETUP ; + st->chan_infos[chan_num].initialized = true; + + setup->afe |=FIELD_PREP (AD4170_AFE_REF_SELECT_MSK , +AD4170_REF_AVDD ); + + ret =ad4170_get_input_range (st, &st->chans[chan_num], chan_num, +AD4170_REF_AVDD ); +if (ret <0 ) +return dev_err_probe (dev, ret,"Invalid input config\n" ); + + st->chan_infos[chan_num].input_range_uv = ret; + } indio_dev->num_channels = num_channels; indio_dev->channels = st->chans;
Signature · 1 line
2.47.2
PATCH v5 10/11 iio: adc: ad4170: Add support for weigh scale and RTD sensors
In reply to Marcelo SchmittThe AD4170 design has features to aid interfacing with weigh scale and RTD sensors that are expected to be setup with external circuitry for proper sensor operation. A key characteristic of those sensors is that the circuit they are in must be excited with a pair of signals. The external circuit can be excited either by voltage supply or by AD4170 excitation signals. The sensor can then be read through a different pair of lines that are connected to AD4170 ADC.
Configure AD4170 to handle external circuit sensors.
---
Change log v4 -> v5
- Tweaked commits/patches to reduce diff.
- Dropped unneeded local variable.
drivers/iio/adc/ad4170.c | 494 ++++++++++++++++++++++++++++++++++++++- 1 file changed, 490 insertions(+), 4 deletions(-)
drivers/iio/adc/ad4170.c +490 -4
@@ -67,6 +67,8 @@#define AD4170_FILTER_FS_REG (x) (0xC7 + 14 * (x))#define AD4170_OFFSET_REG (x) (0xCA + 14 * (x))#define AD4170_GAIN_REG (x) (0xCD + 14 * (x)) +#define AD4170_V_BIAS_REG 0x135 +#define AD4170_CURRENT_SRC_REG (x) (0x139 + 2 * (x))#define AD4170_GPIO_MODE_REG 0x191#define AD4170_GPIO_OUTPUT_REG 0x193#define AD4170_GPIO_INPUT_REG 0x195
@@ -98,6 +100,10 @@#define AD4170_CHAN_MAP_AINP_MSK GENMASK(12, 8)#define AD4170_CHAN_MAP_AINM_MSK GENMASK(4, 0) +/* AD4170_MISC_REG */ +#define AD4170_MISC_CHOP_IEXC_MSK GENMASK(15, 14) +#define AD4170_MISC_CHOP_ADC_MSK GENMASK(9, 8) +/* AD4170_AFE_REG */ #define AD4170_AFE_REF_BUF_M_MSK GENMASK(11, 10)#define AD4170_AFE_REF_BUF_P_MSK GENMASK(9, 8)
@@ -108,12 +114,19 @@/* AD4170_FILTER_REG */ #define AD4170_FILTER_FILTER_TYPE_MSK GENMASK(3, 0) +/* AD4170_CURRENT_SRC_REG */ +#define AD4170_CURRENT_SRC_I_OUT_PIN_MSK GENMASK(12, 8) +#define AD4170_CURRENT_SRC_I_OUT_VAL_MSK GENMASK(2, 0) +/* AD4170_GPIO_MODE_REG */ #define AD4170_GPIO_MODE_GPIO0_MSK GENMASK(1, 0)#define AD4170_GPIO_MODE_GPIO1_MSK GENMASK(3, 2)#define AD4170_GPIO_MODE_GPIO2_MSK GENMASK(5, 4)#define AD4170_GPIO_MODE_GPIO3_MSK GENMASK(7, 6) +/* AD4170_GPIO_OUTPUT_REG */ +#define AD4170_GPIO_OUTPUT_GPIO_MSK (x) BIT(x) +/* AD4170 register constants */ /* AD4170_CLOCK_CTRL_REG constants */
@@ -137,6 +150,11 @@#define AD4170_CHAN_MAP_REFIN2_N 28#define AD4170_CHAN_MAP_REFOUT 29 +/* AD4170_MISC_REG constants */ +#define AD4170_MISC_CHOP_IEXC_PAIR1 0x1 +#define AD4170_MISC_CHOP_IEXC_PAIR2 0x2 +#define AD4170_MISC_CHOP_IEXC_BOTH 0x3 +/* AD4170_PIN_MUXING_REG constants */ #define AD4170_PIN_MUXING_DIG_AUX1_DISABLED 0x0#define AD4170_PIN_MUXING_DIG_AUX1_RDY 0x1
@@ -154,6 +172,10 @@#define AD4170_FILTER_FILTER_TYPE_SINC5 0x4#define AD4170_FILTER_FILTER_TYPE_SINC3 0x6 +/* AD4170_CURRENT_SRC_REG constants */ +#define AD4170_CURRENT_SRC_I_OUT_PIN_AIN (x) (x) +#define AD4170_CURRENT_SRC_I_OUT_PIN_GPIO (x) ((x) + 17) +/* AD4170_GPIO_MODE_REG constants */ #define AD4170_GPIO_MODE_GPIO_INPUT 1#define AD4170_GPIO_MODE_GPIO_OUTPUT 2
@@ -167,6 +189,7 @@#define AD4170_MAX_SETUPS 8#define AD4170_INVALID_SETUP 9#define AD4170_SPI_MAX_XFER_LEN 6 +#define AD4170_NUM_CURRENT_SRC 4#define AD4170_DEFAULT_SAMP_RATE (125 * HZ_PER_KHZ)#define AD4170_INT_REF_2_5V 2500000
@@ -188,8 +211,19 @@#define AD4170_ADC_CTRL_CONT_READ_EXIT 0xA5 +/* Analog pin functions */ +#define AD4170_PIN_UNASSIGNED 0x00 +#define AD4170_PIN_ANALOG_IN 0x01 +#define AD4170_PIN_CURRENT_OUT 0x02 +#define AD4170_PIN_VBIAS 0x04 +/* GPIO pin functions */ #define AD4170_GPIO_UNASSIGNED 0x00 +#define AD4170_GPIO_AC_EXCITATION 0x02 +#define AD4170_GPIO_OUTPUT 0x04 + +/* Current source */ +#define AD4170_CURRENT_SRC_DISABLED 0xFFstatic const unsigned int ad4170_reg_size[] = { [AD4170_CONFIG_A_REG ] =1 ,
@@ -228,6 +262,8 @@ static const unsigned int ad4170_reg_size[] = { [AD4170_OFFSET_REG(5) ... AD4170_GAIN_REG(5)] = 3, [AD4170_OFFSET_REG(6) ... AD4170_GAIN_REG(6)] = 3, [AD4170_OFFSET_REG(7) ... AD4170_GAIN_REG(7)] = 3, + [AD4170_V_BIAS_REG ] =2 , + [AD4170_CURRENT_SRC_REG(0) ... AD4170_CURRENT_SRC_REG(3)] = 2, [AD4170_GPIO_MODE_REG] = 2, [AD4170_GPIO_OUTPUT_REG] = 2, [AD4170_GPIO_INPUT_REG] = 2,
@@ -290,6 +326,41 @@ static const unsigned int ad4170_sinc5_filt_fs_tbl[] = { 1, 2, 4, 8, 12, 16, 20, 40, 48, 80, 100, 256, }; +static const unsigned int ad4170_iout_pin_tbl[] = { +AD4170_CURRENT_SRC_I_OUT_PIN_AIN (0 ), +AD4170_CURRENT_SRC_I_OUT_PIN_AIN (1 ), +AD4170_CURRENT_SRC_I_OUT_PIN_AIN (2 ), +AD4170_CURRENT_SRC_I_OUT_PIN_AIN (3 ), +AD4170_CURRENT_SRC_I_OUT_PIN_AIN (4 ), +AD4170_CURRENT_SRC_I_OUT_PIN_AIN (5 ), +AD4170_CURRENT_SRC_I_OUT_PIN_AIN (6 ), +AD4170_CURRENT_SRC_I_OUT_PIN_AIN (7 ), +AD4170_CURRENT_SRC_I_OUT_PIN_AIN (8 ), +AD4170_CURRENT_SRC_I_OUT_PIN_GPIO (0 ), +AD4170_CURRENT_SRC_I_OUT_PIN_GPIO (1 ), +AD4170_CURRENT_SRC_I_OUT_PIN_GPIO (2 ), +AD4170_CURRENT_SRC_I_OUT_PIN_GPIO (3 ), +}; + +static const unsigned int ad4170_iout_current_ua_tbl[] = { +0 ,10 ,50 ,100 ,250 ,500 ,1000 ,1500 , +}; + +enum ad4170_sensor_enum { +AD4170_ADC_SENSOR =0 , +AD4170_WEIGH_SCALE_SENSOR =1 , +AD4170_RTD_SENSOR =2 , +AD4170_THERMOCOUPLE_SENSOR =3 , +}; + +/* maps adi,sensor-type property value to enum */ +static const char *const ad4170_sensor_type[] = { + [AD4170_ADC_SENSOR ] ="adc" , + [AD4170_WEIGH_SCALE_SENSOR ] ="weighscale" , + [AD4170_RTD_SENSOR ] ="rtd" , + [AD4170_THERMOCOUPLE_SENSOR ] ="thermocouple" , +}; +struct ad4170_chip_info {const char *name; };
@@ -374,6 +445,7 @@ struct ad4170_state {struct gpio_chip gpiochip;unsigned int clock_ctrl;int gpio_fn[AD4170_NUM_GPIO_PINS ]; +unsigned int cur_src_pins[AD4170_NUM_CURRENT_SRC ];/* * DMA (thus cache coherency maintenance) requires the transfer buffers * to live in their own cache lines.
@@ -918,6 +990,19 @@ static int ad4170_get_ain_voltage_uv(struct ad4170_state *st, int ain_n,int v_diff; *ain_voltage =0 ; +/* +* The voltage bias (vbias) sets the common-mode voltage of the channel +* to (AVDD + AVSS)/2. If provided, AVSS supply provides the magnitude +* (absolute value) of the negative voltage supplied to the AVSS pin. +* So, we do AVDD - AVSS to compute the DC voltage generated by the bias +* voltage generator. +*/ +if (st->pins_fn[ain_n] &AD4170_PIN_VBIAS ) { +int v_diff = st->vrefs_uv[AD4170_AVDD_SUP ] - st->vrefs_uv[AD4170_AVSS_SUP ]; + *ain_voltage = v_diff /2 ; +return 0 ; + } +if (ain_n <=AD4170_CHAN_MAP_TEMP_SENSOR )return 0 ;
@@ -972,6 +1057,19 @@ static int ad4170_get_ain_voltage_uv(struct ad4170_state *st, int ain_n, } } +static int ad4170_validate_analog_input (struct ad4170_state *st,int pin) +{ +if (pin <=AD4170_MAX_ANALOG_PINS ) { +if (st->pins_fn[pin] &AD4170_PIN_CURRENT_OUT ) +return dev_err_probe (&st->spi->dev, -EINVAL , +"Pin %d already used with fn %u.\n" , + pin, st->pins_fn[pin]); + + st->pins_fn[pin] |=AD4170_PIN_ANALOG_IN ; + } +return 0 ; +} +static int ad4170_validate_channel_input (struct ad4170_state *st,int pin,bool com) {/* Check common-mode input pin is mapped to a special input. */
@@ -986,7 +1084,7 @@ static int ad4170_validate_channel_input(struct ad4170_state *st, int pin, bool"Invalid analog input pin number. %d\n" , pin); -return 0 ; +return ad4170_validate_analog_input (st, pin); }/*
@@ -1723,6 +1821,371 @@ static int ad4170_gpio_init(struct iio_dev *indio_dev)return devm_gpiochip_add_data (&st->spi->dev, &st->gpiochip, indio_dev); } +static int ad4170_validate_excitation_pin (struct ad4170_state *st,u32 pin) +{ +struct device *dev = &st->spi->dev; +unsigned int i; + +/* Check the pin number is valid */ +for (i =0 ; i <ARRAY_SIZE (ad4170_iout_pin_tbl); i++) +if (ad4170_iout_pin_tbl[i] == pin) +break ; + +if (i ==ARRAY_SIZE (ad4170_iout_pin_tbl)) +return dev_err_probe (dev, -EINVAL , +"Invalid excitation pin: %u\n" , + pin); + +/* Check the pin is available */ +if (pin <=AD4170_MAX_ANALOG_PINS ) { +if (st->pins_fn[pin] !=AD4170_PIN_UNASSIGNED ) +return dev_err_probe (dev, -EINVAL , +"Pin %u already used with fn %u\n" , + pin, st->pins_fn[pin]); + + st->pins_fn[pin] |=AD4170_PIN_CURRENT_OUT ; + }else { +unsigned int gpio = pin -AD4170_CURRENT_SRC_I_OUT_PIN_GPIO (0 ); + +if (st->gpio_fn[gpio] !=AD4170_GPIO_UNASSIGNED ) +return dev_err_probe (dev, -EINVAL , +"GPIO %u already used with fn %u\n" , + gpio, st->gpio_fn[gpio]); + + st->gpio_fn[gpio] |=AD4170_GPIO_AC_EXCITATION ; + } + +return 0 ; +} + +static int ad4170_validate_excitation_pins (struct ad4170_state *st, +u32 *exc_pins,int num_exc_pins) +{ +unsigned int i; +int ret; + +for (i =0 ; i < num_exc_pins; i++) { + ret =ad4170_validate_excitation_pin (st, exc_pins[i]); +if (ret) +return ret; + } +return 0 ; +} + +static const char *const ad4170_i_out_pin_dt_props[] = { +"adi,excitation-pin-0" , +"adi,excitation-pin-1" , +"adi,excitation-pin-2" , +"adi,excitation-pin-3" , +}; + +static const char *const ad4170_i_out_val_dt_props[] = { +"adi,excitation-current-0-microamp" , +"adi,excitation-current-1-microamp" , +"adi,excitation-current-2-microamp" , +"adi,excitation-current-3-microamp" , +}; + +/* +* Parses firmware data describing output current source setup. There are 4 +* excitation currents (IOUT0 to IOUT3) that can be configured independently. +* Excitation currents are added if they are output on the same pin. +*/ +static int ad4170_parse_exc_current (struct ad4170_state *st, +struct fwnode_handle *child, +unsigned int *exc_pins, +unsigned int *exc_curs, +unsigned int *num_exc_pins) +{ +struct device *dev = &st->spi->dev; +unsigned int num_pins, i, j; +u32 pin, val; +int ret; + + num_pins =0 ; +for (i =0 ; i <AD4170_NUM_CURRENT_SRC ; i++) { +/* Parse excitation current output pin properties. */ + pin =AD4170_CURRENT_SRC_I_OUT_PIN_AIN (0 ); + ret =fwnode_property_read_u32 (child, ad4170_i_out_pin_dt_props[i], + &pin); +if (ret) +continue ; + + exc_pins[num_pins] = pin; + +/* Parse excitation current value properties. */ + val = ad4170_iout_current_ua_tbl[0 ]; +fwnode_property_read_u32 (child, + ad4170_i_out_val_dt_props[i], &val); + +for (j =0 ; j <ARRAY_SIZE (ad4170_iout_current_ua_tbl); j++) +if (ad4170_iout_current_ua_tbl[j] == val) +break ; + +if (j ==ARRAY_SIZE (ad4170_iout_current_ua_tbl)) +return dev_err_probe (dev, -EINVAL ,"Invalid %s: %uuA\n" , + ad4170_i_out_val_dt_props[i], val); + + exc_curs[num_pins] = j; + num_pins++; + } + *num_exc_pins = num_pins; + +return 0 ; +} + +static int ad4170_setup_current_src (struct ad4170_state *st, +struct fwnode_handle *child, +struct ad4170_setup *setup,u32 *exc_pins, +unsigned int *exc_curs,int num_exc_pins, +bool ac_excited) +{ +unsigned int exc_cur_pair, i, j; +int ret; + +for (i =0 ; i < num_exc_pins; i++) { +unsigned int exc_cur = exc_curs[i]; +unsigned int pin = exc_pins[i]; +unsigned int current_src =0 ; + +for (j =0 ; j <AD4170_NUM_CURRENT_SRC ; j++) +if (st->cur_src_pins[j] ==AD4170_CURRENT_SRC_DISABLED ) +break ; + +if (j ==AD4170_NUM_CURRENT_SRC ) +return dev_err_probe (&st->spi->dev, -EINVAL , +"Too many excitation current sources\n" ); + + current_src |=FIELD_PREP (AD4170_CURRENT_SRC_I_OUT_PIN_MSK , pin); + current_src |=FIELD_PREP (AD4170_CURRENT_SRC_I_OUT_VAL_MSK , exc_cur); + st->cur_src_pins[j] = pin; + ret =regmap_write (st->regmap,AD4170_CURRENT_SRC_REG (j), + current_src); +if (ret) +return ret; + } + +if (!ac_excited) +return 0 ; + +if (num_exc_pins <2 ) +return dev_err_probe (&st->spi->dev, -EINVAL , +"Current chopping requested but only one pin provided: %u\n" , + exc_pins[0 ]); + +/* +* Two use cases to handle here: +* - 2 pairs of excitation currents; +* - 1 pair of excitation currents. +*/ +if (num_exc_pins ==4 ) { +for (i =0 ; i <AD4170_NUM_CURRENT_SRC ; i++) +if (st->cur_src_pins[i] != exc_pins[i]) +return dev_err_probe (&st->spi->dev, -EINVAL , +"Unable to use 4 exc pins\n" ); + }else { +/* +* Excitation current chopping is configured in pairs. Current +* sources IOUT0 and IOUT1 form pair 1, IOUT2 and IOUT3 make up +* pair 2. So, if current chopping was requested, check if the +* first end of the first pair of excitation currents is +* available. Try the next pair if IOUT0 has already been +* configured for another channel. +*/ + i = st->cur_src_pins[0 ] == exc_pins[0 ] ?0 :2 ; + +if (st->cur_src_pins[i] != exc_pins[0 ] || + st->cur_src_pins[i +1 ] != exc_pins[1 ]) +return dev_err_probe (&st->spi->dev, -EINVAL , +"Failed to setup current chopping\n" ); + + st->cur_src_pins[i] = exc_pins[0 ]; + st->cur_src_pins[i +1 ] = exc_pins[1 ]; + +if (i ==0 ) + exc_cur_pair =AD4170_MISC_CHOP_IEXC_PAIR1 ; +else + exc_cur_pair =AD4170_MISC_CHOP_IEXC_PAIR2 ; + } + +/* +* Configure excitation current chopping. +* Chop both pairs if using four excitation pins. +*/ + setup->misc |=FIELD_PREP (AD4170_MISC_CHOP_IEXC_MSK , + num_exc_pins ==2 ? + exc_cur_pair : +AD4170_MISC_CHOP_IEXC_BOTH ); + +return 0 ; +} + +static int ad4170_setup_bridge (struct ad4170_state *st, +struct fwnode_handle *child, +struct ad4170_setup *setup,u32 *exc_pins, +unsigned int *exc_curs,int num_exc_pins, +bool ac_excited) +{ +unsigned long gpio_mask; +unsigned int i; +int ret; + +/* +* If a specific current is provided through +* adi,excitation-current-n-microamp, set excitation pins provided +* through adi,excitation-pin-n to excite the bridge circuit. +*/ +for (i =0 ; i < num_exc_pins; i++) +if (exc_curs[i] >0 ) +return ad4170_setup_current_src (st, child, setup, exc_pins, + exc_curs, num_exc_pins, + ac_excited); + +/* +* Else, use predefined ACX1, ACX1 negated, ACX2, ACX2 negated signals +* to AC excite the bridge. Those signals are output on GPIO2, GPIO0, +* GPIO3, and GPIO1, respectively. If only two pins are specified for AC +* excitation, use ACX1 and ACX2 (GPIO2 and GPIO3). +* +* Also, to avoid any short-circuit condition when more than one channel +* is enabled, set GPIO2 and GPIO0 high, and set GPIO1 and GPIO3 low to +* DC excite the bridge whenever a channel without AC excitation is +* selected. That is needed because GPIO pins are controlled by the next +* highest priority GPIO function when a channel doesn't enable AC +* excitation. See datasheet Figure 113 Weigh Scale (AC Excitation) for +* the reference circuit diagram. +*/ +if (num_exc_pins ==2 ) { + setup->misc |=FIELD_PREP (AD4170_MISC_CHOP_ADC_MSK ,0x3 ); + + gpio_mask =AD4170_GPIO_MODE_GPIO3_MSK |AD4170_GPIO_MODE_GPIO2_MSK ; + ret =regmap_update_bits (st->regmap,AD4170_GPIO_MODE_REG , gpio_mask, +FIELD_PREP (AD4170_GPIO_MODE_GPIO3_MSK , +AD4170_GPIO_MODE_GPIO_OUTPUT ) | +FIELD_PREP (AD4170_GPIO_MODE_GPIO2_MSK , +AD4170_GPIO_MODE_GPIO_OUTPUT )); +if (ret) +return ret; + +/* +* Set GPIO2 high and GPIO3 low to DC excite the bridge when +* a different channel is selected. +*/ + gpio_mask =AD4170_GPIO_OUTPUT_GPIO_MSK (3 ) | +AD4170_GPIO_OUTPUT_GPIO_MSK (2 ); + ret =regmap_update_bits (st->regmap,AD4170_GPIO_OUTPUT_REG , gpio_mask, +FIELD_PREP (AD4170_GPIO_OUTPUT_GPIO_MSK (3 ),0 ) | +FIELD_PREP (AD4170_GPIO_OUTPUT_GPIO_MSK (2 ),1 )); +if (ret) +return ret; + + st->gpio_fn[3 ] |=AD4170_GPIO_OUTPUT ; + st->gpio_fn[2 ] |=AD4170_GPIO_OUTPUT ; + }else { + setup->misc |=FIELD_PREP (AD4170_MISC_CHOP_ADC_MSK ,0x2 ); + + gpio_mask =AD4170_GPIO_MODE_GPIO3_MSK |AD4170_GPIO_MODE_GPIO2_MSK | +AD4170_GPIO_MODE_GPIO1_MSK |AD4170_GPIO_MODE_GPIO0_MSK ; + ret =regmap_update_bits (st->regmap,AD4170_GPIO_MODE_REG , gpio_mask, +FIELD_PREP (AD4170_GPIO_MODE_GPIO3_MSK , +AD4170_GPIO_MODE_GPIO_OUTPUT ) | +FIELD_PREP (AD4170_GPIO_MODE_GPIO2_MSK , +AD4170_GPIO_MODE_GPIO_OUTPUT ) | +FIELD_PREP (AD4170_GPIO_MODE_GPIO1_MSK , +AD4170_GPIO_MODE_GPIO_OUTPUT ) | +FIELD_PREP (AD4170_GPIO_MODE_GPIO0_MSK , +AD4170_GPIO_MODE_GPIO_OUTPUT )); +if (ret) +return ret; + +/* +* Set GPIO2 and GPIO0 high, and set GPIO1 and GPIO3 low to DC +* excite the bridge when a different channel is selected. +*/ + gpio_mask =AD4170_GPIO_OUTPUT_GPIO_MSK (3 ) | +AD4170_GPIO_OUTPUT_GPIO_MSK (2 ) | +AD4170_GPIO_OUTPUT_GPIO_MSK (1 ) | +AD4170_GPIO_OUTPUT_GPIO_MSK (0 ); + ret =regmap_update_bits (st->regmap,AD4170_GPIO_OUTPUT_REG , gpio_mask, +FIELD_PREP (AD4170_GPIO_OUTPUT_GPIO_MSK (3 ),0 ) | +FIELD_PREP (AD4170_GPIO_OUTPUT_GPIO_MSK (2 ),1 ) | +FIELD_PREP (AD4170_GPIO_OUTPUT_GPIO_MSK (1 ),0 ) | +FIELD_PREP (AD4170_GPIO_OUTPUT_GPIO_MSK (0 ),1 )); +if (ret) +return ret; + + st->gpio_fn[3 ] |=AD4170_GPIO_OUTPUT ; + st->gpio_fn[2 ] |=AD4170_GPIO_OUTPUT ; + st->gpio_fn[1 ] |=AD4170_GPIO_OUTPUT ; + st->gpio_fn[0 ] |=AD4170_GPIO_OUTPUT ; + } + +return 0 ; +} + +static int ad4170_setup_rtd (struct ad4170_state *st, +struct fwnode_handle *child, +struct ad4170_setup *setup,u32 *exc_pins, +unsigned int *exc_curs,int num_exc_pins,bool ac_excited) +{ +return ad4170_setup_current_src (st, child, setup, exc_pins, + exc_curs, num_exc_pins, ac_excited); +} + +static int ad4170_parse_external_sensor (struct ad4170_state *st, +struct fwnode_handle *child, +struct ad4170_setup *setup, +struct iio_chan_spec *chan,u8 s_type) +{ +unsigned int num_exc_pins, reg_val; +struct device *dev = &st->spi->dev; +u32 pins[2 ], exc_pins[4 ], exc_curs[4 ]; +bool ac_excited, vbias; +int ret; + + ret =fwnode_property_read_u32_array (child,"diff-channels" , pins, +ARRAY_SIZE (pins)); +if (ret) +return dev_err_probe (dev, ret, +"Failed to read sensor diff-channels\n" ); + + chan->differential = true; + chan->channel = pins[0 ]; + chan->channel2 = pins[1 ]; + + ret =ad4170_parse_exc_current (st, child, exc_pins, exc_curs, &num_exc_pins); +if (ret) +return ret; + +/* The external sensor may not need excitation from the ADC chip. */ +if (num_exc_pins ==0 ) +return 0 ; + + ret =ad4170_validate_excitation_pins (st, exc_pins, num_exc_pins); +if (ret) +return ret; + + ac_excited =fwnode_property_read_bool (child,"adi,excitation-ac" ); + +if (s_type ==AD4170_THERMOCOUPLE_SENSOR ) { + vbias =fwnode_property_read_bool (child,"adi,vbias" ); +if (vbias) { + st->pins_fn[chan->channel2] |=AD4170_PIN_VBIAS ; + reg_val =BIT (chan->channel2); +return regmap_write (st->regmap,AD4170_V_BIAS_REG , + reg_val); + } + } +if (s_type ==AD4170_WEIGH_SCALE_SENSOR ) + ret =ad4170_setup_bridge (st, child, setup, exc_pins, exc_curs, + num_exc_pins, ac_excited); +else + ret =ad4170_setup_rtd (st, child, setup, exc_pins, exc_curs, + num_exc_pins, ac_excited); + +return ret; +} +static int ad4170_parse_reference (struct ad4170_state *st,struct fwnode_handle *child,struct ad4170_setup *setup)
@@ -1808,6 +2271,7 @@ static int ad4170_parse_channel_node(struct iio_dev *indio_dev,struct ad4170_setup *setup;struct iio_chan_spec *chan;unsigned int ref_select; +unsigned int s_type;unsigned int ch_reg;bool bipolar;int ret;
@@ -1836,10 +2300,28 @@ static int ad4170_parse_channel_node(struct iio_dev *indio_dev,if (ret)return ret; - ret =ad4170_parse_adc_channel_type (dev, child, chan); -if (ret <0 ) -return ret; + ret =fwnode_property_match_property_string (child,"adi,sensor-type" , + ad4170_sensor_type, +ARRAY_SIZE (ad4170_sensor_type)); +/* Default to conventional ADC channel if sensor type not present */ + s_type = ret <0 ?AD4170_ADC_SENSOR : ret; +switch (s_type) { +case AD4170_ADC_SENSOR : + ret =ad4170_parse_adc_channel_type (dev, child, chan); +if (ret) +return ret; + +break ; +case AD4170_WEIGH_SCALE_SENSOR : +case AD4170_THERMOCOUPLE_SENSOR : +case AD4170_RTD_SENSOR : + ret =ad4170_parse_external_sensor (st, child, setup, chan, s_type); +if (ret) +return ret; + +break ; + } bipolar =fwnode_property_read_bool (child,"bipolar" ); setup->afe |=FIELD_PREP (AD4170_AFE_BIPOLAR_MSK , bipolar);if (bipolar)
@@ -2035,6 +2517,7 @@ static int ad4170_parse_firmware(struct iio_dev *indio_dev)struct ad4170_state *st =iio_priv (indio_dev);struct device *dev = &st->spi->dev;int reg_data, ret; +unsigned int i; ret =ad4170_clock_select (indio_dev);if (ret)
@@ -2044,6 +2527,9 @@ static int ad4170_parse_firmware(struct iio_dev *indio_dev)if (ret)return ret; +for (i =0 ; i <AD4170_NUM_CURRENT_SRC ; i++) + st->cur_src_pins[i] =AD4170_CURRENT_SRC_DISABLED ; +/* On power on, device defaults to using SDO pin for data ready signal */ st->int_pin_sel =AD4170_INT_PIN_SDO ; ret = device_property_match_property_string(dev, "interrupt-names",
Signature · 1 line
2.47.2
PATCH v5 11/11 iio: adc: ad4170: Add timestamp channel
In reply to Marcelo SchmittAdd timestamp channel allowing to record the moment at which ADC samples are captured in buffered read mode.
---
No changes from v4.
drivers/iio/adc/ad4170.c | 21 +++++++++++++++++---- 1 file changed, 17 insertions(+), 4 deletions(-)
drivers/iio/adc/ad4170.c +17 -4
@@ -185,6 +185,7 @@#define AD4170_NUM_ANALOG_PINS 9#define AD4170_NUM_GPIO_PINS 4#define AD4170_MAX_CHANNELS 16 +#define AD4170_MAX_IIO_CHANNELS (AD4170_MAX_CHANNELS + 1)#define AD4170_MAX_ANALOG_PINS 8#define AD4170_MAX_SETUPS 8#define AD4170_INVALID_SETUP 9
@@ -429,7 +430,7 @@ struct ad4170_state {int vrefs_uv[AD4170_MAX_SUP ];u32 mclk_hz;struct ad4170_setup_info setup_infos[AD4170_MAX_SETUPS ]; -struct iio_chan_spec chans[AD4170_MAX_CHANNELS ]; +struct iio_chan_spec chans[AD4170_MAX_IIO_CHANNELS ];struct ad4170_chan_info chan_infos[AD4170_MAX_CHANNELS ];struct spi_device *spi;struct regmap *regmap;
@@ -446,6 +447,7 @@ struct ad4170_state {unsigned int clock_ctrl;int gpio_fn[AD4170_NUM_GPIO_PINS ];unsigned int cur_src_pins[AD4170_NUM_CURRENT_SRC ]; +unsigned int num_adc_chans;/* * DMA (thus cache coherency maintenance) requires the transfer buffers * to live in their own cache lines.
@@ -2387,7 +2389,16 @@ static int ad4170_parse_channels(struct iio_dev *indio_dev)return dev_err_probe (dev, ret,"Invalid input config\n" ); st->chan_infos[chan_num].input_range_uv = ret; + chan_num++; } + st->num_adc_chans = chan_num; + +/* Add timestamp channel */ +struct iio_chan_spec ts_chan =IIO_CHAN_SOFT_TIMESTAMP (chan_num); + + st->chans[chan_num] = ts_chan; + num_channels = num_channels +1 ; + indio_dev->num_channels = num_channels; indio_dev->channels = st->chans;
@@ -2579,7 +2590,7 @@ static int ad4170_initial_config(struct iio_dev *indio_dev)return dev_err_probe (dev, ret,"Failed to set ADC mode to idle\n" ); -for (i =0 ; i < indio_dev->num_channels; i++) { +for (i =0 ; i < st->num_adc_chans; i++) {struct ad4170_chan_info *chan_info;struct iio_chan_spec const *chan;struct ad4170_setup *setup;
@@ -2704,7 +2715,7 @@ static int ad4170_buffer_predisable(struct iio_dev *indio_dev)* is done after buffer disable. Disable all channels so only requested * channels will be read. */ -for (i =0 ; i < indio_dev->num_channels; i++) { +for (i =0 ; i < st->num_adc_chans; i++) { ret =ad4170_set_channel_enable (st, i, false);if (ret)return ret;
@@ -2754,7 +2765,9 @@ static irqreturn_t ad4170_trigger_handler(int irq, void *p)memcpy (&st->bounce_buffer[i++], st->rx_buf,ARRAY_SIZE (st->rx_buf)); } -iio_push_to_buffers (indio_dev, st->bounce_buffer); +iio_push_to_buffers_with_ts (indio_dev, st->bounce_buffer, +sizeof (st->bounce_buffer), +iio_get_time_ns (indio_dev)); err_out:iio_trigger_notify_done (indio_dev->trig);return IRQ_HANDLED ;
Signature · 1 line
2.47.2
Jonathan Cameron
maintainerQuoted 10 lines · On Tue, 10 Jun 2025 17:30:40 -0300 Marcelo Schmitt…
Hello,
This is version 5 of AD4170 support patch set.
Not many changes from v4 to v5 and not waiting as long between the previous and this new version so, keeping both change logs below.Thank you to all reviewers.
This patch set adds support for Analog Devices AD4170 and similar sigma-delta ADCs.
Quoted 12 lines
Patch 1 adds device tree documentation for the parts.
Patch 2 adds basic device support.
Patch 3 adds support for calibration scale.
Patch 4 adds support for calibration bias.
Patch 5 adds support for sample frequency along with filter type configuration. Patch 6 adds support for buffered ADC reading.
Patch 7 adds clock provider support
Patch 8 adds GPIO controller support.
Patch 9 adds internal temperature sensor support.
Patch 10 adds support for external RTD and bridge circuit sensors. Patch 11 adds timestamp channel
I took a look at this version and FWIW I don't have any comments to add to Andy's review. So we should be good to go on v6.