net: stmmac: start to shrink memory usage
Subsystems (13)
cover net: stmmac: start to shrink memory usage
Hi,
Start shrinking stmmac's memory usage by avoiding using "int" for members that are only used for 0/1 (boolean) values, or values that can't be larger than 255.
In addition, as struct stmmac_dma_cfg is approximately a cache line, shrinks below a cache line as a result of this patch set, and is required, there is no point separately allocating this from struct plat_stmmacenet_data. Embed it into the end of this struct and set the existing pointer to avoid large wide-spread changes.
Lastly, add documentation for struct stmmac_dma_cfg, and document the stmmac clocks as best we can given the driver history.
drivers/net/ethernet/stmicro/stmmac/common.h | 4 +- .../ethernet/stmicro/stmmac/dwmac-dwc-qos-eth.c | 2 +- drivers/net/ethernet/stmicro/stmmac/dwmac-imx.c | 2 +- drivers/net/ethernet/stmicro/stmmac/dwmac-intel.c | 7 +- .../net/ethernet/stmicro/stmmac/dwmac-loongson.c | 6 +- .../net/ethernet/stmicro/stmmac/dwmac-mediatek.c | 8 +- .../net/ethernet/stmicro/stmmac/dwmac-motorcomm.c | 4 - .../ethernet/stmicro/stmmac/dwmac-qcom-ethqos.c | 4 +- drivers/net/ethernet/stmicro/stmmac/dwmac-s32.c | 2 +- .../net/ethernet/stmicro/stmmac/dwmac-socfpga.c | 2 +- drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c | 4 +- drivers/net/ethernet/stmicro/stmmac/dwmac-sunxi.c | 2 +- drivers/net/ethernet/stmicro/stmmac/dwmac-tegra.c | 2 +- .../net/ethernet/stmicro/stmmac/dwmac1000_core.c | 2 +- .../net/ethernet/stmicro/stmmac/dwmac100_core.c | 2 +- drivers/net/ethernet/stmicro/stmmac/dwmac4_core.c | 4 +- .../net/ethernet/stmicro/stmmac/dwxgmac2_core.c | 4 +- drivers/net/ethernet/stmicro/stmmac/hwif.h | 2 +- drivers/net/ethernet/stmicro/stmmac/stmmac.h | 2 +- drivers/net/ethernet/stmicro/stmmac/stmmac_main.c | 227 +++++++++++---------- drivers/net/ethernet/stmicro/stmmac/stmmac_pci.c | 11 +- .../net/ethernet/stmicro/stmmac/stmmac_platform.c | 43 ++-- include/linux/stmmac.h | 93 +++++++-- 23 files changed, 239 insertions(+), 200 deletions(-)
Signature · 2 lines
RMK's Patch system: https://www.armlinux.org.uk/developer/patches/ FTTP is here! 80Mbps down 10Mbps up. Decent connectivity at last!
PATCH 1/7 net: stmmac: provide plat_dat->dma_cfg in stmmac_plat_dat_alloc()
plat_dat->dma_cfg is unconditionally required for the operation of the driver, so it would make sense to allocate it along with the plat_dat.
On Arm64, sizeof(*plat_dat) has recently shrunk from 880 to 816 bytes and sizeof(*plat_dat->dma_cfg) has shrunk from 32 to 20 bytes.
Given that dma_cfg is required, and it is now less than a cache line, It doesn't make sense to allocate this separateny, so place it at the end of struct plat_stmmacenet_data, and set plat_dat->dma_cfg to point at that to avoid mass changes.
Signed-off-by Russell King (Oracle) <[email protected]>
--- drivers/net/ethernet/stmicro/stmmac/dwmac-intel.c | 5 ----- drivers/net/ethernet/stmicro/stmmac/dwmac-loongson.c | 4 ---- drivers/net/ethernet/stmicro/stmmac/dwmac-motorcomm.c | 4 ---- drivers/net/ethernet/stmicro/stmmac/stmmac_main.c | 2 ++ drivers/net/ethernet/stmicro/stmmac/stmmac_pci.c | 5 ----- drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c | 8 +------- include/linux/stmmac.h | 1 + 7 files changed, 4 insertions(+), 25 deletions(-)
drivers/net/ethernet/stmicro/stmmac/dwmac-intel.c +0 -5
@@ -1251,11 +1251,6 @@ static int intel_eth_pci_probe(struct pci_dev *pdev,if (!plat->mdio_bus_data)return -ENOMEM ; - plat->dma_cfg =devm_kzalloc (&pdev->dev,sizeof (*plat->dma_cfg), -GFP_KERNEL ); -if (!plat->dma_cfg) -return -ENOMEM ; - plat->safety_feat_cfg =devm_kzalloc (&pdev->dev,sizeof (*plat->safety_feat_cfg),GFP_KERNEL );
drivers/net/ethernet/stmicro/stmmac/dwmac-loongson.c +0 -4
@@ -513,10 +513,6 @@ static int loongson_dwmac_probe(struct pci_dev *pdev, const struct pci_device_idif (!plat->mdio_bus_data)return -ENOMEM ; - plat->dma_cfg =devm_kzalloc (&pdev->dev,sizeof (*plat->dma_cfg),GFP_KERNEL ); -if (!plat->dma_cfg) -return -ENOMEM ; - ld =devm_kzalloc (&pdev->dev,sizeof (*ld),GFP_KERNEL );if (!ld)return -ENOMEM ;
drivers/net/ethernet/stmicro/stmmac/dwmac-motorcomm.c +0 -4
@@ -218,10 +218,6 @@ motorcomm_default_plat_data(struct pci_dev *pdev)if (!plat->mdio_bus_data)return NULL ; - plat->dma_cfg =devm_kzalloc (dev,sizeof (*plat->dma_cfg),GFP_KERNEL ); -if (!plat->dma_cfg) -return NULL ; - plat->axi =devm_kzalloc (dev,sizeof (*plat->axi),GFP_KERNEL );if (!plat->axi)return NULL ;
drivers/net/ethernet/stmicro/stmmac/stmmac_main.c +2 -0
@@ -7730,6 +7730,8 @@ struct plat_stmmacenet_data *stmmac_plat_dat_alloc(struct device *dev)if (!plat_dat)return NULL ; + plat_dat->dma_cfg = &plat_dat->__dma_cfg; +/* Set the defaults: * - phy autodetection * - determine GMII_Address CR field from CSR clock
drivers/net/ethernet/stmicro/stmmac/stmmac_pci.c +0 -5
@@ -134,11 +134,6 @@ static int stmmac_pci_probe(struct pci_dev *pdev,if (!plat->mdio_bus_data)return -ENOMEM ; - plat->dma_cfg =devm_kzalloc (&pdev->dev,sizeof (*plat->dma_cfg), -GFP_KERNEL ); -if (!plat->dma_cfg) -return -ENOMEM ; - plat->safety_feat_cfg =devm_kzalloc (&pdev->dev,sizeof (*plat->safety_feat_cfg),GFP_KERNEL );
drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c +1 -7
@@ -548,13 +548,7 @@ stmmac_probe_config_dt(struct platform_device *pdev, u8 *mac) &plat->multicast_filter_bins); } - dma_cfg =devm_kzalloc (&pdev->dev,sizeof (*dma_cfg), -GFP_KERNEL ); -if (!dma_cfg) { - ret =ERR_PTR (-ENOMEM ); - goto error_put_mdio; - } - plat->dma_cfg = dma_cfg; + dma_cfg = plat->dma_cfg;of_property_read_u32 (np,"snps,pbl" , &dma_cfg->pbl);if (!dma_cfg->pbl)
include/linux/stmmac.h +1 -0
@@ -306,5 +306,6 @@ struct plat_stmmacenet_data {int msi_tx_base_vec;const struct dwmac4_addrs *dwmac4_addrs;unsigned int flags; + struct stmmac_dma_cfg __dma_cfg; };#endif
Signature · 1 line
2.47.3
PATCH 2/7 net: stmmac: convert plat_stmmacenet_data booleans to type bool
In reply to Russell King (Oracle)Convert members of struct plat_stmmacenet_data that are booleans to type 'bool' and ensure their initialisers are true/false. Move the has_xxx for the GMAC cores together, and move the COE members to the end of the list of bool to avoid unused holes in the struct.
Signed-off-by Russell King (Oracle) <[email protected]>
--- .../stmicro/stmmac/dwmac-dwc-qos-eth.c | 2 +- .../net/ethernet/stmicro/stmmac/dwmac-intel.c | 2 +- .../ethernet/stmicro/stmmac/dwmac-loongson.c | 2 +- .../ethernet/stmicro/stmmac/dwmac-mediatek.c | 2 +- .../stmicro/stmmac/dwmac-qcom-ethqos.c | 2 +- .../net/ethernet/stmicro/stmmac/dwmac-s32.c | 2 +- .../ethernet/stmicro/stmmac/dwmac-socfpga.c | 2 +- .../net/ethernet/stmicro/stmmac/dwmac-sun8i.c | 2 +- .../net/ethernet/stmicro/stmmac/dwmac-sunxi.c | 2 +- .../net/ethernet/stmicro/stmmac/dwmac-tegra.c | 2 +- .../net/ethernet/stmicro/stmmac/stmmac_main.c | 2 +- .../net/ethernet/stmicro/stmmac/stmmac_pci.c | 6 +++--- .../ethernet/stmicro/stmmac/stmmac_platform.c | 20 +++++++++---------- include/linux/stmmac.h | 14 ++++++------- 14 files changed, 31 insertions(+), 31 deletions(-)
drivers/net/ethernet/stmicro/stmmac/dwmac-dwc-qos-eth.c +1 -1
@@ -88,7 +88,7 @@ static int dwc_eth_dwmac_config_dt(struct platform_device *pdev, plat_dat->core_type =DWMAC_CORE_GMAC4 ; plat_dat->dma_cfg->aal =1 ; plat_dat->flags |=STMMAC_FLAG_TSO_EN ; - plat_dat->pmt =1 ; + plat_dat->pmt = true;return 0 ; }
drivers/net/ethernet/stmicro/stmmac/dwmac-intel.c +1 -1
@@ -566,7 +566,7 @@ static void common_default_data(struct plat_stmmacenet_data *plat)/* clk_csr_i = 20-35MHz & MDC = clk_csr_i/16 */ plat->clk_csr =STMMAC_CSR_20_35M ; plat->core_type =DWMAC_CORE_GMAC ; - plat->force_sf_dma_mode =1 ; + plat->force_sf_dma_mode = true; plat->mdio_bus_data->needs_reset = true; }
drivers/net/ethernet/stmicro/stmmac/dwmac-loongson.c +1 -1
@@ -94,7 +94,7 @@ static void loongson_default_data(struct pci_dev *pdev,/* clk_csr_i = 100-150MHz & MDC = clk_csr_i/62 */ plat->clk_csr =STMMAC_CSR_100_150M ; plat->core_type =DWMAC_CORE_GMAC ; - plat->force_sf_dma_mode =1 ; + plat->force_sf_dma_mode = true;/* Increase the default value for multicast hash bins */ plat->multicast_filter_bins =256 ;
drivers/net/ethernet/stmicro/stmmac/dwmac-mediatek.c +1 -1
@@ -564,7 +564,7 @@ static int mediatek_dwmac_common_data(struct platform_device *pdev, plat->flags &= ~STMMAC_FLAG_USE_PHY_WOL ; else plat->flags |= STMMAC_FLAG_USE_PHY_WOL; - plat->riwt_off =1 ; + plat->riwt_off = true; plat->maxmtu =ETH_DATA_LEN ; plat->host_dma_width = priv_plat->variant->dma_bit_mask; plat->bsp_priv = priv_plat;
drivers/net/ethernet/stmicro/stmmac/dwmac-qcom-ethqos.c +1 -1
@@ -817,7 +817,7 @@ static int qcom_ethqos_probe(struct platform_device *pdev) plat_dat->core_type =DWMAC_CORE_GMAC4 ;if (ethqos->has_emac_ge_3) plat_dat->dwmac4_addrs = &data->dwmac4_addrs; - plat_dat->pmt =1 ; + plat_dat->pmt = true;if (of_property_read_bool (np,"snps,tso" )) plat_dat->flags |=STMMAC_FLAG_TSO_EN ;if (of_device_is_compatible (np,"qcom,qcs404-ethqos" ))
drivers/net/ethernet/stmicro/stmmac/dwmac-s32.c +1 -1
@@ -163,7 +163,7 @@ static int s32_dwmac_probe(struct platform_device *pdev)/* S32CC core feature set */ plat->core_type =DWMAC_CORE_GMAC4 ; - plat->pmt =1 ; + plat->pmt = true; plat->flags |=STMMAC_FLAG_SPH_DISABLE ; plat->rx_fifo_size =20480 ; plat->tx_fifo_size =20480 ;
drivers/net/ethernet/stmicro/stmmac/dwmac-socfpga.c +1 -1
@@ -565,7 +565,7 @@ static void socfpga_gen5_setup_plat_dat(struct socfpga_dwmac *dwmac) plat_dat->core_type =DWMAC_CORE_GMAC ;/* Rx watchdog timer in dwmac is buggy in this hw */ - plat_dat->riwt_off =1 ; + plat_dat->riwt_off = true; }static void socfpga_agilex5_setup_plat_dat (struct socfpga_dwmac *dwmac)
drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c +1 -1
@@ -1179,7 +1179,7 @@ static int sun8i_dwmac_probe(struct platform_device *pdev)* hardware features were copied from Allwinner drivers. */ plat_dat->rx_coe =STMMAC_RX_COE_TYPE2 ; - plat_dat->tx_coe =1 ; + plat_dat->tx_coe = true; plat_dat->flags |=STMMAC_FLAG_HAS_SUN8I ; plat_dat->bsp_priv = gmac; plat_dat->init = sun8i_dwmac_init;
drivers/net/ethernet/stmicro/stmmac/dwmac-sunxi.c +1 -1
@@ -135,7 +135,7 @@ static int sun7i_gmac_probe(struct platform_device *pdev)/* platform data specifying hardware features and callbacks. * hardware features were copied from Allwinner drivers. */ - plat_dat->tx_coe =1 ; + plat_dat->tx_coe = true; plat_dat->core_type =DWMAC_CORE_GMAC ; plat_dat->bsp_priv = gmac; plat_dat->init = sun7i_gmac_init;
drivers/net/ethernet/stmicro/stmmac/dwmac-tegra.c +1 -1
@@ -310,7 +310,7 @@ static int tegra_mgbe_probe(struct platform_device *pdev) plat->core_type =DWMAC_CORE_XGMAC ; plat->flags |=STMMAC_FLAG_TSO_EN ; - plat->pmt =1 ; + plat->pmt = true; plat->bsp_priv = mgbe;if (!plat->mdio_node)
drivers/net/ethernet/stmicro/stmmac/stmmac_main.c +1 -1
@@ -7401,7 +7401,7 @@ static int stmmac_hw_init(struct stmmac_priv *priv)/* TXCOE doesn't work in thresh DMA mode */ if (priv->plat->force_thresh_dma_mode) - priv->plat->tx_coe =0 ; + priv->plat->tx_coe = false;else priv->plat->tx_coe = priv->dma_cap.tx_coe;
drivers/net/ethernet/stmicro/stmmac/stmmac_pci.c +3 -3
@@ -25,7 +25,7 @@ static void common_default_data(struct plat_stmmacenet_data *plat)/* clk_csr_i = 20-35MHz & MDC = clk_csr_i/16 */ plat->clk_csr =STMMAC_CSR_20_35M ; plat->core_type =DWMAC_CORE_GMAC ; - plat->force_sf_dma_mode =1 ; + plat->force_sf_dma_mode = true; plat->mdio_bus_data->needs_reset = true; }
@@ -58,9 +58,9 @@ static int snps_gmac5_default_data(struct pci_dev *pdev, plat->clk_csr =STMMAC_CSR_250_300M ; plat->core_type =DWMAC_CORE_GMAC4 ; - plat->force_sf_dma_mode =1 ; + plat->force_sf_dma_mode = true; plat->flags |=STMMAC_FLAG_TSO_EN ; - plat->pmt =1 ; + plat->pmt = true;/* Set default number of RX and TX queues to use */ plat->tx_queues_to_use =4 ;
drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c +10 -10
@@ -514,34 +514,34 @@ stmmac_probe_config_dt(struct platform_device *pdev, u8 *mac) plat->multicast_filter_bins =dwmac1000_validate_mcast_bins ( &pdev->dev, plat->multicast_filter_bins); plat->core_type =DWMAC_CORE_GMAC ; - plat->pmt =1 ; + plat->pmt = true; }if (of_device_is_compatible (np,"snps,dwmac-3.40a" )) { plat->core_type =DWMAC_CORE_GMAC ; - plat->enh_desc =1 ; - plat->tx_coe =1 ; - plat->bugged_jumbo =1 ; - plat->pmt =1 ; + plat->enh_desc = true; + plat->tx_coe = true; + plat->bugged_jumbo = true; + plat->pmt = true; }if (of_device_compatible_match (np, stmmac_gmac4_compats)) { plat->core_type =DWMAC_CORE_GMAC4 ; - plat->pmt =1 ; + plat->pmt = true;if (of_property_read_bool (np,"snps,tso" )) plat->flags |=STMMAC_FLAG_TSO_EN ; }if (of_device_is_compatible (np,"snps,dwmac-3.610" ) ||of_device_is_compatible (np,"snps,dwmac-3.710" )) { - plat->enh_desc =1 ; - plat->bugged_jumbo =1 ; - plat->force_sf_dma_mode =1 ; + plat->enh_desc = true; + plat->bugged_jumbo = true; + plat->force_sf_dma_mode = true; }if (of_device_is_compatible (np,"snps,dwxgmac" )) { plat->core_type =DWMAC_CORE_XGMAC ; - plat->pmt =1 ; + plat->pmt = true;if (of_property_read_bool (np,"snps,tso" )) plat->flags |=STMMAC_FLAG_TSO_EN ; of_property_read_u32(np, "snps,multicast-filter-bins",
include/linux/stmmac.h +7 -7
@@ -229,14 +229,14 @@ struct plat_stmmacenet_data {struct stmmac_dma_cfg *dma_cfg;struct stmmac_safety_feature_cfg *safety_feat_cfg;int clk_csr; -int enh_desc; -int tx_coe; +bool enh_desc; +bool tx_coe; +bool bugged_jumbo; +bool pmt; +bool force_sf_dma_mode; +bool force_thresh_dma_mode; +bool riwt_off;int rx_coe; -int bugged_jumbo; -int pmt; -int force_sf_dma_mode; -int force_thresh_dma_mode; -int riwt_off;int max_speed;int maxmtu;int multicast_filter_bins;
Signature · 1 line
2.47.3
PATCH 3/7 net: stmmac: reorder structs to reduce memory consumption
In reply to Russell King (Oracle)Reorder some of the stmmac structures to allow them to pack better, thereby using less memory. On aarch64, sizeof(struct stmmac_priv) was 880, and with this change becomes 816, saving 64 bytes, which is an 8% saving.
Signed-off-by Russell King (Oracle) <[email protected]>
--- include/linux/stmmac.h | 16 ++++++++-------- 1 file changed, 8 insertions(+), 8 deletions(-)
include/linux/stmmac.h +8 -8
@@ -108,37 +108,37 @@ struct stmmac_dma_cfg {#define AXI_BLEN 7struct stmmac_axi { -bool axi_lpi_en; -bool axi_xit_frm;u32 axi_wr_osr_lmt;u32 axi_rd_osr_lmt; -bool axi_kbbe;u32 axi_blen_regval; +bool axi_lpi_en; +bool axi_xit_frm; +bool axi_kbbe;bool axi_fb;bool axi_mb;bool axi_rb; };struct stmmac_rxq_cfg { -u8 mode_to_use;u32 chan; +u32 prio; +u8 mode_to_use;u8 pkt_route;bool use_prio; -u32 prio; };struct stmmac_txq_cfg {u32 weight; -bool coe_unsupported; -u8 mode_to_use;/* Credit Base Shaper parameters */ u32 send_slope;u32 idle_slope;u32 high_credit;u32 low_credit; -bool use_prio;u32 prio;int tbs_en; +bool use_prio; +bool coe_unsupported; +u8 mode_to_use; };struct stmmac_safety_feature_cfg {
Signature · 1 line
2.47.3
PATCH 4/7 net: stmmac: use u8 for ?x_queues_to_use and number_?x_queues
In reply to Russell King (Oracle)The maximum number of queues is a compile time constant of only eight. This makes using a 32-bit quantity wastefulf. Instead, use u8 for these and their associated variables.
When reading the DT properties, saturdate at U8_MAX. Provided the core provides DMA capabilities to describe the number of queues, this will be capped by stmmac_hw_init() with a warning.
Signed-off-by Russell King (Oracle) <[email protected]>
--- drivers/net/ethernet/stmicro/stmmac/common.h | 4 +- .../net/ethernet/stmicro/stmmac/dwmac-sun8i.c | 2 +- .../ethernet/stmicro/stmmac/dwmac1000_core.c | 2 +- .../ethernet/stmicro/stmmac/dwmac100_core.c | 2 +- .../net/ethernet/stmicro/stmmac/dwmac4_core.c | 4 +- .../ethernet/stmicro/stmmac/dwxgmac2_core.c | 4 +- drivers/net/ethernet/stmicro/stmmac/hwif.h | 2 +- drivers/net/ethernet/stmicro/stmmac/stmmac.h | 2 +- .../net/ethernet/stmicro/stmmac/stmmac_main.c | 223 +++++++++--------- .../ethernet/stmicro/stmmac/stmmac_platform.c | 15 +- include/linux/stmmac.h | 4 +- 11 files changed, 136 insertions(+), 128 deletions(-)
drivers/net/ethernet/stmicro/stmmac/common.h +2 -2
@@ -446,8 +446,8 @@ struct dma_features {unsigned int number_rx_channel;unsigned int number_tx_channel;/* TX and RX number of queues */ -unsigned int number_rx_queues; -unsigned int number_tx_queues; +u8 number_rx_queues; +u8 number_tx_queues;/* PPS output */ unsigned int pps_out_num;/* Number of Traffic Classes */
drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c +1 -1
@@ -718,7 +718,7 @@ static void sun8i_dwmac_set_filter(struct mac_device_info *hw,static void sun8i_dwmac_flow_ctrl (struct mac_device_info *hw,unsigned int duplex,unsigned int fc, -unsigned int pause_time,u32 tx_cnt) +unsigned int pause_time,u8 tx_cnt) {void __iomem *ioaddr = hw->pcsr;u32 v;
drivers/net/ethernet/stmicro/stmmac/dwmac1000_core.c +1 -1
@@ -222,7 +222,7 @@ static void dwmac1000_set_filter(struct mac_device_info *hw,static void dwmac1000_flow_ctrl (struct mac_device_info *hw,unsigned int duplex,unsigned int fc,unsigned int pause_time, -u32 tx_cnt) +u8 tx_cnt) {void __iomem *ioaddr = hw->pcsr;/* Set flow such that DZPQ in Mac Register 6 is 0,
drivers/net/ethernet/stmicro/stmmac/dwmac100_core.c +1 -1
@@ -126,7 +126,7 @@ static void dwmac100_set_filter(struct mac_device_info *hw,static void dwmac100_flow_ctrl (struct mac_device_info *hw,unsigned int duplex,unsigned int fc,unsigned int pause_time, -u32 tx_cnt) +u8 tx_cnt) {void __iomem *ioaddr = hw->pcsr;unsigned int flow =MAC_FLOW_CTRL_ENABLE ;
drivers/net/ethernet/stmicro/stmmac/dwmac4_core.c +2 -2
@@ -547,11 +547,11 @@ static void dwmac4_set_filter(struct mac_device_info *hw,static void dwmac4_flow_ctrl (struct mac_device_info *hw,unsigned int duplex,unsigned int fc,unsigned int pause_time, -u32 tx_cnt) +u8 tx_cnt) {void __iomem *ioaddr = hw->pcsr;unsigned int flow =0 ; -u32 queue =0 ; +u8 queue;pr_debug ("GMAC Flow-Control:\n" );if (fc &FLOW_RX ) {
drivers/net/ethernet/stmicro/stmmac/dwxgmac2_core.c +2 -2
@@ -355,10 +355,10 @@ static int dwxgmac2_host_mtl_irq_status(struct stmmac_priv *priv,static void dwxgmac2_flow_ctrl (struct mac_device_info *hw,unsigned int duplex,unsigned int fc,unsigned int pause_time, -u32 tx_cnt) +u8 tx_cnt) {void __iomem *ioaddr = hw->pcsr; -u32 i; +u8 i;if (fc &FLOW_RX )writel (XGMAC_RFE , ioaddr +XGMAC_RX_FLOW_CTRL );
drivers/net/ethernet/stmicro/stmmac/hwif.h +1 -1
@@ -352,7 +352,7 @@ struct stmmac_ops {void (*set_filter)(struct mac_device_info *hw,struct net_device *dev);/* Flow control setting */ void (*flow_ctrl)(struct mac_device_info *hw,unsigned int duplex, -unsigned int fc,unsigned int pause_time,u32 tx_cnt); +unsigned int fc,unsigned int pause_time,u8 tx_cnt);/* Set power management mode (e.g. magic frame) */ void (*pmt)(struct mac_device_info *hw,unsigned long mode);/* Set/Get Unicast MAC addresses */
drivers/net/ethernet/stmicro/stmmac/stmmac.h +1 -1
@@ -407,7 +407,7 @@ void stmmac_dvr_remove(struct device *dev);int stmmac_dvr_probe (struct device *device,struct plat_stmmacenet_data *plat_dat,struct stmmac_resources *res); -int stmmac_reinit_queues (struct net_device *dev,u32 rx_cnt,u32 tx_cnt); +int stmmac_reinit_queues (struct net_device *dev,u8 rx_cnt,u8 tx_cnt);int stmmac_reinit_ringparam (struct net_device *dev,u32 rx_size,u32 tx_size);int stmmac_set_clk_tx_rate (void *bsp_priv,struct clk *clk_tx_i,phy_interface_t interface,int speed);
drivers/net/ethernet/stmicro/stmmac/stmmac_main.c +112 -111
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drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c +11 -4
@@ -138,6 +138,7 @@ static int stmmac_mtl_setup(struct platform_device *pdev,struct device_node *tx_node;u8 queue =0 ;int ret =0 ; +u32 value;/* First Queue must always be in DCB mode. As MTL_QUEUE_DCB = 1 we need * to always set this, otherwise Queue will be classified as AVB
@@ -157,8 +158,11 @@ static int stmmac_mtl_setup(struct platform_device *pdev, }/* Processing RX queues common config */ -of_property_read_u32 (rx_node,"snps,rx-queues-to-use" , - &plat->rx_queues_to_use); +if (!of_property_read_u32 (rx_node,"snps,rx-queues-to-use" , &value)) { +if (value >U8_MAX ) + value =U8_MAX ; + plat->rx_queues_to_use = value; + }if (of_property_read_bool (rx_node,"snps,rx-sched-sp" )) plat->rx_sched_algorithm =MTL_RX_ALGORITHM_SP ;
@@ -208,8 +212,11 @@ static int stmmac_mtl_setup(struct platform_device *pdev, }/* Processing TX queues common config */ -of_property_read_u32 (tx_node,"snps,tx-queues-to-use" , - &plat->tx_queues_to_use); +if (!of_property_read_u32 (tx_node,"snps,tx-queues-to-use" , &value)) { +if (value >U8_MAX ) + value =U8_MAX ; + plat->tx_queues_to_use = value; + }if (of_property_read_bool (tx_node,"snps,tx-sched-wrr" )) plat->tx_sched_algorithm =MTL_TX_ALGORITHM_WRR ;
include/linux/stmmac.h +2 -2
@@ -244,8 +244,8 @@ struct plat_stmmacenet_data {int tx_fifo_size;int rx_fifo_size;u32 host_dma_width; -u32 rx_queues_to_use; -u32 tx_queues_to_use; +u8 rx_queues_to_use; +u8 tx_queues_to_use;u8 rx_sched_algorithm;u8 tx_sched_algorithm;struct stmmac_rxq_cfg rx_queues_cfg[MTL_MAX_RX_QUEUES ];
Signature · 1 line
2.47.3
PATCH 5/7 net: stmmac: use u8 for host_dma_width and similar struct members
In reply to Russell King (Oracle)We aren't going to see >= 256-bit address busses soon, so reduce host_dma_width and associated other struct members that initialise this from u8 to u32.
Signed-off-by Russell King (Oracle) <[email protected]>
--- drivers/net/ethernet/stmicro/stmmac/dwmac-imx.c | 2 +- drivers/net/ethernet/stmicro/stmmac/dwmac-mediatek.c | 6 +++--- drivers/net/ethernet/stmicro/stmmac/dwmac-qcom-ethqos.c | 2 +- include/linux/stmmac.h | 2 +- 4 files changed, 6 insertions(+), 6 deletions(-)
drivers/net/ethernet/stmicro/stmmac/dwmac-imx.c +1 -1
@@ -42,8 +42,8 @@struct imx_priv_data ;struct imx_dwmac_ops { -u32 addr_width;u32 flags; +u8 addr_width;bool mac_rgmii_txclk_auto_adj;int (*fix_soc_reset)(struct stmmac_priv *priv);
drivers/net/ethernet/stmicro/stmmac/dwmac-mediatek.c +3 -3
@@ -93,9 +93,9 @@ struct mediatek_dwmac_variant {const char *const *clk_list;int num_clks; -u32 dma_bit_mask;u32 rx_delay_max;u32 tx_delay_max; +u8 dma_bit_mask; };/* list of clocks required for mac */
@@ -268,9 +268,9 @@ static const struct mediatek_dwmac_variant mt2712_gmac_variant = { .dwmac_set_delay = mt2712_set_delay, .clk_list = mt2712_dwmac_clk_l, .num_clks = ARRAY_SIZE(mt2712_dwmac_clk_l), - .dma_bit_mask = 33, .rx_delay_max = 17600, .tx_delay_max = 17600, + .dma_bit_mask = 33, }; static int mt8195_set_interface(struct mediatek_dwmac_plat_data *plat,
@@ -418,9 +418,9 @@ static const struct mediatek_dwmac_variant mt8195_gmac_variant = { .dwmac_set_delay = mt8195_set_delay, .clk_list = mt8195_dwmac_clk_l, .num_clks = ARRAY_SIZE(mt8195_dwmac_clk_l), - .dma_bit_mask = 35, .rx_delay_max = 9280, .tx_delay_max = 9280, + .dma_bit_mask = 35, };static int mediatek_dwmac_config_dt (struct mediatek_dwmac_plat_data *plat)
drivers/net/ethernet/stmicro/stmmac/dwmac-qcom-ethqos.c +1 -1
@@ -91,8 +91,8 @@ struct ethqos_emac_driver_data {unsigned int num_rgmii_por;bool rgmii_config_loopback_en;bool has_emac_ge_3; +u8 dma_addr_width;const char *link_clk_name; -u32 dma_addr_width;struct dwmac4_addrs dwmac4_addrs;bool needs_sgmii_loopback; };
include/linux/stmmac.h +1 -1
@@ -243,7 +243,7 @@ struct plat_stmmacenet_data {int unicast_filter_entries;int tx_fifo_size;int rx_fifo_size; -u32 host_dma_width; +u8 host_dma_width;u8 rx_queues_to_use;u8 tx_queues_to_use;u8 rx_sched_algorithm;
Signature · 1 line
2.47.3
PATCH 6/7 net: stmmac: add documentation for stmmac_dma_cfg members
In reply to Russell King (Oracle)Add documentation of each of the struct stmmac_dma_cfg members. dche remains undocumented as I don't have documentation that covers this.
Signed-off-by Russell King (Oracle) <[email protected]>
--- include/linux/stmmac.h | 23 ++++++++++++++++++++++- 1 file changed, 22 insertions(+), 1 deletion(-)
include/linux/stmmac.h +22 -1
@@ -93,16 +93,37 @@ struct stmmac_mdio_bus_data { };struct stmmac_dma_cfg { +/* pbl: programmable burst limit +* txpbl: transmit programmable burst limit +* rxpbl: receive programmable burst limit +* If txpbl or rxpbl are zero, the value of pbl will be subsituted. +* Range 0 - 63. +*/ int pbl;int txpbl;int rxpbl; +/* pblx8: multiplies pbl, txpbl, rxpbl by a factor of 8 for dwmac >= +* 3.50a, or a factor of 4 for previous versions. +*/ bool pblx8; +/* fixed_burst: +* when set, AXI bursts defined by axi_blen_regval are permitted. +* AHB uses SINGLE, INCR4, INCR8 or INCR16 during burst transfers. +* when clear, AXI and AHB use SINGLE or INCR bursts. +*/ bool fixed_burst; +/* mixed_burst: +* when set and fixed_burst is clear, AHB uses INCR for bursts > 16 +* and SINGLE or INCRx for bursts <= 16. +*/ bool mixed_burst; +/* aal: address aligned bursts for AHB and AXI master interface */ bool aal; +bool dche;bool eame; +/* multi_msi_en: stmmac core internal */ bool multi_msi_en; -bool dche; +/* atds: stmmac core internal */ bool atds; };
Signature · 1 line
2.47.3
PATCH 7/7 net: stmmac: add documentation for clocks
In reply to Russell King (Oracle)Add documentation covering stmmac_clk, pclk, clk_ptp_ref and clk_tx_i in the hope that this will help understand what each of these clocks are for.
There is confusion around stmmac_clk and pclk which can't be easily resolved today as the Imagination Technologies Pistachio board that pclk was introduced for has no public documentation and is likely now obsolete. So the origins of pclk are lost to the winds of time.
Signed-off-by Russell King (Oracle) <[email protected]>
--- include/linux/stmmac.h | 33 ++++++++++++++++++++++++++++++++- 1 file changed, 32 insertions(+), 1 deletion(-)
include/linux/stmmac.h +32 -1
@@ -300,10 +300,41 @@ struct plat_stmmacenet_data {struct phylink_pcs *(*select_pcs)(struct stmmac_priv *priv,phy_interface_t interface);void *bsp_priv; + +/* stmmac clocks: +* stmmac_clk: CSR clock (which can be hclk_i, clk_csr_i, aclk_i, +* or clk_app_i depending on GMAC configuration). This clock +* generates the MDC clock. +* +* pclk: introduced for Imagination Technologies Pistachio board - +* see 5f9755d26fbf ("stmmac: Add an optional register interface +* clock"). This is probably used for cases where separate clocks +* are provided for the host interface and register interface. In +* this case, as the MDC clock is derived from stmmac_clk, pclk +* can only really be the "application clock" for the "host +* interface" and not the "register interface" aka CSR clock as +* it is never used when determining the divider for the MDC +* clock. +* +* clk_ptp_ref: optional PTP reference clock (clk_ptp_ref_i). When +* present, this clock increments the timestamp value. Otherwise, +* the rate of stmmac_clk will be used. +* +* clk_tx_i: MAC transmit clock, which will be 2.5MHz for 10M, +* 25MHz for 100M, or 125MHz for 1G irrespective of the interface +* mode. For the DWMAC PHY interface modes: +* +* GMII/MII PHY's transmit clock for 10M (2.5MHz) or 100M (25MHz), +* or 125MHz local clock for 1G mode +* RMII 50MHz RMII clock divided by 2 or 20. +* RGMII 125MHz local clock divided by 1, 5, or 50. +* SGMII 125MHz SerDes clock divided by 1, 5, or 50. +* TBI/RTBI 125MHz SerDes clock +*/ struct clk *stmmac_clk;struct clk *pclk;struct clk *clk_ptp_ref; -struct clk *clk_tx_i;/* clk_tx_i to MAC core */ +struct clk *clk_tx_i;unsigned long clk_ptp_rate;unsigned long clk_ref_rate;struct clk_bulk_data *clks;
Signature · 1 line
2.47.3