gpio: introduce a GPIO driver for SCMI

Reviewed-by Andy Shevchenko <[email protected]>

---
v6: Fix build breakage with !CONFIG_PINCONF
v5: No change
v4: Fix kernel-doc (Andy). Add r-b tags
v3: Forward port

 drivers/pinctrl/core.c           | 31 +++++++++++++++++++++++++++++++
 drivers/pinctrl/pinconf.h        |  6 ++++++
 include/linux/pinctrl/consumer.h |  9 +++++++++
 3 files changed, 46 insertions(+)

drivers/pinctrl/core.c +31 -0

index 2edc9bdad183..c471f3fbd035 100644
@@ -30,6 +30,7 @@
 #include <linux/pinctrl/consumer.h>
 #include <linux/pinctrl/devinfo.h>
 #include <linux/pinctrl/machine.h>
+#include <linux/pinctrl/pinconf.h>
 #include <linux/pinctrl/pinctrl.h>
 
 #include "core.h"

@@ -938,6 +939,36 @@ int pinctrl_gpio_set_config(struct gpio_chip *gc, unsigned int offset,
 }
 EXPORT_SYMBOL_GPL(pinctrl_gpio_set_config);
 
+/**
+ * pinctrl_gpio_get_config() - Get the config for a given GPIO pin
+ * @gc: GPIO chip structure from the GPIO subsystem
+ * @offset: hardware offset of the GPIO relative to the controller
+ * @config: the configuration to query.  On success it holds the result
+ * Return: 0 on success, negative errno otherwise
+ */
+int pinctrl_gpio_get_config(struct gpio_chip *gc, unsigned int offset, unsigned long *config)
+{
+	struct pinctrl_gpio_range *range;
+	struct pinctrl_dev *pctldev;
+	int ret, pin;
+
+	ret = pinctrl_get_device_gpio_range(gc, offset, &pctldev, &range);
+	if (ret)
+		return ret;
+
+	mutex_lock(&pctldev->mutex);
+	pin = gpio_to_pin(range, gc, offset);
+	ret = pin_config_get_for_pin(pctldev, pin, config);
+	mutex_unlock(&pctldev->mutex);
+
+	if (ret)
+		return ret;
+
+	*config = pinconf_to_config_argument(*config);
+	return 0;
+}
+EXPORT_SYMBOL_GPL(pinctrl_gpio_get_config);
+
 static struct pinctrl_state *find_state(struct pinctrl *p,
 					const char *name)
 {

drivers/pinctrl/pinconf.h +6 -0

index 2880adef476e..659a781e2091 100644
@@ -74,6 +74,12 @@ static inline int pinconf_set_config(struct pinctrl_dev *pctldev, unsigned int p
 	return -ENOTSUPP;
 }
 
+static inline int pin_config_get_for_pin(struct pinctrl_dev *pctldev, unsigned int pin,
+			   unsigned long *config)
+{
+	return -ENOTSUPP;
+}
+
 #endif
 
 #if defined(CONFIG_PINCONF) && defined(CONFIG_DEBUG_FS)

include/linux/pinctrl/consumer.h +9 -0

index 63ce16191eb9..11b8f0b8da0c 100644
@@ -35,6 +35,8 @@ int pinctrl_gpio_direction_output(struct gpio_chip *gc,
 				  unsigned int offset);
 int pinctrl_gpio_set_config(struct gpio_chip *gc, unsigned int offset,
 				unsigned long config);
+int pinctrl_gpio_get_config(struct gpio_chip *gc, unsigned int offset,
+			    unsigned long *config);
 
 struct pinctrl * __must_check pinctrl_get(struct device *dev);
 void pinctrl_put(struct pinctrl *p);

@@ -101,6 +103,13 @@ pinctrl_gpio_direction_output(struct gpio_chip *gc, unsigned int offset)
 	return 0;
 }
 
+static inline int
+pinctrl_gpio_get_config(struct gpio_chip *gc, unsigned int offset,
+			unsigned long *config)
+{
+	return 0;
+}
+
 static inline int
 pinctrl_gpio_set_config(struct gpio_chip *gc, unsigned int offset,
 			    unsigned long config)

Signature · 1 line

2.53.0

Dan Carpenter

author

2026-03-23 19:01 UTC #2 lore raw

PATCH v6 2/7 pinctrl: scmi: Add SCMI_PIN_INPUT_VALUE

The PIN_CONFIG_LEVEL parameter represents the value of the pin, whether reading or writing to the pin. In SCMI, the parameter is represented by two different values SCMI_PIN_OUTPUT_VALUE for writing to a pin and SCMI_PIN_INPUT_VALUE for reading. The current code translates PIN_CONFIG_LEVEL as SCMI_PIN_OUTPUT_VALUE (writing).

Add a function to translate it to either INPUT or OUTPUT depending on whether it is called from a _get or _set() operation.

Acked-by Sudeep Holla <[email protected]>

---
v5: no change
v4: add r-b tags
v3: new patch

 drivers/pinctrl/pinctrl-scmi.c | 33 ++++++++++++++++++++++++++-------
 1 file changed, 26 insertions(+), 7 deletions(-)

drivers/pinctrl/pinctrl-scmi.c +26 -7

index f4f296e07be5..5d347e6b2e4c 100644
@@ -251,9 +251,6 @@ static int pinctrl_scmi_map_pinconf_type(enum pin_config_param param,
 	case PIN_CONFIG_MODE_LOW_POWER:
 		*type = SCMI_PIN_LOW_POWER_MODE;
 		break;
-	case PIN_CONFIG_LEVEL:
-		*type = SCMI_PIN_OUTPUT_VALUE;
-		break;
 	case PIN_CONFIG_OUTPUT_ENABLE:
 		*type = SCMI_PIN_OUTPUT_MODE;
 		break;

@@ -276,6 +273,28 @@ static int pinctrl_scmi_map_pinconf_type(enum pin_config_param param,
 	return 0;
 }
 
+static int pinctrl_scmi_map_pinconf_type_get(enum pin_config_param param,
+					     enum scmi_pinctrl_conf_type *type)
+{
+	if (param == PIN_CONFIG_LEVEL) {
+		*type = SCMI_PIN_INPUT_VALUE;
+		return 0;
+	}
+
+	return pinctrl_scmi_map_pinconf_type(param, type);
+}
+
+static int pinctrl_scmi_map_pinconf_type_set(enum pin_config_param param,
+					     enum scmi_pinctrl_conf_type *type)
+{
+	if (param == PIN_CONFIG_LEVEL) {
+		*type = SCMI_PIN_OUTPUT_VALUE;
+		return 0;
+	}
+
+	return pinctrl_scmi_map_pinconf_type(param, type);
+}
+
 static int pinctrl_scmi_pinconf_get(struct pinctrl_dev *pctldev,
 				    unsigned int pin, unsigned long *config)
 {

@@ -290,7 +309,7 @@ static int pinctrl_scmi_pinconf_get(struct pinctrl_dev *pctldev,
 
 	config_type = pinconf_to_config_param(*config);
 
-	ret = pinctrl_scmi_map_pinconf_type(config_type, &type);
+	ret = pinctrl_scmi_map_pinconf_type_get(config_type, &type);
 	if (ret)
 		return ret;

@@ -363,7 +382,7 @@ static int pinctrl_scmi_pinconf_set(struct pinctrl_dev *pctldev,
 
 	for (i = 0; i < num_configs; i++) {
 		param = pinconf_to_config_param(configs[i]);
-		ret = pinctrl_scmi_map_pinconf_type(param, &p_config_type[i]);
+		ret = pinctrl_scmi_map_pinconf_type_set(param, &p_config_type[i]);
 		if (ret) {
 			dev_err(pmx->dev, "Error map pinconf_type %d\n", ret);
 			goto free_config;

@@ -405,7 +424,7 @@ static int pinctrl_scmi_pinconf_group_set(struct pinctrl_dev *pctldev,
 
 	for (i = 0; i < num_configs; i++) {
 		param = pinconf_to_config_param(configs[i]);
-		ret = pinctrl_scmi_map_pinconf_type(param, &p_config_type[i]);
+		ret = pinctrl_scmi_map_pinconf_type_set(param, &p_config_type[i]);
 		if (ret) {
 			dev_err(pmx->dev, "Error map pinconf_type %d\n", ret);
 			goto free_config;

@@ -440,7 +459,7 @@ static int pinctrl_scmi_pinconf_group_get(struct pinctrl_dev *pctldev,
 		return -EINVAL;
 
 	config_type = pinconf_to_config_param(*config);
-	ret = pinctrl_scmi_map_pinconf_type(config_type, &type);
+	ret = pinctrl_scmi_map_pinconf_type_get(config_type, &type);
 	if (ret) {
 		dev_err(pmx->dev, "Error map pinconf_type %d\n", ret);
 		return ret;

Signature · 1 line

2.53.0

Dan Carpenter

author

2026-03-23 19:01 UTC #3 lore raw

PATCH v6 3/7 pinctrl: scmi: Delete PIN_CONFIG_OUTPUT_IMPEDANCE_OHMS support

The argument for PIN_CONFIG_OUTPUT_IMPEDANCE_OHMS is supposed to be expressed in terms of ohms. But the pinctrl-scmi driver was implementing it the same as PIN_CONFIG_OUTPUT and writing either a zero or one to the pin.

The SCMI protocol doesn't have an support configuration type so just delete this code instead of replacing it.

Cc Peng Fan <[email protected]>

---
v5: fix subystem prefix
v4: add r-b tags
v3: new patch

 drivers/pinctrl/pinctrl-scmi.c | 3 ---
 1 file changed, 3 deletions(-)

drivers/pinctrl/pinctrl-scmi.c +0 -3

index 5d347e6b2e4c..de8c113bc61d 100644
@@ -254,9 +254,6 @@ static int pinctrl_scmi_map_pinconf_type(enum pin_config_param param,
 	case PIN_CONFIG_OUTPUT_ENABLE:
 		*type = SCMI_PIN_OUTPUT_MODE;
 		break;
-	case PIN_CONFIG_OUTPUT_IMPEDANCE_OHMS:
-		*type = SCMI_PIN_OUTPUT_VALUE;
-		break;
 	case PIN_CONFIG_POWER_SOURCE:
 		*type = SCMI_PIN_POWER_SOURCE;
 		break;

Signature · 1 line

2.53.0

Dan Carpenter

author

2026-03-23 19:01 UTC #4 lore raw

PATCH v6 4/7 pinctrl: scmi: ignore PIN_CONFIG_PERSIST_STATE

The PIN_CONFIG_PERSIST_STATE setting ensures that the pin state persists across a sleep or controller reset. The SCMI spec does not have an equivalent command to this so just ignore it.

---
v5: fix subsystem prefix
v4: Add r-b tags
v3: No change

 drivers/pinctrl/pinctrl-scmi.c | 12 ++++++++----
 1 file changed, 8 insertions(+), 4 deletions(-)

drivers/pinctrl/pinctrl-scmi.c +8 -4

index de8c113bc61d..f22be6b7b82a 100644
@@ -361,7 +361,7 @@ static int pinctrl_scmi_pinconf_set(struct pinctrl_dev *pctldev,
 				    unsigned long *configs,
 				    unsigned int num_configs)
 {
-	int i, ret;
+	int i, cnt, ret;
 	struct scmi_pinctrl *pmx = pinctrl_dev_get_drvdata(pctldev);
 	enum scmi_pinctrl_conf_type config_type[SCMI_NUM_CONFIGS];
 	u32 config_value[SCMI_NUM_CONFIGS];

@@ -377,17 +377,21 @@ static int pinctrl_scmi_pinconf_set(struct pinctrl_dev *pctldev,
 	if (ret)
 		return ret;
 
+	cnt = 0;
 	for (i = 0; i < num_configs; i++) {
 		param = pinconf_to_config_param(configs[i]);
-		ret = pinctrl_scmi_map_pinconf_type_set(param, &p_config_type[i]);
+		if (param == PIN_CONFIG_PERSIST_STATE)
+			continue;
+		ret = pinctrl_scmi_map_pinconf_type_set(param, &p_config_type[cnt]);
 		if (ret) {
 			dev_err(pmx->dev, "Error map pinconf_type %d\n", ret);
 			goto free_config;
 		}
-		p_config_value[i] = pinconf_to_config_argument(configs[i]);
+		p_config_value[cnt] = pinconf_to_config_argument(configs[i]);
+		cnt++;
 	}
 
-	ret = pinctrl_ops->settings_conf(pmx->ph, pin, PIN_TYPE, num_configs,
+	ret = pinctrl_ops->settings_conf(pmx->ph, pin, PIN_TYPE, cnt,
 					 p_config_type,  p_config_value);
 	if (ret)
 		dev_err(pmx->dev, "Error parsing config %d\n", ret);

Signature · 1 line

2.53.0

Dan Carpenter

author

2026-03-23 19:01 UTC #5 lore raw

PATCH v6 5/7 firmware: arm_scmi: Allow PINCTRL_REQUEST to return EOPNOTSUPP

The SCMI protocol specification says that the PINCTRL_REQUEST and PINCTRL_RELEASE commands are optional. So if the SCMI server returns -EOPNOTSUPP, then treat that as success and continue.

Reviewed-by Sudeep Holla <[email protected]>

---
v5: fix subsytem prefix
v4: add r-b tags
v3: new patch

 drivers/firmware/arm_scmi/pinctrl.c | 2 ++
 1 file changed, 2 insertions(+)

drivers/firmware/arm_scmi/pinctrl.c +2 -0

index a020e23d7c49..42cb1aef1fe1 100644
@@ -578,6 +578,8 @@ static int scmi_pinctrl_request_free(const struct scmi_protocol_handle *ph,
 	tx->flags = cpu_to_le32(type);
 
 	ret = ph->xops->do_xfer(ph, t);
+	if (ret == -EOPNOTSUPP)
+		ret = 0;
 	ph->xops->xfer_put(ph, t);
 
 	return ret;

Signature · 1 line

2.53.0

Dan Carpenter

author

2026-03-23 19:01 UTC #6 lore raw

PATCH v6 6/7 gpio: dt-bindings: Add GPIO on top of generic pin control

From: AKASHI Takahiro <[email protected]>

Traditionally, firmware will provide a GPIO interface or a pin control interface. However, the SCMI protocol provides a generic pin control interface and the GPIO support is built on top of that using the normal pin control interfaces. Potentially, other firmware will adopt a similar generic approach in the future.

Document how to configure the GPIO device.

Signed-off-by AKASHI Takahiro <[email protected]>

Reviewed-by Krzysztof Kozlowski <[email protected]>

---
v6: Fix the subject. Sorry!
Fix typo in my email.
Add Krzysztof's reviewed-by tag.
v5: Fix subsystem prefix
Re-word the commit message
I removed all references to the driver. I also removed the reference to pin muxing because that's described in the pin control spec file.
Fix 3 vs 4 typo in the example.
v4: Changed additionalProperties: true to false.
Add gpio-line-names.
Deleted one example.
Add r-b tags
v3: Forward port and update

 .../bindings/gpio/pin-control-gpio.yaml       | 59 +++++++++++++++++++
 1 file changed, 59 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/gpio/pin-control-gpio.yaml

Documentation/devicetree/bindings/gpio/pin-control-gpio.yaml new file +59 -0

new file mode 100644
index 000000000000..a05cd339253a
@@ -0,0 +1,59 @@
+# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/gpio/pin-control-gpio.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Pin control based generic GPIO controller
+
+description:
+  The pin control-based GPIO will facilitate a pin controller's ability
+  to drive electric lines high/low and other generic properties of a
+  pin controller to perform general-purpose one-bit binary I/O.
+
+maintainers:
+  - Dan Carpenter <[email protected]>
+
+properties:
+  compatible:
+    const: scmi-pinctrl-gpio
+
+  gpio-controller: true
+
+  "#gpio-cells":
+    const: 2
+
+  gpio-line-names: true
+
+  gpio-ranges: true
+
+  ngpios: true
+
+patternProperties:
+  "^.+-hog(-[0-9]+)?$":
+    type: object
+
+    required:
+      - gpio-hog
+
+required:
+  - compatible
+  - gpio-controller
+  - "#gpio-cells"
+  - gpio-ranges
+  - ngpios
+
+additionalProperties: false
+
+examples:
+  - |
+    gpio {
+        compatible = "scmi-pinctrl-gpio";
+        gpio-controller;
+        #gpio-cells = <2>;
+        ngpios = <4>;
+        gpio-line-names = "gpio_5_17", "gpio_5_20", "gpio_5_22", "gpio_2_1";
+        gpio-ranges = <&scmi_pinctrl 0 30 4>;
+        pinctrl-names = "default";
+        pinctrl-0 = <&keys_pins>;
+    };

Signature · 1 line

2.53.0

Dan Carpenter

author

2026-03-23 19:01 UTC #7 lore raw

PATCH v6 7/7 gpio: gpio-by-pinctrl: add pinctrl based generic GPIO driver

From: AKASHI Takahiro <[email protected]>

The ARM SCMI pinctrl protocol allows GPIO access. Instead of creating a new SCMI GPIO driver, this driver is a generic GPIO driver that uses standard pinctrl interfaces.

Signed-off-by AKASHI Takahiro <[email protected]>

Acked-by Bartosz Golaszewski <[email protected]>

---
v6: Use pinconf_to_config_packed() instead of PIN_CONF_PACKED()
v5: Clean up based on Andy's feedback:
Update Kconfig entry
Update Copyright date
Fix includes
Get rid of unused private data
Simplify pin_control_gpio_get_direction()
v4: Add r-b tags
v3: Forward port and update

---
 drivers/gpio/Kconfig           |  13 +++++
 drivers/gpio/Makefile          |   1 +
 drivers/gpio/gpio-by-pinctrl.c | 101 +++++++++++++++++++++++++++++++++
 3 files changed, 115 insertions(+)
 create mode 100644 drivers/gpio/gpio-by-pinctrl.c

drivers/gpio/Kconfig +13 -0

index b45fb799e36c..c631ecb01e07 100644
@@ -246,6 +246,19 @@ config GPIO_BRCMSTB
 	help
 	  Say yes here to enable GPIO support for Broadcom STB (BCM7XXX) SoCs.
 
+config GPIO_BY_PINCTRL
+	tristate "GPIO support based on a pure pin control backend"
+	depends on GPIOLIB
+	help
+	  Support for generic GPIO handling based on top of pin control.
+	  Traditionally, firmware creates a GPIO interface or a pin
+	  controller interface and we have a driver to support it.  But
+	  in SCMI, the pin control interface is generic and we can
+	  create a simple GPIO device based on the pin control interface
+	  without doing anything custom.
+
+	  This driver used to do GPIO over the ARM SCMI protocol.
+
 config GPIO_CADENCE
 	tristate "Cadence GPIO support"
 	depends on OF_GPIO

drivers/gpio/Makefile +1 -0

index c05f7d795c43..20d4a57afdaa 100644
@@ -51,6 +51,7 @@ obj-$(CONFIG_GPIO_BD9571MWV)		+= gpio-bd9571mwv.o
 obj-$(CONFIG_GPIO_BLZP1600)		+= gpio-blzp1600.o
 obj-$(CONFIG_GPIO_BRCMSTB)		+= gpio-brcmstb.o
 obj-$(CONFIG_GPIO_BT8XX)		+= gpio-bt8xx.o
+obj-$(CONFIG_GPIO_BY_PINCTRL)		+= gpio-by-pinctrl.o
 obj-$(CONFIG_GPIO_CADENCE)		+= gpio-cadence.o
 obj-$(CONFIG_GPIO_CGBC)			+= gpio-cgbc.o
 obj-$(CONFIG_GPIO_CLPS711X)		+= gpio-clps711x.o

drivers/gpio/gpio-by-pinctrl.c new file +101 -0

101 lines not on this page · raw message

Signature · 1 line

2.53.0

Andy Shevchenko

Reviewed-by on v6 7/7

2026-03-24 11:15 UTC #8 lore raw

Re: [PATCH v6 7/7] gpio: gpio-by-pinctrl: add pinctrl based generic GPIO driver

Quoted 3 lines · Dan Carpenter

The ARM SCMI pinctrl protocol allows GPIO access. Instead of creating a new SCMI GPIO driver, this driver is a generic GPIO driver that uses standard pinctrl interfaces.

Reviewed-by Andy Shevchenko <[email protected]>

Signature · 2 lines

With Best Regards,
Andy Shevchenko

Dan Carpenter

author

2026-03-24 11:41 UTC #9 lore raw

Re: [PATCH v6 7/7] gpio: gpio-by-pinctrl: add pinctrl based generic GPIO driver

Quoted 8 lines · Andy Shevchenko

Quoted 3 lines · Dan Carpenter
The ARM SCMI pinctrl protocol allows GPIO access. Instead of creating a new SCMI GPIO driver, this driver is a generic GPIO driver that uses standard pinctrl interfaces.
Reviewed-by Andy Shevchenko <[email protected]>

Thanks Andy,

The driver is much cleaner after your review.

regards,
dan carpenter

Geert Uytterhoeven

2026-04-07 10:21 UTC #10 lore raw

Re: [PATCH v6 7/7] gpio: gpio-by-pinctrl: add pinctrl based generic GPIO driver

Hi Dan,

Quoted 10 lines · Dan Carpenter

From: AKASHI Takahiro <[email protected]>
The ARM SCMI pinctrl protocol allows GPIO access. Instead of creating a new SCMI GPIO driver, this driver is a generic GPIO driver that uses standard pinctrl interfaces.
Signed-off-by AKASHI Takahiro <[email protected]>
Signed-off-by Dan Carpenter <[email protected]>
Reviewed-by Linus Walleij <[email protected]>
Acked-by Bartosz Golaszewski <[email protected]>

Thanks for your patch, which is now commit 7671f4949a6c9111 ("gpio: gpio-by-pinctrl: add pinctrl based generic GPIO driver") in gpio/for-next.

drivers/gpio/Kconfig config GPIO_BRCMSTB · line 251

Quoted 9 lines

drivers/gpio/Kconfig +3 -0

@@ -246,6 +246,19 @@ config GPIO_BRCMSTB
        help
          Say yes here to enable GPIO support for Broadcom STB (BCM7XXX) SoCs.
 
+config GPIO_BY_PINCTRL
+       tristate "GPIO support based on a pure pin control backend"
+       depends on GPIOLIB

Should this depend on ARM_SCMI *|| COMPILE_TEST)? The driver only matches against the "scmi-pinctrl-gpio" compatible value. Or do you envision a use case without SCMI?

drivers/gpio/Kconfig config GPIO_BRCMSTB · line 260

Quoted 9 lines

drivers/gpio/Kconfig +9 -0

+       help
+         Support for generic GPIO handling based on top of pin control.
+         Traditionally, firmware creates a GPIO interface or a pin
+         controller interface and we have a driver to support it.  But
+         in SCMI, the pin control interface is generic and we can
+         create a simple GPIO device based on the pin control interface
+         without doing anything custom.
+
+         This driver used to do GPIO over the ARM SCMI protocol.

I have sent a patch to add the missing "is".
https://lore.kernel.org/b1ecb31a37f8e35447122554a38985cb6240eb11.1775556619.git.geert+renesas@glider.be

drivers/gpio/Kconfig config GPIO_BRCMSTB · line 264

Quoted 4 lines

drivers/gpio/Kconfig +1 -0

+
 config GPIO_CADENCE
        tristate "Cadence GPIO support"
        depends on OF_GPIO

Gr{oetje,eeting}s,

Geert

Signature · 5 lines

Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- [email protected]

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds

Linus Walleij

maintainer

2026-04-07 12:19 UTC #11 lore raw

Re: [PATCH v6 7/7] gpio: gpio-by-pinctrl: add pinctrl based generic GPIO driver

Quoted 7 lines · Geert Uytterhoeven

drivers/gpio/Kconfig config GPIO_BRCMSTB · line 251
Quoted 3 lines
drivers/gpio/Kconfig +3 -0
+config GPIO_BY_PINCTRL
+       tristate "GPIO support based on a pure pin control backend"
+       depends on GPIOLIB
Should this depend on ARM_SCMI *|| COMPILE_TEST)? The driver only matches against the "scmi-pinctrl-gpio" compatible value. Or do you envision a use case without SCMI?

It can be used without SCMI but SCMI is the only current user.

I imagine any firmware protocol (e.g. rpmsg, heh) implementing a pinctrl driver could get GPIO "for free" using this.

Yours,
Linus Walleij

Linus Walleij

maintainer

2026-03-24 13:11 UTC #12 lore raw