clk: various improvements and fixes

Hi Stephen,

Here's various improvements and fixes that weren't picked up during the last merge window that I feel are ready. Let me know if you'd like me to drop anything and I can send you a v2. Details from the 19 contributors are below in the signed tag.

The following changes since commit dc59e4fea9d83f03bad6bddf3fa2e52491777482:

Linux 7.2-rc1 (2026-06-28 12:01:31 -0700)

are available in the Git repository at:

https://github.com/masneyb/linux tags/clk-misc-for-v7.3

for you to fetch changes up to e3a9ad35af677ecdff0aed12891f9360d1a493bd:

pmdomain: mediatek: mtk-mfg: use clk_determine_rate_noop() (2026-06-29 17:53:17 -0400)

----------------------------------------------------------------
clk: various improvements and fixes

Here's various improvements and fixes for the clk subsystem that was posted prior to the opening of the last merge window.

- Add spread spectrum clock (SSC) support to the clk framework, including a new assigned-clock-sscs devicetree property and clk_hw_set_spread_spectrum() API with KUnit tests (Peng Fan)
- Add SCMI clock OEM extensions for the i.MX95 clock driver and introduce a common SCMI clock header (Peng Fan)
- Add clock, reset, and devicetree bindings for the ESWIN EIC7700 HSP clock and reset generator (Xuyang Dong)
- Add clk_determine_rate_noop() helper for clock drivers that can do any rate, and convert existing open-coded implementations across hisilicon, imx, qcom, renesas, rp1, samsung, scpi, sprd, mediatek phy, and mediatek pmdomain drivers (Brian Masney)
- Add kernel-doc documentation for struct clk_core and the core clock flags, and wire up clk identifiers into the documentation build (Brian Masney)
- Fix clk_divider_bestdiv() returning the minimum rate instead of the maximum rate for large rate requests, with KUnit tests (Lad Prabhakar)
- Fix Nuvoton MA35D1 PLL frequency calculation including ignored div_u64 return values, incorrect PLL_CTL1_FRAC bit field width, and broken determine_rate logic (Joey Lu)
- Support unique clock names for multi-socket Tegra platforms (Jon Hunter)
- Allow COMPILE_TEST builds for HiSilicon clock drivers (Rosen Penev)
- Various fixes and cleanups from Akari Tsuyukusa, Alexander A. Klimov, Brian Masney, David Carlier, David Laight, Min zhang, Myeonghun Pak, Pavel Löbl, Randy Dunlap, Rob Herring, Rosen Penev, Uwe Kleine-König, William Theesfeld, Xuyang Dong, and Yu-Chun Lin

----------------------------------------------------------------
Akari Tsuyukusa (1):
clk: mediatek: mt8196: Select REGMAP_MMIO for vlpckgen

Alexander A. Klimov (1):
clk: moxart: remove unused variables, fix refcount leak

Brian Masney (19):
clk: add kernel docs for the core flags
clk: add kernel docs for struct clk_core
docs: clk: include some identifiers to keep documentation up to date
clk: test: convert constants to use HZ_PER_MHZ
clk: imx: scu: drop redundant init.ops variable assignment
clk: add clk_determine_rate_noop()
clk: hisilicon: hi3660-stub: use clk_determine_rate_noop()
clk: imx: scu: use clk_determine_rate_noop()
clk: qcom: rpm: use clk_determine_rate_noop()
clk: qcom: rpmh: use clk_determine_rate_noop()
clk: qcom: smd-rpm: use clk_determine_rate_noop()
clk: renesas: rzg2l-cpg: use clk_determine_rate_noop()
clk: rp1: use clk_determine_rate_noop()
clk: samsung: acpm: use clk_determine_rate_noop()
clk: scpi: use clk_determine_rate_noop()
clk: sprd: use clk_determine_rate_noop()
phy: mediatek: phy-mtk-hdmi-mt2701: use clk_determine_rate_noop()
pmdomain: mediatek: airoha: use clk_determine_rate_noop()
pmdomain: mediatek: mtk-mfg: use clk_determine_rate_noop()

David Carlier (1):
clk: canaan: Clear rate fields before reprogramming dividers

David Laight (1):
drivers/clk/clk_test: Use strscpy() to copy the test description

Joey Lu (3):
clk: nuvoton: ma35d1: fix ignored div_u64 return values in PLL freq calculation
clk: nuvoton: ma35d1: fix PLL_CTL1_FRAC bit field width and fractional calc
clk: nuvoton: ma35d1: fix ma35d1_clk_pll_determine_rate logic

Jon Hunter (1):
clk: tegra: Support unique names for multi-socket platforms

Lad Prabhakar (2):
clk: divider: Add KUnit tests for clk_divider_bestdiv() ULONG_MAX handling
clk: divider: Fix clk_divider_bestdiv() returning min rate for large rate requests

Min zhang (1):
clk: hisilicon: reset: Use devm_kzalloc to initialize hisi_reset_controller

Myeonghun Pak (1):
clk: versaclock7: Fix APLL clock leak on probe failure

Pavel Löbl (1):
clk: clocking-wizard: fix integer overflow in rate calculation

Peng Fan (6):
dt-bindings: clock: Add spread spectrum definition
clk: Introduce clk_hw_set_spread_spectrum
clk: conf: Support assigned-clock-sscs
clk: Add KUnit tests for assigned-clock-sscs
clk: scmi: Introduce common header for SCMI clock interface
clk: scmi: Add i.MX95 OEM extension support for SCMI clock driver

Randy Dunlap (1):
clk: add missing function short descriptions for kernel-doc

Rob Herring (Arm) (1):
clk: at91: Read "reg" with helper

Rosen Penev (3):
clk: kirkwood: use kzalloc_flex
clk: stm32: add missing bitfield.h header
clk: hisilicon: allow COMPILE_TEST builds

Uwe Kleine-König (The Capable Hub) (4):
clk: clk-lmk04832: Simplify device abstraction
clk: Use named initializers for platform_device_id arrays
clk: si5341: Drop unused i2c driver_data
clk: Use named initializers for arrays of i2c_device_data

William Theesfeld (1):
clk: zynq: handle kasprintf() failure in periph_clk registration

Xuyang Dong (4):
clk: eswin: Add CLK_IGNORE_UNUSED to NoC clock
dt-bindings: clock: Add ESWIN eic7700 HSP clock and reset generator
clk: eswin: Add eic7700 HSP clock driver
reset: eswin: Add eic7700 HSP reset driver

Yu-Chun Lin (1):
clk: bcm: kona: Stop defaulting to parent index 0 on error

 .../bindings/clock/eswin,eic7700-hspcrg.yaml       |  63 ++++
 Documentation/driver-api/clk.rst                   |  58 +---
 MAINTAINERS                                        |   5 +-
 drivers/clk/.kunitconfig                           |   1 +
 drivers/clk/Kconfig                                |   8 +
 drivers/clk/Makefile                               |  15 +-
 drivers/clk/at91/dt-compat.c                       |   5 +-
 drivers/clk/bcm/clk-kona.c                         |   3 +-
 drivers/clk/clk-bd718x7.c                          |  12 +-
 drivers/clk/clk-cdce706.c                          |   2 +-
 drivers/clk/clk-cdce925.c                          |   8 +-
 drivers/clk/clk-conf.c                             |  76 +++++
 drivers/clk/clk-cs2000-cp.c                        |   4 +-
 drivers/clk/clk-divider.c                          |  25 +-
 drivers/clk/clk-divider_test.c                     | 153 +++++++++
 drivers/clk/clk-k230.c                             |   4 +
 drivers/clk/clk-lmk04832.c                         |  27 +-
 drivers/clk/clk-max77686.c                         |   8 +-
 drivers/clk/clk-moxart.c                           |  14 -
 drivers/clk/clk-renesas-pcie.c                     |   6 +-
 drivers/clk/clk-rp1.c                              |   8 +-
 drivers/clk/clk-s2mps11.c                          |  12 +-
 drivers/clk/clk-scmi-oem.c                         | 108 +++++++
 drivers/clk/clk-scmi.c                             |  44 +--
 drivers/clk/clk-scmi.h                             |  51 +++
 drivers/clk/clk-scpi.c                             |  14 +-
 drivers/clk/clk-si514.c                            |   2 +-
 drivers/clk/clk-si521xx.c                          |   6 +-
 drivers/clk/clk-si5341.c                           |  10 +-
 drivers/clk/clk-si5351.c                           |   8 +-
 drivers/clk/clk-si544.c                            |   6 +-
 drivers/clk/clk-si570.c                            |   8 +-
 drivers/clk/clk-versaclock5.c                      |  16 +-
 drivers/clk/clk-versaclock7.c                      |   6 +-
 drivers/clk/clk.c                                  | 112 ++++++-
 drivers/clk/clk_test.c                             | 214 ++++++++++++-
 drivers/clk/eswin/Kconfig                          |  13 +
 drivers/clk/eswin/Makefile                         |   1 +
 drivers/clk/eswin/clk-eic7700-hsp.c                | 345 +++++++++++++++++++++
 drivers/clk/eswin/clk-eic7700.c                    |   3 +-
 drivers/clk/hisilicon/Kconfig                      |  14 +
 drivers/clk/hisilicon/clk-hi3660-stub.c            |  12 +-
 drivers/clk/hisilicon/reset.c                      |   2 +-
 drivers/clk/imx/clk-scu.c                          |  24 +-
 drivers/clk/kunit_clk_assigned_rates.h             |  10 +
 .../clk/kunit_clk_assigned_rates_u64_multiple.dtso |   6 +
 ...t_clk_assigned_rates_u64_multiple_consumer.dtso |   6 +
 drivers/clk/kunit_clk_assigned_rates_u64_one.dtso  |   3 +
 .../kunit_clk_assigned_rates_u64_one_consumer.dtso |   3 +
 drivers/clk/kunit_clk_assigned_sscs_multiple.dtso  |  20 ++
 .../kunit_clk_assigned_sscs_multiple_consumer.dtso |  24 ++
 drivers/clk/kunit_clk_assigned_sscs_null.dtso      |  16 +
 .../clk/kunit_clk_assigned_sscs_null_consumer.dtso |  20 ++
 drivers/clk/kunit_clk_assigned_sscs_one.dtso       |  16 +
 .../clk/kunit_clk_assigned_sscs_one_consumer.dtso  |  20 ++
 drivers/clk/kunit_clk_assigned_sscs_without.dtso   |  15 +
 .../kunit_clk_assigned_sscs_without_consumer.dtso  |  19 ++
 drivers/clk/kunit_clk_assigned_sscs_zero.dtso      |  12 +
 .../clk/kunit_clk_assigned_sscs_zero_consumer.dtso |  16 +
 drivers/clk/mediatek/Kconfig                       |   1 +
 drivers/clk/mvebu/kirkwood.c                       |  21 +-
 drivers/clk/nuvoton/clk-ma35d1-pll.c               |  42 +--
 drivers/clk/qcom/clk-rpm.c                         |  15 +-
 drivers/clk/qcom/clk-rpmh.c                        |   8 +-
 drivers/clk/qcom/clk-smd-rpm.c                     |  13 +-
 drivers/clk/renesas/rzg2l-cpg.c                    |   8 +-
 drivers/clk/samsung/clk-acpm.c                     |  18 +-
 drivers/clk/sprd/pll.c                             |   8 +-
 drivers/clk/stm32/clk-stm32mp21.c                  |   1 +
 drivers/clk/stm32/clk-stm32mp25.c                  |   1 +
 drivers/clk/tegra/clk-bpmp.c                       |  10 +-
 drivers/clk/xilinx/clk-xlnx-clock-wizard.c         |   4 +-
 drivers/clk/zynq/clkc.c                            |   8 +
 drivers/phy/mediatek/phy-mtk-hdmi-mt2701.c         |   8 +-
 drivers/pmdomain/mediatek/airoha-cpu-pmdomain.c    |   8 +-
 drivers/pmdomain/mediatek/mtk-mfg-pmdomain.c       |  23 +-
 drivers/reset/Kconfig                              |  11 +
 drivers/reset/Makefile                             |   1 +
 drivers/reset/reset-eic7700-hsp.c                  | 113 +++++++
 include/dt-bindings/clock/clock.h                  |  14 +
 include/dt-bindings/clock/eswin,eic7700-hspcrg.h   |  33 ++
 include/dt-bindings/reset/eswin,eic7700-hspcrg.h   |  21 ++
 include/linux/clk-provider.h                       |  78 ++++-
 83 files changed, 1812 insertions(+), 398 deletions(-)
 create mode 100644 Documentation/devicetree/bindings/clock/eswin,eic7700-hspcrg.yaml
 create mode 100644 drivers/clk/clk-divider_test.c
 create mode 100644 drivers/clk/clk-scmi-oem.c
 create mode 100644 drivers/clk/clk-scmi.h
 create mode 100644 drivers/clk/eswin/clk-eic7700-hsp.c
 create mode 100644 drivers/clk/kunit_clk_assigned_sscs_multiple.dtso
 create mode 100644 drivers/clk/kunit_clk_assigned_sscs_multiple_consumer.dtso
 create mode 100644 drivers/clk/kunit_clk_assigned_sscs_null.dtso
 create mode 100644 drivers/clk/kunit_clk_assigned_sscs_null_consumer.dtso
 create mode 100644 drivers/clk/kunit_clk_assigned_sscs_one.dtso
 create mode 100644 drivers/clk/kunit_clk_assigned_sscs_one_consumer.dtso
 create mode 100644 drivers/clk/kunit_clk_assigned_sscs_without.dtso
 create mode 100644 drivers/clk/kunit_clk_assigned_sscs_without_consumer.dtso
 create mode 100644 drivers/clk/kunit_clk_assigned_sscs_zero.dtso
 create mode 100644 drivers/clk/kunit_clk_assigned_sscs_zero_consumer.dtso
 create mode 100644 drivers/reset/reset-eic7700-hsp.c
 create mode 100644 include/dt-bindings/clock/clock.h
 create mode 100644 include/dt-bindings/clock/eswin,eic7700-hspcrg.h
 create mode 100644 include/dt-bindings/reset/eswin,eic7700-hspcrg.h

I forgot to mention that I didn't include Benoît's support for the Mobileye EyeQ7H SoC since he already has a separate pull ready:

https://lore.kernel.org/linux-clk/[email protected]/

Brian

Quoting Brian Masney (2026-06-29 15:34:49)

Thanks. Pulled into clk-next