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ata: libahci: clear PxCLBU and PxFBU for AHCI_HFLAG_32BIT_ONLY

PATCH Applied Niklas Cassel 2 participants 5 messages Sep 4 – Sep 15

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Niklas Cassel

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#0 lore raw

PATCH v2 1/1 ata: libahci: clear PxCLBU and PxFBU for AHCI_HFLAG_32BIT_ONLY

A user reported that commit 105c42566a55 ("ata: ahci: force 32-bit DMA for JMicron JMB582/JMB585") made the JMicron JMB585 unusable on his board.

The failure is seen as soon as the ahci driver is probed, and booting with iommu=off does not solve the problem.

Looking at the AHCI specification, PxCLBU and PxFBU are both read only '0' for HBAs that do not support 64-bit addressing.

For HBAs that do support 64-bit addressing, the registers are read write, with a reset value that is Implementation Specific.

When using the AHCI_HFLAG_32BIT_ONLY flag, the HBA does support 64-bit addressing, and a 32-bit DMA mask is set by simply clearing HOST_CAP_64. Thus, in this case, we need to explicitly clear the registers to 0.

Fixes 105c42566a55 ("ata: ahci: force 32-bit DMA for JMicron JMB582/JMB585")
Fixes c7a42156d99b ("ahci: disable 64bit dma on sb600")
Cc [email protected]
Reported-by Roland Waltersson <[email protected]>
Closes https://lore.kernel.org/linux-ide/IA0PR17MB668730A4ECCD65F7A1DC3EDC9EB62@IA0PR17MB6687.namprd17.prod.outlook.com/ open here
Signed-off-by Niklas Cassel <[email protected]>

---
Changes since v1:
-Clarify code comment.
-Add CC stable.

 drivers/ata/libahci.c | 15 ++++++++++++++-
 1 file changed, 14 insertions(+), 1 deletion(-)
drivers/ata/libahci.c +14 -1
index 6d72eb017b49..08ab56e95566 100644
@@ -744,15 +744,28 @@ void ahci_start_fis_rx(struct ata_port *ap)
 	struct ahci_port_priv *pp = ap->private_data;
 	u32 tmp;
 
-	/* set FIS registers */
+	/*
+	 * On HBAs that only support 32-bit addressing PxCLBU is read only '0'.
+	 * When applying the AHCI_HFLAG_32BIT_ONLY quirk, PxCLBU is RW, and the
+	 * reset value is Implementation Specific, so we need to clear it to 0.
+	 */
 	if (hpriv->cap & HOST_CAP_64)
 		writel((pp->cmd_slot_dma >> 16) >> 16,
 		       port_mmio + PORT_LST_ADDR_HI);
+	else if (hpriv->flags & AHCI_HFLAG_32BIT_ONLY)
+		writel(0, port_mmio + PORT_LST_ADDR_HI);
 	writel(pp->cmd_slot_dma & 0xffffffff, port_mmio + PORT_LST_ADDR);
 
+	/*
+	 * On HBAs that only support 32-bit addressing PxFBU is read only '0'.
+	 * When applying the AHCI_HFLAG_32BIT_ONLY quirk, PxFBU is RW, and the
+	 * reset value is Implementation Specific, so we need to clear it to 0.
+	 */
 	if (hpriv->cap & HOST_CAP_64)
 		writel((pp->rx_fis_dma >> 16) >> 16,
 		       port_mmio + PORT_FIS_ADDR_HI);
+	else if (hpriv->flags & AHCI_HFLAG_32BIT_ONLY)
+		writel(0, port_mmio + PORT_FIS_ADDR_HI);
 	writel(pp->rx_fis_dma & 0xffffffff, port_mmio + PORT_FIS_ADDR);
 
 	/* enable FIS reception */
Signature · 1 line
2.55.0
maintainer Reviewed-by on v2 1/1
#1 lore raw
Quoted 16 lines · Niklas Cassel

A user reported that commit 105c42566a55 ("ata: ahci: force 32-bit DMA for JMicron JMB582/JMB585") made the JMicron JMB585 unusable on his board.

The failure is seen as soon as the ahci driver is probed, and booting with iommu=off does not solve the problem.

Looking at the AHCI specification, PxCLBU and PxFBU are both read only '0' for HBAs that do not support 64-bit addressing.

For HBAs that do support 64-bit addressing, the registers are read write, with a reset value that is Implementation Specific.

When using the AHCI_HFLAG_32BIT_ONLY flag, the HBA does support 64-bit addressing, and a 32-bit DMA mask is set by simply clearing HOST_CAP_64. Thus, in this case, we need to explicitly clear the registers to 0.

Quoted 6 lines
Fixes 105c42566a55 ("ata: ahci: force 32-bit DMA for JMicron JMB582/JMB585")
Fixes c7a42156d99b ("ahci: disable 64bit dma on sb600")
Cc [email protected]
Reported-by Roland Waltersson <[email protected]>
Closes https://lore.kernel.org/linux-ide/IA0PR17MB668730A4ECCD65F7A1DC3EDC9EB62@IA0PR17MB6687.namprd17.prod.outlook.com/ open here
Signed-off-by Niklas Cassel <[email protected]>

This is clear now :)

Reviewed-by Damien Le Moal <[email protected]>
Signature · 2 lines
Damien Le Moal
Western Digital Research
author maintainer
#2 lore raw
In reply to Niklas Cassel
Quoted 16 lines · Niklas Cassel

A user reported that commit 105c42566a55 ("ata: ahci: force 32-bit DMA for JMicron JMB582/JMB585") made the JMicron JMB585 unusable on his board.

The failure is seen as soon as the ahci driver is probed, and booting with iommu=off does not solve the problem.

Looking at the AHCI specification, PxCLBU and PxFBU are both read only '0' for HBAs that do not support 64-bit addressing.

For HBAs that do support 64-bit addressing, the registers are read write, with a reset value that is Implementation Specific.

When using the AHCI_HFLAG_32BIT_ONLY flag, the HBA does support 64-bit addressing, and a 32-bit DMA mask is set by simply clearing HOST_CAP_64. Thus, in this case, we need to explicitly clear the registers to 0.

Quoted 6 lines
Fixes 105c42566a55 ("ata: ahci: force 32-bit DMA for JMicron JMB582/JMB585")
Fixes c7a42156d99b ("ahci: disable 64bit dma on sb600")
Cc [email protected]
Reported-by Roland Waltersson <[email protected]>
Closes https://lore.kernel.org/linux-ide/IA0PR17MB668730A4ECCD65F7A1DC3EDC9EB62@IA0PR17MB6687.namprd17.prod.outlook.com/ open here
Signed-off-by Niklas Cassel <[email protected]>

Hello Roland,

Any chance to get a Tested-by from you?

Kind regards,
Niklas

author maintainer
#3 lore raw
Quoted 24 lines · Niklas Cassel
Quoted 16 lines · Niklas Cassel

A user reported that commit 105c42566a55 ("ata: ahci: force 32-bit DMA for JMicron JMB582/JMB585") made the JMicron JMB585 unusable on his board.

The failure is seen as soon as the ahci driver is probed, and booting with iommu=off does not solve the problem.

Looking at the AHCI specification, PxCLBU and PxFBU are both read only '0' for HBAs that do not support 64-bit addressing.

For HBAs that do support 64-bit addressing, the registers are read write, with a reset value that is Implementation Specific.

When using the AHCI_HFLAG_32BIT_ONLY flag, the HBA does support 64-bit addressing, and a 32-bit DMA mask is set by simply clearing HOST_CAP_64. Thus, in this case, we need to explicitly clear the registers to 0.

Quoted 6 lines
Fixes 105c42566a55 ("ata: ahci: force 32-bit DMA for JMicron JMB582/JMB585")
Fixes c7a42156d99b ("ahci: disable 64bit dma on sb600")
Cc [email protected]
Reported-by Roland Waltersson <[email protected]>
Closes https://lore.kernel.org/linux-ide/IA0PR17MB668730A4ECCD65F7A1DC3EDC9EB62@IA0PR17MB6687.namprd17.prod.outlook.com/ open here
Signed-off-by Niklas Cassel <[email protected]>
Quoted 3 lines

Hello Roland,

Any chance to get a Tested-by from you?

If we get a Tested-by, we could send it for v7.3-rc3 which will release on Sunday.

If you are busy, I don't see any problem of sending it sometime next week to target v7.3-rc4.

Kind regards,
Niklas

author maintainer Applied
#4 lore raw
In reply to Niklas Cassel
Quoted 10 lines · Niklas Cassel

A user reported that commit 105c42566a55 ("ata: ahci: force 32-bit DMA for JMicron JMB582/JMB585") made the JMicron JMB585 unusable on his board.

The failure is seen as soon as the ahci driver is probed, and booting with iommu=off does not solve the problem.

Looking at the AHCI specification, PxCLBU and PxFBU are both read only '0' for HBAs that do not support 64-bit addressing.

[...]

Applied to libata/linux.git (for-7.3-fixes), thanks!

[1/1] ata: libahci: clear PxCLBU and PxFBU for AHCI_HFLAG_32BIT_ONLY

      https://git.kernel.org/libata/linux/c/82e47533

Kind regards,
Niklas