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ADSP for SDM670 and sound on Google Pixel 3a

PATCH Applied Richard Acayan 4 participants 19 messages Nov 7 – Nov 11

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#0 lore raw

v3 cover ADSP for SDM670 and sound on Google Pixel 3a

This series adds a user for the SDM660 sound support code [1]. It also adds the ADSP remoteproc for SDM670.

[1] https://lore.kernel.org/r/[email protected]

Changes since v2 (https://lore.kernel.org/r/[email protected]):
- stop using fallback compatible and add lcx power domain (3-5/9)
- move lpass codec bclk from sdm670-google-common.dtsi to sdm670.dtsi
(5/9, 9/9)
- reformat q6dsp dts (5/9)
- set flags for codec interrupts (7/9)
- move "qcom,..." properties to board dtsi (7/9, 9/9)
- add review tags (6/9)

Changes since v1 (https://lore.kernel.org/r/[email protected]):
- squashed sound card and device-specific codec config (11/11)
- converted to fallback compatible (4/11)
- added compatible for WCD digital codec (5/11, 10/11)
- removed sleepstate comment (7/11)
- sorted subnodes of dai link (11/11)
- add review tags (1-3/11)

Richard Acayan (9):
dt-bindings: soc: qcom,smp2p: add sleepstate support
dt-bindings: soc: qcom: aoss: Add compatible for SDM670
dt-bindings: remoteproc: qcom: adsp: Add SDM670 ADSP compatible
remoteproc: qcom: pas: Add SDM670 ADSP support
arm64: dts: qcom: sdm670: add adsp
arm64: dts: qcom: sdm670-google: enable adsp
arm64: dts: qcom: pm660l: add analog audio codec
arm64: dts: qcom: sdm670: add digital audio codec
arm64: dts: qcom: sdm670-google: add sound card

 .../bindings/remoteproc/qcom,adsp.yaml        |  15 ++
 .../bindings/soc/qcom/qcom,aoss-qmp.yaml      |   1 +
 .../bindings/soc/qcom/qcom,smp2p.yaml         |   2 +-
 arch/arm64/boot/dts/qcom/pm660l.dtsi          |  37 ++++
 .../boot/dts/qcom/sdm670-google-common.dtsi   | 142 +++++++++++++
 arch/arm64/boot/dts/qcom/sdm670.dtsi          | 199 ++++++++++++++++++
 drivers/remoteproc/qcom_q6v5_pas.c            |  16 ++
 7 files changed, 411 insertions(+), 1 deletion(-)
Signature · 1 line
2.56.0
#1 lore raw

PATCH v3 1/9 dt-bindings: soc: qcom,smp2p: add sleepstate support

The sleepstate entry is used by Qualcomm sensor DSPs to control suspend/resume operations. Even though there is no full support for sleep states, initialization of the entry is still necessary for some DSPs, notably the sensors-bearing ADSP on the Pixel 3a (SDM670 SoC). Allow sleepstates to be declared in the device tree so they can be initialized.

---
 Documentation/devicetree/bindings/soc/qcom/qcom,smp2p.yaml | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)
Documentation/devicetree/bindings/soc/qcom/qcom,smp2p.yaml +1 -1
index f91276822858..7862d68c9678 100644
@@ -60,7 +60,7 @@ properties:
       Two identifiers of the inbound and outbound smem items used for this edge.
 
 patternProperties:
-  "^master-kernel|slave-kernel|ipa-ap-to-modem|ipa-modem-to-ap|wlan-ap-to-wpss|wlan-wpss-to-ap$":
+  "^master-kernel|slave-kernel|ipa-ap-to-modem|ipa-modem-to-ap|sleepstate|wlan-ap-to-wpss|wlan-wpss-to-ap$":
     type: object
     description:
       Each SMP2P pair contain a set of inbound and outbound entries, these are
Signature · 1 line
2.56.0
#2 lore raw

PATCH v3 2/9 dt-bindings: soc: qcom: aoss: Add compatible for SDM670

In reply to Richard Acayan

Document the compatible for SDM670.

---
 Documentation/devicetree/bindings/soc/qcom/qcom,aoss-qmp.yaml | 1 +
 1 file changed, 1 insertion(+)
Documentation/devicetree/bindings/soc/qcom/qcom,aoss-qmp.yaml +1 -0
index e94c4fd34177..6a817a1cd395 100644
@@ -43,6 +43,7 @@ properties:
           - qcom,sc8180x-aoss-qmp
           - qcom,sc8280xp-aoss-qmp
           - qcom,sdx75-aoss-qmp
+          - qcom,sdm670-aoss-qmp
           - qcom,sdm845-aoss-qmp
           - qcom,sm6350-aoss-qmp
           - qcom,sm7150-aoss-qmp
Signature · 1 line
2.56.0
#3 lore raw

PATCH v3 3/9 dt-bindings: remoteproc: qcom: adsp: Add SDM670 ADSP compatible

In reply to Richard Acayan

Add the compatible for the Audio DSP on SDM670.

---
 .../devicetree/bindings/remoteproc/qcom,adsp.yaml | 15 +++++++++++++++
 1 file changed, 15 insertions(+)
Documentation/devicetree/bindings/remoteproc/qcom,adsp.yaml +15 -0
index 7e8ecae8e6cb..6cac1f77993b 100644
@@ -25,6 +25,7 @@ properties:
       - qcom,msm8998-slpi-pas
       - qcom,sdm660-adsp-pas
       - qcom,sdm660-cdsp-pas
+      - qcom,sdm670-adsp-pas
       - qcom,sdm845-adsp-pas
       - qcom,sdm845-cdsp-pas
       - qcom,sdm845-slpi-pas
@@ -128,6 +129,20 @@ allOf:
       required:
         - px-supply
 
+  - if:
+      properties:
+        compatible:
+          enum:
+            - qcom,sdm670-adsp-pas
+    then:
+      properties:
+        power-domains:
+          items:
+            - description: LCX power domain
+        power-domain-names:
+          items:
+            - const: lcx
+
   - if:
       properties:
         compatible:
Signature · 1 line
2.56.0
#4 lore raw

Re: [PATCH v3 3/9] dt-bindings: remoteproc: qcom: adsp: Add SDM670 ADSP compatible

Thank you for your contribution! Sashiko AI review found 1 potential issue to consider: - [Low] dt-bindings: remoteproc: qcom,adsp: piling on per-compatible conditional --

Thank you for your contribution! Sashiko AI review found 1 potential issue to consider:
- [Low] dt-bindings: remoteproc: qcom,adsp: piling on per-compatible conditional
--

commit d08998077e2bf791171ccb3e3fc451fa5b6952ed
Author: Richard Acayan <[email protected]>

dt-bindings: remoteproc: qcom: adsp: Add SDM670 ADSP compatible

This commit adds the qcom,sdm670-adsp-pas compatible and its LCX power domain constraints to the qcom,adsp.yaml binding schema.

Quoted 19 lines
Documentation/devicetree/bindings/remoteproc/qcom,adsp.yaml +4 -0
index 7e8ecae8e6cb6..6cac1f77993ba 100644
@@ -25,6 +25,7 @@ properties:
       - qcom,msm8998-slpi-pas
       - qcom,sdm660-adsp-pas
       - qcom,sdm660-cdsp-pas
+      - qcom,sdm670-adsp-pas
       - qcom,sdm845-adsp-pas
       - qcom,sdm845-cdsp-pas
       - qcom,sdm845-slpi-pas
@@ -128,6 +129,20 @@ allOf:
       required:
         - px-supply
 
+  - if:
+      properties:
+        compatible:

Documentation/devicetree/bindings/remoteproc/qcom,adsp.yaml allOf: · line 144

Quoted 10 lines
Documentation/devicetree/bindings/remoteproc/qcom,adsp.yaml +10 -0
+          enum:
+            - qcom,sdm670-adsp-pas
+    then:
+      properties:
+        power-domains:
+          items:
+            - description: LCX power domain
+        power-domain-names:
+          items:
+            - const: lcx

[Severity: Low]
Should qcom,sdm670-adsp-pas be split into a separate schema document (or grouped with a matching PAS binding) instead of adding another per-compatible if-then block to qcom,adsp.yaml?

qcom,adsp.yaml already carries several variant-specific conditionals under allOf for different power domain and supply layouts, and newer PAS bindings with distinct constraints have been split into dedicated schema files to keep the conditionals manageable.

Signature · 1 line
Sashiko AI review · https://sashiko.dev/#/patchset/[email protected]?part=3
#5 lore raw

PATCH v3 4/9 remoteproc: qcom: pas: Add SDM670 ADSP support

In reply to Richard Acayan

The ADSP is used to control audio and sensors on the SDM670 SoC. Add the compatible for it, with the same data as SDM845 except for the LCX power domain.

---
 drivers/remoteproc/qcom_q6v5_pas.c | 16 ++++++++++++++++
 1 file changed, 16 insertions(+)
drivers/remoteproc/qcom_q6v5_pas.c +16 -0
index f37b77ae187e..57a111a0d75e 100644
@@ -1122,6 +1122,21 @@ static const struct qcom_pas_data sa8775p_adsp_resource = {
 	.ssctl_id = 0x14,
 };
 
+static const struct qcom_pas_data sdm670_adsp_resource_init = {
+	.crash_reason_smem = 423,
+	.firmware_name = "adsp.mdt",
+	.pas_id = 1,
+	.auto_boot = true,
+	.proxy_pd_names = (char*[]){
+		"lcx",
+		NULL
+	},
+	.load_state = "adsp",
+	.ssr_name = "lpass",
+	.sysmon_name = "adsp",
+	.ssctl_id = 0x14,
+};
+
 static const struct qcom_pas_data sdm845_adsp_resource_init = {
 	.crash_reason_smem = 423,
 	.firmware_name = "adsp.mdt",
@@ -2035,6 +2050,7 @@ static const struct of_device_id qcom_pas_of_match[] = {
 	{ .compatible = "qcom,sc8280xp-nsp1-pas", .data = &sc8280xp_nsp1_resource },
 	{ .compatible = "qcom,sdm660-adsp-pas", .data = &adsp_resource_init },
 	{ .compatible = "qcom,sdm660-cdsp-pas", .data = &cdsp_resource_init },
+	{ .compatible = "qcom,sdm670-adsp-pas", .data = &sdm670_adsp_resource_init },
 	{ .compatible = "qcom,sdm845-adsp-pas", .data = &sdm845_adsp_resource_init },
 	{ .compatible = "qcom,sdm845-cdsp-pas", .data = &sdm845_cdsp_resource_init },
 	{ .compatible = "qcom,sdm845-slpi-pas", .data = &sdm845_slpi_resource_init },
Signature · 1 line
2.56.0
#6 lore raw

PATCH v3 5/9 arm64: dts: qcom: sdm670: add adsp

In reply to Richard Acayan

The Audio DSP (Digital Signal Processor) is responsible for audio and sensors on SDM670. Add this, along with the SMP2P nodes used to communicate with it.

The sleep state is included to prevent the following crash:

qcom_q6v5_pas remoteproc-adsp: fatal error received: err_qdi.c:450:EF:sensor_process:1:sar.cc:27:chre_utils fatal

Otherwise, it is unused.

---
 arch/arm64/boot/dts/qcom/sdm670.dtsi | 177 +++++++++++++++++++++++++++
 1 file changed, 177 insertions(+)
arch/arm64/boot/dts/qcom/sdm670.dtsi +177 -0
index 711e15b56cb8..e99183c22208 100644
@@ -19,6 +19,7 @@
 #include <dt-bindings/interrupt-controller/arm-gic.h>
 #include <dt-bindings/phy/phy-qcom-qusb2.h>
 #include <dt-bindings/power/qcom-rpmpd.h>
+#include <dt-bindings/soc/qcom,apr.h>
 #include <dt-bindings/soc/qcom,rpmh-rsc.h>
 
 / {
@@ -500,6 +501,34 @@ cluster_pd: power-domain-cluster {
 		};
 	};
 
+	smp2p-lpass {
+		compatible = "qcom,smp2p";
+		qcom,smem = <443>, <429>;
+
+		interrupts = <GIC_SPI 172 IRQ_TYPE_EDGE_RISING>;
+
+		mboxes = <&apss_shared 26>;
+
+		qcom,local-pid = <0>;
+		qcom,remote-pid = <2>;
+
+		adsp_smp2p_out: master-kernel {
+			qcom,entry-name = "master-kernel";
+			#qcom,smem-state-cells = <1>;
+		};
+
+		adsp_smp2p_in: slave-kernel {
+			qcom,entry-name = "slave-kernel";
+			interrupt-controller;
+			#interrupt-cells = <2>;
+		};
+
+		adsp_smp2p_sleepstate: sleepstate {
+			qcom,entry-name = "sleepstate";
+			#qcom,smem-state-cells = <1>;
+		};
+	};
+
 	reserved-memory {
 		#address-cells = <2>;
 		#size-cells = <2>;
@@ -2383,6 +2412,19 @@ dispcc: clock-controller@af00000 {
 			#power-domain-cells = <1>;
 		};
 
+		aoss_qmp: power-management@c300000 {
+			compatible = "qcom,sdm670-aoss-qmp", "qcom,aoss-qmp";
+			reg = <0 0x0c300000 0 0x100000>;
+			interrupts = <GIC_SPI 389 IRQ_TYPE_EDGE_RISING>;
+			mboxes = <&apss_shared 0>;
+
+			#clock-cells = <0>;
+
+			cx_cdev: cx {
+				#cooling-cells = <2>;
+			};
+		};
+
 		apps_smmu: iommu@15000000 {
 			compatible = "qcom,sdm670-smmu-500", "qcom,smmu-500", "arm,mmu-500";
 			reg = <0 0x15000000 0 0x80000>;
@@ -2463,6 +2505,12 @@ gladiator_noc: interconnect@17900000 {
 			qcom,bcm-voters = <&apps_bcm_voter>;
 		};
 
+		apss_shared: mailbox@17990000 {
+			compatible = "qcom,sdm670-apss-shared", "qcom,sdm845-apss-shared";
+			reg = <0 0x17990000 0 0x1000>;
+			#mbox-cells = <1>;
+		};
+
 		apps_rsc: rsc@179c0000 {
 			compatible = "qcom,rpmh-rsc";
 			reg = <0 0x179c0000 0 0x10000>,
@@ -2573,6 +2621,135 @@ cpufreq_hw: cpufreq@17d43000 {
 			#freq-domain-cells = <1>;
 		};
 
+		adsp_pas: remoteproc@62400000 {
+			compatible = "qcom,sdm670-adsp-pas";
+			reg = <0 0x62400000 0 0x4040>;
+
+			interrupts-extended = <&intc GIC_SPI 162 IRQ_TYPE_EDGE_RISING>,
+					      <&adsp_smp2p_in 0 IRQ_TYPE_EDGE_RISING>,
+					      <&adsp_smp2p_in 1 IRQ_TYPE_EDGE_RISING>,
+					      <&adsp_smp2p_in 2 IRQ_TYPE_EDGE_RISING>,
+					      <&adsp_smp2p_in 3 IRQ_TYPE_EDGE_RISING>;
+			interrupt-names = "wdog", "fatal", "ready",
+					  "handover", "stop-ack";
+
+			clocks = <&rpmhcc RPMH_CXO_CLK>;
+			clock-names = "xo";
+
+			memory-region = <&adsp_mem>;
+
+			power-domains = <&rpmhpd SDM670_LCX>;
+			power-domain-names = "lcx";
+
+			qcom,qmp = <&aoss_qmp>;
+
+			qcom,smem-states = <&adsp_smp2p_out 0>;
+			qcom,smem-state-names = "stop";
+
+			status = "disabled";
+
+			glink-edge {
+				interrupts = <GIC_SPI 170 IRQ_TYPE_EDGE_RISING>;
+				label = "lpass";
+				qcom,remote-pid = <2>;
+				mboxes = <&apss_shared 24>;
+
+				apr {
+					compatible = "qcom,apr-v2";
+					qcom,glink-channels = "apr_audio_svc";
+					qcom,domain = <APR_DOMAIN_ADSP>;
+					#address-cells = <1>;
+					#size-cells = <0>;
+					qcom,intents = <512 20>;
+
+					q6core: service@3 {
+						reg = <APR_SVC_ADSP_CORE>;
+						compatible = "qcom,q6core";
+						qcom,protection-domain = "avs/audio",
+									 "msm/adsp/audio_pd";
+					};
+
+					q6afe: service@4 {
+						compatible = "qcom,q6afe";
+						reg = <APR_SVC_AFE>;
+						qcom,protection-domain = "avs/audio",
+									 "msm/adsp/audio_pd";
+
+						q6afecc: clock-controller {
+							compatible = "qcom,q6afe-clocks";
+							#clock-cells = <2>;
+						};
+
+						q6afedai: dais {
+							compatible = "qcom,q6afe-dais";
+							#address-cells = <1>;
+							#size-cells = <0>;
+							#sound-dai-cells = <1>;
+						};
+					};
+
+					q6asm: service@7 {
+						compatible = "qcom,q6asm";
+						reg = <APR_SVC_ASM>;
+						qcom,protection-domain = "avs/audio",
+									 "msm/adsp/audio_pd";
+
+						q6asmdai: dais {
+							compatible = "qcom,q6asm-dais";
+							#address-cells = <1>;
+							#size-cells = <0>;
+							#sound-dai-cells = <1>;
+							iommus = <&apps_smmu 0x1801 0x0>;
+						};
+					};
+
+					q6adm: service@8 {
+						compatible = "qcom,q6adm";
+						reg = <APR_SVC_ADM>;
+						qcom,protection-domain = "avs/audio",
+									 "msm/adsp/audio_pd";
+
+						q6routing: routing {
+							compatible = "qcom,q6adm-routing";
+							#sound-dai-cells = <0>;
+						};
+					};
+				};
+
+				fastrpc {
+					compatible = "qcom,fastrpc";
+					qcom,glink-channels = "fastrpcglink-apps-dsp";
+					label = "adsp";
+					#address-cells = <1>;
+					#size-cells = <0>;
+
+					compute-cb@3 {
+						compatible = "qcom,fastrpc-compute-cb";
+						reg = <3>;
+						iommus = <&apps_smmu 0x1803 0x0>;
+					};
+
+					compute-cb@4 {
+						compatible = "qcom,fastrpc-compute-cb";
+						reg = <4>;
+						iommus = <&apps_smmu 0x1804 0x0>;
+					};
+
+					compute-cb@5 {
+						compatible = "qcom,fastrpc-compute-cb";
+						reg = <5>;
+						iommus = <&apps_smmu 0x1805 0x0>;
+					};
+
+					compute-cb@6 {
+						compatible = "qcom,fastrpc-compute-cb";
+						reg = <6>;
+						iommus = <&apps_smmu 0x1806 0x0>;
+					};
+				};
+			};
+		};
+
 		lpi_tlmm: pinctrl@62b40000 {
 			compatible = "qcom,sdm670-lpass-lpi-pinctrl";
 			reg = <0 0x62b40000 0 0x20000>;
Signature · 1 line
2.56.0
#7 lore raw

Re: [PATCH v3 5/9] arm64: dts: qcom: sdm670: add adsp

Thank you for your contribution! Sashiko AI review found 2 potential issues to consider: - [Medium] arm64: dts: qcom: sdm670: missing qcom,non-secure-domain in adsp fastrpc node - [Low] arm64: dts…

Thank you for your contribution! Sashiko AI review found 2 potential issues to consider:
- [Medium] arm64: dts: qcom: sdm670: missing qcom,non-secure-domain in adsp fastrpc node
- [Low] arm64: dts: qcom: sdm670: overallocated reg size on aoss_qmp node
--

commit 09499ee58443d0f969ea496f5f01be20fd59d890
Author: Richard Acayan <[email protected]>

arm64: dts: qcom: sdm670: add adsp

This commit adds the Audio DSP remoteproc node and its associated SMP2P, AOSS QMP, and APSS shared mailbox nodes to the SDM670 device tree.

Quoted 4 lines
arch/arm64/boot/dts/qcom/sdm670.dtsi +0 -0
index 711e15b56cb8a..e99183c222083 100644

[ ... ]

arch/arm64/boot/dts/qcom/sdm670.dtsi dispcc: clock-controller@af00000 { · line 2417

Quoted 7 lines
arch/arm64/boot/dts/qcom/sdm670.dtsi +3 -0
@@ -2383,6 +2412,19 @@ dispcc: clock-controller@af00000 {
 			#power-domain-cells = <1>;
 		};
 
+		aoss_qmp: power-management@c300000 {
+			compatible = "qcom,sdm670-aoss-qmp", "qcom,aoss-qmp";
+			reg = <0 0x0c300000 0 0x100000>;

[Severity: Low]
Should the reg size on aoss_qmp be 0x400 instead of 0x100000?

qmp_probe() calls devm_platform_ioremap_resource(), which requests exclusive ownership of the full reg range. Specifying 0x100000 reserves the entire 1 MiB AOSS region rather than the 1 KiB APSS client message RAM slice, blocking other devices in that aperture (such as RPMh sleep stats at 0x0c3f0000) from claiming their memory resource.

[ ... ]

Quoted 5 lines
arch/arm64/boot/dts/qcom/sdm670.dtsi +1 -0
@@ -2573,6 +2621,135 @@ cpufreq_hw: cpufreq@17d43000 {
 			#freq-domain-cells = <1>;
 		};
 
+		adsp_pas: remoteproc@62400000 {

[ ... ]

arch/arm64/boot/dts/qcom/sdm670.dtsi cpufreq_hw: cpufreq@17d43000 { · line 2724

Quoted 6 lines
arch/arm64/boot/dts/qcom/sdm670.dtsi +6 -0
+				fastrpc {
+					compatible = "qcom,fastrpc";
+					qcom,glink-channels = "fastrpcglink-apps-dsp";
+					label = "adsp";
+					#address-cells = <1>;
+					#size-cells = <0>;

[Severity: Medium]
Is this fastrpc node missing the qcom,non-secure-domain property?

Without it, fastrpc_rpmsg_probe() defaults secure_dsp to true and registers /dev/fastrpc-adsp-secure instead of /dev/fastrpc-adsp for ADSP_DOMAIN_ID, breaking non-secure userspace audio and sensor FastRPC clients:

drivers/misc/fastrpc.c:fastrpc_rpmsg_probe() {
	...
	secure_dsp = !(of_property_read_bool(rdev->of_node, "qcom,non-secure-domain"));
	data->secure = secure_dsp;
	...
	switch (domain_id) {
	case ADSP_DOMAIN_ID:
	case MDSP_DOMAIN_ID:
	case SDSP_DOMAIN_ID:
		/* Unsigned PD offloading is only supported on CDSP and GDSP */
		data->unsigned_support = false;
		err = fastrpc_device_register(rdev, data, secure_dsp, domain);
		if (err)
			goto fdev_error;
		break;
	...
}
Signature · 1 line
Sashiko AI review · https://sashiko.dev/#/patchset/[email protected]?part=5
#8 lore raw

PATCH v3 6/9 arm64: dts: qcom: sdm670-google: enable adsp

In reply to Richard Acayan

Enable the ADSP on the Pixel 3a in anticipation of audio support.

---
 arch/arm64/boot/dts/qcom/sdm670-google-common.dtsi | 6 ++++++
 1 file changed, 6 insertions(+)
arch/arm64/boot/dts/qcom/sdm670-google-common.dtsi +6 -0
index 4ce9b62abe53..2044593c22f3 100644
@@ -199,6 +199,12 @@ cam_vio_ldo: cam-vio-ldo-regulator {
 	};
 };
 
+&adsp_pas {
+	firmware-name = "qcom/sdm670/sargo/adsp.mbn";
+
+	status = "okay";
+};
+
 &apps_rsc {
 	regulators-0 {
 		compatible = "qcom,pm660-rpmh-regulators";
Signature · 1 line
2.56.0
#9 lore raw

PATCH v3 7/9 arm64: dts: qcom: pm660l: add analog audio codec

In reply to Richard Acayan

The PM660L analog audio codec (PMIC revision 4) controls the headphone jack, and optionally the earpiece and speaker, at the vendor's decision. Add the analog audio codec.

---
 arch/arm64/boot/dts/qcom/pm660l.dtsi | 37 ++++++++++++++++++++++++++++
 1 file changed, 37 insertions(+)
arch/arm64/boot/dts/qcom/pm660l.dtsi +37 -0
index 3f8b9eafe164..608c1c2120c9 100644
@@ -87,6 +87,43 @@ pm660l_wled: leds@d800 {
 			status = "disabled";
 		};
 
+		pm660l_codec: audio-codec@f000 {
+			compatible = "qcom,pm660l-wcd-analog-codec",
+				     "qcom,pm8953-wcd-analog-codec";
+			reg = <0xf000>;
+			interrupts = <0x3 0xf0 0x0 IRQ_TYPE_EDGE_BOTH>,
+				     <0x3 0xf0 0x1 IRQ_TYPE_EDGE_BOTH>,
+				     <0x3 0xf0 0x2 IRQ_TYPE_EDGE_BOTH>,
+				     <0x3 0xf0 0x3 IRQ_TYPE_EDGE_BOTH>,
+				     <0x3 0xf0 0x4 IRQ_TYPE_EDGE_BOTH>,
+				     <0x3 0xf0 0x5 IRQ_TYPE_EDGE_BOTH>,
+				     <0x3 0xf0 0x6 IRQ_TYPE_EDGE_BOTH>,
+				     <0x3 0xf0 0x7 IRQ_TYPE_EDGE_BOTH>,
+				     <0x3 0xf1 0x0 IRQ_TYPE_EDGE_BOTH>,
+				     <0x3 0xf1 0x1 IRQ_TYPE_EDGE_BOTH>,
+				     <0x3 0xf1 0x2 IRQ_TYPE_EDGE_BOTH>,
+				     <0x3 0xf1 0x3 IRQ_TYPE_EDGE_BOTH>,
+				     <0x3 0xf1 0x4 IRQ_TYPE_EDGE_BOTH>,
+				     <0x3 0xf1 0x5 IRQ_TYPE_EDGE_BOTH>;
+			interrupt-names = "cdc_spk_cnp_int",
+					  "cdc_spk_clip_int",
+					  "cdc_spk_ocp_int",
+					  "mbhc_ins_rem_det1",
+					  "mbhc_but_rel_det",
+					  "mbhc_but_press_det",
+					  "mbhc_ins_rem_det",
+					  "mbhc_switch_int",
+					  "cdc_ear_ocp_int",
+					  "cdc_hphr_ocp_int",
+					  "cdc_hphl_ocp_det",
+					  "cdc_ear_cnp_int",
+					  "cdc_hphr_cnp_int",
+					  "cdc_hphl_cnp_int";
+			sound-name-prefix = "Analog";
+			#sound-dai-cells = <1>;
+			status = "disabled";
+		};
+
 		pm660l_spmi_regulators: regulators {
 			compatible = "qcom,pm660l-regulators";
 		};
Signature · 1 line
2.56.0
Reviewed-by on v3 7/9
#10 lore raw

Re: [PATCH v3 7/9] arm64: dts: qcom: pm660l: add analog audio codec

Quoted 6 lines · Richard Acayan

The PM660L analog audio codec (PMIC revision 4) controls the headphone jack, and optionally the earpiece and speaker, at the vendor's decision. Add the analog audio codec.

---

[...]

arch/arm64/boot/dts/qcom/pm660l.dtsi pm660l_wled: leds@d800 { · line 124

Quoted 3 lines
arch/arm64/boot/dts/qcom/pm660l.dtsi +3 -0
+			sound-name-prefix = "Analog";
+			#sound-dai-cells = <1>;
+			status = "disabled";

Nit: only in case you resend for something else, please add a \n before 'status'

Konrad

#11 lore raw

Re: [PATCH v3 7/9] arm64: dts: qcom: pm660l: add analog audio codec

In reply to Richard Acayan
Thank you for your contribution! Sashiko AI review found 1 potential issue to consider: - [Low] arm64: dts: qcom: pm660l: sound-name-prefix violates analog codec DT schema --

Thank you for your contribution! Sashiko AI review found 1 potential issue to consider:
- [Low] arm64: dts: qcom: pm660l: sound-name-prefix violates analog codec DT schema
--

commit 2cdb7e07dbee3037de67d0c38e09df937ce70258
Author: Richard Acayan <[email protected]>

arm64: dts: qcom: pm660l: add analog audio codec

This commit adds the analog audio codec node to the PM660L PMIC device tree.

Quoted 31 lines
arch/arm64/boot/dts/qcom/pm660l.dtsi +23 -0
index 3f8b9eafe1641..608c1c2120c96 100644
@@ -87,6 +87,43 @@ pm660l_wled: leds@d800 {
 			status = "disabled";
 		};
 
+		pm660l_codec: audio-codec@f000 {
+			compatible = "qcom,pm660l-wcd-analog-codec",
+				     "qcom,pm8953-wcd-analog-codec";
+			reg = <0xf000>;
+			interrupts = <0x3 0xf0 0x0 IRQ_TYPE_EDGE_BOTH>,
+				     <0x3 0xf0 0x1 IRQ_TYPE_EDGE_BOTH>,
+				     <0x3 0xf0 0x2 IRQ_TYPE_EDGE_BOTH>,
+				     <0x3 0xf0 0x3 IRQ_TYPE_EDGE_BOTH>,
+				     <0x3 0xf0 0x4 IRQ_TYPE_EDGE_BOTH>,
+				     <0x3 0xf0 0x5 IRQ_TYPE_EDGE_BOTH>,
+				     <0x3 0xf0 0x6 IRQ_TYPE_EDGE_BOTH>,
+				     <0x3 0xf0 0x7 IRQ_TYPE_EDGE_BOTH>,
+				     <0x3 0xf1 0x0 IRQ_TYPE_EDGE_BOTH>,
+				     <0x3 0xf1 0x1 IRQ_TYPE_EDGE_BOTH>,
+				     <0x3 0xf1 0x2 IRQ_TYPE_EDGE_BOTH>,
+				     <0x3 0xf1 0x3 IRQ_TYPE_EDGE_BOTH>,
+				     <0x3 0xf1 0x4 IRQ_TYPE_EDGE_BOTH>,
+				     <0x3 0xf1 0x5 IRQ_TYPE_EDGE_BOTH>;
+			interrupt-names = "cdc_spk_cnp_int",
+					  "cdc_spk_clip_int",
+					  "cdc_spk_ocp_int",
+					  "mbhc_ins_rem_det1",
+					  "mbhc_but_rel_det",

arch/arm64/boot/dts/qcom/pm660l.dtsi pm660l_wled: leds@d800 { · line 122

Quoted 10 lines
arch/arm64/boot/dts/qcom/pm660l.dtsi +10 -0
+					  "mbhc_but_press_det",
+					  "mbhc_ins_rem_det",
+					  "mbhc_switch_int",
+					  "cdc_ear_ocp_int",
+					  "cdc_hphr_ocp_int",
+					  "cdc_hphl_ocp_det",
+					  "cdc_ear_cnp_int",
+					  "cdc_hphr_cnp_int",
+					  "cdc_hphl_cnp_int";
+			sound-name-prefix = "Analog";

[Severity: Low]
Does sound-name-prefix here cause a make dtbs_check failure for boards including pm660l.dtsi?

Documentation/devicetree/bindings/sound/qcom,pm8916-wcd-analog-codec.yaml sets additionalProperties: false without listing sound-name-prefix or referencing dai-common.yaml#.

Signature · 1 line
Sashiko AI review · https://sashiko.dev/#/patchset/[email protected]?part=7
#12 lore raw

PATCH v3 8/9 arm64: dts: qcom: sdm670: add digital audio codec

In reply to Richard Acayan

Add the digital WCD audio codec to the SDM670 device tree.

---
 arch/arm64/boot/dts/qcom/sdm670.dtsi | 22 ++++++++++++++++++++++
 1 file changed, 22 insertions(+)
arch/arm64/boot/dts/qcom/sdm670.dtsi +22 -0
index e99183c22208..3e5ca16e3056 100644
@@ -21,6 +21,7 @@
 #include <dt-bindings/power/qcom-rpmpd.h>
 #include <dt-bindings/soc/qcom,apr.h>
 #include <dt-bindings/soc/qcom,rpmh-rsc.h>
+#include <dt-bindings/sound/qcom,q6dsp-lpass-ports.h>
 
 / {
 	interrupt-parent = <&intc>;
@@ -33,6 +34,12 @@ / {
 	chosen { };
 
 	clocks {
+		lpass_cdc_bclk: lpass-cdc-bclk {
+			compatible = "fixed-clock";
+			#clock-cells = <0>;
+			clock-frequency = <1536000>;
+		};
+
 		sleep_clk: sleep-clk {
 			compatible = "fixed-clock";
 			#clock-cells = <0>;
@@ -2822,5 +2829,20 @@ data2-pins {
 				};
 			};
 		};
+
+		lpass_codec: audio-codec@62ec0000 {
+			compatible = "qcom,sdm670-wcd-digital-codec",
+				     "qcom,msm8916-wcd-digital-codec";
+			reg = <0 0x62ec0000 0 0x400>;
+
+			clocks = <&lpass_cdc_bclk>,
+				 <&q6afecc LPASS_CLK_ID_INT_MCLK_0 LPASS_CLK_ATTRIBUTE_COUPLE_NO>;
+			clock-names = "ahbix-clk", "mclk";
+
+			sound-name-prefix = "Digital";
+			#sound-dai-cells = <1>;
+
+			status = "disabled";
+		};
 	};
 };
Signature · 1 line
2.56.0
#13 lore raw

Re: [PATCH v3 8/9] arm64: dts: qcom: sdm670: add digital audio codec

Thank you for your contribution! Sashiko AI review found 1 potential issue to consider: - [Medium] arm64: dts: qcom: sdm670: dummy fixed-clock lpass-cdc-bclk used for ahbix-clk --

Thank you for your contribution! Sashiko AI review found 1 potential issue to consider:
- [Medium] arm64: dts: qcom: sdm670: dummy fixed-clock lpass-cdc-bclk used for ahbix-clk
--

commit b9856161fbdcddf34face16a0ba725a6845da3f8
Author: Richard Acayan <[email protected]>

arm64: dts: qcom: sdm670: add digital audio codec

This commit adds the LPASS digital WCD audio codec node and its clocks to the SDM670 SoC device tree.

Quoted 4 lines
arch/arm64/boot/dts/qcom/sdm670.dtsi +0 -0
index e99183c222083..3e5ca16e30565 100644

[ ... ]

Quoted 16 lines
arch/arm64/boot/dts/qcom/sdm670.dtsi +6 -0
@@ -33,6 +34,12 @@ / {
 	chosen { };
 
 	clocks {
+		lpass_cdc_bclk: lpass-cdc-bclk {
+			compatible = "fixed-clock";
+			#clock-cells = <0>;
+			clock-frequency = <1536000>;
+		};
+
 		sleep_clk: sleep-clk {
 			compatible = "fixed-clock";
 			#clock-cells = <0>;
@@ -2822,5 +2829,20 @@ data2-pins {
 				};
 			};

arch/arm64/boot/dts/qcom/sdm670.dtsi data2-pins { · line 2840

Quoted 10 lines
arch/arm64/boot/dts/qcom/sdm670.dtsi +9 -0
 		};
+
+		lpass_codec: audio-codec@62ec0000 {
+			compatible = "qcom,sdm670-wcd-digital-codec",
+				     "qcom,msm8916-wcd-digital-codec";
+			reg = <0 0x62ec0000 0 0x400>;
+
+			clocks = <&lpass_cdc_bclk>,
+				 <&q6afecc LPASS_CLK_ID_INT_MCLK_0 LPASS_CLK_ATTRIBUTE_COUPLE_NO>;
+			clock-names = "ahbix-clk", "mclk";

[Severity: Medium]
As reported by Konrad Dybcio on v2 [1], should ahbix-clk be wired to q6afecc (or made optional in the binding and driver if HLOS does not vote for it on SDM670) instead of a dummy 1.536 MHz fixed-clock under /clocks?

In Qualcomm SoC devicetrees, /clocks is reserved for board-level reference clocks, and ahbix-clk is the LPASS AHB interface clock for codec register access rather than a bit clock. Wiring it to a fixed-clock puts a fake clock in the devicetree and bypasses Q6AFE LPASS digital codec clock voting (such as LPASS_CLK_ID_INTERNAL_DIGITAL_CODEC_CORE or LPASS_HW_DCODEC_VOTE).

[1] https://lore.kernel.org/r/[email protected]

Signature · 1 line
Sashiko AI review · https://sashiko.dev/#/patchset/[email protected]?part=8
#14 lore raw

PATCH v3 9/9 arm64: dts: qcom: sdm670-google: add sound card

In reply to Richard Acayan

The Pixel 3a has a sound card for built-in audio (RT5514 and CS35L36 codecs) and for the headphone jack (WCD codec). Add the sound card, q6asm frontends, and WCD codec for headset audio.

---
 .../boot/dts/qcom/sdm670-google-common.dtsi   | 136 ++++++++++++++++++
 1 file changed, 136 insertions(+)
arch/arm64/boot/dts/qcom/sdm670-google-common.dtsi +136 -0
index 2044593c22f3..c623b02f091d 100644
@@ -12,6 +12,7 @@
 #include <dt-bindings/media/video-interface-devices.h>
 #include <dt-bindings/pinctrl/qcom,pmic-gpio.h>
 #include <dt-bindings/power/qcom-rpmpd.h>
+#include <dt-bindings/sound/qcom,q6asm.h>
 #include "sdm670.dtsi"
 #include "pm660.dtsi"
 #include "pm660l.dtsi"
@@ -130,6 +131,87 @@ debug_info_mem: debug-info@a1800000 {
 		};
 	};
 
+	sound {
+		compatible = "qcom,sdm660-sndcard";
+		model = "Google Pixel 3a";
+
+		pinctrl-names = "default";
+		pinctrl-0 = <&cdc_pdm_default>,
+			    <&cdc_dmic_default>;
+
+		audio-routing = "Analog PDM_RX1", "Digital PDM_RX1",
+				"Analog PDM_RX2", "Digital PDM_RX2",
+				"Analog PDM_RX3", "Digital PDM_RX3",
+				"Digital LPASS_PDM_TX", "Analog PDM_TX",
+				"Analog AMIC2", "Analog MIC BIAS External2";
+
+		mm1-dai-link {
+			link-name = "MultiMedia1";
+
+			cpu {
+				sound-dai = <&q6asmdai MSM_FRONTEND_DAI_MULTIMEDIA1>;
+			};
+		};
+
+		mm2-dai-link {
+			link-name = "MultiMedia2";
+
+			cpu {
+				sound-dai = <&q6asmdai MSM_FRONTEND_DAI_MULTIMEDIA2>;
+			};
+		};
+
+		mm3-dai-link {
+			link-name = "MultiMedia3";
+
+			cpu {
+				sound-dai = <&q6asmdai MSM_FRONTEND_DAI_MULTIMEDIA3>;
+			};
+		};
+
+		mm4-dai-link {
+			link-name = "MultiMedia4";
+
+			cpu {
+				sound-dai = <&q6asmdai MSM_FRONTEND_DAI_MULTIMEDIA4>;
+			};
+		};
+
+		lpi-mi2s-rx-dai-link {
+			link-name = "LPI MI2S Playback";
+
+			codec {
+				sound-dai = <&pm660l_codec 0>,
+					    <&lpass_codec 0>;
+			};
+
+			cpu {
+				sound-dai = <&q6afedai LPI_MI2S_RX_0>;
+			};
+
+			platform {
+				sound-dai = <&q6routing>;
+			};
+		};
+
+		lpi-mi2s-tx-dai-link {
+			link-name = "LPI MI2S Capture";
+
+			codec {
+				sound-dai = <&pm660l_codec 1>,
+					    <&lpass_codec 1>;
+			};
+
+			cpu {
+				sound-dai = <&q6afedai LPI_MI2S_TX_3>;
+			};
+
+			platform {
+				sound-dai = <&q6routing>;
+			};
+		};
+	};
+
 	/*
 	 * The touchscreen regulator seems to be controlled somehow by a gpio.
 	 * Model it as a fixed regulator and keep it on. Without schematics we
@@ -550,6 +632,13 @@ rmi4_f12: rmi4-f12@12 {
 	};
 };
 
+&lpass_codec {
+	assigned-clocks = <&q6afecc LPASS_CLK_ID_INT_MCLK_0 LPASS_CLK_ATTRIBUTE_COUPLE_NO>;
+	assigned-clock-rates = <9600000>;
+
+	status = "okay";
+};
+
 &lpi_tlmm {
 	/* sensor gpios are protected */
 	gpio-reserved-ranges = <0 8>, <12 6>;
@@ -613,6 +702,23 @@ &pm660_rradc {
 	status = "okay";
 };
 
+&pm660l_codec {
+	vdd-cdc-io-supply = <&vreg_l10a_1p8>;
+	vdd-cdc-tx-rx-cx-supply = <&vreg_l1b_0p925>;
+	vdd-micbias-supply = <&vreg_l7b_3p125>;
+
+	qcom,mbhc-vthreshold-low = <75 150 237 437 437>;
+	qcom,mbhc-vthreshold-high = <75 150 237 437 437>;
+
+	qcom,micbias-lvl = <2500>;
+
+	qcom,hphl-jack-type-normally-open;
+	qcom,gnd-jack-type-normally-open;
+	qcom,micbias2-ext-cap;
+
+	status = "okay";
+};
+
 &pm660l_flash {
 	status = "okay";
 
@@ -655,6 +761,36 @@ &qupv3_id_1 {
 	status = "okay";
 };
 
+&q6afedai {
+	dai@89 {
+		reg = <LPI_MI2S_RX_0>;
+		qcom,sd-lines = <0 1>;
+	};
+
+	dai@90 {
+		reg = <LPI_MI2S_TX_3>;
+		qcom,sd-lines = <0 1>;
+	};
+};
+
+&q6asmdai {
+	dai@0 {
+		reg = <MSM_FRONTEND_DAI_MULTIMEDIA1>;
+	};
+
+	dai@1 {
+		reg = <MSM_FRONTEND_DAI_MULTIMEDIA2>;
+	};
+
+	dai@2 {
+		reg = <MSM_FRONTEND_DAI_MULTIMEDIA3>;
+	};
+
+	dai@3 {
+		reg = <MSM_FRONTEND_DAI_MULTIMEDIA4>;
+	};
+};
+
 &sdhc_1 {
 	supports-cqe;
 	mmc-hs200-1_8v;
Signature · 1 line
2.56.0
maintainer Applied
#15 lore raw

Re: (subset) [PATCH v3 0/9] ADSP for SDM670 and sound on Google Pixel 3a

In reply to Richard Acayan
Quoted 14 lines · Richard Acayan

This series adds a user for the SDM660 sound support code [1]. It also adds the ADSP remoteproc for SDM670.

[1] https://lore.kernel.org/r/[email protected]

Changes since v2 (https://lore.kernel.org/r/[email protected]):
- stop using fallback compatible and add lcx power domain (3-5/9)
- move lpass codec bclk from sdm670-google-common.dtsi to sdm670.dtsi
(5/9, 9/9)
- reformat q6dsp dts (5/9)
- set flags for codec interrupts (7/9)
- move "qcom,..." properties to board dtsi (7/9, 9/9)
- add review tags (6/9)

Quoted 1 line

[...]

Applied, thanks!

[3/9] dt-bindings: remoteproc: qcom: adsp: Add SDM670 ADSP compatible

      commit: cf7fc0d6b1f3bc6564b1c75a3e22047b94234635
[4/9] remoteproc: qcom: pas: Add SDM670 ADSP support
      commit: 772724ad88a2ebd3826a0dd33dbfbbb11f0d4ca0

Best regards,

Signature · 1 line
Bjorn Andersson <[email protected]>
#16 lore raw
In reply to Richard Acayan
Quoted 7 lines · Richard Acayan

This series adds a user for the SDM660 sound support code [1]. It also adds the ADSP remoteproc for SDM670.

[1] https://lore.kernel.org/r/[email protected]

Changes since v2 (https://lore.kernel.org/r/[email protected]):
- stop using fallback compatible and add lcx power domain (3-5/9)

Can you share the output of cat /sys/kernel/debug/cmd-db? The SoC also has a LMX domain, which downstream seems not to wire up to the DSP for some reason.

Konrad

#17 lore raw
Quoted 4 lines · Konrad Dybcio
Quoted 3 lines · Richard Acayan

This series adds a user for the SDM660 sound support code [1]. It also adds the ADSP remoteproc for SDM670.

Quoted 8 lines
Quoted 4 lines

[1] https://lore.kernel.org/r/[email protected]

Changes since v2 (https://lore.kernel.org/r/[email protected]):
- stop using fallback compatible and add lcx power domain (3-5/9)

Can you share the output of cat /sys/kernel/debug/cmd-db? The SoC also has a LMX domain, which downstream seems not to wire up to the DSP for some reason.

Here's the ARC dump:

	Slave ARC (v16.0)
	-------------------------
	0x30000: cx.lvl [00 00 10 00 30 00 40 00 80 00 c0 00 00 01 80 01 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00]
	0x30004: cx.tmr
	0x30010: mx.lvl [00 00 10 00 10 00 00 01 80 01 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00]
	0x30014: mx.tmr
	0x30020: ebi.lvl [00 00 10 00 30 00 40 00 80 00 c0 00 00 01 80 01 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00]
	0x30024: ebi.tmr
	0x30030: lcx.lvl [00 00 10 00 30 00 40 00 80 00 c0 00 00 01 80 01 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00]
	0x30034: lcx.tmr
	0x30040: lmx.lvl [00 00 10 00 c0 00 00 01 80 01 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00]
	0x30044: lmx.tmr
	0x30050: gfx.lvl [00 00 10 00 30 00 40 00 80 00 c0 00 00 01 40 01 80 01 a0 01 00 00 00 00 00 00 00 00 00 00 00 00]
	0x30054: gfx.tmr
	0x30060: mss.lvl [00 00 10 00 30 00 40 00 80 00 c0 00 00 01 40 01 80 01 00 00 00 00 00 00 00 00 00 00 00 00 00 00]
	0x30064: mss.tmr
	0x30070: ddr.lvl [00 00 20 00 80 00 a0 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00]
	0x30074: ddr.tmr
	0x30080: xo.lvl [00 00 20 00 50 00 80 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00]
	0x30084: xo.tmr
maintainer Applied
#18 lore raw

Re: (subset) [PATCH v3 0/9] ADSP for SDM670 and sound on Google Pixel 3a

In reply to Richard Acayan
Quoted 14 lines · Richard Acayan

This series adds a user for the SDM660 sound support code [1]. It also adds the ADSP remoteproc for SDM670.

[1] https://lore.kernel.org/r/[email protected]

Changes since v2 (https://lore.kernel.org/r/[email protected]):
- stop using fallback compatible and add lcx power domain (3-5/9)
- move lpass codec bclk from sdm670-google-common.dtsi to sdm670.dtsi
(5/9, 9/9)
- reformat q6dsp dts (5/9)
- set flags for codec interrupts (7/9)
- move "qcom,..." properties to board dtsi (7/9, 9/9)
- add review tags (6/9)

Quoted 1 line

[...]

Applied, thanks!

[2/9] dt-bindings: soc: qcom: aoss: Add compatible for SDM670

      commit: 9d1c507083783fa16a0f510b8ed7bac1e151f856

Best regards,

Signature · 1 line
Bjorn Andersson <[email protected]>