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crypto: omap-sha1-md5: OMAP3 SHA1 & MD5 driver

PATCH Superseded Dmitry Kasatkin 2 participants 7 messages Mar 25, 2010 – Apr 8, 2010

Subsystems (5)

v2 of 4 Superseded Latest is v4 →

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#0 lore raw

v2 cover crypto: omap-sha1-md5: OMAP3 SHA1 & MD5 driver

Earlier kernel contained omap sha1 and md5 driver, which was not maintained, was not ported to new crypto APIs and removed from the source tree.

This driver implements async and sync crypto API.

Changes to v1 patches
- device registration moved to platform code
- multi device instances supported
- omap-sha1-md5 name changed to omap-sham match omap spec
- standard clock name "ick" in use
- style fixes

Dmitry Kasatkin (2):
crypto: updates omap sham device related platform code
crypto: omap-sham - omap sha1 & md5 driver

 arch/arm/mach-omap2/clock2420_data.c       |    2 +-
 arch/arm/mach-omap2/clock2430_data.c       |    2 +-
 arch/arm/mach-omap2/clock3xxx_data.c       |    2 +-
 arch/arm/mach-omap2/devices.c              |   26 +-
 arch/arm/plat-omap/include/plat/omap34xx.h |    5 +
 drivers/crypto/Kconfig                     |    9 +
 drivers/crypto/Makefile                    |    2 +
 drivers/crypto/omap-sham.c                 | 1358 ++++++++++++++++++++++++++++
 8 files changed, 1401 insertions(+), 5 deletions(-)
 create mode 100644 drivers/crypto/omap-sham.c
#1 lore raw

PATCH v2 1/2 crypto: updates omap sham device related platform code

- registration
- clocks

---
 arch/arm/mach-omap2/clock2420_data.c       |    2 +-
 arch/arm/mach-omap2/clock2430_data.c       |    2 +-
 arch/arm/mach-omap2/clock3xxx_data.c       |    2 +-
 arch/arm/mach-omap2/devices.c              |   26 ++++++++++++++++++++++++--
 arch/arm/plat-omap/include/plat/omap34xx.h |    5 +++++
 5 files changed, 32 insertions(+), 5 deletions(-)
arch/arm/mach-omap2/clock2420_data.c +1 -1
index d932b14..1820a55 100644
@@ -1836,7 +1836,7 @@ static struct omap_clk omap2420_clks[] = {
 	CLK(NULL,	"vlynq_ick",	&vlynq_ick,	CK_242X),
 	CLK(NULL,	"vlynq_fck",	&vlynq_fck,	CK_242X),
 	CLK(NULL,	"des_ick",	&des_ick,	CK_242X),
-	CLK(NULL,	"sha_ick",	&sha_ick,	CK_242X),
+	CLK("omap-sham",	"ick",	&sha_ick,	CK_242X),
 	CLK("omap_rng",	"ick",		&rng_ick,	CK_242X),
 	CLK(NULL,	"aes_ick",	&aes_ick,	CK_242X),
 	CLK(NULL,	"pka_ick",	&pka_ick,	CK_242X),
arch/arm/mach-omap2/clock2430_data.c +1 -1
index 0438b6e..5884ac6 100644
@@ -1924,7 +1924,7 @@ static struct omap_clk omap2430_clks[] = {
 	CLK(NULL,	"sdma_ick",	&sdma_ick,	CK_243X),
 	CLK(NULL,	"sdrc_ick",	&sdrc_ick,	CK_243X),
 	CLK(NULL,	"des_ick",	&des_ick,	CK_243X),
-	CLK(NULL,	"sha_ick",	&sha_ick,	CK_243X),
+	CLK("omap-sham",	"ick",	&sha_ick,	CK_243X),
 	CLK("omap_rng",	"ick",		&rng_ick,	CK_243X),
 	CLK(NULL,	"aes_ick",	&aes_ick,	CK_243X),
 	CLK(NULL,	"pka_ick",	&pka_ick,	CK_243X),
arch/arm/mach-omap2/clock3xxx_data.c +1 -1
index d5153b6..5a974dc 100644
@@ -3360,7 +3360,7 @@ static struct omap_clk omap3xxx_clks[] = {
 	CLK("mmci-omap-hs.2",	"ick",	&mmchs3_ick,	CK_3430ES2 | CK_AM35XX),
 	CLK(NULL,	"icr_ick",	&icr_ick,	CK_343X),
 	CLK(NULL,	"aes2_ick",	&aes2_ick,	CK_343X),
-	CLK(NULL,	"sha12_ick",	&sha12_ick,	CK_343X),
+	CLK("omap-sham",	"ick",	&sha12_ick,	CK_343X),
 	CLK(NULL,	"des2_ick",	&des2_ick,	CK_343X),
 	CLK("mmci-omap-hs.1",	"ick",	&mmchs2_ick,	CK_3XXX),
 	CLK("mmci-omap-hs.0",	"ick",	&mmchs1_ick,	CK_3XXX),
arch/arm/mach-omap2/devices.c +24 -2
index 23e4d77..3e20b9c 100644
@@ -26,6 +26,7 @@
 #include <plat/mux.h>
 #include <mach/gpio.h>
 #include <plat/mmc.h>
+#include <plat/dma.h>
 
 #include "mux.h"
 
@@ -453,7 +454,9 @@ static void omap_init_mcspi(void)
 static inline void omap_init_mcspi(void) {}
 #endif
 
-#ifdef CONFIG_OMAP_SHA1_MD5
+#if defined(CONFIG_CRYPTO_DEV_OMAP_SHAM) || defined(CONFIG_CRYPTO_DEV_OMAP_SHAM_MODULE)
+
+#ifdef CONFIG_ARCH_OMAP2
 static struct resource sha1_md5_resources[] = {
 	{
 		.start	= OMAP24XX_SEC_SHA1MD5_BASE,
@@ -465,9 +468,28 @@ static struct resource sha1_md5_resources[] = {
 		.flags	= IORESOURCE_IRQ,
 	}
 };
+#endif
+
+#ifdef CONFIG_ARCH_OMAP3
+static struct resource sha1_md5_resources[] = {
+	{
+		.start	= OMAP34XX_SEC_SHA1MD5_BASE,
+		.end	= OMAP34XX_SEC_SHA1MD5_BASE + 0x64,
+		.flags	= IORESOURCE_MEM,
+	},
+	{
+		.start	= INT_34XX_SHA1MD52_IRQ,
+		.flags	= IORESOURCE_IRQ,
+	},
+	{
+		.start	= OMAP34XX_DMA_SHA1MD5_RX,
+		.flags	= IORESOURCE_DMA,
+	}
+};
+#endif
 
 static struct platform_device sha1_md5_device = {
-	.name		= "OMAP SHA1/MD5",
+	.name		= "omap-sham",
 	.id		= -1,
 	.num_resources	= ARRAY_SIZE(sha1_md5_resources),
 	.resource	= sha1_md5_resources,
arch/arm/plat-omap/include/plat/omap34xx.h +5 -0
index 2845fdc..98fc8b4 100644
@@ -82,5 +82,10 @@
 
 #define OMAP34XX_MAILBOX_BASE		(L4_34XX_BASE + 0x94000)
 
+/* Security */
+#define OMAP34XX_SEC_BASE	(L4_34XX_BASE + 0xA0000)
+#define OMAP34XX_SEC_SHA1MD5_BASE	(OMAP34XX_SEC_BASE + 0x23000)
+#define OMAP34XX_SEC_AES_BASE	(OMAP34XX_SEC_BASE + 0x25000)
+
 #endif /* __ASM_ARCH_OMAP3_H */
 
Signature · 1 line
1.6.3.3
maintainer Acked-by on v2 1/2
#2 lore raw

Re: [PATCHv2 1/2] crypto: updates omap sham device related platform code

Hi Dmitry,

a few comments:

Quoted 43 lines · Dmitry Kasatkin

- registration
- clocks

---
 arch/arm/mach-omap2/clock2420_data.c       |    2 +-
 arch/arm/mach-omap2/clock2430_data.c       |    2 +-
 arch/arm/mach-omap2/clock3xxx_data.c       |    2 +-
 arch/arm/mach-omap2/devices.c              |   26 ++++++++++++++++++++++++--
 arch/arm/plat-omap/include/plat/omap34xx.h |    5 +++++
 5 files changed, 32 insertions(+), 5 deletions(-)
arch/arm/mach-omap2/clock2420_data.c +1 -1
index d932b14..1820a55 100644
@@ -1836,7 +1836,7 @@ static struct omap_clk omap2420_clks[] = {
 	CLK(NULL,	"vlynq_ick",	&vlynq_ick,	CK_242X),
 	CLK(NULL,	"vlynq_fck",	&vlynq_fck,	CK_242X),
 	CLK(NULL,	"des_ick",	&des_ick,	CK_242X),
-	CLK(NULL,	"sha_ick",	&sha_ick,	CK_242X),
+	CLK("omap-sham",	"ick",	&sha_ick,	CK_242X),
 	CLK("omap_rng",	"ick",		&rng_ick,	CK_242X),
 	CLK(NULL,	"aes_ick",	&aes_ick,	CK_242X),
 	CLK(NULL,	"pka_ick",	&pka_ick,	CK_242X),
arch/arm/mach-omap2/clock2430_data.c +1 -1
index 0438b6e..5884ac6 100644
@@ -1924,7 +1924,7 @@ static struct omap_clk omap2430_clks[] = {
 	CLK(NULL,	"sdma_ick",	&sdma_ick,	CK_243X),
 	CLK(NULL,	"sdrc_ick",	&sdrc_ick,	CK_243X),
 	CLK(NULL,	"des_ick",	&des_ick,	CK_243X),
-	CLK(NULL,	"sha_ick",	&sha_ick,	CK_243X),
+	CLK("omap-sham",	"ick",	&sha_ick,	CK_243X),
 	CLK("omap_rng",	"ick",		&rng_ick,	CK_243X),
 	CLK(NULL,	"aes_ick",	&aes_ick,	CK_243X),
 	CLK(NULL,	"pka_ick",	&pka_ick,	CK_243X),
arch/arm/mach-omap2/clock3xxx_data.c +0 -0
index d5153b6..5a974dc 100644

arch/arm/mach-omap2/clock3xxx_data.c static struct omap_clk omap3xxx_clks[] = { · line 3366

Quoted 8 lines
arch/arm/mach-omap2/clock3xxx_data.c +1 -1
@@ -3360,7 +3360,7 @@ static struct omap_clk omap3xxx_clks[] = {
 	CLK("mmci-omap-hs.2",	"ick",	&mmchs3_ick,	CK_3430ES2 | CK_AM35XX),
 	CLK(NULL,	"icr_ick",	&icr_ick,	CK_343X),
 	CLK(NULL,	"aes2_ick",	&aes2_ick,	CK_343X),
-	CLK(NULL,	"sha12_ick",	&sha12_ick,	CK_343X),
+	CLK("omap-sham",	"ick",	&sha12_ick,	CK_343X),
 	CLK(NULL,	"des2_ick",	&des2_ick,	CK_343X),
 	CLK("mmci-omap-hs.1",	"ick",	&mmchs2_ick,	CK_3XXX),
 	CLK("mmci-omap-hs.0",	"ick",	&mmchs1_ick,	CK_3XXX),

The above changes are all

... but ...

Quoted 36 lines
arch/arm/mach-omap2/devices.c +13 -1
index 23e4d77..3e20b9c 100644
@@ -26,6 +26,7 @@
 #include <plat/mux.h>
 #include <mach/gpio.h>
 #include <plat/mmc.h>
+#include <plat/dma.h>
 
 #include "mux.h"
 
@@ -453,7 +454,9 @@ static void omap_init_mcspi(void)
 static inline void omap_init_mcspi(void) {}
 #endif
 
-#ifdef CONFIG_OMAP_SHA1_MD5
+#if defined(CONFIG_CRYPTO_DEV_OMAP_SHAM) || defined(CONFIG_CRYPTO_DEV_OMAP_SHAM_MODULE)
+
+#ifdef CONFIG_ARCH_OMAP2
 static struct resource sha1_md5_resources[] = {
 	{
 		.start	= OMAP24XX_SEC_SHA1MD5_BASE,
@@ -465,9 +468,28 @@ static struct resource sha1_md5_resources[] = {
 		.flags	= IORESOURCE_IRQ,
 	}
 };
+#endif
+
+#ifdef CONFIG_ARCH_OMAP3
+static struct resource sha1_md5_resources[] = {
+	{
+		.start	= OMAP34XX_SEC_SHA1MD5_BASE,
+		.end	= OMAP34XX_SEC_SHA1MD5_BASE + 0x64,
+		.flags	= IORESOURCE_MEM,
+	},

arch/arm/mach-omap2/devices.c static struct resource sha1_md5_resources[] = { · line 489

Quoted 10 lines
arch/arm/mach-omap2/devices.c +10 -0
+	{
+		.start	= INT_34XX_SHA1MD52_IRQ,
+		.flags	= IORESOURCE_IRQ,
+	},
+	{
+		.start	= OMAP34XX_DMA_SHA1MD5_RX,
+		.flags	= IORESOURCE_DMA,
+	}
+};
+#endif

The above will break multi-OMAP2 kernels. Please change the above to make the variable names unique on a per-SoC basis (e.g., omap3_sha1_md5_resources) and modify the SHA1/MD5 device registration code to use the appropriate struct resource array at runtime. For an example, see mach-omap2/devices.c:omap_init_mbox().

Quoted 30 lines
arch/arm/mach-omap2/devices.c +1 -1
 static struct platform_device sha1_md5_device = {
-	.name		= "OMAP SHA1/MD5",
+	.name		= "omap-sham",
 	.id		= -1,
 	.num_resources	= ARRAY_SIZE(sha1_md5_resources),
 	.resource	= sha1_md5_resources,
arch/arm/plat-omap/include/plat/omap34xx.h +5 -0
index 2845fdc..98fc8b4 100644
@@ -82,5 +82,10 @@
 
 #define OMAP34XX_MAILBOX_BASE		(L4_34XX_BASE + 0x94000)
 
+/* Security */
+#define OMAP34XX_SEC_BASE	(L4_34XX_BASE + 0xA0000)
+#define OMAP34XX_SEC_SHA1MD5_BASE	(OMAP34XX_SEC_BASE + 0x23000)
+#define OMAP34XX_SEC_AES_BASE	(OMAP34XX_SEC_BASE + 0x25000)
+
 #endif /* __ASM_ARCH_OMAP3_H */
 
Signature · 6 lines
1.6.3.3

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- Paul

#3 lore raw

Re: [PATCHv2 1/2] crypto: updates omap sham device related platform code

Quoted 145 lines · ext Paul Walmsley

Hi Dmitry,

a few comments:

Quoted 44 lines · Dmitry Kasatkin

- registration
- clocks

---
  arch/arm/mach-omap2/clock2420_data.c       |    2 +-
  arch/arm/mach-omap2/clock2430_data.c       |    2 +-
  arch/arm/mach-omap2/clock3xxx_data.c       |    2 +-
  arch/arm/mach-omap2/devices.c              |   26 ++++++++++++++++++++++++--
  arch/arm/plat-omap/include/plat/omap34xx.h |    5 +++++
  5 files changed, 32 insertions(+), 5 deletions(-)
arch/arm/mach-omap2/clock2420_data.c +1 -1
index d932b14..1820a55 100644
@@ -1836,7 +1836,7 @@ static struct omap_clk omap2420_clks[] = {
  	CLK(NULL,	"vlynq_ick",	&vlynq_ick,	CK_242X),
  	CLK(NULL,	"vlynq_fck",	&vlynq_fck,	CK_242X),
  	CLK(NULL,	"des_ick",	&des_ick,	CK_242X),
-	CLK(NULL,	"sha_ick",	&sha_ick,	CK_242X),
+	CLK("omap-sham",	"ick",	&sha_ick,	CK_242X),
  	CLK("omap_rng",	"ick",		&rng_ick,	CK_242X),
  	CLK(NULL,	"aes_ick",	&aes_ick,	CK_242X),
  	CLK(NULL,	"pka_ick",	&pka_ick,	CK_242X),
arch/arm/mach-omap2/clock2430_data.c +1 -1
index 0438b6e..5884ac6 100644
@@ -1924,7 +1924,7 @@ static struct omap_clk omap2430_clks[] = {
  	CLK(NULL,	"sdma_ick",	&sdma_ick,	CK_243X),
  	CLK(NULL,	"sdrc_ick",	&sdrc_ick,	CK_243X),
  	CLK(NULL,	"des_ick",	&des_ick,	CK_243X),
-	CLK(NULL,	"sha_ick",	&sha_ick,	CK_243X),
+	CLK("omap-sham",	"ick",	&sha_ick,	CK_243X),
  	CLK("omap_rng",	"ick",		&rng_ick,	CK_243X),
  	CLK(NULL,	"aes_ick",	&aes_ick,	CK_243X),
  	CLK(NULL,	"pka_ick",	&pka_ick,	CK_243X),
arch/arm/mach-omap2/clock3xxx_data.c +0 -0
index d5153b6..5a974dc 100644

arch/arm/mach-omap2/clock3xxx_data.c static struct omap_clk omap3xxx_clks[] = { · line 3366

Quoted 8 lines
arch/arm/mach-omap2/clock3xxx_data.c +1 -1
@@ -3360,7 +3360,7 @@ static struct omap_clk omap3xxx_clks[] = {
  	CLK("mmci-omap-hs.2",	"ick",	&mmchs3_ick,	CK_3430ES2 | CK_AM35XX),
  	CLK(NULL,	"icr_ick",	&icr_ick,	CK_343X),
  	CLK(NULL,	"aes2_ick",	&aes2_ick,	CK_343X),
-	CLK(NULL,	"sha12_ick",	&sha12_ick,	CK_343X),
+	CLK("omap-sham",	"ick",	&sha12_ick,	CK_343X),
  	CLK(NULL,	"des2_ick",	&des2_ick,	CK_343X),
  	CLK("mmci-omap-hs.1",	"ick",	&mmchs2_ick,	CK_3XXX),
  	CLK("mmci-omap-hs.0",	"ick",	&mmchs1_ick,	CK_3XXX),

The above changes are all

... but ...

Quoted 37 lines
arch/arm/mach-omap2/devices.c +14 -1
index 23e4d77..3e20b9c 100644
@@ -26,6 +26,7 @@
  #include<plat/mux.h>
  #include<mach/gpio.h>
  #include<plat/mmc.h>
+#include<plat/dma.h>
 
  #include "mux.h"
 
@@ -453,7 +454,9 @@ static void omap_init_mcspi(void)
  static inline void omap_init_mcspi(void) {}
  #endif
 
-#ifdef CONFIG_OMAP_SHA1_MD5
+#if defined(CONFIG_CRYPTO_DEV_OMAP_SHAM) || defined(CONFIG_CRYPTO_DEV_OMAP_SHAM_MODULE)
+
+#ifdef CONFIG_ARCH_OMAP2
  static struct resource sha1_md5_resources[] = {
  	{
  		.start	= OMAP24XX_SEC_SHA1MD5_BASE,
@@ -465,9 +468,28 @@ static struct resource sha1_md5_resources[] = {
  		.flags	= IORESOURCE_IRQ,
  	}
  };
+#endif
+
+#ifdef CONFIG_ARCH_OMAP3
+static struct resource sha1_md5_resources[] = {
+	{
+		.start	= OMAP34XX_SEC_SHA1MD5_BASE,
+		.end	= OMAP34XX_SEC_SHA1MD5_BASE + 0x64,
+		.flags	= IORESOURCE_MEM,
+	},
+	{

arch/arm/mach-omap2/devices.c static struct resource sha1_md5_resources[] = { · line 490

Quoted 10 lines
arch/arm/mach-omap2/devices.c +9 -0
+		.start	= INT_34XX_SHA1MD52_IRQ,
+		.flags	= IORESOURCE_IRQ,
+	},
+	{
+		.start	= OMAP34XX_DMA_SHA1MD5_RX,
+		.flags	= IORESOURCE_DMA,
+	}
+};
+#endif
 

The above will break multi-OMAP2 kernels. Please change the above to make the variable names unique on a per-SoC basis (e.g., omap3_sha1_md5_resources) and modify the SHA1/MD5 device registration code to use the appropriate struct resource array at runtime. For an example, see mach-omap2/devices.c:omap_init_mbox().

Quoted 25 lines
arch/arm/mach-omap2/devices.c +1 -1
  static struct platform_device sha1_md5_device = {
-	.name		= "OMAP SHA1/MD5",
+	.name		= "omap-sham",
  	.id		= -1,
  	.num_resources	= ARRAY_SIZE(sha1_md5_resources),
  	.resource	= sha1_md5_resources,
arch/arm/plat-omap/include/plat/omap34xx.h +5 -0
index 2845fdc..98fc8b4 100644
@@ -82,5 +82,10 @@
 
  #define OMAP34XX_MAILBOX_BASE		(L4_34XX_BASE + 0x94000)
 
+/* Security */
+#define OMAP34XX_SEC_BASE	(L4_34XX_BASE + 0xA0000)
+#define OMAP34XX_SEC_SHA1MD5_BASE	(OMAP34XX_SEC_BASE + 0x23000)
+#define OMAP34XX_SEC_AES_BASE	(OMAP34XX_SEC_BASE + 0x25000)
+
  #endif /* __ASM_ARCH_OMAP3_H */
 
Signature · 1 line
1.6.3.3
Quoted 9 lines
Quoted 6 lines

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- Paul

Hi,

Ok.. I got it.

Thanks,
Dmitry

#4 lore raw

Re: [PATCHv2 1/2] crypto: updates omap sham device related platform code

In reply to Paul Walmsley

Hi,

BTW..

How will it work if those resource structures anyway conditionally compiled for OMAP2 or 3 or 4? only one structure will be compiled at once.

- Dmitry

Quoted 154 lines · ext Paul Walmsley

Hi Dmitry,

a few comments:

Quoted 44 lines · Dmitry Kasatkin

- registration
- clocks

---
  arch/arm/mach-omap2/clock2420_data.c       |    2 +-
  arch/arm/mach-omap2/clock2430_data.c       |    2 +-
  arch/arm/mach-omap2/clock3xxx_data.c       |    2 +-
  arch/arm/mach-omap2/devices.c              |   26 ++++++++++++++++++++++++--
  arch/arm/plat-omap/include/plat/omap34xx.h |    5 +++++
  5 files changed, 32 insertions(+), 5 deletions(-)
arch/arm/mach-omap2/clock2420_data.c +1 -1
index d932b14..1820a55 100644
@@ -1836,7 +1836,7 @@ static struct omap_clk omap2420_clks[] = {
  	CLK(NULL,	"vlynq_ick",	&vlynq_ick,	CK_242X),
  	CLK(NULL,	"vlynq_fck",	&vlynq_fck,	CK_242X),
  	CLK(NULL,	"des_ick",	&des_ick,	CK_242X),
-	CLK(NULL,	"sha_ick",	&sha_ick,	CK_242X),
+	CLK("omap-sham",	"ick",	&sha_ick,	CK_242X),
  	CLK("omap_rng",	"ick",		&rng_ick,	CK_242X),
  	CLK(NULL,	"aes_ick",	&aes_ick,	CK_242X),
  	CLK(NULL,	"pka_ick",	&pka_ick,	CK_242X),
arch/arm/mach-omap2/clock2430_data.c +1 -1
index 0438b6e..5884ac6 100644
@@ -1924,7 +1924,7 @@ static struct omap_clk omap2430_clks[] = {
  	CLK(NULL,	"sdma_ick",	&sdma_ick,	CK_243X),
  	CLK(NULL,	"sdrc_ick",	&sdrc_ick,	CK_243X),
  	CLK(NULL,	"des_ick",	&des_ick,	CK_243X),
-	CLK(NULL,	"sha_ick",	&sha_ick,	CK_243X),
+	CLK("omap-sham",	"ick",	&sha_ick,	CK_243X),
  	CLK("omap_rng",	"ick",		&rng_ick,	CK_243X),
  	CLK(NULL,	"aes_ick",	&aes_ick,	CK_243X),
  	CLK(NULL,	"pka_ick",	&pka_ick,	CK_243X),
arch/arm/mach-omap2/clock3xxx_data.c +0 -0
index d5153b6..5a974dc 100644

arch/arm/mach-omap2/clock3xxx_data.c static struct omap_clk omap3xxx_clks[] = { · line 3366

Quoted 8 lines
arch/arm/mach-omap2/clock3xxx_data.c +1 -1
@@ -3360,7 +3360,7 @@ static struct omap_clk omap3xxx_clks[] = {
  	CLK("mmci-omap-hs.2",	"ick",	&mmchs3_ick,	CK_3430ES2 | CK_AM35XX),
  	CLK(NULL,	"icr_ick",	&icr_ick,	CK_343X),
  	CLK(NULL,	"aes2_ick",	&aes2_ick,	CK_343X),
-	CLK(NULL,	"sha12_ick",	&sha12_ick,	CK_343X),
+	CLK("omap-sham",	"ick",	&sha12_ick,	CK_343X),
  	CLK(NULL,	"des2_ick",	&des2_ick,	CK_343X),
  	CLK("mmci-omap-hs.1",	"ick",	&mmchs2_ick,	CK_3XXX),
  	CLK("mmci-omap-hs.0",	"ick",	&mmchs1_ick,	CK_3XXX),

The above changes are all

... but ...

Quoted 37 lines
arch/arm/mach-omap2/devices.c +14 -1
index 23e4d77..3e20b9c 100644
@@ -26,6 +26,7 @@
  #include<plat/mux.h>
  #include<mach/gpio.h>
  #include<plat/mmc.h>
+#include<plat/dma.h>
 
  #include "mux.h"
 
@@ -453,7 +454,9 @@ static void omap_init_mcspi(void)
  static inline void omap_init_mcspi(void) {}
  #endif
 
-#ifdef CONFIG_OMAP_SHA1_MD5
+#if defined(CONFIG_CRYPTO_DEV_OMAP_SHAM) || defined(CONFIG_CRYPTO_DEV_OMAP_SHAM_MODULE)
+
+#ifdef CONFIG_ARCH_OMAP2
  static struct resource sha1_md5_resources[] = {
  	{
  		.start	= OMAP24XX_SEC_SHA1MD5_BASE,
@@ -465,9 +468,28 @@ static struct resource sha1_md5_resources[] = {
  		.flags	= IORESOURCE_IRQ,
  	}
  };
+#endif
+
+#ifdef CONFIG_ARCH_OMAP3
+static struct resource sha1_md5_resources[] = {
+	{
+		.start	= OMAP34XX_SEC_SHA1MD5_BASE,
+		.end	= OMAP34XX_SEC_SHA1MD5_BASE + 0x64,
+		.flags	= IORESOURCE_MEM,
+	},
+	{

arch/arm/mach-omap2/devices.c static struct resource sha1_md5_resources[] = { · line 490

Quoted 10 lines
arch/arm/mach-omap2/devices.c +9 -0
+		.start	= INT_34XX_SHA1MD52_IRQ,
+		.flags	= IORESOURCE_IRQ,
+	},
+	{
+		.start	= OMAP34XX_DMA_SHA1MD5_RX,
+		.flags	= IORESOURCE_DMA,
+	}
+};
+#endif
 

The above will break multi-OMAP2 kernels. Please change the above to make the variable names unique on a per-SoC basis (e.g., omap3_sha1_md5_resources) and modify the SHA1/MD5 device registration code to use the appropriate struct resource array at runtime. For an example, see mach-omap2/devices.c:omap_init_mbox().

Quoted 31 lines
arch/arm/mach-omap2/devices.c +1 -1
  static struct platform_device sha1_md5_device = {
-	.name		= "OMAP SHA1/MD5",
+	.name		= "omap-sham",
  	.id		= -1,
  	.num_resources	= ARRAY_SIZE(sha1_md5_resources),
  	.resource	= sha1_md5_resources,
arch/arm/plat-omap/include/plat/omap34xx.h +5 -0
index 2845fdc..98fc8b4 100644
@@ -82,5 +82,10 @@
 
  #define OMAP34XX_MAILBOX_BASE		(L4_34XX_BASE + 0x94000)
 
+/* Security */
+#define OMAP34XX_SEC_BASE	(L4_34XX_BASE + 0xA0000)
+#define OMAP34XX_SEC_SHA1MD5_BASE	(OMAP34XX_SEC_BASE + 0x23000)
+#define OMAP34XX_SEC_AES_BASE	(OMAP34XX_SEC_BASE + 0x25000)
+
  #endif /* __ASM_ARCH_OMAP3_H */
 
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- Paul

maintainer
#5 lore raw

Re: [PATCHv2 1/2] crypto: updates omap sham device related platform code

Quoted 7 lines · Dmitry Kasatkin

Hi,

BTW..

How will it work if those resource structures anyway conditionally compiled for OMAP2 or 3 or 4?
only one structure will be compiled at once.

Hi Dmitry,

it is possible to build a kernel that will run on both OMAP2 and OMAP3 (for example). We call these kernels 'multi-OMAP' kernels. In such a case, there will be multiple CONFIG_ARCH_OMAP* symbols defined, so multiple structure records will be included in the kernel image. Also when this happens, the 'cpu_is_omap*' macros will be defined to something that is evaluated at kernel run-time, rather than compile-time (as would be the case with single-OMAP kernels). So then the appropriate structure can be passed at run-time to some device registration code.

- Paul

#6 lore raw

PATCH v2 2/2 crypto: omap-sham - omap sha1 & md5 driver

In reply to Dmitry Kasatkin

Earlier kernel contained omap sha1 and md5 driver, which was not maintained, was not ported to new crypto APIs and removed from the source tree.

- implements async and sync crypto API using dma and cpu.
- supports multiple sham instances if available

---
 drivers/crypto/Kconfig     |    9 +
 drivers/crypto/Makefile    |    2 +
 drivers/crypto/omap-sham.c | 1358 ++++++++++++++++++++++++++++++++++++++++++++
 3 files changed, 1369 insertions(+), 0 deletions(-)
 create mode 100644 drivers/crypto/omap-sham.c
drivers/crypto/Kconfig +9 -0
index b08403d..9073aa0 100644
@@ -222,4 +222,13 @@ config CRYPTO_DEV_PPC4XX
 	help
 	  This option allows you to have support for AMCC crypto acceleration.
 
+config CRYPTO_DEV_OMAP_SHAM
+	tristate "Support for OMAP SHA1/MD5 hw accelerator"
+	depends on ARCH_OMAP2 || ARCH_OMAP3
+	select CRYPTO_SHA1
+	select CRYPTO_MD5
+	help
+	  OMAP processors have SHA1/MD5 hw accelerator. Select this if you
+	  want to use the OMAP module for SHA1/MD5 algorithms.
+
 endif # CRYPTO_HW
drivers/crypto/Makefile +2 -0
index 6ffcb3f..c9494e1 100644
@@ -6,3 +6,5 @@ obj-$(CONFIG_CRYPTO_DEV_MV_CESA) += mv_cesa.o
 obj-$(CONFIG_CRYPTO_DEV_TALITOS) += talitos.o
 obj-$(CONFIG_CRYPTO_DEV_IXP4XX) += ixp4xx_crypto.o
 obj-$(CONFIG_CRYPTO_DEV_PPC4XX) += amcc/
+obj-$(CONFIG_CRYPTO_DEV_OMAP_SHAM) += omap-sham.o
+
drivers/crypto/omap-sham.c new file +1358 -0

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Signature · 1 line
1.6.3.3