ARM: SPEAr3xx: Minor fixes for spear3xx machine

This patch is to fix:
-spear320 compatible string
-spear320 no of pinmux modes.
-spear3xx gpt timer parent clk id.

Vipul Kumar Samar (3):
ARM: SPEAr3xx: Rename gpt timer clk parent name
ARM: dts: SPEAr320: Fix compatible string
ARM: dts: SPEAr320: Fix no. of supported pinmux mode

 arch/arm/boot/dts/spear320-evb.dts |    4 ++--
 arch/arm/mach-spear3xx/spear3xx.c  |    2 +-
 2 files changed, 3 insertions(+), 3 deletions(-)

1.7.2.2

As pll3_48m_clk clock is renamed like pll3_clk so make corresponding changes for gpt parent clock name.

---
 arch/arm/mach-spear3xx/spear3xx.c |    2 +-
 1 files changed, 1 insertions(+), 1 deletions(-)

index 0f41bd1..66db5f1 100644
@@ -87,7 +87,7 @@ void __init spear3xx_map_io(void)
 
 static void __init spear3xx_timer_init(void)
 {
-	char pclk_name[] = "pll3_48m_clk";
+	char pclk_name[] = "pll3_clk";
 	struct clk *gpt_clk, *pclk;
 
 	spear3xx_clk_init();

1.7.2.2

Do, this as part of clk patch only.

---
 arch/arm/boot/dts/spear320-evb.dts |    2 +-
 1 files changed, 1 insertions(+), 1 deletions(-)

index c13fd1f..4d55b67 100644
@@ -16,7 +16,7 @@
 
 / {
 	model = "ST SPEAr300 Evaluation Board";
-	compatible = "st,spear300-evb", "st,spear300";
+	compatible = "st,spear320-evb", "st,spear320";
 	#address-cells = <1>;
 	#size-cells = <1>;
 

1.7.2.2

Fix this too. :)

Missed it, i'll correct it in v2.

Regards
Vipul Samar

On spear320 machine no. of supported mode is 4 and by mistake it is programmed to 3.
Supported modes are:
AUTO_NET_SMII_MODE
AUTO_NET_MII_MODE
AUTO_EXP_MODE
SMALL_PRINTERS_MODE
EXTENDED_MODE

---
 arch/arm/boot/dts/spear320-evb.dts |    2 +-
 1 files changed, 1 insertions(+), 1 deletions(-)

index 4d55b67..c99f055 100644
@@ -26,7 +26,7 @@
 
 	ahb {
 		pinmux at b3000000 {
-			st,pinmux-mode = <3>;
+			st,pinmux-mode = <4>;
 			pinctrl-names = "default";
 			pinctrl-0 = <&state_default>;
 

1.7.2.2

Commit log doesn't tell what you actually wanted to do, i.e. boot the board in EXTENDED mode.