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at91: some fixes for 3.8-rc5

PATCH In review Nicolas Ferre 2 participants 15 messages Jan 23, 2013 – Jan 24, 2013

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#0 lore raw

v2 cover at91: some fixes for 3.8-rc5

Hi all,

A v2 of this patch series just to make sure that the patches hit the mailing-list once...
I plan to send a pull-request later today (my time) so if you have something to add, well, tell me by now.

Thanks for your help, bye,

Boris BREZILLON (1):
ARM: at91/dts: add macb mii pinctrl config for kizbox

Douglas Gilbert (1):
ARM: at91/dts: correct comment in at91sam9x5.dtsi for mii

Jean-Christophe PLAGNIOL-VILLARD (1):
ARM: at91: rm9200: remake the BGA as default version

Joachim Eastwood (1):
ARM: at91: fix gpios on i2c-gpio for RM9200 DT

Nicolas Ferre (2):
ARM: at91/at91_dt_defconfig: remove memory specification to cmdline
ARM: at91/at91_dt_defconfig: add at91sam9n12 SoC to DT defconfig

Richard Genoud (3):
ARM: at91/at91-pinctrl documentation: fix typo and add some details
ARM: at91/at91sam9x5 DTS: correct wrong PIO BANK values on u(s)arts
ARM: at91/at91sam9x5 DTS: add SCK USART pins

 .../bindings/pinctrl/atmel,at91-pinctrl.txt        |  5 +-
 arch/arm/boot/dts/at91rm9200.dtsi                  |  4 +-
 arch/arm/boot/dts/at91sam9x5.dtsi                  | 60 ++++++++++++++--------
 arch/arm/boot/dts/kizbox.dts                       |  2 +
 arch/arm/configs/at91_dt_defconfig                 |  3 +-
 arch/arm/mach-at91/setup.c                         |  2 +
 6 files changed, 51 insertions(+), 25 deletions(-)
Signature · 1 line
1.8.0
#1 lore raw

PATCH v2 1/9 ARM: at91/at91-pinctrl documentation: fix typo and add some details

From: Richard Genoud <[email protected]>

The relation between PIN_BANK numbers and pio letters wasn't made very clear.

---
 Documentation/devicetree/bindings/pinctrl/atmel,at91-pinctrl.txt | 5 +++--
 1 file changed, 3 insertions(+), 2 deletions(-)
Documentation/devicetree/bindings/pinctrl/atmel,at91-pinctrl.txt +3 -2
index 3a26812..bc50899 100644
@@ -81,7 +81,8 @@ PA31	TXD4
 Required properties for pin configuration node:
 - atmel,pins: 4 integers array, represents a group of pins mux and config
   setting. The format is atmel,pins = <PIN_BANK PIN_BANK_NUM PERIPH CONFIG>.
-  The PERIPH 0 means gpio.
+  The PERIPH 0 means gpio, PERIPH 1 is periph A, PERIPH 2 is periph B...
+  PIN_BANK 0 is pioA, PIN_BANK 1 is pioB...
 
 Bits used for CONFIG:
 PULL_UP		(1 << 0): indicate this pin need a pull up.
@@ -126,7 +127,7 @@ pinctrl@fffff400 {
 		pinctrl_dbgu: dbgu-0 {
 			atmel,pins =
 				<1 14 0x1 0x0	/* PB14 periph A */
-				 1 15 0x1 0x1>;	/* PB15 periph with pullup */
+				 1 15 0x1 0x1>;	/* PB15 periph A with pullup */
 		};
 	};
 };
Signature · 1 line
1.8.0
#2 lore raw

PATCH v2 2/9 ARM: at91/at91sam9x5 DTS: correct wrong PIO BANK values on u(s)arts

In reply to Nicolas Ferre

From: Richard Genoud <[email protected]>

The PIN_BANK 3 is for PDxx pins, not PCxx pins.
And PIN_BANK 1 is for PBxx, not PIN_BANK 0.

---
 arch/arm/boot/dts/at91sam9x5.dtsi | 24 ++++++++++++------------
 1 file changed, 12 insertions(+), 12 deletions(-)
arch/arm/boot/dts/at91sam9x5.dtsi +12 -12
index 3a47cf9..e9c4290 100644
@@ -154,12 +154,12 @@
 
 					pinctrl_usart1_rts: usart1_rts-0 {
 						atmel,pins =
-							<3 27 0x3 0x0>;	/* PC27 periph C */
+							<2 27 0x3 0x0>;	/* PC27 periph C */
 					};
 
 					pinctrl_usart1_cts: usart1_cts-0 {
 						atmel,pins =
-							<3 28 0x3 0x0>;	/* PC28 periph C */
+							<2 28 0x3 0x0>;	/* PC28 periph C */
 					};
 				};
 
@@ -172,46 +172,46 @@
 
 					pinctrl_uart2_rts: uart2_rts-0 {
 						atmel,pins =
-							<0 0 0x2 0x0>;	/* PB0 periph B */
+							<1 0 0x2 0x0>;	/* PB0 periph B */
 					};
 
 					pinctrl_uart2_cts: uart2_cts-0 {
 						atmel,pins =
-							<0 1 0x2 0x0>;	/* PB1 periph B */
+							<1 1 0x2 0x0>;	/* PB1 periph B */
 					};
 				};
 
 				usart3 {
 					pinctrl_uart3: usart3-0 {
 						atmel,pins =
-							<3 23 0x2 0x1	/* PC22 periph B with pullup */
-							 3 23 0x2 0x0>;	/* PC23 periph B */
+							<2 23 0x2 0x1	/* PC22 periph B with pullup */
+							 2 23 0x2 0x0>;	/* PC23 periph B */
 					};
 
 					pinctrl_usart3_rts: usart3_rts-0 {
 						atmel,pins =
-							<3 24 0x2 0x0>;	/* PC24 periph B */
+							<2 24 0x2 0x0>;	/* PC24 periph B */
 					};
 
 					pinctrl_usart3_cts: usart3_cts-0 {
 						atmel,pins =
-							<3 25 0x2 0x0>;	/* PC25 periph B */
+							<2 25 0x2 0x0>;	/* PC25 periph B */
 					};
 				};
 
 				uart0 {
 					pinctrl_uart0: uart0-0 {
 						atmel,pins =
-							<3 8 0x3 0x0	/* PC8 periph C */
-							 3 9 0x3 0x1>;	/* PC9 periph C with pullup */
+							<2 8 0x3 0x0	/* PC8 periph C */
+							 2 9 0x3 0x1>;	/* PC9 periph C with pullup */
 					};
 				};
 
 				uart1 {
 					pinctrl_uart1: uart1-0 {
 						atmel,pins =
-							<3 16 0x3 0x0	/* PC16 periph C */
-							 3 17 0x3 0x1>;	/* PC17 periph C with pullup */
+							<2 16 0x3 0x0	/* PC16 periph C */
+							 2 17 0x3 0x1>;	/* PC17 periph C with pullup */
 					};
 				};
 
Signature · 1 line
1.8.0
#3 lore raw

PATCH v2 3/9 ARM: at91/at91sam9x5 DTS: add SCK USART pins

In reply to Nicolas Ferre

From: Richard Genoud <[email protected]>

The SCK pins where missing in usarts pinctrl.

---
 arch/arm/boot/dts/at91sam9x5.dtsi | 20 ++++++++++++++++++++
 1 file changed, 20 insertions(+)
arch/arm/boot/dts/at91sam9x5.dtsi +20 -0
index e9c4290..cb711a5 100644
@@ -143,6 +143,11 @@
 						atmel,pins =
 							<0 3 0x1 0x0>;	/* PA3 periph A */
 					};
+
+					pinctrl_usart0_sck: usart0_sck-0 {
+						atmel,pins =
+							<0 4 0x1 0x0>;	/* PA4 periph A */
+					};
 				};
 
 				usart1 {
@@ -161,6 +166,11 @@
 						atmel,pins =
 							<2 28 0x3 0x0>;	/* PC28 periph C */
 					};
+
+					pinctrl_usart1_sck: usart1_sck-0 {
+						atmel,pins =
+							<2 28 0x3 0x0>;	/* PC29 periph C */
+					};
 				};
 
 				usart2 {
@@ -179,6 +189,11 @@
 						atmel,pins =
 							<1 1 0x2 0x0>;	/* PB1 periph B */
 					};
+
+					pinctrl_usart2_sck: usart2_sck-0 {
+						atmel,pins =
+							<1 2 0x2 0x0>;	/* PB2 periph B */
+					};
 				};
 
 				usart3 {
@@ -197,6 +212,11 @@
 						atmel,pins =
 							<2 25 0x2 0x0>;	/* PC25 periph B */
 					};
+
+					pinctrl_usart3_sck: usart3_sck-0 {
+						atmel,pins =
+							<2 26 0x2 0x0>;	/* PC26 periph B */
+					};
 				};
 
 				uart0 {
Signature · 1 line
1.8.0
#4 lore raw

PATCH v2 4/9 ARM: at91: fix gpios on i2c-gpio for RM9200 DT

In reply to Nicolas Ferre

From: Joachim Eastwood <[email protected]>

---
 arch/arm/boot/dts/at91rm9200.dtsi | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)
arch/arm/boot/dts/at91rm9200.dtsi +2 -2
index e154f24..222047f 100644
@@ -336,8 +336,8 @@
 
 	i2c at 0 {
 		compatible = "i2c-gpio";
-		gpios = <&pioA 23 0 /* sda */
-			 &pioA 24 0 /* scl */
+		gpios = <&pioA 25 0 /* sda */
+			 &pioA 26 0 /* scl */
 			>;
 		i2c-gpio,sda-open-drain;
 		i2c-gpio,scl-open-drain;
Signature · 1 line
1.8.0
#5 lore raw

PATCH v2 5/9 ARM: at91: rm9200: remake the BGA as default version

In reply to Nicolas Ferre

From: Jean-Christophe PLAGNIOL-VILLARD <[email protected]>

Make BGA as the default version as we are supposed to just have to specify when we use the PQFP version.

Issue was existing since commit:
3e90772 (ARM: at91: fix at91rm9200 soc subtype handling).

---
 arch/arm/mach-at91/setup.c | 2 ++
 1 file changed, 2 insertions(+)
arch/arm/mach-at91/setup.c +2 -0
index 9ee866c..4b67847 100644
@@ -105,6 +105,8 @@ static void __init soc_detect(u32 dbgu_base)
 	switch (socid) {
 	case ARCH_ID_AT91RM9200:
 		at91_soc_initdata.type = AT91_SOC_RM9200;
+		if (at91_soc_initdata.subtype == AT91_SOC_SUBTYPE_NONE)
+			at91_soc_initdata.subtype = AT91_SOC_RM9200_BGA;
 		at91_boot_soc = at91rm9200_soc;
 		break;
 
Signature · 1 line
1.8.0
#6 lore raw

PATCH v2 6/9 ARM: at91/dts: add macb mii pinctrl config for kizbox

In reply to Nicolas Ferre

From: Boris BREZILLON <[email protected]>

This patch overrides default macb pinctrl config defined in at91sam9260.dtsi (pinctrl_macb_rmii) with kizbox board config (pinctrl_macb_rmii + pinctrl_macb_rmii_mii_alt).

---
 arch/arm/boot/dts/kizbox.dts | 2 ++
 1 file changed, 2 insertions(+)
arch/arm/boot/dts/kizbox.dts +2 -0
index e8814fe..b4dc3ed 100644
@@ -48,6 +48,8 @@
 
 			macb0: ethernet at fffc4000 {
 				phy-mode = "mii";
+				pinctrl-0 = <&pinctrl_macb_rmii
+				             &pinctrl_macb_rmii_mii_alt>;
 				status = "okay";
 			};
 
Signature · 1 line
1.8.0
#7 lore raw

PATCH v2 7/9 ARM: at91/at91_dt_defconfig: remove memory specification to cmdline

In reply to Nicolas Ferre

No need for this cmdline option as we are using DT.
Moreover this defconfig is targeted to multiple SoC/boards: this option was nonsense.

---
 arch/arm/configs/at91_dt_defconfig | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)
arch/arm/configs/at91_dt_defconfig +1 -1
index b175577..a353ff6 100644
@@ -31,7 +31,7 @@ CONFIG_ZBOOT_ROM_TEXT=0x0
 CONFIG_ZBOOT_ROM_BSS=0x0
 CONFIG_ARM_APPENDED_DTB=y
 CONFIG_ARM_ATAG_DTB_COMPAT=y
-CONFIG_CMDLINE="mem=128M console=ttyS0,115200 initrd=0x21100000,25165824 root=/dev/ram0 rw"
+CONFIG_CMDLINE="console=ttyS0,115200 initrd=0x21100000,25165824 root=/dev/ram0 rw"
 CONFIG_KEXEC=y
 CONFIG_AUTO_ZRELADDR=y
 # CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
Signature · 1 line
1.8.0
#8 lore raw

Re: [PATCH 7/9] ARM: at91/at91_dt_defconfig: remove memory specification to cmdline

Quoted 3 lines · Nicolas Ferre

No need for this cmdline option as we are using DT.
Moreover this defconfig is targeted to multiple SoC/boards: this option was nonsense.

just keep the console the rest is a nonsense too

as on 9g45 the initrd will be at 0x7xxxxxxx

the console too but as the patch serie to support via DT is not yet mainline we can keep it

Best Regards,
J.

Quoted 23 lines
---
 arch/arm/configs/at91_dt_defconfig | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)
arch/arm/configs/at91_dt_defconfig +1 -1
index b175577..a353ff6 100644
@@ -31,7 +31,7 @@ CONFIG_ZBOOT_ROM_TEXT=0x0
 CONFIG_ZBOOT_ROM_BSS=0x0
 CONFIG_ARM_APPENDED_DTB=y
 CONFIG_ARM_ATAG_DTB_COMPAT=y
-CONFIG_CMDLINE="mem=128M console=ttyS0,115200 initrd=0x21100000,25165824 root=/dev/ram0 rw"
+CONFIG_CMDLINE="console=ttyS0,115200 initrd=0x21100000,25165824 root=/dev/ram0 rw"
 CONFIG_KEXEC=y
 CONFIG_AUTO_ZRELADDR=y
 # CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
Signature · 1 line
1.8.0
#9 lore raw

Re: [PATCH 7/9] ARM: at91/at91_dt_defconfig: remove memory specification to cmdline

On 01/23/2013 11:20 AM, Jean-Christophe PLAGNIOL-VILLARD :

Quoted 7 lines · Nicolas Ferre
Quoted 3 lines

No need for this cmdline option as we are using DT.
Moreover this defconfig is targeted to multiple SoC/boards: this option was nonsense.

just keep the console the rest is a nonsense too

as on 9g45 the initrd will be at 0x7xxxxxxx

BTW, how do you mix 9g45 with other sam9's in this defconfig: it is not possible due to this difference in address rage, it not it?

In this case, should we remove the
CONFIG_SOC_AT91SAM9G45=y
from this at91_dt_defconfig?

Quoted 12 lines

the console too but as the patch serie to support via DT is not yet mainline we can keep it

Best Regards,
J.

Quoted 7 lines
---
 arch/arm/configs/at91_dt_defconfig | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)
Quoted 13 lines

arch/arm/configs/at91_dt_defconfig CONFIG_ZBOOT_ROM_TEXT=0x0 · line 37

Quoted 13 lines
arch/arm/configs/at91_dt_defconfig +1 -1
index b175577..a353ff6 100644
@@ -31,7 +31,7 @@ CONFIG_ZBOOT_ROM_TEXT=0x0
 CONFIG_ZBOOT_ROM_BSS=0x0
 CONFIG_ARM_APPENDED_DTB=y
 CONFIG_ARM_ATAG_DTB_COMPAT=y
-CONFIG_CMDLINE="mem=128M console=ttyS0,115200 initrd=0x21100000,25165824 root=/dev/ram0 rw"
+CONFIG_CMDLINE="console=ttyS0,115200 initrd=0x21100000,25165824 root=/dev/ram0 rw"
 CONFIG_KEXEC=y
 CONFIG_AUTO_ZRELADDR=y
 # CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set

Bye,

Signature · 1 line
Nicolas Ferre
#10 lore raw

Re: [PATCH 7/9] ARM: at91/at91_dt_defconfig: remove memory specification to cmdline

Quoted 7 lines · Nicolas Ferre

On 01/23/2013 11:20 AM, Jean-Christophe PLAGNIOL-VILLARD :

Quoted 6 lines · Nicolas Ferre
Quoted 3 lines

No need for this cmdline option as we are using DT.
Moreover this defconfig is targeted to multiple SoC/boards: this option was nonsense.

just keep the console the rest is a nonsense too

Quoted 8 lines
Quoted 1 line

as on 9g45 the initrd will be at 0x7xxxxxxx

BTW, how do you mix 9g45 with other sam9's in this defconfig: it is not possible due to this difference in address rage, it not it?

In this case, should we remove the
CONFIG_SOC_AT91SAM9G45=y
from this at91_dt_defconfig?

no you just need to boot the zImage from barebox

barebox handle automaticaly where the kernel is supposed to run and the kernel found his running/decompressing address at runtime too

Best Regards,
J.

#11 lore raw

Re: [PATCH 7/9] ARM: at91/at91_dt_defconfig: remove memory specification to cmdline

In reply to Jean-Christophe PLAGNIOL-VILLARD

On 01/23/2013 11:20 AM, Jean-Christophe PLAGNIOL-VILLARD :

Quoted 7 lines · Nicolas Ferre
Quoted 3 lines

No need for this cmdline option as we are using DT.
Moreover this defconfig is targeted to multiple SoC/boards: this option was nonsense.

just keep the console the rest is a nonsense too

as on 9g45 the initrd will be at 0x7xxxxxxx

Understood, but I prefer to keep a "root" option at least, so I keep it like this.

Quoted 2 lines

the console too but as the patch serie to support via DT is not yet mainline we can keep it

Ok for this.

Quoted 28 lines

Best Regards,
J.

Quoted 23 lines
---
 arch/arm/configs/at91_dt_defconfig | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)
arch/arm/configs/at91_dt_defconfig +1 -1
index b175577..a353ff6 100644
@@ -31,7 +31,7 @@ CONFIG_ZBOOT_ROM_TEXT=0x0
 CONFIG_ZBOOT_ROM_BSS=0x0
 CONFIG_ARM_APPENDED_DTB=y
 CONFIG_ARM_ATAG_DTB_COMPAT=y
-CONFIG_CMDLINE="mem=128M console=ttyS0,115200 initrd=0x21100000,25165824 root=/dev/ram0 rw"
+CONFIG_CMDLINE="console=ttyS0,115200 initrd=0x21100000,25165824 root=/dev/ram0 rw"
 CONFIG_KEXEC=y
 CONFIG_AUTO_ZRELADDR=y
 # CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
Signature · 1 line
1.8.0
Signature · 1 line
Nicolas Ferre
#12 lore raw

Re: [PATCH 7/9] ARM: at91/at91_dt_defconfig: remove memory specification to cmdline

Quoted 9 lines · Nicolas Ferre

On 01/23/2013 11:20 AM, Jean-Christophe PLAGNIOL-VILLARD :

Quoted 7 lines · Nicolas Ferre
Quoted 3 lines

No need for this cmdline option as we are using DT.
Moreover this defconfig is targeted to multiple SoC/boards: this option was nonsense.

just keep the console the rest is a nonsense too

as on 9g45 the initrd will be at 0x7xxxxxxx

Quoted 7 lines

Understood, but I prefer to keep a "root" option at least, so I keep it like this.

Quoted 2 lines

the console too but as the patch serie to support via DT is not yet mainline we can keep it

Ok for this.

I check and the default commande line in the defconfig is a nonsense now

as we will provide a default one via dt anyway

and the root option will not work on 9g45

so it's better to simply drop it

Best Regards,
J.

Quoted 33 lines
Quoted 29 lines

Best Regards,
J.

Quoted 23 lines
---
 arch/arm/configs/at91_dt_defconfig | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)
arch/arm/configs/at91_dt_defconfig +1 -1
index b175577..a353ff6 100644
@@ -31,7 +31,7 @@ CONFIG_ZBOOT_ROM_TEXT=0x0
 CONFIG_ZBOOT_ROM_BSS=0x0
 CONFIG_ARM_APPENDED_DTB=y
 CONFIG_ARM_ATAG_DTB_COMPAT=y
-CONFIG_CMDLINE="mem=128M console=ttyS0,115200 initrd=0x21100000,25165824 root=/dev/ram0 rw"
+CONFIG_CMDLINE="console=ttyS0,115200 initrd=0x21100000,25165824 root=/dev/ram0 rw"
 CONFIG_KEXEC=y
 CONFIG_AUTO_ZRELADDR=y
 # CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
Signature · 1 line
1.8.0
Signature · 1 line
Nicolas Ferre
#13 lore raw

PATCH v2 8/9 ARM: at91/at91_dt_defconfig: add at91sam9n12 SoC to DT defconfig

In reply to Nicolas Ferre
---
 arch/arm/configs/at91_dt_defconfig | 1 +
 1 file changed, 1 insertion(+)
arch/arm/configs/at91_dt_defconfig +1 -0
index a353ff6..1ea9590 100644
@@ -19,6 +19,7 @@ CONFIG_SOC_AT91SAM9260=y
 CONFIG_SOC_AT91SAM9263=y
 CONFIG_SOC_AT91SAM9G45=y
 CONFIG_SOC_AT91SAM9X5=y
+CONFIG_SOC_AT91SAM9N12=y
 CONFIG_MACH_AT91SAM_DT=y
 CONFIG_AT91_PROGRAMMABLE_CLOCKS=y
 CONFIG_AT91_TIMER_HZ=128
Signature · 1 line
1.8.0
#14 lore raw

PATCH v2 9/9 ARM: at91/dts: correct comment in at91sam9x5.dtsi for mii

In reply to Nicolas Ferre

From: Douglas Gilbert <[email protected]>

Concerning pinctrl_macb0_rmii_mii, values were okay, but not comments.

---
 arch/arm/boot/dts/at91sam9x5.dtsi | 16 ++++++++--------
 1 file changed, 8 insertions(+), 8 deletions(-)
arch/arm/boot/dts/at91sam9x5.dtsi +8 -8
index cb711a5..8ecca69 100644
@@ -260,14 +260,14 @@
 
 					pinctrl_macb0_rmii_mii: macb0_rmii_mii-0 {
 						atmel,pins =
-							<1 8 0x1 0x0	/* PA8 periph A */
-							 1 11 0x1 0x0	/* PA11 periph A */
-							 1 12 0x1 0x0	/* PA12 periph A */
-							 1 13 0x1 0x0	/* PA13 periph A */
-							 1 14 0x1 0x0	/* PA14 periph A */
-							 1 15 0x1 0x0	/* PA15 periph A */
-							 1 16 0x1 0x0	/* PA16 periph A */
-							 1 17 0x1 0x0>;	/* PA17 periph A */
+							<1 8 0x1 0x0	/* PB8 periph A */
+							 1 11 0x1 0x0	/* PB11 periph A */
+							 1 12 0x1 0x0	/* PB12 periph A */
+							 1 13 0x1 0x0	/* PB13 periph A */
+							 1 14 0x1 0x0	/* PB14 periph A */
+							 1 15 0x1 0x0	/* PB15 periph A */
+							 1 16 0x1 0x0	/* PB16 periph A */
+							 1 17 0x1 0x0>;	/* PB17 periph A */
 					};
 				};
 
Signature · 1 line
1.8.0