prebuild cpu QOM tree /machine/node/socket/core ->link-cpu

index 07a6c5f..e9ff89c 100644
@@ -47,6 +47,12 @@
  */
 typedef uint32_t apic_id_t;
 
+typedef struct X86CPUTopoInfo {
+    unsigned pkg_id;
+    unsigned core_id;
+    unsigned smt_id;
+} X86CPUTopoInfo;
+
 /* Return the bit width needed for 'count' IDs
  */
 static unsigned apicid_bitwidth_for_count(unsigned count)

@@ -92,13 +98,11 @@ static inline unsigned apicid_pkg_offset(unsigned nr_cores, unsigned nr_threads)
  */
 static inline apic_id_t apicid_from_topo_ids(unsigned nr_cores,
                                              unsigned nr_threads,
-                                             unsigned pkg_id,
-                                             unsigned core_id,
-                                             unsigned smt_id)
+                                             const X86CPUTopoInfo *topo)
 {
-    return (pkg_id  << apicid_pkg_offset(nr_cores, nr_threads)) |
-           (core_id << apicid_core_offset(nr_cores, nr_threads)) |
-           smt_id;
+    return (topo->pkg_id  << apicid_pkg_offset(nr_cores, nr_threads)) |
+           (topo->core_id << apicid_core_offset(nr_cores, nr_threads)) |
+           topo->smt_id;
 }
 
 /* Calculate thread/core/package IDs for a specific topology,

@@ -107,14 +111,12 @@ static inline apic_id_t apicid_from_topo_ids(unsigned nr_cores,
 static inline void x86_topo_ids_from_idx(unsigned nr_cores,
                                          unsigned nr_threads,
                                          unsigned cpu_index,
-                                         unsigned *pkg_id,
-                                         unsigned *core_id,
-                                         unsigned *smt_id)
+                                         X86CPUTopoInfo *topo)
 {
     unsigned core_index = cpu_index / nr_threads;
-    *smt_id = cpu_index % nr_threads;
-    *core_id = core_index % nr_cores;
-    *pkg_id = core_index / nr_cores;
+    topo->smt_id = cpu_index % nr_threads;
+    topo->core_id = core_index % nr_cores;
+    topo->pkg_id = core_index / nr_cores;
 }
 
 /* Make APIC ID for the CPU 'cpu_index'

@@ -125,10 +127,9 @@ static inline apic_id_t x86_apicid_from_cpu_idx(unsigned nr_cores,
                                                 unsigned nr_threads,
                                                 unsigned cpu_index)
 {
-    unsigned pkg_id, core_id, smt_id;
-    x86_topo_ids_from_idx(nr_cores, nr_threads, cpu_index,
-                          &pkg_id, &core_id, &smt_id);
-    return apicid_from_topo_ids(nr_cores, nr_threads, pkg_id, core_id, smt_id);
+    X86CPUTopoInfo topo;
+    x86_topo_ids_from_idx(nr_cores, nr_threads, cpu_index, &topo);
+    return apicid_from_topo_ids(nr_cores, nr_threads, &topo);
 }
 
 #endif /* TARGET_I386_TOPOLOGY_H */

index e715a33..84a017e 100644
@@ -927,7 +927,7 @@ void pc_acpi_smi_interrupt(void *opaque, int irq, int level)
     }
 }
 
-static X86CPU *pc_new_cpu(const char *cpu_model, int64_t apic_id,
+static X86CPU *pc_new_cpu(const char *cpu_model, X86CPUTopoInfo *topo,
                           DeviceState *icc_bridge, Error **errp)
 {
     X86CPU *cpu;

@@ -939,7 +939,7 @@ static X86CPU *pc_new_cpu(const char *cpu_model, int64_t apic_id,
         return NULL;
     }
 
-    object_property_set_int(OBJECT(cpu), apic_id, "apic-id", &local_err);
+    object_property_set_int(OBJECT(cpu), topo->apic_id, "apic-id", &local_err);
     object_property_set_bool(OBJECT(cpu), true, "realized", &local_err);
 
     if (local_err) {

@@ -955,28 +955,29 @@ static const char *current_cpu_model;
 void pc_hot_add_cpu(const int64_t id, Error **errp)
 {
     DeviceState *icc_bridge;
-    int64_t apic_id = x86_cpu_apic_id_from_index(id);
+    X86CPUTopoInfo topo;
 
     if (id < 0) {
         error_setg(errp, "Invalid CPU id: %" PRIi64, id);
         return;
     }
 
-    if (cpu_exists(apic_id)) {
+    if (id >= max_cpus) {
         error_setg(errp, "Unable to add CPU: %" PRIi64
-                   ", it already exists", id);
+                   ", max allowed: %d", id, max_cpus - 1);
         return;
     }
 
-    if (id >= max_cpus) {
+    x86_cpu_topo_ids_from_index(id, &topo);
+    if (cpu_exists(topo.apic_id)) {
         error_setg(errp, "Unable to add CPU: %" PRIi64
-                   ", max allowed: %d", id, max_cpus - 1);
+                   ", it already exists", id);
         return;
     }
 
     icc_bridge = DEVICE(object_resolve_path_type("icc-bridge",
                                                  TYPE_ICC_BRIDGE, NULL));
-    pc_new_cpu(current_cpu_model, apic_id, icc_bridge, errp);
+    pc_new_cpu(current_cpu_model, &topo, icc_bridge, errp);
 }
 
 void pc_cpus_init(const char *cpu_model, DeviceState *icc_bridge)

@@ -996,8 +997,9 @@ void pc_cpus_init(const char *cpu_model, DeviceState *icc_bridge)
     current_cpu_model = cpu_model;
 
     for (i = 0; i < smp_cpus; i++) {
-        cpu = pc_new_cpu(cpu_model, x86_cpu_apic_id_from_index(i),
-                         icc_bridge, &error);
+        X86CPUTopoInfo topo;
+        x86_cpu_topo_ids_from_index(i, &topo);
+        cpu = pc_new_cpu(cpu_model, &topo, icc_bridge, &error);
         if (error) {
             error_report("%s", error_get_pretty(error));
             error_free(error);

index 0e8812a..6f2ba1c 100644
@@ -23,8 +23,6 @@
 
 #include "cpu.h"
 #include "sysemu/kvm.h"
-#include "sysemu/cpus.h"
-#include "topology.h"
 
 #include "qemu/option.h"
 #include "qemu/config-file.h"

@@ -2584,6 +2582,21 @@ void enable_compat_apic_id_mode(void)
     compat_apic_id_mode = true;
 }
 
+void x86_cpu_topo_ids_from_index(unsigned int cpu_index, X86CPUTopoInfo *topo)
+{
+    static bool warned;
+
+    x86_topo_ids_from_idx(smp_cores, smp_threads, cpu_index, topo);
+    if (compat_apic_id_mode) {
+        if (cpu_index != topo->apic_id && !warned) {
+            error_report("APIC IDs set in compatibility mode, "
+                         "CPU topology won't match the configuration");
+            warned = true;
+        }
+        x86_topo_ids_from_apic_id(smp_cores, smp_threads, cpu_index, topo);
+    }
+}
+
 /* Calculates initial APIC ID for a specific CPU index
  *
  * Currently we need to be able to calculate the APIC ID from the CPU index

@@ -2593,20 +2606,10 @@ void enable_compat_apic_id_mode(void)
  */
 uint32_t x86_cpu_apic_id_from_index(unsigned int cpu_index)
 {
-    uint32_t correct_id;
-    static bool warned;
+    X86CPUTopoInfo topo;
 
-    correct_id = x86_apicid_from_cpu_idx(smp_cores, smp_threads, cpu_index);
-    if (compat_apic_id_mode) {
-        if (cpu_index != correct_id && !warned) {
-            error_report("APIC IDs set in compatibility mode, "
-                         "CPU topology won't match the configuration");
-            warned = true;
-        }
-        return cpu_index;
-    } else {
-        return correct_id;
-    }
+    x86_cpu_topo_ids_from_index(cpu_index, &topo);
+    return topo.apic_id;
 }
 
 static void x86_cpu_initfn(Object *obj)

index 0014acc..a410b16 100644
@@ -22,6 +22,9 @@
 #include "config.h"
 #include "qemu-common.h"
 
+#include "sysemu/cpus.h"
+#include "topology.h"
+
 #ifdef TARGET_X86_64
 #define TARGET_LONG_BITS 64
 #else

@@ -1286,6 +1289,8 @@ void x86_cpu_compat_set_features(const char *cpu_model, FeatureWord w,
 const char *get_register_name_32(unsigned int reg);
 
 uint32_t x86_cpu_apic_id_from_index(unsigned int cpu_index);
+void x86_cpu_topo_ids_from_index(unsigned int cpu_index,
+                                 X86CPUTopoInfo *topo);
 void enable_compat_apic_id_mode(void);
 
 #define APIC_DEFAULT_ADDRESS 0xfee00000

index e9ff89c..e89e0cc 100644
@@ -51,6 +51,7 @@ typedef struct X86CPUTopoInfo {
     unsigned pkg_id;
     unsigned core_id;
     unsigned smt_id;
+    apic_id_t apic_id;
 } X86CPUTopoInfo;
 
 /* Return the bit width needed for 'count' IDs

@@ -117,19 +118,26 @@ static inline void x86_topo_ids_from_idx(unsigned nr_cores,
     topo->smt_id = cpu_index % nr_threads;
     topo->core_id = core_index % nr_cores;
     topo->pkg_id = core_index / nr_cores;
+    topo->apic_id = apicid_from_topo_ids(nr_cores, nr_threads, topo);
 }
 
-/* Make APIC ID for the CPU 'cpu_index'
- *
- * 'cpu_index' is a sequential, contiguous ID for the CPU.
+/* Calculate CPU topology based on CPU APIC ID.
  */
-static inline apic_id_t x86_apicid_from_cpu_idx(unsigned nr_cores,
-                                                unsigned nr_threads,
-                                                unsigned cpu_index)
+static inline void x86_topo_ids_from_apic_id(unsigned nr_cores,
+                                             unsigned nr_threads,
+                                             apic_id_t apic_id,
+                                             X86CPUTopoInfo *topo)
 {
-    X86CPUTopoInfo topo;
-    x86_topo_ids_from_idx(nr_cores, nr_threads, cpu_index, &topo);
-    return apicid_from_topo_ids(nr_cores, nr_threads, &topo);
+    unsigned offset_mask;
+    topo->pkg_id = apic_id >> apicid_pkg_offset(nr_cores, nr_threads);
+
+    offset_mask = (1L << apicid_pkg_offset(nr_cores, nr_threads)) - 1;
+    topo->core_id = (apic_id & offset_mask)
+                    >> apicid_core_offset(nr_cores, nr_threads);
+
+    offset_mask = (1L << apicid_core_offset(nr_cores, nr_threads)) - 1;
+    topo->smt_id = apic_id & offset_mask;
+    topo->apic_id = apic_id;
 }
 
 #endif /* TARGET_I386_TOPOLOGY_H */

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index 84a017e..8a489f5 100644
@@ -941,6 +941,7 @@ static X86CPU *pc_new_cpu(const char *cpu_model, X86CPUTopoInfo *topo,
 
     object_property_set_int(OBJECT(cpu), topo->apic_id, "apic-id", &local_err);
     object_property_set_bool(OBJECT(cpu), true, "realized", &local_err);
+    x86_topo_cpu_set_link(OBJECT(cpu), topo, &local_err);
 
     if (local_err) {
         error_propagate(errp, local_err);

@@ -996,6 +997,8 @@ void pc_cpus_init(const char *cpu_model, DeviceState *icc_bridge)
     }
     current_cpu_model = cpu_model;
 
+    cpu_topo_init();
+
     for (i = 0; i < smp_cpus; i++) {
         X86CPUTopoInfo topo;
         x86_cpu_topo_ids_from_index(i, &topo);

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71 lines not on this page · raw message

index 6f2ba1c..9754ac2 100644
@@ -2698,6 +2698,28 @@ static void x86_cpu_synchronize_from_tb(CPUState *cs, TranslationBlock *tb)
     cpu->env.eip = tb->pc - tb->cs_base;
 }
 
+void x86_topo_cpu_set_link(Object *obj, X86CPUTopoInfo *topo, Error **errp)
+{
+    gchar *name;
+    CoreState *core;
+    Error *local_err = NULL;
+
+    core = cpu_topo_object_core_find(topo);
+    if (!core) {
+        error_set(&local_err, QERR_DEVICE_NOT_FOUND, TYPE_CORE);
+        goto out;
+    }
+
+    name = g_strdup_printf("cpu[%" PRIu32 "]", topo->smt_id);
+    object_property_set_link(OBJECT(core), obj, name, &local_err);
+    g_free(name);
+
+out:
+    if (local_err != NULL) {
+        error_propagate(errp, local_err);
+    }
+}
+
 static Property x86_cpu_properties[] = {
     DEFINE_PROP_BOOL("pmu", X86CPU, enable_pmu, false),
     { .name  = "hv-spinlocks", .info  = &qdev_prop_spinlocks },

index a410b16..42db0fd 100644
@@ -24,6 +24,7 @@
 
 #include "sysemu/cpus.h"
 #include "topology.h"
+#include "cpu-topology.h"
 
 #ifdef TARGET_X86_64
 #define TARGET_LONG_BITS 64

@@ -1293,6 +1294,8 @@ void x86_cpu_topo_ids_from_index(unsigned int cpu_index,
                                  X86CPUTopoInfo *topo);
 void enable_compat_apic_id_mode(void);
 
+void x86_topo_cpu_set_link(Object *obj, X86CPUTopoInfo *topo, Error **errp);
+
 #define APIC_DEFAULT_ADDRESS 0xfee00000
 #define APIC_SPACE_SIZE      0x100000