qemu: upgrade to 2.0.0
cover qemu: upgrade to 2.0.0
QEmu upgrade to 2.0.0
Tested with all qemu machines.
Due to updated SeaBIOS, for x86* architectures,
a fix for v86d is also needed.
The following changes since commit ae642d3fadb83f641034148d833a5c1deb3a1f10:
socat: upgrade to 1.7.2.4 (2014-06-01 14:30:40 +0100)
are available in the git repository at:
git://git.yoctoproject.org/poky-contrib ciorga/qemu_upg_20
http://git.yoctoproject.org/cgit.cgi/poky-contrib/log/?h=ciorga/qemu_upg_20
Cristian Iorga (2):
v86d: fix for SeaBIOS VGA BIOS compatibility
qemu: upgrade to 2.0.0
.../v86d/v86d/Update-x86emu-from-X.org.patch | 21766 +++++++++++++++++++
meta/recipes-bsp/v86d/v86d_0.1.10.bb | 3 +-
.../recipes-devtools/qemu/qemu/fxrstorssefix.patch | 31 -
.../qemu/{qemu_1.7.0.bb => qemu_2.0.0.bb} | 9 +-
4 files changed, 21772 insertions(+), 37 deletions(-)
create mode 100644 meta/recipes-bsp/v86d/v86d/Update-x86emu-from-X.org.patch
delete mode 100644 meta/recipes-devtools/qemu/qemu/fxrstorssefix.patch
rename meta/recipes-devtools/qemu/{qemu_1.7.0.bb => qemu_2.0.0.bb} (70%)Signature · 1 line
1.9.1
PATCH 1/2 v86d: fix for SeaBIOS VGA BIOS compatibility
This fixes a compatibility issue between v86d
and SeaBIOS VGA BIOS where the leal instruction
is not decoded properly. Read the
http://thread.gmane.org/gmane.comp.emulators.qemu/271806
thread for more details.
Patch taken from upstream.
Signed-off-by Cristian Iorga <[email protected]>
--- .../v86d/v86d/Update-x86emu-from-X.org.patch | 21766 +++++++++++++++++++ meta/recipes-bsp/v86d/v86d_0.1.10.bb | 3 +- 2 files changed, 21768 insertions(+), 1 deletion(-) create mode 100644 meta/recipes-bsp/v86d/v86d/Update-x86emu-from-X.org.patch
meta/recipes-bsp/v86d/v86d/Update-x86emu-from-X.org.patch new file +21766 -0
@@ -0,0 +1,21766 @@ +From 1a410ae58f28eeab32fa87626cfd5a663ba33c51 Mon Sep 17 00:00:00 2001 +From: Bernhard Walle <[email protected]> +Date: Tue, 13 May 2014 23:40:56 +0200 +Subject: [PATCH 2/2] Update x86emu from X.org + +This commit updates the x86emu copy from X.org tarball +(ftp://mirror.csclub.uwaterloo.ca/x.org/current/src/xserver/xorg-server-1.12.2.tar.bz2). + +This fixes a compatibility issue between v86d and SeaBIOS VGA BIOS where +the leal instruction is not decoded properly. Read the +http://thread.gmane.org/gmane.comp.emulators.qemu/271806 thread for more +details. + +Upstream-Status: Backport + +Signed-off-by: Bernhard Walle <[email protected]> +--- + libs/x86emu/LICENSE | 17 - + libs/x86emu/debug.c | 509 +++--- + libs/x86emu/decode.c | 1069 ++++++------ + libs/x86emu/fpu.c | 463 +++--- + libs/x86emu/ops.c | 2940 +++++++++++++++++++-------------- + libs/x86emu/ops2.c | 1929 +++++++++++----------- + libs/x86emu/prim_ops.c | 3219 +++++++++++++++++++------------------ + libs/x86emu/sys.c | 583 +++---- + libs/x86emu/validate.c | 52 +- + libs/x86emu/x86emu.h | 75 +- + libs/x86emu/x86emu/debug.h | 163 +- + libs/x86emu/x86emu/decode.h | 57 +- + libs/x86emu/x86emu/fpu.h | 23 +- + libs/x86emu/x86emu/fpu_regs.h | 44 +- + libs/x86emu/x86emu/ops.h | 6 +- + libs/x86emu/x86emu/prim_asm.h | 251 ++- + libs/x86emu/x86emu/prim_ops.h | 188 +-- + libs/x86emu/x86emu/prim_x86_gcc.h | 77 + + libs/x86emu/x86emu/regs.h | 101 +- + libs/x86emu/x86emu/types.h | 50 +- + libs/x86emu/x86emu/x86emui.h | 34 +- + 21 files changed, 6379 insertions(+), 5471 deletions(-) + delete mode 100644 libs/x86emu/LICENSE + create mode 100644 libs/x86emu/x86emu/prim_x86_gcc.h + +diff --git a/libs/x86emu/LICENSE b/libs/x86emu/LICENSE +deleted file mode 100644 +index a3ede4a..0000000 +--- a/libs/x86emu/LICENSE ++++ /dev/null +@@ -1,17 +0,0 @@ +- License information +- ------------------- +- +-The x86emu library is under a BSD style license, comaptible +-with the XFree86 and X licenses used by XFree86. The +-original x86emu libraries were under the GNU General Public +-License. Due to license incompatibilities between the GPL +-and the XFree86 license, the original authors of the code +-decided to allow a license change. If you have submitted +-code to the original x86emu project, and you don't agree +-with the license change, please contact us and let you +-know. Your code will be removed to comply with your wishes. +- +-If you have any questions about this, please send email to [email protected] or [email protected] for +-clarification. +- +diff --git a/libs/x86emu/debug.c b/libs/x86emu/debug.c +index 6fd7f11..1a8d1d6 100644 +--- a/libs/x86emu/debug.c ++++ b/libs/x86emu/debug.c +@@ -38,6 +38,8 @@ + ****************************************************************************/ + + #include "x86emu/x86emui.h" ++#include <stdio.h> ++#include <string.h> + #ifndef NO_SYS_HEADERS + #include <stdarg.h> + #include <stdlib.h> +@@ -47,46 +49,51 @@ + + #ifdef DEBUG + +-static void print_encoded_bytes (u16 s, u16 o); +-static void print_decoded_instruction (void); +-static int parse_line (char *s, int *ps, int *n); +- ++static void print_encoded_bytes(u16 s, u16 o); ++static void print_decoded_instruction(void); ++static int parse_line(char *s, int *ps, int *n); ++ + /* should look something like debug's output. */ +-void X86EMU_trace_regs (void) ++void ++X86EMU_trace_regs(void) + { +- if (DEBUG_TRACE()) { +- x86emu_dump_regs(); ++ if (DEBUG_TRACE()) { ++ x86emu_dump_regs(); + } +- if (DEBUG_DECODE() && ! DEBUG_DECODE_NOPRINT()) { +- printk("%04x:%04x ",M.x86.saved_cs, M.x86.saved_ip); +- print_encoded_bytes( M.x86.saved_cs, M.x86.saved_ip); +- print_decoded_instruction(); ++ if (DEBUG_DECODE() && !DEBUG_DECODE_NOPRINT()) { ++ printk("%04x:%04x ", M.x86.saved_cs, M.x86.saved_ip); ++ print_encoded_bytes(M.x86.saved_cs, M.x86.saved_ip); ++ print_decoded_instruction(); + } + } + +-void X86EMU_trace_xregs (void) ++void ++X86EMU_trace_xregs(void) + { +- if (DEBUG_TRACE()) { +- x86emu_dump_xregs(); ++ if (DEBUG_TRACE()) { ++ x86emu_dump_xregs(); + } + } + +-void x86emu_just_disassemble (void) ++void ++x86emu_just_disassemble(void) + { + /* + * This routine called if the flag DEBUG_DISASSEMBLE is set kind + * of a hack! + */ +- printk("%04x:%04x ",M.x86.saved_cs, M.x86.saved_ip); +- print_encoded_bytes( M.x86.saved_cs, M.x86.saved_ip); +- print_decoded_instruction(); ++ printk("%04x:%04x ", M.x86.saved_cs, M.x86.saved_ip); ++ print_encoded_bytes(M.x86.saved_cs, M.x86.saved_ip); ++ print_decoded_instruction(); + } + +-static void disassemble_forward (u16 seg, u16 off, int n) ++static void ++disassemble_forward(u16 seg, u16 off, int n) + { +- X86EMU_sysEnv tregs; +- int i; +- u8 op1; ++ X86EMU_sysEnv tregs; ++ int i; ++ u8 op1; ++ + /* + * hack, hack, hack. What we do is use the exact machinery set up + * for execution, except that now there is an additional state +@@ -111,17 +118,17 @@ static void disassemble_forward (u16 seg, u16 off, int n) + * This was done for an entirely different reason, but makes a + * nice way to get the system to help debug codes. + */ +- tregs = M; ++ tregs = M; + tregs.x86.R_IP = off; + tregs.x86.R_CS = seg; +- ++ + /* reset the decoding buffers */ + tregs.x86.enc_str_pos = 0; + tregs.x86.enc_pos = 0; +- ++ + /* turn on the "disassemble only, no execute" flag */ + tregs.x86.debug |= DEBUG_DISASSEMBLE_F; +- ++ + /* DUMP NEXT n instructions to screen in straight_line fashion */ + /* + * This looks like the regular instruction fetch stream, except +@@ -130,299 +137,359 @@ static void disassemble_forward (u16 seg, u16 off, int n) + * the instruction. XXX --- CHECK THAT MEM IS NOT AFFECTED!!! + * Note the use of a copy of the register structure... + */ +- for (i=0; i<n; i++) { +- op1 = (*sys_rdb)(((u32)M.x86.R_CS<<4) + (M.x86.R_IP++)); +- (x86emu_optab[op1])(op1); ++ for (i = 0; i < n; i++) { ++ op1 = (*sys_rdb) (((u32) M.x86.R_CS << 4) + (M.x86.R_IP++)); ++ (x86emu_optab[op1]) (op1); + } + /* end major hack mode. */ + } + +-void x86emu_check_ip_access (void) ++void ++x86emu_check_ip_access(void) + { + /* NULL as of now */ + } + +-void x86emu_check_sp_access (void) ++void ++x86emu_check_sp_access(void) + { + } + +-void x86emu_check_mem_access (u32 dummy) ++void ++x86emu_check_mem_access(u32 dummy) + { +- /* check bounds, etc */ ++ /* check bounds, etc */ + } + +-void x86emu_check_data_access (uint dummy1, uint dummy2) ++void ++x86emu_check_data_access(uint dummy1, uint dummy2) + { +- /* check bounds, etc */ ++ /* check bounds, etc */ + } + +-void x86emu_inc_decoded_inst_len (int x) ++void ++x86emu_inc_decoded_inst_len(int x) + { +- M.x86.enc_pos += x; ++ M.x86.enc_pos += x; + } + +-void x86emu_decode_printf (char *x) ++void ++x86emu_decode_printf(const char *x) + { +- sprintf(M.x86.decoded_buf+M.x86.enc_str_pos,"%s",x); +- M.x86.enc_str_pos += strlen(x); ++ sprintf(M.x86.decoded_buf + M.x86.enc_str_pos, "%s", x); ++ M.x86.enc_str_pos += strlen(x); + } + +-void x86emu_decode_printf2 (char *x, int y) ++void ++x86emu_decode_printf2(const char *x, int y) + { +- char temp[100]; +- sprintf(temp,x,y); +- sprintf(M.x86.decoded_buf+M.x86.enc_str_pos,"%s",temp); +- M.x86.enc_str_pos += strlen(temp); ++ char temp[100]; ++ ++ snprintf(temp, sizeof(temp), x, y); ++ sprintf(M.x86.decoded_buf + M.x86.enc_str_pos, "%s", temp); ++ M.x86.enc_str_pos += strlen(temp); + } + +-void x86emu_end_instr (void) ++void ++x86emu_end_instr(void) + { +- M.x86.enc_str_pos = 0; +- M.x86.enc_pos = 0; ++ M.x86.enc_str_pos = 0; ++ M.x86.enc_pos = 0; + } + +-static void print_encoded_bytes (u16 s, u16 o) ++static void ++print_encoded_bytes(u16 s, u16 o) + { + int i; + char buf1[64]; +- for (i=0; i< M.x86.enc_pos; i++) { +- sprintf(buf1+2*i,"%02x", fetch_data_byte_abs(s,o+i)); ++ ++ for (i = 0; i < M.x86.enc_pos; i++) { ++ sprintf(buf1 + 2 * i, "%02x", fetch_data_byte_abs(s, o + i)); + } +- printk("%-20s",buf1); ++ printk("%-20s", buf1); + } + +-static void print_decoded_instruction (void) ++static void ++print_decoded_instruction(void) + { +- printk("%s", M.x86.decoded_buf); ++ printk("%s", M.x86.decoded_buf); + } + +-void x86emu_print_int_vect (u16 iv) ++void ++x86emu_print_int_vect(u16 iv) + { +- u16 seg,off; ++ u16 seg, off; + +- if (iv > 256) return; +- seg = fetch_data_word_abs(0,iv*4); +- off = fetch_data_word_abs(0,iv*4+2); +- printk("%04x:%04x ", seg, off); ++ if (iv > 256) ++ return; ++ seg = fetch_data_word_abs(0, iv * 4); ++ off = fetch_data_word_abs(0, iv * 4 + 2); ++ printk("%04x:%04x ", seg, off); + } + +-void X86EMU_dump_memory (u16 seg, u16 off, u32 amt) ++void ++X86EMU_dump_memory(u16 seg, u16 off, u32 amt) + { +- u32 start = off & 0xfffffff0; +- u32 end = (off+16) & 0xfffffff0; +- u32 i; +- u32 current; +- +- current = start; +- while (end <= off + amt) { +- printk("%04x:%04x ", seg, start); +- for (i=start; i< off; i++) +- printk(" "); +- for ( ; i< end; i++) +- printk("%02x ", fetch_data_byte_abs(seg,i)); +- printk("\n"); +- start = end; +- end = start + 16; +- } ++ u32 start = off & 0xfffffff0; ++ u32 end = (off + 16) & 0xfffffff0; ++ u32 i; ++ u32 current; ++ ++ current = start; ++ while (end <= off + amt) { ++ printk("%04x:%04x ", seg, start); ++ for (i = start; i < off; i++) ++ printk(" "); ++ for (; i < end; i++) ++ printk("%02x ", fetch_data_byte_abs(seg, i)); ++ printk("\n"); ++ start = end; ++ end = start + 16; ++ } + } + +-void x86emu_single_step (void) ++void ++x86emu_single_step(void) + { + char s[1024]; + int ps[10]; + int ntok; + int cmd; + int done; +- int segment; ++ int segment; + int offset; + static int breakpoint; + static int noDecode = 1; +- ++ + char *p; + +- if (DEBUG_BREAK()) { +- if (M.x86.saved_ip != breakpoint) { +- return; +- } else { +- M.x86.debug &= ~DEBUG_DECODE_NOPRINT_F; +- M.x86.debug |= DEBUG_TRACE_F; +- M.x86.debug &= ~DEBUG_BREAK_F; +- print_decoded_instruction (); +- X86EMU_trace_regs(); +- } +- } +- done=0; +- offset = M.x86.saved_ip; ++ if (DEBUG_BREAK()) { ++ if (M.x86.saved_ip != breakpoint) { ++ return; ++ } ++ else { ++ M.x86.debug &= ~DEBUG_DECODE_NOPRINT_F; ++ M.x86.debug |= DEBUG_TRACE_F; ++ M.x86.debug &= ~DEBUG_BREAK_F; ++ print_decoded_instruction(); ++ X86EMU_trace_regs(); ++ } ++ } ++ done = 0; ++ offset = M.x86.saved_ip; + while (!done) { + printk("-"); + p = fgets(s, 1023, stdin); + cmd = parse_line(s, ps, &ntok); +- switch(cmd) { +- case 'u': +- disassemble_forward(M.x86.saved_cs,(u16)offset,10); ++ switch (cmd) { ++ case 'u': ++ disassemble_forward(M.x86.saved_cs, (u16) offset, 10); + break; +- case 'd': +- if (ntok == 2) { +- segment = M.x86.saved_cs; +- offset = ps[1]; +- X86EMU_dump_memory(segment,(u16)offset,16); +- offset += 16; +- } else if (ntok == 3) { +- segment = ps[1]; +- offset = ps[2]; +- X86EMU_dump_memory(segment,(u16)offset,16); +- offset += 16; +- } else { +- segment = M.x86.saved_cs; +- X86EMU_dump_memory(segment,(u16)offset,16); +- offset += 16; +- } ++ case 'd': ++ if (ntok == 2) { ++ segment = M.x86.saved_cs; ++ offset = ps[1]; ++ X86EMU_dump_memory(segment, (u16) offset, 16); ++ offset += 16; ++ } ++ else if (ntok == 3) { ++ segment = ps[1]; ++ offset = ps[2]; ++ X86EMU_dump_memory(segment, (u16) offset, 16); ++ offset += 16; ++ } ++ else { ++ segment = M.x86.saved_cs; ++ X86EMU_dump_memory(segment, (u16) offset, 16); ++ offset += 16; ++ } + break; +- case 'c': +- M.x86.debug ^= DEBUG_TRACECALL_F; ++ case 'c': ++ M.x86.debug ^= DEBUG_TRACECALL_F; + break; +- case 's': +- M.x86.debug ^= DEBUG_SVC_F | DEBUG_SYS_F | DEBUG_SYSINT_F; ++ case 's': ++ M.x86.debug ^= DEBUG_SVC_F | DEBUG_SYS_F | DEBUG_SYSINT_F; + break; +- case 'r': +- X86EMU_trace_regs(); ++ case 'r': ++ X86EMU_trace_regs(); + break; +- case 'x': +- X86EMU_trace_xregs(); ++ case 'x': ++ X86EMU_trace_xregs(); + break; +- case 'g': ++ case 'g': + if (ntok == 2) { + breakpoint = ps[1]; +- if (noDecode) { +- M.x86.debug |= DEBUG_DECODE_NOPRINT_F; +- } else { +- M.x86.debug &= ~DEBUG_DECODE_NOPRINT_F; +- } +- M.x86.debug &= ~DEBUG_TRACE_F; +- M.x86.debug |= DEBUG_BREAK_F; +- done = 1; ++ if (noDecode) { ++ M.x86.debug |= DEBUG_DECODE_NOPRINT_F; ++ } ++ else { ++ M.x86.debug &= ~DEBUG_DECODE_NOPRINT_F; ++ } ++ M.x86.debug &= ~DEBUG_TRACE_F; ++ M.x86.debug |= DEBUG_BREAK_F; ++ done = 1; + } + break; +- case 'q': +- M.x86.debug |= DEBUG_EXIT; +- return; +- case 'P': +- noDecode = (noDecode)?0:1; +- printk("Toggled decoding to %s\n",(noDecode)?"FALSE":"TRUE"); +- break; +- case 't': +- case 0: ++ case 'q': ++ M.x86.debug |= DEBUG_EXIT; ++ return; ++ case 'P': ++ noDecode = (noDecode) ? 0 : 1; ++ printk("Toggled decoding to %s\n", (noDecode) ? "FALSE" : "TRUE"); ++ break; ++ case 't': ++ case 0: + done = 1; + break; +- } ++ } + } + } + +-int X86EMU_trace_on(void) ++int ++X86EMU_trace_on(void) + { +- return M.x86.debug |= DEBUG_STEP_F | DEBUG_DECODE_F | DEBUG_TRACE_F; ++ return M.x86.debug |= DEBUG_STEP_F | DEBUG_DECODE_F | DEBUG_TRACE_F; + } + +-int X86EMU_trace_off(void) ++int ++X86EMU_trace_off(void) + { +- return M.x86.debug &= ~(DEBUG_STEP_F | DEBUG_DECODE_F | DEBUG_TRACE_F); ++ return M.x86.debug &= ~(DEBUG_STEP_F | DEBUG_DECODE_F | DEBUG_TRACE_F); + } + +-static int parse_line (char *s, int *ps, int *n) ++static int ++parse_line(char *s, int *ps, int *n) + { + int cmd; + + *n = 0; +- while(*s == ' ' || *s == '\t') s++; ++ while (*s == ' ' || *s == '\t') ++ s++; + ps[*n] = *s; + switch (*s) { +- case '\n': ++ case '\n': + *n += 1; + return 0; +- default: ++ default: + cmd = *s; + *n += 1; + } + +- while (1) { +- while (*s != ' ' && *s != '\t' && *s != '\n') s++; +- +- if (*s == '\n') +- return cmd; +- +- while(*s == ' ' || *s == '\t') s++; +- +- sscanf(s,"%x",&ps[*n]); +- *n += 1; +- } ++ while (1) { ++ while (*s != ' ' && *s != '\t' && *s != '\n') ++ s++; ++ ++ if (*s == '\n') ++ return cmd; ++ ++ while (*s == ' ' || *s == '\t') ++ s++; ++ ++ sscanf(s, "%x", &ps[*n]); ++ *n += 1; ++ } + } + +-#endif /* DEBUG */ ++#endif /* DEBUG */ + +-void x86emu_dump_regs (void) ++void ++x86emu_dump_regs(void) + { +- printk("\tAX=%04x ", M.x86.R_AX ); +- printk("BX=%04x ", M.x86.R_BX ); +- printk("CX=%04x ", M.x86.R_CX ); +- printk("DX=%04x ", M.x86.R_DX ); +- printk("SP=%04x ", M.x86.R_SP ); +- printk("BP=%04x ", M.x86.R_BP ); +- printk("SI=%04x ", M.x86.R_SI ); +- printk("DI=%04x\n", M.x86.R_DI ); +- printk("\tDS=%04x ", M.x86.R_DS ); +- printk("ES=%04x ", M.x86.R_ES ); +- printk("SS=%04x ", M.x86.R_SS ); +- printk("CS=%04x ", M.x86.R_CS ); +- printk("IP=%04x ", M.x86.R_IP ); +- if (ACCESS_FLAG(F_OF)) printk("OV "); /* CHECKED... */ +- else printk("NV "); +- if (ACCESS_FLAG(F_DF)) printk("DN "); +- else printk("UP "); +- if (ACCESS_FLAG(F_IF)) printk("EI "); +- else printk("DI "); +- if (ACCESS_FLAG(F_SF)) printk("NG "); +- else printk("PL "); +- if (ACCESS_FLAG(F_ZF)) printk("ZR "); +- else printk("NZ "); +- if (ACCESS_FLAG(F_AF)) printk("AC "); +- else printk("NA "); +- if (ACCESS_FLAG(F_PF)) printk("PE "); +- else printk("PO "); +- if (ACCESS_FLAG(F_CF)) printk("CY "); +- else printk("NC "); +- printk("\n"); ++ printk("\tAX=%04x ", M.x86.R_AX); ++ printk("BX=%04x ", M.x86.R_BX); ++ printk("CX=%04x ", M.x86.R_CX); ++ printk("DX=%04x ", M.x86.R_DX); ++ printk("SP=%04x ", M.x86.R_SP); ++ printk("BP=%04x ", M.x86.R_BP); ++ printk("SI=%04x ", M.x86.R_SI); ++ printk("DI=%04x\n", M.x86.R_DI); ++ printk("\tDS=%04x ", M.x86.R_DS); ++ printk("ES=%04x ", M.x86.R_ES); ++ printk("SS=%04x ", M.x86.R_SS); ++ printk("CS=%04x ", M.x86.R_CS); ++ printk("IP=%04x ", M.x86.R_IP); ++ if (ACCESS_FLAG(F_OF)) ++ printk("OV "); /* CHECKED... */ ++ else ++ printk("NV "); ++ if (ACCESS_FLAG(F_DF)) ++ printk("DN "); ++ else ++ printk("UP "); ++ if (ACCESS_FLAG(F_IF)) ++ printk("EI "); ++ else ++ printk("DI "); ++ if (ACCESS_FLAG(F_SF)) ++ printk("NG "); ++ else ++ printk("PL "); ++ if (ACCESS_FLAG(F_ZF)) ++ printk("ZR "); ++ else ++ printk("NZ "); ++ if (ACCESS_FLAG(F_AF)) ++ printk("AC "); ++ else ++ printk("NA "); ++ if (ACCESS_FLAG(F_PF)) ++ printk("PE "); ++ else ++ printk("PO "); ++ if (ACCESS_FLAG(F_CF)) ++ printk("CY "); ++ else ++ printk("NC "); ++ printk("\n"); + } + +-void x86emu_dump_xregs (void) ++void ++x86emu_dump_xregs(void) + { +- printk("\tEAX=%08x ", M.x86.R_EAX ); +- printk("EBX=%08x ", M.x86.R_EBX ); +- printk("ECX=%08x ", M.x86.R_ECX ); +- printk("EDX=%08x \n", M.x86.R_EDX ); +- printk("\tESP=%08x ", M.x86.R_ESP ); +- printk("EBP=%08x ", M.x86.R_EBP ); +- printk("ESI=%08x ", M.x86.R_ESI ); +- printk("EDI=%08x\n", M.x86.R_EDI ); +- printk("\tDS=%04x ", M.x86.R_DS ); +- printk("ES=%04x ", M.x86.R_ES ); +- printk("SS=%04x ", M.x86.R_SS ); +- printk("CS=%04x ", M.x86.R_CS ); +- printk("EIP=%08x\n\t", M.x86.R_EIP ); +- if (ACCESS_FLAG(F_OF)) printk("OV "); /* CHECKED... */ +- else printk("NV "); +- if (ACCESS_FLAG(F_DF)) printk("DN "); +- else printk("UP "); +- if (ACCESS_FLAG(F_IF)) printk("EI "); +- else printk("DI "); +- if (ACCESS_FLAG(F_SF)) printk("NG "); +- else printk("PL "); +- if (ACCESS_FLAG(F_ZF)) printk("ZR "); +- else printk("NZ "); +- if (ACCESS_FLAG(F_AF)) printk("AC "); +- else printk("NA "); +- if (ACCESS_FLAG(F_PF)) printk("PE "); +- else printk("PO "); +- if (ACCESS_FLAG(F_CF)) printk("CY "); +- else printk("NC "); +- printk("\n"); ++ printk("\tEAX=%08x ", M.x86.R_EAX); ++ printk("EBX=%08x ", M.x86.R_EBX); ++ printk("ECX=%08x ", M.x86.R_ECX); ++ printk("EDX=%08x \n", M.x86.R_EDX); ++ printk("\tESP=%08x ", M.x86.R_ESP); ++ printk("EBP=%08x ", M.x86.R_EBP); ++ printk("ESI=%08x ", M.x86.R_ESI); ++ printk("EDI=%08x\n", M.x86.R_EDI); ++ printk("\tDS=%04x ", M.x86.R_DS); ++ printk("ES=%04x ", M.x86.R_ES); ++ printk("SS=%04x ", M.x86.R_SS); ++ printk("CS=%04x ", M.x86.R_CS); ++ printk("EIP=%08x\n\t", M.x86.R_EIP); ++ if (ACCESS_FLAG(F_OF)) ++ printk("OV "); /* CHECKED... */ ++ else ++ printk("NV "); ++ if (ACCESS_FLAG(F_DF)) ++ printk("DN "); ++ else ++ printk("UP "); ++ if (ACCESS_FLAG(F_IF)) ++ printk("EI "); ++ else ++ printk("DI "); ++ if (ACCESS_FLAG(F_SF)) ++ printk("NG "); ++ else ++ printk("PL "); ++ if (ACCESS_FLAG(F_ZF)) ++ printk("ZR "); ++ else ++ printk("NZ "); ++ if (ACCESS_FLAG(F_AF)) ++ printk("AC "); ++ else ++ printk("NA "); ++ if (ACCESS_FLAG(F_PF)) ++ printk("PE "); ++ else ++ printk("PO "); ++ if (ACCESS_FLAG(F_CF)) ++ printk("CY "); ++ else ++ printk("NC "); ++ printk("\n"); + } +diff --git a/libs/x86emu/decode.c b/libs/x86emu/decode.c +index 7d9a34a..12f8fb8 100644 +--- a/libs/x86emu/decode.c ++++ b/libs/x86emu/decode.c +@@ -46,25 +46,27 @@ + REMARKS: + Handles any pending asychronous interrupts. + ****************************************************************************/ +-static void x86emu_intr_handle(void) ++static void ++x86emu_intr_handle(void) + { +- u8 intno; +- +- if (M.x86.intr & INTR_SYNCH) { +- intno = M.x86.intno; +- if (_X86EMU_intrTab[intno]) { +- (*_X86EMU_intrTab[intno])(intno); +- } else { +- push_word((u16)M.x86.R_FLG); +- CLEAR_FLAG(F_IF); +- CLEAR_FLAG(F_TF); +- push_word(M.x86.R_CS); +- M.x86.R_CS = mem_access_word(intno * 4 + 2); +- push_word(M.x86.R_IP); +- M.x86.R_IP = mem_access_word(intno * 4); +- M.x86.intr = 0; +- } +- } ++ u8 intno; ++ ++ if (M.x86.intr & INTR_SYNCH) { ++ intno = M.x86.intno; ++ if (_X86EMU_intrTab[intno]) { ++ (*_X86EMU_intrTab[intno]) (intno); ++ } ++ else { ++ push_word((u16) M.x86.R_FLG); ++ CLEAR_FLAG(F_IF); ++ CLEAR_FLAG(F_TF); ++ push_word(M.x86.R_CS); ++ M.x86.R_CS = mem_access_word(intno * 4 + 2); ++ push_word(M.x86.R_IP); ++ M.x86.R_IP = mem_access_word(intno * 4); ++ M.x86.intr = 0; ++ } ++ } + } + + /**************************************************************************** +@@ -75,11 +77,11 @@ REMARKS: + Raise the specified interrupt to be handled before the execution of the + next instruction. + ****************************************************************************/ +-void x86emu_intr_raise( +- u8 intrnum) ++void ++x86emu_intr_raise(u8 intrnum) + { +- M.x86.intno = intrnum; +- M.x86.intr |= INTR_SYNCH; ++ M.x86.intno = intrnum; ++ M.x86.intr |= INTR_SYNCH; + } + + /**************************************************************************** +@@ -88,39 +90,39 @@ Main execution loop for the emulator. We return from here when the system + halts, which is normally caused by a stack fault when we return from the + original real mode call. + ****************************************************************************/ +-void X86EMU_exec(void) ++void ++X86EMU_exec(void) + { +- u8 op1; +- +- M.x86.intr = 0; +- DB(x86emu_end_instr();) +- +- for (;;) { +-DB( if (CHECK_IP_FETCH()) +- x86emu_check_ip_access();) +- /* If debugging, save the IP and CS values. */ +- SAVE_IP_CS(M.x86.R_CS, M.x86.R_IP); +- INC_DECODED_INST_LEN(1); +- if (M.x86.intr) { +- if (M.x86.intr & INTR_HALTED) { +-DB( if (M.x86.R_SP != 0) { +- printk("halted\n"); +- X86EMU_trace_regs(); +- } +- else { +- if (M.x86.debug) +- printk("Service completed successfully\n"); +- }) +- return; ++ u8 op1; ++ ++ M.x86.intr = 0; ++ DB(x86emu_end_instr(); ++ ) ++ ++ for (;;) { ++ DB(if (CHECK_IP_FETCH()) ++ x86emu_check_ip_access();) ++ /* If debugging, save the IP and CS values. */ ++ SAVE_IP_CS(M.x86.R_CS, M.x86.R_IP); ++ INC_DECODED_INST_LEN(1); ++ if (M.x86.intr) { ++ if (M.x86.intr & INTR_HALTED) { ++ DB(if (M.x86.R_SP != 0) { ++ printk("halted\n"); X86EMU_trace_regs();} ++ else { ++ if (M.x86.debug) ++ printk("Service completed successfully\n");} ++ ) ++ return; + } +- if (((M.x86.intr & INTR_SYNCH) && (M.x86.intno == 0 || M.x86.intno == 2)) || +- !ACCESS_FLAG(F_IF)) { +- x86emu_intr_handle(); +- } +- } +- +- op1 = (*sys_rdb)(((u32)M.x86.R_CS << 4) + (M.x86.R_IP++)); +- (*x86emu_optab[op1])(op1); ++ if (((M.x86.intr & INTR_SYNCH) && ++ (M.x86.intno == 0 || M.x86.intno == 2)) || ++ !ACCESS_FLAG(F_IF)) { ++ x86emu_intr_handle(); ++ } ++ } ++ op1 = (*sys_rdb) (((u32) M.x86.R_CS << 4) + (M.x86.R_IP++)); ++ (*x86emu_optab[op1]) (op1); + if (M.x86.debug & DEBUG_EXIT) { + M.x86.debug &= ~DEBUG_EXIT; + return; +@@ -132,9 +134,10 @@ DB( if (M.x86.R_SP != 0) { + REMARKS: + Halts the system by setting the halted system flag. + ****************************************************************************/ +-void X86EMU_halt_sys(void) ++void ++X86EMU_halt_sys(void) + { +- M.x86.intr |= INTR_HALTED; ++ M.x86.intr |= INTR_HALTED; + } + + /**************************************************************************** +@@ -149,19 +152,17 @@ next instruction. + + NOTE: Do not inline this function, as (*sys_rdb) is already inline! + ****************************************************************************/ +-void fetch_decode_modrm( +- int *mod, +- int *regh, +- int *regl) ++void ++fetch_decode_modrm(int *mod, int *regh, int *regl) + { +- int fetched; +- +-DB( if (CHECK_IP_FETCH()) +- x86emu_check_ip_access();) +- fetched = (*sys_rdb)(((u32)M.x86.R_CS << 4) + (M.x86.R_IP++)); +- INC_DECODED_INST_LEN(1); +- *mod = (fetched >> 6) & 0x03; +- *regh = (fetched >> 3) & 0x07; ++ int fetched; ++ ++ DB(if (CHECK_IP_FETCH()) ++ x86emu_check_ip_access();) ++ fetched = (*sys_rdb) (((u32) M.x86.R_CS << 4) + (M.x86.R_IP++)); ++ INC_DECODED_INST_LEN(1); ++ *mod = (fetched >> 6) & 0x03; ++ *regh = (fetched >> 3) & 0x07; + *regl = (fetched >> 0) & 0x07; + } + +@@ -175,15 +176,16 @@ moves the instruction pointer to the next value. + + NOTE: Do not inline this function, as (*sys_rdb) is already inline! + ****************************************************************************/ +-u8 fetch_byte_imm(void) ++u8 ++fetch_byte_imm(void) + { +- u8 fetched; ++ u8 fetched; + +-DB( if (CHECK_IP_FETCH()) +- x86emu_check_ip_access();) +- fetched = (*sys_rdb)(((u32)M.x86.R_CS << 4) + (M.x86.R_IP++)); +- INC_DECODED_INST_LEN(1); +- return fetched; ++ DB(if (CHECK_IP_FETCH()) ++ x86emu_check_ip_access();) ++ fetched = (*sys_rdb) (((u32) M.x86.R_CS << 4) + (M.x86.R_IP++)); ++ INC_DECODED_INST_LEN(1); ++ return fetched; + } + + /**************************************************************************** +@@ -196,16 +198,17 @@ moves the instruction pointer to the next value. + + NOTE: Do not inline this function, as (*sys_rdw) is already inline! + ****************************************************************************/ +-u16 fetch_word_imm(void) ++u16 ++fetch_word_imm(void) + { +- u16 fetched; +- +-DB( if (CHECK_IP_FETCH()) +- x86emu_check_ip_access();) +- fetched = (*sys_rdw)(((u32)M.x86.R_CS << 4) + (M.x86.R_IP)); +- M.x86.R_IP += 2; +- INC_DECODED_INST_LEN(2); +- return fetched; ++ u16 fetched; ++ ++ DB(if (CHECK_IP_FETCH()) ++ x86emu_check_ip_access();) ++ fetched = (*sys_rdw) (((u32) M.x86.R_CS << 4) + (M.x86.R_IP)); ++ M.x86.R_IP += 2; ++ INC_DECODED_INST_LEN(2); ++ return fetched; + } + + /**************************************************************************** +@@ -218,16 +221,17 @@ moves the instruction pointer to the next value. + + NOTE: Do not inline this function, as (*sys_rdw) is already inline! + ****************************************************************************/ +-u32 fetch_long_imm(void) ++u32 ++fetch_long_imm(void) + { +- u32 fetched; +- +-DB( if (CHECK_IP_FETCH()) +- x86emu_check_ip_access();) +- fetched = (*sys_rdl)(((u32)M.x86.R_CS << 4) + (M.x86.R_IP)); +- M.x86.R_IP += 4; +- INC_DECODED_INST_LEN(4); +- return fetched; ++ u32 fetched; ++ ++ DB(if (CHECK_IP_FETCH()) ++ x86emu_check_ip_access();) ++ fetched = (*sys_rdl) (((u32) M.x86.R_CS << 4) + (M.x86.R_IP)); ++ M.x86.R_IP += 4; ++ INC_DECODED_INST_LEN(4); ++ return fetched; + } + + /**************************************************************************** +@@ -259,38 +263,39 @@ cpu-state-varible M.x86.mode. There are several potential states: + + Each of the above 7 items are handled with a bit in the mode field. + ****************************************************************************/ +-_INLINE u32 get_data_segment(void) ++_INLINE u32 ++get_data_segment(void) + { + #define GET_SEGMENT(segment) +- switch (M.x86.mode & SYSMODE_SEGMASK) { +- case 0: /* default case: use ds register */ +- case SYSMODE_SEGOVR_DS: +- case SYSMODE_SEGOVR_DS | SYSMODE_SEG_DS_SS: +- return M.x86.R_DS; +- case SYSMODE_SEG_DS_SS: /* non-overridden, use ss register */ +- return M.x86.R_SS; +- case SYSMODE_SEGOVR_CS: +- case SYSMODE_SEGOVR_CS | SYSMODE_SEG_DS_SS: +- return M.x86.R_CS; +- case SYSMODE_SEGOVR_ES: +- case SYSMODE_SEGOVR_ES | SYSMODE_SEG_DS_SS: +- return M.x86.R_ES; +- case SYSMODE_SEGOVR_FS: +- case SYSMODE_SEGOVR_FS | SYSMODE_SEG_DS_SS: +- return M.x86.R_FS; +- case SYSMODE_SEGOVR_GS: +- case SYSMODE_SEGOVR_GS | SYSMODE_SEG_DS_SS: +- return M.x86.R_GS; +- case SYSMODE_SEGOVR_SS: +- case SYSMODE_SEGOVR_SS | SYSMODE_SEG_DS_SS: +- return M.x86.R_SS; +- default: ++ switch (M.x86.mode & SYSMODE_SEGMASK) { ++ case 0: /* default case: use ds register */ ++ case SYSMODE_SEGOVR_DS: ++ case SYSMODE_SEGOVR_DS | SYSMODE_SEG_DS_SS: ++ return M.x86.R_DS; ++ case SYSMODE_SEG_DS_SS: /* non-overridden, use ss register */ ++ return M.x86.R_SS; ++ case SYSMODE_SEGOVR_CS: ++ case SYSMODE_SEGOVR_CS | SYSMODE_SEG_DS_SS: ++ return M.x86.R_CS; ++ case SYSMODE_SEGOVR_ES: ++ case SYSMODE_SEGOVR_ES | SYSMODE_SEG_DS_SS: ++ return M.x86.R_ES; ++ case SYSMODE_SEGOVR_FS: ++ case SYSMODE_SEGOVR_FS | SYSMODE_SEG_DS_SS: ++ return M.x86.R_FS; ++ case SYSMODE_SEGOVR_GS: ++ case SYSMODE_SEGOVR_GS | SYSMODE_SEG_DS_SS: ++ return M.x86.R_GS; ++ case SYSMODE_SEGOVR_SS: ++ case SYSMODE_SEGOVR_SS | SYSMODE_SEG_DS_SS: ++ return M.x86.R_SS; ++ default: + #ifdef DEBUG +- printk("error: should not happen: multiple overrides.\n"); ++ printk("error: should not happen: multiple overrides.\n"); + #endif +- HALT_SYS(); +- return 0; +- } ++ HALT_SYS(); ++ return 0; ++ } + } + + /**************************************************************************** +@@ -302,14 +307,14 @@ Byte value read from the absolute memory location. + + NOTE: Do not inline this function as (*sys_rdX) is already inline! + ****************************************************************************/ +-u8 fetch_data_byte( +- uint offset) ++u8 ++fetch_data_byte(uint offset) + { + #ifdef DEBUG +- if (CHECK_DATA_ACCESS()) +- x86emu_check_data_access((u16)get_data_segment(), offset); ++ if (CHECK_DATA_ACCESS()) ++ x86emu_check_data_access((u16) get_data_segment(), offset); + #endif +- return (*sys_rdb)((get_data_segment() << 4) + offset); ++ return (*sys_rdb) ((get_data_segment() << 4) + offset); + } + + /**************************************************************************** +@@ -321,14 +326,14 @@ Word value read from the absolute memory location. + + NOTE: Do not inline this function as (*sys_rdX) is already inline! + ****************************************************************************/ +-u16 fetch_data_word( +- uint offset) ++u16 ++fetch_data_word(uint offset) + { + #ifdef DEBUG +- if (CHECK_DATA_ACCESS()) +- x86emu_check_data_access((u16)get_data_segment(), offset); ++ if (CHECK_DATA_ACCESS()) ++ x86emu_check_data_access((u16) get_data_segment(), offset); + #endif +- return (*sys_rdw)((get_data_segment() << 4) + offset); ++ return (*sys_rdw) ((get_data_segment() << 4) + offset); + } + + /**************************************************************************** +@@ -340,14 +345,14 @@ Long value read from the absolute memory location. + + NOTE: Do not inline this function as (*sys_rdX) is already inline! + ****************************************************************************/ +-u32 fetch_data_long( +- uint offset) ++u32 ++fetch_data_long(uint offset) + { + #ifdef DEBUG +- if (CHECK_DATA_ACCESS()) +- x86emu_check_data_access((u16)get_data_segment(), offset); ++ if (CHECK_DATA_ACCESS()) ++ x86emu_check_data_access((u16) get_data_segment(), offset); + #endif +- return (*sys_rdl)((get_data_segment() << 4) + offset); ++ return (*sys_rdl) ((get_data_segment() << 4) + offset); + } + + /**************************************************************************** +@@ -360,15 +365,14 @@ Byte value read from the absolute memory location. + + NOTE: Do not inline this function as (*sys_rdX) is already inline! + ****************************************************************************/ +-u8 fetch_data_byte_abs( +- uint segment, +- uint offset) ++u8 ++fetch_data_byte_abs(uint segment, uint offset) + { + #ifdef DEBUG +- if (CHECK_DATA_ACCESS()) +- x86emu_check_data_access(segment, offset); ++ if (CHECK_DATA_ACCESS()) ++ x86emu_check_data_access(segment, offset); + #endif +- return (*sys_rdb)(((u32)segment << 4) + offset); ++ return (*sys_rdb) (((u32) segment << 4) + offset); + } + + /**************************************************************************** +@@ -381,15 +385,14 @@ Word value read from the absolute memory location. + + NOTE: Do not inline this function as (*sys_rdX) is already inline! + ****************************************************************************/ +-u16 fetch_data_word_abs( +- uint segment, +- uint offset) ++u16 ++fetch_data_word_abs(uint segment, uint offset) + { + #ifdef DEBUG +- if (CHECK_DATA_ACCESS()) +- x86emu_check_data_access(segment, offset); ++ if (CHECK_DATA_ACCESS()) ++ x86emu_check_data_access(segment, offset); + #endif +- return (*sys_rdw)(((u32)segment << 4) + offset); ++ return (*sys_rdw) (((u32) segment << 4) + offset); + } + + /**************************************************************************** +@@ -402,15 +405,14 @@ Long value read from the absolute memory location. + + NOTE: Do not inline this function as (*sys_rdX) is already inline! + ****************************************************************************/ +-u32 fetch_data_long_abs( +- uint segment, +- uint offset) ++u32 ++fetch_data_long_abs(uint segment, uint offset) + { + #ifdef DEBUG +- if (CHECK_DATA_ACCESS()) +- x86emu_check_data_access(segment, offset); ++ if (CHECK_DATA_ACCESS()) ++ x86emu_check_data_access(segment, offset); + #endif +- return (*sys_rdl)(((u32)segment << 4) + offset); ++ return (*sys_rdl) (((u32) segment << 4) + offset); + } + + /**************************************************************************** +@@ -424,15 +426,14 @@ the current 'default' segment, which may have been overridden. + + NOTE: Do not inline this function as (*sys_wrX) is already inline! + ****************************************************************************/ +-void store_data_byte( +- uint offset, +- u8 val) ++void ++store_data_byte(uint offset, u8 val) + { + #ifdef DEBUG +- if (CHECK_DATA_ACCESS()) +- x86emu_check_data_access((u16)get_data_segment(), offset); ++ if (CHECK_DATA_ACCESS()) ++ x86emu_check_data_access((u16) get_data_segment(), offset); + #endif +- (*sys_wrb)((get_data_segment() << 4) + offset, val); ++ (*sys_wrb) ((get_data_segment() << 4) + offset, val); + } + + /**************************************************************************** +@@ -446,15 +447,14 @@ the current 'default' segment, which may have been overridden. + + NOTE: Do not inline this function as (*sys_wrX) is already inline! + ****************************************************************************/ +-void store_data_word( +- uint offset, +- u16 val) ++void ++store_data_word(uint offset, u16 val) + { + #ifdef DEBUG +- if (CHECK_DATA_ACCESS()) +- x86emu_check_data_access((u16)get_data_segment(), offset); ++ if (CHECK_DATA_ACCESS()) ++ x86emu_check_data_access((u16) get_data_segment(), offset); + #endif +- (*sys_wrw)((get_data_segment() << 4) + offset, val); ++ (*sys_wrw) ((get_data_segment() << 4) + offset, val); + } + + /**************************************************************************** +@@ -468,15 +468,14 @@ the current 'default' segment, which may have been overridden. + + NOTE: Do not inline this function as (*sys_wrX) is already inline! + ****************************************************************************/ +-void store_data_long( +- uint offset, +- u32 val) ++void ++store_data_long(uint offset, u32 val) + { + #ifdef DEBUG +- if (CHECK_DATA_ACCESS()) +- x86emu_check_data_access((u16)get_data_segment(), offset); ++ if (CHECK_DATA_ACCESS()) ++ x86emu_check_data_access((u16) get_data_segment(), offset); + #endif +- (*sys_wrl)((get_data_segment() << 4) + offset, val); ++ (*sys_wrl) ((get_data_segment() << 4) + offset, val); + } + + /**************************************************************************** +@@ -490,16 +489,14 @@ Writes a byte value to an absolute memory location. + + NOTE: Do not inline this function as (*sys_wrX) is already inline! + ****************************************************************************/ +-void store_data_byte_abs( +- uint segment, +- uint offset, +- u8 val) ++void ++store_data_byte_abs(uint segment, uint offset, u8 val) + { + #ifdef DEBUG +- if (CHECK_DATA_ACCESS()) +- x86emu_check_data_access(segment, offset); ++ if (CHECK_DATA_ACCESS()) ++ x86emu_check_data_access(segment, offset); + #endif +- (*sys_wrb)(((u32)segment << 4) + offset, val); ++ (*sys_wrb) (((u32) segment << 4) + offset, val); + } + + /**************************************************************************** +@@ -513,16 +510,14 @@ Writes a word value to an absolute memory location. + + NOTE: Do not inline this function as (*sys_wrX) is already inline! + ****************************************************************************/ +-void store_data_word_abs( +- uint segment, +- uint offset, +- u16 val) ++void ++store_data_word_abs(uint segment, uint offset, u16 val) + { + #ifdef DEBUG +- if (CHECK_DATA_ACCESS()) +- x86emu_check_data_access(segment, offset); ++ if (CHECK_DATA_ACCESS()) ++ x86emu_check_data_access(segment, offset); + #endif +- (*sys_wrw)(((u32)segment << 4) + offset, val); ++ (*sys_wrw) (((u32) segment << 4) + offset, val); + } + + /**************************************************************************** +@@ -536,16 +531,14 @@ Writes a long value to an absolute memory location. + + NOTE: Do not inline this function as (*sys_wrX) is already inline! + ****************************************************************************/ +-void store_data_long_abs( +- uint segment, +- uint offset, +- u32 val) ++void ++store_data_long_abs(uint segment, uint offset, u32 val) + { + #ifdef DEBUG +- if (CHECK_DATA_ACCESS()) +- x86emu_check_data_access(segment, offset); ++ if (CHECK_DATA_ACCESS()) ++ x86emu_check_data_access(segment, offset); + #endif +- (*sys_wrl)(((u32)segment << 4) + offset, val); ++ (*sys_wrl) (((u32) segment << 4) + offset, val); + } + + /**************************************************************************** +@@ -559,37 +552,37 @@ REMARKS: + Return a pointer to the register given by the R/RM field of the + modrm byte, for byte operands. Also enables the decoding of instructions. + ****************************************************************************/ +-u8* decode_rm_byte_register( +- int reg) ++u8 * ++decode_rm_byte_register(int reg) + { +- switch (reg) { +- case 0: +- DECODE_PRINTF("AL"); +- return &M.x86.R_AL; +- case 1: +- DECODE_PRINTF("CL"); +- return &M.x86.R_CL; +- case 2: +- DECODE_PRINTF("DL"); +- return &M.x86.R_DL; +- case 3: +- DECODE_PRINTF("BL"); +- return &M.x86.R_BL; +- case 4: +- DECODE_PRINTF("AH"); +- return &M.x86.R_AH; +- case 5: +- DECODE_PRINTF("CH"); +- return &M.x86.R_CH; +- case 6: +- DECODE_PRINTF("DH"); +- return &M.x86.R_DH; +- case 7: +- DECODE_PRINTF("BH"); +- return &M.x86.R_BH; +- } +- HALT_SYS(); +- return NULL; /* NOT REACHED OR REACHED ON ERROR */ ++ switch (reg) { ++ case 0: ++ DECODE_PRINTF("AL"); ++ return &M.x86.R_AL; ++ case 1: ++ DECODE_PRINTF("CL"); ++ return &M.x86.R_CL; ++ case 2: ++ DECODE_PRINTF("DL"); ++ return &M.x86.R_DL; ++ case 3: ++ DECODE_PRINTF("BL"); ++ return &M.x86.R_BL; ++ case 4: ++ DECODE_PRINTF("AH"); ++ return &M.x86.R_AH; ++ case 5: ++ DECODE_PRINTF("CH"); ++ return &M.x86.R_CH; ++ case 6: ++ DECODE_PRINTF("DH"); ++ return &M.x86.R_DH; ++ case 7: ++ DECODE_PRINTF("BH"); ++ return &M.x86.R_BH; ++ } ++ HALT_SYS(); ++ return NULL; /* NOT REACHED OR REACHED ON ERROR */ + } + + /**************************************************************************** +@@ -603,36 +596,36 @@ REMARKS: + Return a pointer to the register given by the R/RM field of the + modrm byte, for word operands. Also enables the decoding of instructions. + ****************************************************************************/ +-u16* decode_rm_word_register( +- int reg) ++u16 * ++decode_rm_word_register(int reg) + { +- switch (reg) { +- case 0: +- DECODE_PRINTF("AX"); +- return &M.x86.R_AX; +- case 1: +- DECODE_PRINTF("CX"); +- return &M.x86.R_CX; +- case 2: +- DECODE_PRINTF("DX"); +- return &M.x86.R_DX; +- case 3: +- DECODE_PRINTF("BX"); +- return &M.x86.R_BX; +- case 4: +- DECODE_PRINTF("SP"); +- return &M.x86.R_SP; +- case 5: +- DECODE_PRINTF("BP"); +- return &M.x86.R_BP; +- case 6: +- DECODE_PRINTF("SI"); +- return &M.x86.R_SI; +- case 7: +- DECODE_PRINTF("DI"); +- return &M.x86.R_DI; +- } +- HALT_SYS(); ++ switch (reg) { ++ case 0: ++ DECODE_PRINTF("AX"); ++ return &M.x86.R_AX; ++ case 1: ++ DECODE_PRINTF("CX"); ++ return &M.x86.R_CX; ++ case 2: ++ DECODE_PRINTF("DX"); ++ return &M.x86.R_DX; ++ case 3: ++ DECODE_PRINTF("BX"); ++ return &M.x86.R_BX; ++ case 4: ++ DECODE_PRINTF("SP"); ++ return &M.x86.R_SP; ++ case 5: ++ DECODE_PRINTF("BP"); ++ return &M.x86.R_BP; ++ case 6: ++ DECODE_PRINTF("SI"); ++ return &M.x86.R_SI; ++ case 7: ++ DECODE_PRINTF("DI"); ++ return &M.x86.R_DI; ++ } ++ HALT_SYS(); + return NULL; /* NOTREACHED OR REACHED ON ERROR */ + } + +@@ -647,36 +640,36 @@ REMARKS: + Return a pointer to the register given by the R/RM field of the + modrm byte, for dword operands. Also enables the decoding of instructions. + ****************************************************************************/ +-u32* decode_rm_long_register( +- int reg) ++u32 * ++decode_rm_long_register(int reg) + { + switch (reg) { +- case 0: +- DECODE_PRINTF("EAX"); +- return &M.x86.R_EAX; +- case 1: +- DECODE_PRINTF("ECX"); +- return &M.x86.R_ECX; +- case 2: +- DECODE_PRINTF("EDX"); +- return &M.x86.R_EDX; +- case 3: +- DECODE_PRINTF("EBX"); +- return &M.x86.R_EBX; +- case 4: +- DECODE_PRINTF("ESP"); +- return &M.x86.R_ESP; +- case 5: +- DECODE_PRINTF("EBP"); +- return &M.x86.R_EBP; +- case 6: +- DECODE_PRINTF("ESI"); +- return &M.x86.R_ESI; +- case 7: +- DECODE_PRINTF("EDI"); +- return &M.x86.R_EDI; +- } +- HALT_SYS(); ++ case 0: ++ DECODE_PRINTF("EAX"); ++ return &M.x86.R_EAX; ++ case 1: ++ DECODE_PRINTF("ECX"); ++ return &M.x86.R_ECX; ++ case 2: ++ DECODE_PRINTF("EDX"); ++ return &M.x86.R_EDX; ++ case 3: ++ DECODE_PRINTF("EBX"); ++ return &M.x86.R_EBX; ++ case 4: ++ DECODE_PRINTF("ESP"); ++ return &M.x86.R_ESP; ++ case 5: ++ DECODE_PRINTF("EBP"); ++ return &M.x86.R_EBP; ++ case 6: ++ DECODE_PRINTF("ESI"); ++ return &M.x86.R_ESI; ++ case 7: ++ DECODE_PRINTF("EDI"); ++ return &M.x86.R_EDI; ++ } ++ HALT_SYS(); + return NULL; /* NOTREACHED OR REACHED ON ERROR */ + } + +@@ -692,126 +685,129 @@ Return a pointer to the register given by the R/RM field of the + modrm byte, for word operands, modified from above for the weirdo + special case of segreg operands. Also enables the decoding of instructions. + ****************************************************************************/ +-u16* decode_rm_seg_register( +- int reg) ++u16 * ++decode_rm_seg_register(int reg) + { +- switch (reg) { +- case 0: +- DECODE_PRINTF("ES"); +- return &M.x86.R_ES; +- case 1: +- DECODE_PRINTF("CS"); +- return &M.x86.R_CS; +- case 2: +- DECODE_PRINTF("SS"); +- return &M.x86.R_SS; +- case 3: +- DECODE_PRINTF("DS"); +- return &M.x86.R_DS; +- case 4: +- DECODE_PRINTF("FS"); +- return &M.x86.R_FS; +- case 5: +- DECODE_PRINTF("GS"); +- return &M.x86.R_GS; +- case 6: +- case 7: +- DECODE_PRINTF("ILLEGAL SEGREG"); +- break; +- } +- HALT_SYS(); +- return NULL; /* NOT REACHED OR REACHED ON ERROR */ ++ switch (reg) { ++ case 0: ++ DECODE_PRINTF("ES"); ++ return &M.x86.R_ES; ++ case 1: ++ DECODE_PRINTF("CS"); ++ return &M.x86.R_CS; ++ case 2: ++ DECODE_PRINTF("SS"); ++ return &M.x86.R_SS; ++ case 3: ++ DECODE_PRINTF("DS"); ++ return &M.x86.R_DS; ++ case 4: ++ DECODE_PRINTF("FS"); ++ return &M.x86.R_FS; ++ case 5: ++ DECODE_PRINTF("GS"); ++ return &M.x86.R_GS; ++ case 6: ++ case 7: ++ DECODE_PRINTF("ILLEGAL SEGREG"); ++ break; ++ } ++ HALT_SYS(); ++ return NULL; /* NOT REACHED OR REACHED ON ERROR */ + } + + /* + * + * return offset from the SIB Byte + */ +-u32 decode_sib_address(int sib, int mod) ++u32 ++decode_sib_address(int sib, int mod) + { + u32 base = 0, i = 0, scale = 1; + +- switch(sib & 0x07) { ++ switch (sib & 0x07) { + case 0: +- DECODE_PRINTF("[EAX]"); +- base = M.x86.R_EAX; +- break; ++ DECODE_PRINTF("[EAX]"); ++ base = M.x86.R_EAX; ++ break; + case 1: +- DECODE_PRINTF("[ECX]"); +- base = M.x86.R_ECX; +- break; ++ DECODE_PRINTF("[ECX]"); ++ base = M.x86.R_ECX; ++ break; + case 2: +- DECODE_PRINTF("[EDX]"); +- base = M.x86.R_EDX; +- break; ++ DECODE_PRINTF("[EDX]"); ++ base = M.x86.R_EDX; ++ break; + case 3: +- DECODE_PRINTF("[EBX]"); +- base = M.x86.R_EBX; +- break; ++ DECODE_PRINTF("[EBX]"); ++ base = M.x86.R_EBX; ++ break; + case 4: +- DECODE_PRINTF("[ESP]"); +- base = M.x86.R_ESP; +- M.x86.mode |= SYSMODE_SEG_DS_SS; +- break; ++ DECODE_PRINTF("[ESP]"); ++ base = M.x86.R_ESP; ++ M.x86.mode |= SYSMODE_SEG_DS_SS; ++ break; + case 5: +- if (mod == 0) { +- base = fetch_long_imm(); +- DECODE_PRINTF2("%08x", base); +- } else { +- DECODE_PRINTF("[EBP]"); +- base = M.x86.R_ESP; +- M.x86.mode |= SYSMODE_SEG_DS_SS; +- } +- break; ++ if (mod == 0) { ++ base = fetch_long_imm(); ++ DECODE_PRINTF2("%08x", base); ++ } ++ else { ++ DECODE_PRINTF("[EBP]"); ++ base = M.x86.R_ESP; ++ M.x86.mode |= SYSMODE_SEG_DS_SS; ++ } ++ break; + case 6: +- DECODE_PRINTF("[ESI]"); +- base = M.x86.R_ESI; +- break; ++ DECODE_PRINTF("[ESI]"); ++ base = M.x86.R_ESI; ++ break; + case 7: +- DECODE_PRINTF("[EDI]"); +- base = M.x86.R_EDI; +- break; ++ DECODE_PRINTF("[EDI]"); ++ base = M.x86.R_EDI; ++ break; + } + switch ((sib >> 3) & 0x07) { + case 0: +- DECODE_PRINTF("[EAX"); +- i = M.x86.R_EAX; +- break; ++ DECODE_PRINTF("[EAX"); ++ i = M.x86.R_EAX; ++ break; + case 1: +- DECODE_PRINTF("[ECX"); +- i = M.x86.R_ECX; +- break; ++ DECODE_PRINTF("[ECX"); ++ i = M.x86.R_ECX; ++ break; + case 2: +- DECODE_PRINTF("[EDX"); +- i = M.x86.R_EDX; +- break; ++ DECODE_PRINTF("[EDX"); ++ i = M.x86.R_EDX; ++ break; + case 3: +- DECODE_PRINTF("[EBX"); +- i = M.x86.R_EBX; +- break; ++ DECODE_PRINTF("[EBX"); ++ i = M.x86.R_EBX; ++ break; + case 4: +- i = 0; +- break; ++ i = 0; ++ break; + case 5: +- DECODE_PRINTF("[EBP"); +- i = M.x86.R_EBP; +- break; ++ DECODE_PRINTF("[EBP"); ++ i = M.x86.R_EBP; ++ break; + case 6: +- DECODE_PRINTF("[ESI"); +- i = M.x86.R_ESI; +- break; ++ DECODE_PRINTF("[ESI"); ++ i = M.x86.R_ESI; ++ break; + case 7: +- DECODE_PRINTF("[EDI"); +- i = M.x86.R_EDI; +- break; ++ DECODE_PRINTF("[EDI"); ++ i = M.x86.R_EDI; ++ break; + } + scale = 1 << ((sib >> 6) & 0x03); + if (((sib >> 3) & 0x07) != 4) { +- if (scale == 1) { +- DECODE_PRINTF("]"); +- } else { +- DECODE_PRINTF2("*%d]", scale); +- } ++ if (scale == 1) { ++ DECODE_PRINTF("]"); ++ } ++ else { ++ DECODE_PRINTF2("*%d]", scale); ++ } + } + return base + (i * scale); + } +@@ -836,74 +832,75 @@ NOTE: The code which specifies the corresponding segment (ds vs ss) + if a SS access is needed, set this bit. Otherwise, DS access + occurs (unless any of the segment override bits are set). + ****************************************************************************/ +-u32 decode_rm00_address( +- int rm) ++u32 ++decode_rm00_address(int rm) + { + u32 offset; + int sib; + + if (M.x86.mode & SYSMODE_PREFIX_ADDR) { + /* 32-bit addressing */ +- switch (rm) { +- case 0: +- DECODE_PRINTF("[EAX]"); +- return M.x86.R_EAX; +- case 1: +- DECODE_PRINTF("[ECX]"); +- return M.x86.R_ECX; +- case 2: +- DECODE_PRINTF("[EDX]"); +- return M.x86.R_EDX; +- case 3: +- DECODE_PRINTF("[EBX]"); +- return M.x86.R_EBX; +- case 4: +- sib = fetch_byte_imm(); +- return decode_sib_address(sib, 0); +- case 5: +- offset = fetch_long_imm(); +- DECODE_PRINTF2("[%08x]", offset); +- return offset; +- case 6: +- DECODE_PRINTF("[ESI]"); +- return M.x86.R_ESI; +- case 7: +- DECODE_PRINTF("[EDI]"); +- return M.x86.R_EDI; +- } +- HALT_SYS(); +- } else { ++ switch (rm) { ++ case 0: ++ DECODE_PRINTF("[EAX]"); ++ return M.x86.R_EAX; ++ case 1: ++ DECODE_PRINTF("[ECX]"); ++ return M.x86.R_ECX; ++ case 2: ++ DECODE_PRINTF("[EDX]"); ++ return M.x86.R_EDX; ++ case 3: ++ DECODE_PRINTF("[EBX]"); ++ return M.x86.R_EBX; ++ case 4: ++ sib = fetch_byte_imm(); ++ return decode_sib_address(sib, 0); ++ case 5: ++ offset = fetch_long_imm(); ++ DECODE_PRINTF2("[%08x]", offset); ++ return offset; ++ case 6: ++ DECODE_PRINTF("[ESI]"); ++ return M.x86.R_ESI; ++ case 7: ++ DECODE_PRINTF("[EDI]"); ++ return M.x86.R_EDI; ++ } ++ HALT_SYS(); ++ } ++ else { + /* 16-bit addressing */ +- switch (rm) { +- case 0: +- DECODE_PRINTF("[BX+SI]"); ++ switch (rm) { ++ case 0: ++ DECODE_PRINTF("[BX+SI]"); + return (M.x86.R_BX + M.x86.R_SI) & 0xffff; +- case 1: +- DECODE_PRINTF("[BX+DI]"); ++ case 1: ++ DECODE_PRINTF("[BX+DI]"); + return (M.x86.R_BX + M.x86.R_DI) & 0xffff; +- case 2: +- DECODE_PRINTF("[BP+SI]"); +- M.x86.mode |= SYSMODE_SEG_DS_SS; ++ case 2: ++ DECODE_PRINTF("[BP+SI]"); ++ M.x86.mode |= SYSMODE_SEG_DS_SS; + return (M.x86.R_BP + M.x86.R_SI) & 0xffff; +- case 3: +- DECODE_PRINTF("[BP+DI]"); +- M.x86.mode |= SYSMODE_SEG_DS_SS; ++ case 3: ++ DECODE_PRINTF("[BP+DI]"); ++ M.x86.mode |= SYSMODE_SEG_DS_SS; + return (M.x86.R_BP + M.x86.R_DI) & 0xffff; +- case 4: +- DECODE_PRINTF("[SI]"); +- return M.x86.R_SI; +- case 5: +- DECODE_PRINTF("[DI]"); +- return M.x86.R_DI; +- case 6: +- offset = fetch_word_imm(); +- DECODE_PRINTF2("[%04x]", offset); +- return offset; +- case 7: +- DECODE_PRINTF("[BX]"); +- return M.x86.R_BX; +- } +- HALT_SYS(); ++ case 4: ++ DECODE_PRINTF("[SI]"); ++ return M.x86.R_SI; ++ case 5: ++ DECODE_PRINTF("[DI]"); ++ return M.x86.R_DI; ++ case 6: ++ offset = fetch_word_imm(); ++ DECODE_PRINTF2("[%04x]", offset); ++ return offset; ++ case 7: ++ DECODE_PRINTF("[BX]"); ++ return M.x86.R_BX; ++ } ++ HALT_SYS(); + } + return 0; + } +@@ -919,79 +916,80 @@ REMARKS: + Return the offset given by mod=01 addressing. Also enables the + decoding of instructions. + ****************************************************************************/ +-u32 decode_rm01_address( +- int rm) ++u32 ++decode_rm01_address(int rm) + { + int displacement = 0; + int sib; + + /* Fetch disp8 if no SIB byte */ + if (!((M.x86.mode & SYSMODE_PREFIX_ADDR) && (rm == 4))) +- displacement = (s8)fetch_byte_imm(); ++ displacement = (s8) fetch_byte_imm(); + + if (M.x86.mode & SYSMODE_PREFIX_ADDR) { + /* 32-bit addressing */ +- switch (rm) { +- case 0: +- DECODE_PRINTF2("%d[EAX]", displacement); +- return M.x86.R_EAX + displacement; +- case 1: +- DECODE_PRINTF2("%d[ECX]", displacement); +- return M.x86.R_ECX + displacement; +- case 2: +- DECODE_PRINTF2("%d[EDX]", displacement); +- return M.x86.R_EDX + displacement; +- case 3: +- DECODE_PRINTF2("%d[EBX]", displacement); +- return M.x86.R_EBX + displacement; +- case 4: +- sib = fetch_byte_imm(); +- displacement = (s8)fetch_byte_imm(); +- DECODE_PRINTF2("%d", displacement); +- return decode_sib_address(sib, 1) + displacement; +- case 5: +- DECODE_PRINTF2("%d[EBP]", displacement); +- return M.x86.R_EBP + displacement; +- case 6: +- DECODE_PRINTF2("%d[ESI]", displacement); +- return M.x86.R_ESI + displacement; +- case 7: +- DECODE_PRINTF2("%d[EDI]", displacement); +- return M.x86.R_EDI + displacement; +- } +- HALT_SYS(); +- } else { ++ switch (rm) { ++ case 0: ++ DECODE_PRINTF2("%d[EAX]", displacement); ++ return M.x86.R_EAX + displacement; ++ case 1: ++ DECODE_PRINTF2("%d[ECX]", displacement); ++ return M.x86.R_ECX + displacement; ++ case 2: ++ DECODE_PRINTF2("%d[EDX]", displacement); ++ return M.x86.R_EDX + displacement; ++ case 3: ++ DECODE_PRINTF2("%d[EBX]", displacement); ++ return M.x86.R_EBX + displacement; ++ case 4: ++ sib = fetch_byte_imm(); ++ displacement = (s8) fetch_byte_imm(); ++ DECODE_PRINTF2("%d", displacement); ++ return decode_sib_address(sib, 1) + displacement; ++ case 5: ++ DECODE_PRINTF2("%d[EBP]", displacement); ++ return M.x86.R_EBP + displacement; ++ case 6: ++ DECODE_PRINTF2("%d[ESI]", displacement); ++ return M.x86.R_ESI + displacement; ++ case 7: ++ DECODE_PRINTF2("%d[EDI]", displacement); ++ return M.x86.R_EDI + displacement; ++ } ++ HALT_SYS(); ++ } ++ else { + /* 16-bit addressing */ +- switch (rm) { +- case 0: +- DECODE_PRINTF2("%d[BX+SI]", displacement); ++ switch (rm) { ++ case 0: ++ DECODE_PRINTF2("%d[BX+SI]", displacement); + return (M.x86.R_BX + M.x86.R_SI + displacement) & 0xffff; +- case 1: +- DECODE_PRINTF2("%d[BX+DI]", displacement); ++ case 1: ++ DECODE_PRINTF2("%d[BX+DI]", displacement); + return (M.x86.R_BX + M.x86.R_DI + displacement) & 0xffff; +- case 2: +- DECODE_PRINTF2("%d[BP+SI]", displacement); +- M.x86.mode |= SYSMODE_SEG_DS_SS; ++ case 2: ++ DECODE_PRINTF2("%d[BP+SI]", displacement); ++ M.x86.mode |= SYSMODE_SEG_DS_SS; + return (M.x86.R_BP + M.x86.R_SI + displacement) & 0xffff; +- case 3: +- DECODE_PRINTF2("%d[BP+DI]", displacement); +- M.x86.mode |= SYSMODE_SEG_DS_SS; ++ case 3: ++ DECODE_PRINTF2("%d[BP+DI]", displacement); ++ M.x86.mode |= SYSMODE_SEG_DS_SS; + return (M.x86.R_BP + M.x86.R_DI + displacement) & 0xffff; +- case 4: +- DECODE_PRINTF2("%d[SI]", displacement); ++ case 4: ++ DECODE_PRINTF2("%d[SI]", displacement); + return (M.x86.R_SI + displacement) & 0xffff; +- case 5: +- DECODE_PRINTF2("%d[DI]", displacement); ++ case 5: ++ DECODE_PRINTF2("%d[DI]", displacement); + return (M.x86.R_DI + displacement) & 0xffff; +- case 6: +- DECODE_PRINTF2("%d[BP]", displacement); +- M.x86.mode |= SYSMODE_SEG_DS_SS; ++ case 6: ++ DECODE_PRINTF2("%d[BP]", displacement); ++ M.x86.mode |= SYSMODE_SEG_DS_SS; + return (M.x86.R_BP + displacement) & 0xffff; +- case 7: +- DECODE_PRINTF2("%d[BX]", displacement); ++ case 7: ++ DECODE_PRINTF2("%d[BX]", displacement); + return (M.x86.R_BX + displacement) & 0xffff; +- } +- HALT_SYS(); ++ } ++ HALT_SYS(); + } + return 0; /* SHOULD NOT HAPPEN */ + } +@@ -1007,86 +1005,87 @@ REMARKS: + Return the offset given by mod=10 addressing. Also enables the + decoding of instructions. + ****************************************************************************/ +-u32 decode_rm10_address( +- int rm) ++u32 ++decode_rm10_address(int rm) + { + u32 displacement = 0; + int sib; + + /* Fetch disp16 if 16-bit addr mode */ + if (!(M.x86.mode & SYSMODE_PREFIX_ADDR)) +- displacement = (u16)fetch_word_imm(); ++ displacement = (u16) fetch_word_imm(); + else { +- /* Fetch disp32 if no SIB byte */ +- if (rm != 4) +- displacement = (u32)fetch_long_imm(); ++ /* Fetch disp32 if no SIB byte */ ++ if (rm != 4) ++ displacement = (u32) fetch_long_imm(); + } + + if (M.x86.mode & SYSMODE_PREFIX_ADDR) { + /* 32-bit addressing */ +- switch (rm) { +- case 0: +- DECODE_PRINTF2("%08x[EAX]", displacement); +- return M.x86.R_EAX + displacement; +- case 1: +- DECODE_PRINTF2("%08x[ECX]", displacement); +- return M.x86.R_ECX + displacement; +- case 2: +- DECODE_PRINTF2("%08x[EDX]", displacement); +- M.x86.mode |= SYSMODE_SEG_DS_SS; +- return M.x86.R_EDX + displacement; +- case 3: +- DECODE_PRINTF2("%08x[EBX]", displacement); +- return M.x86.R_EBX + displacement; +- case 4: +- sib = fetch_byte_imm(); +- displacement = (u32)fetch_long_imm(); +- DECODE_PRINTF2("%08x", displacement); +- return decode_sib_address(sib, 2) + displacement; +- break; +- case 5: +- DECODE_PRINTF2("%08x[EBP]", displacement); +- return M.x86.R_EBP + displacement; +- case 6: +- DECODE_PRINTF2("%08x[ESI]", displacement); +- return M.x86.R_ESI + displacement; +- case 7: +- DECODE_PRINTF2("%08x[EDI]", displacement); +- return M.x86.R_EDI + displacement; +- } +- HALT_SYS(); +- } else { ++ switch (rm) { ++ case 0: ++ DECODE_PRINTF2("%08x[EAX]", displacement); ++ return M.x86.R_EAX + displacement; ++ case 1: ++ DECODE_PRINTF2("%08x[ECX]", displacement); ++ return M.x86.R_ECX + displacement; ++ case 2: ++ DECODE_PRINTF2("%08x[EDX]", displacement); ++ M.x86.mode |= SYSMODE_SEG_DS_SS; ++ return M.x86.R_EDX + displacement; ++ case 3: ++ DECODE_PRINTF2("%08x[EBX]", displacement); ++ return M.x86.R_EBX + displacement; ++ case 4: ++ sib = fetch_byte_imm(); ++ displacement = (u32) fetch_long_imm(); ++ DECODE_PRINTF2("%08x", displacement); ++ return decode_sib_address(sib, 2) + displacement; ++ break; ++ case 5: ++ DECODE_PRINTF2("%08x[EBP]", displacement); ++ return M.x86.R_EBP + displacement; ++ case 6: ++ DECODE_PRINTF2("%08x[ESI]", displacement); ++ return M.x86.R_ESI + displacement; ++ case 7: ++ DECODE_PRINTF2("%08x[EDI]", displacement); ++ return M.x86.R_EDI + displacement; ++ } ++ HALT_SYS(); ++ } ++ else { + /* 16-bit addressing */ +- switch (rm) { +- case 0: ++ switch (rm) { ++ case 0: + DECODE_PRINTF2("%04x[BX+SI]", displacement); + return (M.x86.R_BX + M.x86.R_SI + displacement) & 0xffff; +- case 1: ++ case 1: + DECODE_PRINTF2("%04x[BX+DI]", displacement); + return (M.x86.R_BX + M.x86.R_DI + displacement) & 0xffff; +- case 2: +- DECODE_PRINTF2("%04x[BP+SI]", displacement); +- M.x86.mode |= SYSMODE_SEG_DS_SS; ++ case 2: ++ DECODE_PRINTF2("%04x[BP+SI]", displacement); ++ M.x86.mode |= SYSMODE_SEG_DS_SS; + return (M.x86.R_BP + M.x86.R_SI + displacement) & 0xffff; +- case 3: +- DECODE_PRINTF2("%04x[BP+DI]", displacement); +- M.x86.mode |= SYSMODE_SEG_DS_SS; ++ case 3: ++ DECODE_PRINTF2("%04x[BP+DI]", displacement); ++ M.x86.mode |= SYSMODE_SEG_DS_SS; + return (M.x86.R_BP + M.x86.R_DI + displacement) & 0xffff; +- case 4: ++ case 4: + DECODE_PRINTF2("%04x[SI]", displacement); + return (M.x86.R_SI + displacement) & 0xffff; +- case 5: ++ case 5: + DECODE_PRINTF2("%04x[DI]", displacement); + return (M.x86.R_DI + displacement) & 0xffff; +- case 6: +- DECODE_PRINTF2("%04x[BP]", displacement); +- M.x86.mode |= SYSMODE_SEG_DS_SS; ++ case 6: ++ DECODE_PRINTF2("%04x[BP]", displacement); ++ M.x86.mode |= SYSMODE_SEG_DS_SS; + return (M.x86.R_BP + displacement) & 0xffff; +- case 7: ++ case 7: + DECODE_PRINTF2("%04x[BX]", displacement); + return (M.x86.R_BX + displacement) & 0xffff; +- } +- HALT_SYS(); ++ } ++ HALT_SYS(); + } + return 0; + /*NOTREACHED */ +diff --git a/libs/x86emu/fpu.c b/libs/x86emu/fpu.c +index b72de1e..0dab05c 100644 +--- a/libs/x86emu/fpu.c ++++ b/libs/x86emu/fpu.c +@@ -42,7 +42,8 @@ + /*----------------------------- Implementation ----------------------------*/ + + /* opcode=0xd8 */ +-void x86emuOp_esc_coprocess_d8(u8 X86EMU_UNUSED(op1)) ++void ++x86emuOp_esc_coprocess_d8(u8 X86EMU_UNUSED(op1)) + { + START_OF_INSTR(); + DECODE_PRINTF("ESC D8\n"); +@@ -52,7 +53,7 @@ void x86emuOp_esc_coprocess_d8(u8 X86EMU_UNUSED(op1)) + + #ifdef DEBUG + +-static char *x86emu_fpu_op_d9_tab[] = { ++static const char *x86emu_fpu_op_d9_tab[] = { + "FLD\tDWORD PTR ", "ESC_D9\t", "FST\tDWORD PTR ", "FSTP\tDWORD PTR ", + "FLDENV\t", "FLDCW\t", "FSTENV\t", "FSTCW\t", + +@@ -63,7 +64,7 @@ static char *x86emu_fpu_op_d9_tab[] = { + "FLDENV\t", "FLDCW\t", "FSTENV\t", "FSTCW\t", + }; + +-static char *x86emu_fpu_op_d9_tab1[] = { ++static const char *x86emu_fpu_op_d9_tab1[] = { + "FLD\t", "FLD\t", "FLD\t", "FLD\t", + "FLD\t", "FLD\t", "FLD\t", "FLD\t", + +@@ -89,10 +90,11 @@ static char *x86emu_fpu_op_d9_tab1[] = { + "FRNDINT", "FSCALE", "ESC_D9", "ESC_D9", + }; + +-#endif /* DEBUG */ ++#endif /* DEBUG */ + + /* opcode=0xd9 */ +-void x86emuOp_esc_coprocess_d9(u8 X86EMU_UNUSED(op1)) ++void ++x86emuOp_esc_coprocess_d9(u8 X86EMU_UNUSED(op1)) + { + int mod, rl, rh; + uint destoffset = 0; +@@ -103,56 +105,58 @@ void x86emuOp_esc_coprocess_d9(u8 X86EMU_UNUSED(op1)) + #ifdef DEBUG + if (mod != 3) { + DECODE_PRINTINSTR32(x86emu_fpu_op_d9_tab, mod, rh, rl); +- } else { ++ } ++ else { + DECODE_PRINTF(x86emu_fpu_op_d9_tab1[(rh << 3) + rl]); + } + #endif + switch (mod) { +- case 0: ++ case 0: + destoffset = decode_rm00_address(rl); + DECODE_PRINTF("\n"); + break; +- case 1: ++ case 1: + destoffset = decode_rm01_address(rl); + DECODE_PRINTF("\n"); + break; +- case 2: ++ case 2: + destoffset = decode_rm10_address(rl); + DECODE_PRINTF("\n"); + break; +- case 3: /* register to register */ +- stkelem = (u8)rl; +- if (rh < 4) { +- DECODE_PRINTF2("ST(%d)\n", stkelem); +- } else { +- DECODE_PRINTF("\n"); +- } ++ case 3: /* register to register */ ++ stkelem = (u8) rl; ++ if (rh < 4) { ++ DECODE_PRINTF2("ST(%d)\n", stkelem); ++ } ++ else { ++ DECODE_PRINTF("\n"); ++ } + break; + } + #ifdef X86EMU_FPU_PRESENT + /* execute */ + switch (mod) { +- case 3: ++ case 3: + switch (rh) { +- case 0: ++ case 0: + x86emu_fpu_R_fld(X86EMU_FPU_STKTOP, stkelem); + break; +- case 1: ++ case 1: + x86emu_fpu_R_fxch(X86EMU_FPU_STKTOP, stkelem); + break; +- case 2: ++ case 2: + switch (rl) { +- case 0: ++ case 0: + x86emu_fpu_R_nop(); + break; +- default: ++ default: + x86emu_fpu_illegal(); + break; + } +- case 3: ++ case 3: + x86emu_fpu_R_fstp(X86EMU_FPU_STKTOP, stkelem); + break; +- case 4: ++ case 4: + switch (rl) { + case 0: + x86emu_fpu_R_fchs(X86EMU_FPU_STKTOP); +@@ -173,133 +177,133 @@ void x86emuOp_esc_coprocess_d9(u8 X86EMU_UNUSED(op1)) + } + break; + +- case 5: ++ case 5: + switch (rl) { +- case 0: ++ case 0: + x86emu_fpu_R_fld1(X86EMU_FPU_STKTOP); + break; +- case 1: ++ case 1: + x86emu_fpu_R_fldl2t(X86EMU_FPU_STKTOP); + break; +- case 2: ++ case 2: + x86emu_fpu_R_fldl2e(X86EMU_FPU_STKTOP); + break; +- case 3: ++ case 3: + x86emu_fpu_R_fldpi(X86EMU_FPU_STKTOP); + break; +- case 4: ++ case 4: + x86emu_fpu_R_fldlg2(X86EMU_FPU_STKTOP); + break; +- case 5: ++ case 5: + x86emu_fpu_R_fldln2(X86EMU_FPU_STKTOP); + break; +- case 6: ++ case 6: + x86emu_fpu_R_fldz(X86EMU_FPU_STKTOP); + break; +- default: ++ default: + /* 7 */ + x86emu_fpu_illegal(); + break; + } + break; + +- case 6: ++ case 6: + switch (rl) { +- case 0: ++ case 0: + x86emu_fpu_R_f2xm1(X86EMU_FPU_STKTOP); + break; +- case 1: ++ case 1: + x86emu_fpu_R_fyl2x(X86EMU_FPU_STKTOP); + break; +- case 2: ++ case 2: + x86emu_fpu_R_fptan(X86EMU_FPU_STKTOP); + break; +- case 3: ++ case 3: + x86emu_fpu_R_fpatan(X86EMU_FPU_STKTOP); + break; +- case 4: ++ case 4: + x86emu_fpu_R_fxtract(X86EMU_FPU_STKTOP); + break; +- case 5: ++ case 5: + x86emu_fpu_illegal(); + break; +- case 6: ++ case 6: + x86emu_fpu_R_decstp(); + break; +- case 7: ++ case 7: + x86emu_fpu_R_incstp(); + break; + } + break; + +- case 7: ++ case 7: + switch (rl) { +- case 0: ++ case 0: + x86emu_fpu_R_fprem(X86EMU_FPU_STKTOP); + break; +- case 1: ++ case 1: + x86emu_fpu_R_fyl2xp1(X86EMU_FPU_STKTOP); + break; +- case 2: ++ case 2: + x86emu_fpu_R_fsqrt(X86EMU_FPU_STKTOP); + break; +- case 3: ++ case 3: + x86emu_fpu_illegal(); + break; +- case 4: ++ case 4: + x86emu_fpu_R_frndint(X86EMU_FPU_STKTOP); + break; +- case 5: ++ case 5: + x86emu_fpu_R_fscale(X86EMU_FPU_STKTOP); + break; +- case 6: +- case 7: +- default: ++ case 6: ++ case 7: ++ default: + x86emu_fpu_illegal(); + break; + } + break; + +- default: ++ default: + switch (rh) { +- case 0: ++ case 0: + x86emu_fpu_M_fld(X86EMU_FPU_FLOAT, destoffset); + break; +- case 1: ++ case 1: + x86emu_fpu_illegal(); + break; +- case 2: ++ case 2: + x86emu_fpu_M_fst(X86EMU_FPU_FLOAT, destoffset); + break; +- case 3: ++ case 3: + x86emu_fpu_M_fstp(X86EMU_FPU_FLOAT, destoffset); + break; +- case 4: ++ case 4: + x86emu_fpu_M_fldenv(X86EMU_FPU_WORD, destoffset); + break; +- case 5: ++ case 5: + x86emu_fpu_M_fldcw(X86EMU_FPU_WORD, destoffset); + break; +- case 6: ++ case 6: + x86emu_fpu_M_fstenv(X86EMU_FPU_WORD, destoffset); + break; +- case 7: ++ case 7: + x86emu_fpu_M_fstcw(X86EMU_FPU_WORD, destoffset); + break; + } + } + } + #else +- (void)destoffset; +- (void)stkelem; +-#endif /* X86EMU_FPU_PRESENT */ ++ (void) destoffset; ++ (void) stkelem; ++#endif /* X86EMU_FPU_PRESENT */ + DECODE_CLEAR_SEGOVR(); + END_OF_INSTR_NO_TRACE(); + } + + #ifdef DEBUG + +-char *x86emu_fpu_op_da_tab[] = { ++static const char *x86emu_fpu_op_da_tab[] = { + "FIADD\tDWORD PTR ", "FIMUL\tDWORD PTR ", "FICOM\tDWORD PTR ", + "FICOMP\tDWORD PTR ", + "FISUB\tDWORD PTR ", "FISUBR\tDWORD PTR ", "FIDIV\tDWORD PTR ", +@@ -309,7 +313,7 @@ char *x86emu_fpu_op_da_tab[] = { + "FICOMP\tDWORD PTR ", + "FISUB\tDWORD PTR ", "FISUBR\tDWORD PTR ", "FIDIV\tDWORD PTR ", + "FIDIVR\tDWORD PTR ", +- ++ + "FIADD\tDWORD PTR ", "FIMUL\tDWORD PTR ", "FICOM\tDWORD PTR ", + "FICOMP\tDWORD PTR ", + "FISUB\tDWORD PTR ", "FISUBR\tDWORD PTR ", "FIDIV\tDWORD PTR ", +@@ -319,10 +323,11 @@ char *x86emu_fpu_op_da_tab[] = { + "ESC_DA ", "ESC_DA ", "ESC_DA ", "ESC_DA ", + }; + +-#endif /* DEBUG */ ++#endif /* DEBUG */ + + /* opcode=0xda */ +-void x86emuOp_esc_coprocess_da(u8 X86EMU_UNUSED(op1)) ++void ++x86emuOp_esc_coprocess_da(u8 X86EMU_UNUSED(op1)) + { + int mod, rl, rh; + uint destoffset = 0; +@@ -332,59 +337,59 @@ void x86emuOp_esc_coprocess_da(u8 X86EMU_UNUSED(op1)) + FETCH_DECODE_MODRM(mod, rh, rl); + DECODE_PRINTINSTR32(x86emu_fpu_op_da_tab, mod, rh, rl); + switch (mod) { +- case 0: ++ case 0: + destoffset = decode_rm00_address(rl); + DECODE_PRINTF("\n"); + break; +- case 1: ++ case 1: + destoffset = decode_rm01_address(rl); + DECODE_PRINTF("\n"); + break; +- case 2: ++ case 2: + destoffset = decode_rm10_address(rl); + DECODE_PRINTF("\n"); + break; +- case 3: /* register to register */ +- stkelem = (u8)rl; ++ case 3: /* register to register */ ++ stkelem = (u8) rl; + DECODE_PRINTF2("\tST(%d),ST\n", stkelem); + break; + } + #ifdef X86EMU_FPU_PRESENT + switch (mod) { +- case 3: ++ case 3: + x86emu_fpu_illegal(); + break; +- default: ++ default: + switch (rh) { +- case 0: ++ case 0: + x86emu_fpu_M_iadd(X86EMU_FPU_SHORT, destoffset); + break; +- case 1: ++ case 1: + x86emu_fpu_M_imul(X86EMU_FPU_SHORT, destoffset); + break; +- case 2: ++ case 2: + x86emu_fpu_M_icom(X86EMU_FPU_SHORT, destoffset); + break; +- case 3: ++ case 3: + x86emu_fpu_M_icomp(X86EMU_FPU_SHORT, destoffset); + break; +- case 4: ++ case 4: + x86emu_fpu_M_isub(X86EMU_FPU_SHORT, destoffset); + break; +- case 5: ++ case 5: + x86emu_fpu_M_isubr(X86EMU_FPU_SHORT, destoffset); + break; +- case 6: ++ case 6: + x86emu_fpu_M_idiv(X86EMU_FPU_SHORT, destoffset); + break; +- case 7: ++ case 7: + x86emu_fpu_M_idivr(X86EMU_FPU_SHORT, destoffset); + break; + } + } + #else +- (void)destoffset; +- (void)stkelem; ++ (void) destoffset; ++ (void) stkelem; + #endif + DECODE_CLEAR_SEGOVR(); + END_OF_INSTR_NO_TRACE(); +@@ -392,7 +397,7 @@ void x86emuOp_esc_coprocess_da(u8 X86EMU_UNUSED(op1)) + + #ifdef DEBUG + +-char *x86emu_fpu_op_db_tab[] = { ++static const char *x86emu_fpu_op_db_tab[] = { + "FILD\tDWORD PTR ", "ESC_DB\t19", "FIST\tDWORD PTR ", "FISTP\tDWORD PTR ", + "ESC_DB\t1C", "FLD\tTBYTE PTR ", "ESC_DB\t1E", "FSTP\tTBYTE PTR ", + +@@ -403,10 +408,11 @@ char *x86emu_fpu_op_db_tab[] = { + "ESC_DB\t1C", "FLD\tTBYTE PTR ", "ESC_DB\t1E", "FSTP\tTBYTE PTR ", + }; + +-#endif /* DEBUG */ ++#endif /* DEBUG */ + + /* opcode=0xdb */ +-void x86emuOp_esc_coprocess_db(u8 X86EMU_UNUSED(op1)) ++void ++x86emuOp_esc_coprocess_db(u8 X86EMU_UNUSED(op1)) + { + int mod, rl, rh; + uint destoffset = 0; +@@ -416,104 +422,106 @@ void x86emuOp_esc_coprocess_db(u8 X86EMU_UNUSED(op1)) + #ifdef DEBUG + if (mod != 3) { + DECODE_PRINTINSTR32(x86emu_fpu_op_db_tab, mod, rh, rl); +- } else if (rh == 4) { /* === 11 10 0 nnn */ ++ } ++ else if (rh == 4) { /* === 11 10 0 nnn */ + switch (rl) { +- case 0: ++ case 0: + DECODE_PRINTF("FENI\n"); + break; +- case 1: ++ case 1: + DECODE_PRINTF("FDISI\n"); + break; +- case 2: ++ case 2: + DECODE_PRINTF("FCLEX\n"); + break; +- case 3: ++ case 3: + DECODE_PRINTF("FINIT\n"); + break; + } +- } else { ++ } ++ else { + DECODE_PRINTF2("ESC_DB %0x\n", (mod << 6) + (rh << 3) + (rl)); + } +-#endif /* DEBUG */ ++#endif /* DEBUG */ + switch (mod) { +- case 0: ++ case 0: + destoffset = decode_rm00_address(rl); + break; +- case 1: ++ case 1: + destoffset = decode_rm01_address(rl); + break; +- case 2: ++ case 2: + destoffset = decode_rm10_address(rl); + break; +- case 3: /* register to register */ ++ case 3: /* register to register */ + break; + } + #ifdef X86EMU_FPU_PRESENT + /* execute */ + switch (mod) { +- case 3: ++ case 3: + switch (rh) { +- case 4: ++ case 4: + switch (rl) { +- case 0: ++ case 0: + x86emu_fpu_R_feni(); + break; +- case 1: ++ case 1: + x86emu_fpu_R_fdisi(); + break; +- case 2: ++ case 2: + x86emu_fpu_R_fclex(); + break; +- case 3: ++ case 3: + x86emu_fpu_R_finit(); + break; +- default: ++ default: + x86emu_fpu_illegal(); + break; + } + break; +- default: ++ default: + x86emu_fpu_illegal(); + break; + } + break; +- default: ++ default: + switch (rh) { +- case 0: ++ case 0: + x86emu_fpu_M_fild(X86EMU_FPU_SHORT, destoffset); + break; +- case 1: ++ case 1: + x86emu_fpu_illegal(); + break; +- case 2: ++ case 2: + x86emu_fpu_M_fist(X86EMU_FPU_SHORT, destoffset); + break; +- case 3: ++ case 3: + x86emu_fpu_M_fistp(X86EMU_FPU_SHORT, destoffset); + break; +- case 4: ++ case 4: + x86emu_fpu_illegal(); + break; +- case 5: ++ case 5: + x86emu_fpu_M_fld(X86EMU_FPU_LDBL, destoffset); + break; +- case 6: ++ case 6: + x86emu_fpu_illegal(); + break; +- case 7: ++ case 7: + x86emu_fpu_M_fstp(X86EMU_FPU_LDBL, destoffset); + break; + } + } + #else +- (void)destoffset; ++ (void) destoffset; + #endif + DECODE_CLEAR_SEGOVR(); + END_OF_INSTR_NO_TRACE(); + } + + #ifdef DEBUG +-char *x86emu_fpu_op_dc_tab[] = { ++static const char *x86emu_fpu_op_dc_tab[] = { + "FADD\tQWORD PTR ", "FMUL\tQWORD PTR ", "FCOM\tQWORD PTR ", + "FCOMP\tQWORD PTR ", + "FSUB\tQWORD PTR ", "FSUBR\tQWORD PTR ", "FDIV\tQWORD PTR ", +@@ -532,10 +540,11 @@ char *x86emu_fpu_op_dc_tab[] = { + "FADD\t", "FMUL\t", "FCOM\t", "FCOMP\t", + "FSUBR\t", "FSUB\t", "FDIVR\t", "FDIV\t", + }; +-#endif /* DEBUG */ ++#endif /* DEBUG */ + + /* opcode=0xdc */ +-void x86emuOp_esc_coprocess_dc(u8 X86EMU_UNUSED(op1)) ++void ++x86emuOp_esc_coprocess_dc(u8 X86EMU_UNUSED(op1)) + { + int mod, rl, rh; + uint destoffset = 0; +@@ -545,85 +554,85 @@ void x86emuOp_esc_coprocess_dc(u8 X86EMU_UNUSED(op1)) + FETCH_DECODE_MODRM(mod, rh, rl); + DECODE_PRINTINSTR32(x86emu_fpu_op_dc_tab, mod, rh, rl); + switch (mod) { +- case 0: ++ case 0: + destoffset = decode_rm00_address(rl); + DECODE_PRINTF("\n"); + break; +- case 1: ++ case 1: + destoffset = decode_rm01_address(rl); + DECODE_PRINTF("\n"); + break; +- case 2: ++ case 2: + destoffset = decode_rm10_address(rl); + DECODE_PRINTF("\n"); + break; +- case 3: /* register to register */ +- stkelem = (u8)rl; ++ case 3: /* register to register */ ++ stkelem = (u8) rl; + DECODE_PRINTF2("\tST(%d),ST\n", stkelem); + break; + } + #ifdef X86EMU_FPU_PRESENT + /* execute */ + switch (mod) { +- case 3: ++ case 3: + switch (rh) { +- case 0: ++ case 0: + x86emu_fpu_R_fadd(stkelem, X86EMU_FPU_STKTOP); + break; +- case 1: ++ case 1: + x86emu_fpu_R_fmul(stkelem, X86EMU_FPU_STKTOP); + break; +- case 2: ++ case 2: + x86emu_fpu_R_fcom(stkelem, X86EMU_FPU_STKTOP); + break; +- case 3: ++ case 3: + x86emu_fpu_R_fcomp(stkelem, X86EMU_FPU_STKTOP); + break; +- case 4: ++ case 4: + x86emu_fpu_R_fsubr(stkelem, X86EMU_FPU_STKTOP); + break; +- case 5: ++ case 5: + x86emu_fpu_R_fsub(stkelem, X86EMU_FPU_STKTOP); + break; +- case 6: ++ case 6: + x86emu_fpu_R_fdivr(stkelem, X86EMU_FPU_STKTOP); + break; +- case 7: ++ case 7: + x86emu_fpu_R_fdiv(stkelem, X86EMU_FPU_STKTOP); + break; + } + break; +- default: ++ default: + switch (rh) { +- case 0: ++ case 0: + x86emu_fpu_M_fadd(X86EMU_FPU_DOUBLE, destoffset); + break; +- case 1: ++ case 1: + x86emu_fpu_M_fmul(X86EMU_FPU_DOUBLE, destoffset); + break; +- case 2: ++ case 2: + x86emu_fpu_M_fcom(X86EMU_FPU_DOUBLE, destoffset); + break; +- case 3: ++ case 3: + x86emu_fpu_M_fcomp(X86EMU_FPU_DOUBLE, destoffset); + break; +- case 4: ++ case 4: + x86emu_fpu_M_fsub(X86EMU_FPU_DOUBLE, destoffset); + break; +- case 5: ++ case 5: + x86emu_fpu_M_fsubr(X86EMU_FPU_DOUBLE, destoffset); + break; +- case 6: ++ case 6: + x86emu_fpu_M_fdiv(X86EMU_FPU_DOUBLE, destoffset); + break; +- case 7: ++ case 7: + x86emu_fpu_M_fdivr(X86EMU_FPU_DOUBLE, destoffset); + break; + } + } + #else +- (void)destoffset; +- (void)stkelem; ++ (void) destoffset; ++ (void) stkelem; + #endif + DECODE_CLEAR_SEGOVR(); + END_OF_INSTR_NO_TRACE(); +@@ -631,7 +640,7 @@ void x86emuOp_esc_coprocess_dc(u8 X86EMU_UNUSED(op1)) + + #ifdef DEBUG + +-static char *x86emu_fpu_op_dd_tab[] = { ++static const char *x86emu_fpu_op_dd_tab[] = { + "FLD\tQWORD PTR ", "ESC_DD\t29,", "FST\tQWORD PTR ", "FSTP\tQWORD PTR ", + "FRSTOR\t", "ESC_DD\t2D,", "FSAVE\t", "FSTSW\t", + +@@ -645,10 +654,11 @@ static char *x86emu_fpu_op_dd_tab[] = { + "ESC_DD\t2C,", "ESC_DD\t2D,", "ESC_DD\t2E,", "ESC_DD\t2F,", + }; + +-#endif /* DEBUG */ ++#endif /* DEBUG */ + + /* opcode=0xdd */ +-void x86emuOp_esc_coprocess_dd(u8 X86EMU_UNUSED(op1)) ++void ++x86emuOp_esc_coprocess_dd(u8 X86EMU_UNUSED(op1)) + { + int mod, rl, rh; + uint destoffset = 0; +@@ -658,75 +668,75 @@ void x86emuOp_esc_coprocess_dd(u8 X86EMU_UNUSED(op1)) + FETCH_DECODE_MODRM(mod, rh, rl); + DECODE_PRINTINSTR32(x86emu_fpu_op_dd_tab, mod, rh, rl); + switch (mod) { +- case 0: ++ case 0: + destoffset = decode_rm00_address(rl); + DECODE_PRINTF("\n"); + break; +- case 1: ++ case 1: + destoffset = decode_rm01_address(rl); + DECODE_PRINTF("\n"); + break; +- case 2: ++ case 2: + destoffset = decode_rm10_address(rl); + DECODE_PRINTF("\n"); + break; +- case 3: /* register to register */ +- stkelem = (u8)rl; ++ case 3: /* register to register */ ++ stkelem = (u8) rl; + DECODE_PRINTF2("\tST(%d),ST\n", stkelem); + break; + } + #ifdef X86EMU_FPU_PRESENT + switch (mod) { +- case 3: ++ case 3: + switch (rh) { +- case 0: ++ case 0: + x86emu_fpu_R_ffree(stkelem); + break; +- case 1: ++ case 1: + x86emu_fpu_R_fxch(stkelem); + break; +- case 2: ++ case 2: + x86emu_fpu_R_fst(stkelem); /* register version */ + break; +- case 3: ++ case 3: + x86emu_fpu_R_fstp(stkelem); /* register version */ + break; +- default: ++ default: + x86emu_fpu_illegal(); + break; + } + break; +- default: ++ default: + switch (rh) { +- case 0: ++ case 0: + x86emu_fpu_M_fld(X86EMU_FPU_DOUBLE, destoffset); + break; +- case 1: ++ case 1: + x86emu_fpu_illegal(); + break; +- case 2: ++ case 2: + x86emu_fpu_M_fst(X86EMU_FPU_DOUBLE, destoffset); + break; +- case 3: ++ case 3: + x86emu_fpu_M_fstp(X86EMU_FPU_DOUBLE, destoffset); + break; +- case 4: ++ case 4: + x86emu_fpu_M_frstor(X86EMU_FPU_WORD, destoffset); + break; +- case 5: ++ case 5: + x86emu_fpu_illegal(); + break; +- case 6: ++ case 6: + x86emu_fpu_M_fsave(X86EMU_FPU_WORD, destoffset); + break; +- case 7: ++ case 7: + x86emu_fpu_M_fstsw(X86EMU_FPU_WORD, destoffset); + break; + } + } + #else +- (void)destoffset; +- (void)stkelem; ++ (void) destoffset; ++ (void) stkelem; + #endif + DECODE_CLEAR_SEGOVR(); + END_OF_INSTR_NO_TRACE(); +@@ -734,8 +744,7 @@ void x86emuOp_esc_coprocess_dd(u8 X86EMU_UNUSED(op1)) + + #ifdef DEBUG + +-static char *x86emu_fpu_op_de_tab[] = +-{ ++static const char *x86emu_fpu_op_de_tab[] = { + "FIADD\tWORD PTR ", "FIMUL\tWORD PTR ", "FICOM\tWORD PTR ", + "FICOMP\tWORD PTR ", + "FISUB\tWORD PTR ", "FISUBR\tWORD PTR ", "FIDIV\tWORD PTR ", +@@ -755,10 +764,11 @@ static char *x86emu_fpu_op_de_tab[] = + "FSUBRP\t", "FSUBP\t", "FDIVRP\t", "FDIVP\t", + }; + +-#endif /* DEBUG */ ++#endif /* DEBUG */ + + /* opcode=0xde */ +-void x86emuOp_esc_coprocess_de(u8 X86EMU_UNUSED(op1)) ++void ++x86emuOp_esc_coprocess_de(u8 X86EMU_UNUSED(op1)) + { + int mod, rl, rh; + uint destoffset = 0; +@@ -768,87 +778,87 @@ void x86emuOp_esc_coprocess_de(u8 X86EMU_UNUSED(op1)) + FETCH_DECODE_MODRM(mod, rh, rl); + DECODE_PRINTINSTR32(x86emu_fpu_op_de_tab, mod, rh, rl); + switch (mod) { +- case 0: ++ case 0: + destoffset = decode_rm00_address(rl); + DECODE_PRINTF("\n"); + break; +- case 1: ++ case 1: + destoffset = decode_rm01_address(rl); + DECODE_PRINTF("\n"); + break; +- case 2: ++ case 2: + destoffset = decode_rm10_address(rl); + DECODE_PRINTF("\n"); + break; +- case 3: /* register to register */ +- stkelem = (u8)rl; ++ case 3: /* register to register */ ++ stkelem = (u8) rl; + DECODE_PRINTF2("\tST(%d),ST\n", stkelem); + break; + } + #ifdef X86EMU_FPU_PRESENT + switch (mod) { +- case 3: ++ case 3: + switch (rh) { +- case 0: ++ case 0: + x86emu_fpu_R_faddp(stkelem, X86EMU_FPU_STKTOP);
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Signature · 1 line
1.9.1
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PATCH 2/2 qemu: upgrade to 2.0.0
In reply to Cristian Iorga- switched to ${BP} variable.
- updated download link;
- fxrstorssefix.patch no longer needed, superseded;
Signed-off-by Cristian Iorga <[email protected]>
---
.../recipes-devtools/qemu/qemu/fxrstorssefix.patch | 31 ----------------------
.../qemu/{qemu_1.7.0.bb => qemu_2.0.0.bb} | 9 +++----
2 files changed, 4 insertions(+), 36 deletions(-)
delete mode 100644 meta/recipes-devtools/qemu/qemu/fxrstorssefix.patch
rename meta/recipes-devtools/qemu/{qemu_1.7.0.bb => qemu_2.0.0.bb} (70%)meta/recipes-devtools/qemu/qemu/fxrstorssefix.patch deleted +0 -31
@@ -1,31 +0,0 @@ -When we restore the mxcsr resgister with FXRSTOR, we need to update the various SSE -flag files by calling update_sse_status() else we're using the flags from some other -process with interesting results. - -The code isn't ordered to make this easy hence the function declaration. - -Upstream-Status: Pending - -RP 2013/9/30 - -Index: qemu-1.5.0/target-i386/fpu_helper.c -=================================================================== ---- qemu-1.5.0.orig/target-i386/fpu_helper.c 2013-09-30 18:46:39.283377648 +0000 -+++ qemu-1.5.0/target-i386/fpu_helper.c 2013-09-30 18:46:56.895377232 +0000 -@@ -1149,6 +1149,8 @@ - } - } - -+static void update_sse_status(CPUX86State *env); -+ - void helper_fxrstor(CPUX86State *env, target_ulong ptr, int data64) - { - int i, fpus, fptag, nb_xmm_regs; -@@ -1180,6 +1182,7 @@ - if (env->cr[4] & CR4_OSFXSR_MASK) { - /* XXX: finish it */ - env->mxcsr = cpu_ldl_data(env, ptr + 0x18); -+ update_sse_status(env); - /* cpu_ldl_data(env, ptr + 0x1c); */ - if (env->hflags & HF_CS64_MASK) { - nb_xmm_regs = 16;
meta/recipes-devtools/qemu/qemu_2.0.0.bb renamed from meta/recipes-devtools/qemu/qemu_1.7.0.bb +4 -5
@@ -3,13 +3,12 @@ require qemu.inc LIC_FILES_CHKSUM = "file://COPYING;md5=441c28d2cf86e15a37fa47e15a72fbac \ file://COPYING.LIB;endline=24;md5=c04def7ae38850e7d3ef548588159913" -SRC_URI += "file://fxrstorssefix.patch \ - file://qemu-enlarge-env-entry-size.patch \ +SRC_URI += "file://qemu-enlarge-env-entry-size.patch \ file://Qemu-Arm-versatilepb-Add-memory-size-checking.patch" -SRC_URI_prepend = "http://wiki.qemu.org/download/qemu-${PV}.tar.bz2" -SRC_URI[md5sum] = "32893941d40d052a5e649efcf06aca06" -SRC_URI[sha256sum] = "31f333a85f2d14c605a77679904a9668eaeb1b6dc7da53a1665230f46bc21314" +SRC_URI_prepend = "http://wiki.qemu-project.org/download/${BP}.tar.bz2" +SRC_URI[md5sum] = "2790f44fd76da5de5024b4aafeb594c2" +SRC_URI[sha256sum] = "60cc1aa0cad39cec891f970bed60ca8a484f071adad4943123599ac223543a3b" COMPATIBLE_HOST_class-target_mips64 = "null"
Signature · 1 line
1.9.1