arm64 kexec kernel patches V4
Subsystems (5)
cover arm64 kexec kernel patches V4
Hi All,
This series adds the core support for kexec re-boots on arm64. I have tested with the arm64 wrapper program on the ARM VE fast model and the Foundation model, and using Linaro's EFI build on the ARM base AEMv8 fast model with various kernel config options for both the first and second stage kernels.
To load a second stage kernel and execute a kexec re-boot on arm64 my patches to kexec-tools [2], which have not yet been merged upstream, are needed.
This series does not include some re-work of the spin-table CPU enable method that is needed to support it, nor does it include some re-work of KVM to support CPU soft reset. A first stage kernel built with these patches will boot and run correctly, but will fail to load a second stage kernel if running on a machine with any spin-table enabled secondary CPUs (CONFIG_SMP=n works OK), and will fail the kexec re-boot resulting in a system hang if the first stage kernel was built with CONFIG_KVM=y. Work-in-progress patches to support these are in my linux-kexec source repository [1].
Patches 1-4 rework the arm64 hcall mechanism to give the arm64 soft_restart() routine the ability to switch exception levels from EL1 to EL2 for kernels that were entered in EL2.
Patch 5 moves proc-macros.S from arm64/mm to arm64/include/asm so that the dcache_line_size macro it defines can be uesd by kexec's relocate kernel routine.
Patches 11-13 add the actual kexec support.
Please consider all patches for inclusion. Any comments or suggestions on how to improve are welcome.
[1] https://git.linaro.org/people/geoff.levand/linux-kexec.git
[2] https://git.linaro.org/people/geoff.levand/kexec-tools.git
-Geoff
The following changes since commit 0a6479b0ffad8dd236915e271faaf2cbb4cac287:
arm64: Remove unneeded extern keyword (2014-10-03 14:51:02 +0100)
are available in the git repository at:
git://git.linaro.org/people/geoff.levand/linux-kexec.git kexec-v4
for you to fetch changes up to e122ed3a1b2afbaf69baf2c7cf354f7e557c5851:
arm64/kexec: Add pr_devel output (2014-10-03 15:53:58 -0700)
----------------------------------------------------------------
Geoff Levand (8):
arm64/kvm: Fix assembler compatibility of macros
arm64: Convert hcalls to use ISS field
arm64: Add new hcall HVC_CALL_FUNC
arm64: Add EL2 switch to soft_restart
arm64: Move proc-macros.S to include/asm arm64/kexec: Add core kexec support arm64/kexec: Enable kexec in the arm64 defconfig arm64/kexec: Add pr_devel output
arch/arm64/Kconfig | 9 ++
arch/arm64/configs/defconfig | 1 +
arch/arm64/include/asm/kexec.h | 47 ++++++
arch/arm64/include/asm/kvm_arm.h | 21 +--
arch/arm64/include/asm/proc-fns.h | 4 +-
arch/arm64/{mm => include/asm}/proc-macros.S | 0
arch/arm64/include/asm/virt.h | 33 ++++
arch/arm64/kernel/Makefile | 1 +
arch/arm64/kernel/hyp-stub.S | 45 ++++--
arch/arm64/kernel/machine_kexec.c | 225 +++++++++++++++++++++++++++
arch/arm64/kernel/process.c | 6 +-
arch/arm64/kernel/relocate_kernel.S | 184 ++++++++++++++++++++++
arch/arm64/kvm/hyp.S | 18 ++-
arch/arm64/mm/cache.S | 3 +-
arch/arm64/mm/proc.S | 50 ++++--
include/uapi/linux/kexec.h | 1 +
16 files changed, 600 insertions(+), 48 deletions(-)create mode 100644 arch/arm64/include/asm/kexec.h rename arch/arm64/{mm => include/asm}/proc-macros.S (100%) create mode 100644 arch/arm64/kernel/machine_kexec.c create mode 100644 arch/arm64/kernel/relocate_kernel.S
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1.9.1 _______________________________________________ kexec mailing list [email protected] http://lists.infradead.org/mailman/listinfo/kexec
PATCH 1/8 arm64/kvm: Fix assembler compatibility of macros
Some of the macros defined in kvm_arm.h are useful in assembly files, but are not compatible with the assembler. Change any C language integer constant definitions using appended U, UL, or ULL to the UL() preprocessor macro. Also, add a preprocessor include of the asm/memory.h file which defines the UL() macro.
Fixes build errors like these when using kvm_arm.h in assembly source files:
Error: unexpected characters following instruction at operand 3 -- `and x0,x1,#((1U<<25)-1)'
--- arch/arm64/include/asm/kvm_arm.h | 21 +++++++++++---------- 1 file changed, 11 insertions(+), 10 deletions(-)
arch/arm64/include/asm/kvm_arm.h +11 -10
@@ -18,6 +18,7 @@#ifndef __ARM64_KVM_ARM_H__#define __ARM64_KVM_ARM_H__ +#include <asm/memory.h> #include <asm/types.h> /* Hyp Configuration Register (HCR) bits */
@@ -149,9 +150,9 @@#endif #define VTTBR_BADDR_SHIFT (VTTBR_X - 1) -#define VTTBR_BADDR_MASK (((1LLU << (40 - VTTBR_X)) - 1) << VTTBR_BADDR_SHIFT) -#define VTTBR_VMID_SHIFT (48LLU) -#define VTTBR_VMID_MASK (0xffLLU << VTTBR_VMID_SHIFT) +#define VTTBR_BADDR_MASK (((UL(1) << (40 - VTTBR_X)) - 1) << VTTBR_BADDR_SHIFT) +#define VTTBR_VMID_SHIFT (UL(48)) +#define VTTBR_VMID_MASK (UL(0xFF) << VTTBR_VMID_SHIFT)/* Hyp System Trap Register */ #define HSTR_EL2_TTEE (1 << 16)
@@ -174,13 +175,13 @@/* Exception Syndrome Register (ESR) bits */ #define ESR_EL2_EC_SHIFT (26) -#define ESR_EL2_EC (0x3fU << ESR_EL2_EC_SHIFT) -#define ESR_EL2_IL (1U << 25) +#define ESR_EL2_EC (UL(0x3f) << ESR_EL2_EC_SHIFT) +#define ESR_EL2_IL (UL(1) << 25)#define ESR_EL2_ISS (ESR_EL2_IL - 1)#define ESR_EL2_ISV_SHIFT (24) -#define ESR_EL2_ISV (1U << ESR_EL2_ISV_SHIFT) +#define ESR_EL2_ISV (UL(1) << ESR_EL2_ISV_SHIFT)#define ESR_EL2_SAS_SHIFT (22) -#define ESR_EL2_SAS (3U << ESR_EL2_SAS_SHIFT) +#define ESR_EL2_SAS (UL(3) << ESR_EL2_SAS_SHIFT)#define ESR_EL2_SSE (1 << 21)#define ESR_EL2_SRT_SHIFT (16)#define ESR_EL2_SRT_MASK (0x1f << ESR_EL2_SRT_SHIFT)
@@ -194,16 +195,16 @@#define ESR_EL2_FSC_TYPE (0x3c)#define ESR_EL2_CV_SHIFT (24) -#define ESR_EL2_CV (1U << ESR_EL2_CV_SHIFT) +#define ESR_EL2_CV (UL(1) << ESR_EL2_CV_SHIFT)#define ESR_EL2_COND_SHIFT (20) -#define ESR_EL2_COND (0xfU << ESR_EL2_COND_SHIFT) +#define ESR_EL2_COND (UL(0xf) << ESR_EL2_COND_SHIFT)#define FSC_FAULT (0x04)#define FSC_PERM (0x0c)/* Hyp Prefetch Fault Address Register (HPFAR/HDFAR) */ -#define HPFAR_MASK (~0xFUL) +#define HPFAR_MASK (~UL(0xf))#define ESR_EL2_EC_UNKNOWN (0x00)#define ESR_EL2_EC_WFI (0x01)
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1.9.1 _______________________________________________ kexec mailing list [email protected] http://lists.infradead.org/mailman/listinfo/kexec
PATCH 2/8 arm64: Convert hcalls to use ISS field
In reply to Geoff LevandTo allow for additional hcalls to be defined and to make the arm64 hcall API more consistent across exception vector routines change the hcall implementations to use the ISS field of the ESR_EL2 register to specify the hcall type.
The existing arm64 hcall implementations are limited in that they only allow for two distinct hcalls; with the x0 register either zero, or not zero. Also, the API of the hyp-stub exception vector routines and the KVM exception vector routines differ; hyp-stub uses a non-zero value in x0 to implement __hyp_set_vectors, whereas KVM uses it to implement kvm_call_hyp.
Define three new preprocessor macros HVC_GET_VECTORS, HVC_SET_VECTORS and HVC_CALL_HYP and to be used as hcall type specifiers and convert the existing __hyp_get_vectors(), __hyp_set_vectors() and kvm_call_hyp() routines to use these new macros when executing and HVC call. Also change the corresponding hyp-stub and KVM el1_sync exception vector routines to use these new macros.
--- arch/arm64/include/asm/virt.h | 20 ++++++++++++++++++++ arch/arm64/kernel/hyp-stub.S | 34 ++++++++++++++++++++++------------ arch/arm64/kvm/hyp.S | 18 +++++++++++------- 3 files changed, 53 insertions(+), 19 deletions(-)
arch/arm64/include/asm/virt.h +20 -0
@@ -21,6 +21,26 @@#define BOOT_CPU_MODE_EL1 (0xe11)#define BOOT_CPU_MODE_EL2 (0xe12) +/* +* HVC_GET_VECTORS - Return the value of the vbar_el2 register. +*/ + +#define HVC_GET_VECTORS 1 + +/* +* HVC_SET_VECTORS - Set the value of the vbar_el2 register. +* +* @x0: Physical address of the new vector table. +*/ + +#define HVC_SET_VECTORS 2 + +/* +* HVC_CALL_HYP - Execute a hyp routine. +*/ + +#define HVC_CALL_HYP 3 +#ifndef __ASSEMBLY__/*
arch/arm64/kernel/hyp-stub.S +22 -12
@@ -22,6 +22,7 @@ #include <linux/irqchip/arm-gic-v3.h> #include <asm/assembler.h> +#include <asm/kvm_arm.h> #include <asm/ptrace.h> #include <asm/virt.h>
@@ -53,14 +54,22 @@ ENDPROC(__hyp_stub_vectors) .align 11 el1_sync: - mrs x1, esr_el2 - lsr x1, x1, #26 - cmp x1, #0x16 - b.ne 2f // Not an HVC trap - cbz x0, 1f - msr vbar_el2, x0 // Set vbar_el2 + mrs x18, esr_el2 + lsr x17, x18, #ESR_EL2_EC_SHIFT + and x18, x18, #ESR_EL2_ISS + + cmp x17, #ESR_EL2_EC_HVC64 + b.ne 2f // Not an HVC trap + + cmp x18, #HVC_GET_VECTORS + b.ne 1f + mrs x0, vbar_el2 b 2f -1: mrs x0, vbar_el2 // Return vbar_el2 + +1: cmp x18, #HVC_SET_VECTORS + b.ne 2f + msr vbar_el2, x0 + 2: eret ENDPROC(el1_sync)
@@ -100,11 +109,12 @@ ENDPROC(\label) * initialisation entry point. */ -ENTRY(__hyp_get_vectors) - mov x0, xzr - // fall through ENTRY(__hyp_set_vectors) - hvc #0 + hvc #HVC_SET_VECTORS ret -ENDPROC(__hyp_get_vectors) ENDPROC(__hyp_set_vectors) + +ENTRY(__hyp_get_vectors) + hvc #HVC_GET_VECTORS + ret +ENDPROC(__hyp_get_vectors)
arch/arm64/kvm/hyp.S +11 -7
@@ -26,6 +26,7 @@ #include <asm/kvm_asm.h> #include <asm/kvm_arm.h> #include <asm/kvm_mmu.h> +#include <asm/virt.h> #define CPU_GP_REG_OFFSET(x) (CPU_GP_REGS + x) #define CPU_XREG_OFFSET(x) CPU_GP_REG_OFFSET(CPU_USER_PT_REGS + 8*x)
@@ -1105,12 +1106,9 @@ __hyp_panic_str: * in Hyp mode (see init_hyp_mode in arch/arm/kvm/arm.c). Return values are * passed in r0 and r1. * - * A function pointer with a value of 0 has a special meaning, and is - * used to implement __hyp_get_vectors in the same way as in - * arch/arm64/kernel/hyp_stub.S. */ ENTRY(kvm_call_hyp) - hvc #0 + hvc #HVC_CALL_HYP ret ENDPROC(kvm_call_hyp)
@@ -1140,6 +1138,7 @@ el1_sync: // Guest trapped into EL2 push x2, x3 mrs x1, esr_el2 + and x0, x1, #ESR_EL2_ISS lsr x2, x1, #ESR_EL2_EC_SHIFT cmp x2, #ESR_EL2_EC_HVC64
@@ -1149,15 +1148,19 @@ el1_sync: // Guest trapped into EL2 cbnz x3, el1_trap // called HVC /* Here, we're pretty sure the host called HVC. */ + mov x18, x0 pop x2, x3 pop x0, x1 - /* Check for __hyp_get_vectors */ - cbnz x0, 1f + cmp x18, #HVC_GET_VECTORS + b.ne 1f mrs x0, vbar_el2 b 2f -1: push lr, xzr +1: cmp x18, #HVC_CALL_HYP + b.ne 2f + + push lr, xzr /* * Compute the function address in EL2, and shuffle the parameters.
@@ -1170,6 +1173,7 @@ el1_sync: // Guest trapped into EL2 blr lr pop lr, xzr + 2: eret el1_trap:
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1.9.1 _______________________________________________ kexec mailing list [email protected] http://lists.infradead.org/mailman/listinfo/kexec
PATCH 3/8 arm64: Add new hcall HVC_CALL_FUNC
In reply to Geoff LevandAdd the new hcall HVC_CALL_FUNC that allows execution of a function at EL2. During CPU reset the CPU must be brought to the exception level it had on entry to the kernel. The HVC_CALL_FUNC hcall will provide the mechanism needed for this exception level switch.
--- arch/arm64/include/asm/virt.h | 13 +++++++++++++ arch/arm64/kernel/hyp-stub.S | 17 ++++++++++++++--- 2 files changed, 27 insertions(+), 3 deletions(-)
arch/arm64/include/asm/virt.h +13 -0
@@ -41,6 +41,19 @@#define HVC_CALL_HYP 3 +/* +* HVC_CALL_FUNC - Execute a function at EL2. +* +* @x0: Physical address of the funtion to be executed. +* @x1: Passed as the first argument to the function. +* @x2: Passed as the second argument to the function. +* @x3: Passed as the third argument to the function. +* +* The called function must preserve the contents of register x18. +*/ + +#define HVC_CALL_FUNC 4 +#ifndef __ASSEMBLY__/*
arch/arm64/kernel/hyp-stub.S +14 -3
@@ -66,9 +66,20 @@ el1_sync: mrs x0, vbar_el2 b 2f -1: cmp x18, #HVC_SET_VECTORS - b.ne 2f - msr vbar_el2, x0 +1: cmp x18, #HVC_SET_VECTORS + b.ne 1f + msr vbar_el2, x0 + b 2f + +1: cmp x18, #HVC_CALL_FUNC + b.ne 2f + mov x18, lr + mov lr, x0 + mov x0, x1 + mov x1, x2 + mov x2, x3 + blr lr + mov lr, x18 2: eret ENDPROC(el1_sync)
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1.9.1 _______________________________________________ kexec mailing list [email protected] http://lists.infradead.org/mailman/listinfo/kexec
PATCH 4/8 arm64: Add EL2 switch to soft_restart
In reply to Geoff LevandWhen a CPU is reset it needs to be put into the exception level it had when it entered the kernel. Update cpu_reset() to accept an argument el2_switch which signals cpu_reset() to enter the soft reset address at EL2. If el2_switch is not set the soft reset address will be entered at EL1.
Update cpu_soft_restart() and soft_restart() to pass the return of is_hyp_mode_available() as the el2_switch value to cpu_reset(). Also update the comments of cpu_reset(), cpu_soft_restart() and soft_restart() to reflect this change.
--- arch/arm64/include/asm/proc-fns.h | 4 ++-- arch/arm64/kernel/process.c | 6 ++++- arch/arm64/mm/proc.S | 47 +++++++++++++++++++++++++++++---------- 3 files changed, 42 insertions(+), 15 deletions(-)
arch/arm64/include/asm/proc-fns.h +2 -2
@@ -32,8 +32,8 @@ extern void cpu_cache_off(void);extern void cpu_do_idle (void );extern void cpu_do_switch_mm (unsigned long pgd_phys,struct mm_struct *mm);extern void cpu_reset (unsigned long addr) __attribute__((noreturn)); -void cpu_soft_restart (phys_addr_t cpu_reset, -unsigned long addr) __attribute__((noreturn)); +void cpu_soft_restart (phys_addr_t cpu_reset,unsigned long el2_switch, +unsigned long addr) __attribute__((noreturn));extern void cpu_do_suspend (struct cpu_suspend_ctx *ptr);extern u64 cpu_do_resume (phys_addr_t ptr,u64 idmap_ttbr);
arch/arm64/kernel/process.c +5 -1
@@ -50,6 +50,7 @@#include <asm/mmu_context.h> #include <asm/processor.h> #include <asm/stacktrace.h> +#include <asm/virt.h> #ifdef CONFIG_CC_STACKPROTECTOR #include <linux/stackprotector.h>
@@ -60,7 +61,10 @@ EXPORT_SYMBOL(__stack_chk_guard);void soft_restart (unsigned long addr) {setup_mm_for_reboot (); -cpu_soft_restart (virt_to_phys (cpu_reset), addr); + +cpu_soft_restart (virt_to_phys (cpu_reset),is_hyp_mode_available (), + addr); +/* Should never get here */ BUG (); }
arch/arm64/mm/proc.S +35 -12
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1.9.1 _______________________________________________ kexec mailing list [email protected] http://lists.infradead.org/mailman/listinfo/kexec
PATCH 5/8 arm64: Move proc-macros.S to include/asm
In reply to Geoff LevandTo allow the assembler macros defined in proc-macros.S to be used outside the mm code move the proc-macros.S file from arch/arm64/mm/ to arch/arm64/include/asm/ and fix up any preprocessor includes to use the new file location.
--- arch/arm64/include/asm/proc-macros.S | 54 ++++++++++++++++++++++++++++++++++++ arch/arm64/mm/cache.S | 3 +- arch/arm64/mm/proc-macros.S | 54 ------------------------------------ arch/arm64/mm/proc.S | 3 +- 4 files changed, 56 insertions(+), 58 deletions(-) create mode 100644 arch/arm64/include/asm/proc-macros.S delete mode 100644 arch/arm64/mm/proc-macros.S
arch/arm64/include/asm/proc-macros.S new file +54 -0
@@ -0,0 +1,54 @@ +/* + * Based on arch/arm/mm/proc-macros.S + * + * Copyright (C) 2012 ARM Ltd. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program. If not, see <http://www.gnu.org/licenses/>. + */ + +#include <asm/asm-offsets.h> +#include <asm/thread_info.h> + +/* + * vma_vm_mm - get mm pointer from vma pointer (vma->vm_mm) + */ + .macro vma_vm_mm, rd, rn + ldr \rd, [\rn, #VMA_VM_MM] + .endm + +/* + * mmid - get context id from mm pointer (mm->context.id) + */ + .macro mmid, rd, rn + ldr \rd, [\rn, #MM_CONTEXT_ID] + .endm + +/* + * dcache_line_size - get the minimum D-cache line size from the CTR register. + */ + .macro dcache_line_size, reg, tmp + mrs \tmp, ctr_el0 // read CTR + ubfm \tmp, \tmp, #16, #19 // cache line size encoding + mov \reg, #4 // bytes per word + lsl \reg, \reg, \tmp // actual cache line size + .endm + +/* + * icache_line_size - get the minimum I-cache line size from the CTR register. + */ + .macro icache_line_size, reg, tmp + mrs \tmp, ctr_el0 // read CTR + and \tmp, \tmp, #0xf // cache line size encoding + mov \reg, #4 // bytes per word + lsl \reg, \reg, \tmp // actual cache line size + .endm
arch/arm64/mm/cache.S +1 -2
@@ -20,8 +20,7 @@ #include <linux/linkage.h> #include <linux/init.h> #include <asm/assembler.h> - -#include "proc-macros.S" +#include <asm/proc-macros.S> /* * __flush_dcache_all()
arch/arm64/mm/proc-macros.S deleted +0 -54
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arch/arm64/mm/proc.S +1 -2
@@ -25,10 +25,9 @@ #include <asm/hwcap.h> #include <asm/pgtable-hwdef.h> #include <asm/pgtable.h> +#include <asm/proc-macros.S> #include <asm/virt.h> -#include "proc-macros.S" - #ifdef CONFIG_ARM64_64K_PAGES #define TCR_TG_FLAGS TCR_TG0_64K | TCR_TG1_64K #else
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1.9.1 _______________________________________________ kexec mailing list [email protected] http://lists.infradead.org/mailman/listinfo/kexec
PATCH 6/8 arm64/kexec: Add core kexec support
In reply to Geoff LevandAdd three new files, kexec.h, machine_kexec.c and relocate_kernel.S to the arm64 architecture that add support for the kexec re-boot mechanism (CONFIG_KEXEC) on arm64 platforms.
--- arch/arm64/Kconfig | 9 ++ arch/arm64/include/asm/kexec.h | 47 +++++++++ arch/arm64/kernel/Makefile | 1 + arch/arm64/kernel/machine_kexec.c | 169 +++++++++++++++++++++++++++++++++ arch/arm64/kernel/relocate_kernel.S | 184 ++++++++++++++++++++++++++++++++++++ include/uapi/linux/kexec.h | 1 + 6 files changed, 411 insertions(+) create mode 100644 arch/arm64/include/asm/kexec.h create mode 100644 arch/arm64/kernel/machine_kexec.c create mode 100644 arch/arm64/kernel/relocate_kernel.S
arch/arm64/Kconfig +9 -0
@@ -313,6 +313,15 @@ config ARCH_HAS_CACHE_LINE_SIZE source "mm/Kconfig" +config KEXEC + depends on (!SMP || PM_SLEEP_SMP) + bool "kexec system call" + ---help--- + kexec is a system call that implements the ability to shutdown your + current kernel, and to start another kernel. It is like a reboot + but it is independent of the system firmware. And like a reboot + you can start any kernel with it, not just Linux. + config XEN_DOM0 def_bool y depends on XEN
arch/arm64/include/asm/kexec.h new file +47 -0
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arch/arm64/kernel/Makefile +1 -0
@@ -30,6 +30,7 @@ arm64-obj-$(CONFIG_CPU_IDLE) += cpuidle.o arm64-obj-$(CONFIG_JUMP_LABEL) += jump_label.o arm64-obj-$(CONFIG_KGDB) += kgdb.o arm64-obj-$(CONFIG_EFI) += efi.o efi-stub.o efi-entry.o +arm64-obj-$(CONFIG_KEXEC) += machine_kexec.o relocate_kernel.o obj-y += $(arm64-obj-y) vdso/ obj-m += $(arm64-obj-m)
arch/arm64/kernel/machine_kexec.c new file +169 -0
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arch/arm64/kernel/relocate_kernel.S new file +184 -0
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include/uapi/linux/kexec.h +1 -0
@@ -39,6 +39,7 @@#define KEXEC_ARCH_SH (42 << 16)#define KEXEC_ARCH_MIPS_LE (10 << 16)#define KEXEC_ARCH_MIPS ( 8 << 16) +#define KEXEC_ARCH_ARM64 (183 << 16)/* The artificial cap on the number of segments passed to kexec_load. */ #define KEXEC_SEGMENT_MAX 16
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PATCH 7/8 arm64/kexec: Enable kexec in the arm64 defconfig
In reply to Geoff Levand--- arch/arm64/configs/defconfig | 1 + 1 file changed, 1 insertion(+)
arch/arm64/configs/defconfig +1 -0
@@ -39,6 +39,7 @@ CONFIG_PREEMPT=y CONFIG_KSM=y CONFIG_TRANSPARENT_HUGEPAGE=y CONFIG_CMA=y +CONFIG_KEXEC=y CONFIG_CMDLINE="console=ttyAMA0" # CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set CONFIG_COMPAT=y
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PATCH 8/8 arm64/kexec: Add pr_devel output
In reply to Geoff LevandTo aid in debugging kexec problems or when adding new functionality to kexec add a new routine kexec_image_info() and several inline pr_devel statements.
--- arch/arm64/kernel/machine_kexec.c | 56 +++++++++++++++++++++++++++++++++++++++ 1 file changed, 56 insertions(+)
arch/arm64/kernel/machine_kexec.c +56 -0
@@ -37,6 +37,39 @@ static bool kexec_is_dtb(const void *dtb) }/** +* kexec_image_info - For debugging output. +*/ + +#define kexec_image_info (_i) _kexec_image_info(__func__, __LINE__, _i) +static void _kexec_image_info (const char *func,int line, +const struct kimage *image) +{ +unsigned long i; + +#if !defined(DEBUG ) +return ; +#endif +pr_devel ("%s:%d:\n" , func, line); +pr_devel (" kexec image info:\n" ); +pr_devel (" type: %d\n" , image->type); +pr_devel (" start: %lx\n" , image->start); +pr_devel (" head: %lx\n" , image->head); +pr_devel (" nr_segments: %lu\n" , image->nr_segments); + +for (i =0 ; i < image->nr_segments; i++) { +pr_devel (" segment[%lu]: %016lx - %016lx, " +"%lx bytes, %lu pages%s\n" , + i, + image->segment[i].mem, + image->segment[i].mem + image->segment[i].memsz, + image->segment[i].memsz, + image->segment[i].memsz /PAGE_SIZE , + (kexec_is_dtb (image->segment[i].buf) ? +", dtb segment" :"" )); + } +} + +/** * kexec_find_dtb_seg - Helper routine to find the dtb segment. */
@@ -74,6 +107,8 @@ int machine_kexec_prepare(struct kimage *image) arm64_kexec_dtb_addr = dtb_seg ? dtb_seg->mem :0 ; arm64_kexec_kimage_start = image->start; +kexec_image_info (image); +return 0 ; }
@@ -130,6 +165,27 @@ void machine_kexec(struct kimage *image) reboot_code_buffer_phys =page_to_phys (image->control_code_page); reboot_code_buffer =phys_to_virt (reboot_code_buffer_phys); +kexec_image_info (image); + +pr_devel ("%s:%d: control_code_page: %p\n" , __func__, __LINE__, + image->control_code_page); +pr_devel ("%s:%d: reboot_code_buffer_phys: %pa\n" , __func__, __LINE__, + &reboot_code_buffer_phys); +pr_devel ("%s:%d: reboot_code_buffer: %p\n" , __func__, __LINE__, + reboot_code_buffer); +pr_devel ("%s:%d: relocate_new_kernel: %p\n" , __func__, __LINE__, + relocate_new_kernel); +pr_devel ("%s:%d: relocate_new_kernel_size: 0x%lx(%lu) bytes\n" , + __func__, __LINE__, relocate_new_kernel_size, + relocate_new_kernel_size); + +pr_devel ("%s:%d: kexec_dtb_addr: %lx\n" , __func__, __LINE__, + arm64_kexec_dtb_addr); +pr_devel ("%s:%d: kexec_kimage_head: %lx\n" , __func__, __LINE__, + arm64_kexec_kimage_head); +pr_devel ("%s:%d: kexec_kimage_start: %lx\n" , __func__, __LINE__, + arm64_kexec_kimage_start); +/* * Copy relocate_new_kernel to the reboot_code_buffer for use * after the kernel is shut down.
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