Generic IOMMU pooled allocator
Subsystems (2)
v6 cover Generic IOMMU pooled allocator
Deltas from patchv5:
- removed iommu_tbl_ops, and instead pass the ->flush_all as an indirection to iommu_tbl_pool_init()
- only invoke ->flush_all when there is no large_pool, based on the assumption that large-pool usage is infrequently encountered.
Sowmini (2):
Break up monolithic iommu table/lock into finer graularity pools and
lock
Make sparc64 use scalable lib/iommu-common.c functions
Sowmini Varadhan (1):
Make LDC use common iommu poll management functions
arch/sparc/include/asm/iommu_64.h | 7 +- arch/sparc/kernel/iommu.c | 182 ++++++++++--------------------- arch/sparc/kernel/iommu_common.h | 8 -- arch/sparc/kernel/ldc.c | 169 ++++++++++++++--------------- arch/sparc/kernel/pci_sun4v.c | 192 ++++++++++++++++----------------- include/linux/iommu-common.h | 49 ++++++++ lib/Makefile | 2 +- lib/iommu-common.c | 219 +++++++++++++++++++++++++++++++++++++ 8 files changed, 503 insertions(+), 325 deletions(-) create mode 100644 include/linux/iommu-common.h create mode 100644 lib/iommu-common.c
RFC PATCH v6 1/3 sparc: Break up monolithic iommu table/lock into finer graularity pools and lock
Investigation of multithreaded iperf experiments on an ethernet interface show the iommu->lock as the hottest lock identified by lockstat, with something of the order of 21M contentions out of 27M acquisitions, and an average wait time of 26 us for the lock. This is not efficient. A more scalable design is to follow the ppc model, where the iommu_table has multiple pools, each stretching over a segment of the map, and with a separate lock for each pool. This model allows for better parallelization of the iommu map search.
This patch adds the iommu range alloc/free function infrastructure.
---
v2 changes:
- incorporate David Miller editorial comments: sparc specific fields moved from iommu-common into sparc's iommu_64.h
- make the npools value an input parameter, for the case when the iommu map size is not very large
- cookie_to_index mapping, and optimizations for span-boundary check, for use case such as LDC.
v3: eliminate iommu_sparc, rearrange the ->demap indirection to
be invoked under the pool lock.
v4: David Miller review changes:
- s/IOMMU_ERROR_CODE/DMA_ERROR_CODE
- page_table_map_base and page_table_shift are unsigned long, not u32.
v5: Feedback from [email protected] and [email protected]
- removed ->cookie_to_index and ->demap indirection: caller should invoke these as needed before calling into the generic allocator
v6: Benh/DaveM discussion eliminationg iommu_tbl_ops, but retaining flush_all
optimization.
include/linux/iommu-common.h | 49 ++++++++++ lib/Makefile | 2 +- lib/iommu-common.c | 219 ++++++++++++++++++++++++++++++++++++++++++ 3 files changed, 269 insertions(+), 1 deletions(-) create mode 100644 include/linux/iommu-common.h create mode 100644 lib/iommu-common.c
include/linux/iommu-common.h new file +49 -0
@@ -0,0 +1,49 @@ +#ifndef _LINUX_IOMMU_COMMON_H +#define _LINUX_IOMMU_COMMON_H + +#include <linux/spinlock_types.h> +#include <linux/device.h> +#include <asm/page.h> + +#define IOMMU_POOL_HASHBITS 4 +#define IOMMU_NR_POOLS (1 << IOMMU_POOL_HASHBITS) + +struct iommu_pool { +unsigned long start; +unsigned long end; +unsigned long hint; +spinlock_t lock; +}; + +struct iommu_table { +unsigned long page_table_map_base; +unsigned long page_table_shift; +unsigned long nr_pools; +void (*flush_all)(struct iommu_table *); +unsigned long poolsize; +struct iommu_pool arena_pool[IOMMU_NR_POOLS ]; +u32 flags; +#define IOMMU_HAS_LARGE_POOL 0x00000001 +#define IOMMU_NO_SPAN_BOUND 0x00000002 +struct iommu_pool large_pool; +unsigned long *map; +}; + +extern void iommu_tbl_pool_init (struct iommu_table *iommu, +unsigned long num_entries, +u32 page_table_shift, +void (*flush_all)(struct iommu_table *), +bool large_pool,u32 npools, +bool skip_span_boundary_check); + +extern unsigned long iommu_tbl_range_alloc (struct device *dev, +struct iommu_table *iommu, +unsigned long npages, +unsigned long *handle, +unsigned int pool_hash); + +extern void iommu_tbl_range_free (struct iommu_table *iommu, +u64 dma_addr,unsigned long npages, +unsigned long entry); + +#endif
lib/Makefile +1 -1
@@ -102,7 +102,7 @@ obj-$(CONFIG_AUDIT_GENERIC) += audit.o obj-$(CONFIG_AUDIT_COMPAT_GENERIC) += compat_audit.o obj-$(CONFIG_SWIOTLB) += swiotlb.o -obj-$(CONFIG_IOMMU_HELPER) += iommu-helper.o +obj-$(CONFIG_IOMMU_HELPER) += iommu-helper.o iommu-common.o obj-$(CONFIG_FAULT_INJECTION) += fault-inject.o obj-$(CONFIG_NOTIFIER_ERROR_INJECTION) += notifier-error-inject.o obj-$(CONFIG_CPU_NOTIFIER_ERROR_INJECT) += cpu-notifier-error-inject.o
lib/iommu-common.c new file +219 -0
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Signature · 1 line
1.7.1
RFC PATCH v6 2/3 sparc: Make sparc64 use scalable lib/iommu-common.c functions
In reply to Sowmini VaradhanIn iperf experiments running linux as the Tx side (TCP client) with 10 threads results in a severe performance drop when TSO is disabled, indicating a weakness in the software that can be avoided by using the scalable IOMMU arena DMA allocation.
Baseline numbers before this patch:
with default settings (TSO enabled) : 9-9.5 Gbps
Disable TSO using ethtool- drops badly: 2-3 Gbps.
After this patch, iperf client with 10 threads, can give a throughput of at least 8.5 Gbps, even when TSO is disabled.
---
v2: moved sparc specific fileds into iommu_sparc
v3: converted all sparc users of iommu, so lot of cleanup and streamlining
v4: David Miller review change:
- s/IOMMU_ERROR_CODE/DMA_ERROR_CODE
- reverts pci_impl.h (now that all iommu usage has been converted)
v5: benh/aik feedback modifies the function signatures: pass in
modified args to iommmu_tbl_pool_init() and iommu_tbl_range_free()
v6: removed iommu_tbl_ops. Pass flush_all as function pointer to
iommu_tbl_pool_init
arch/sparc/include/asm/iommu_64.h | 7 +- arch/sparc/kernel/iommu.c | 182 +++++++++++------------------------ arch/sparc/kernel/iommu_common.h | 8 -- arch/sparc/kernel/pci_sun4v.c | 192 ++++++++++++++++++------------------- 4 files changed, 153 insertions(+), 236 deletions(-)
arch/sparc/include/asm/iommu_64.h +3 -4
@@ -16,6 +16,7 @@#define IOPTE_WRITE 0x0000000000000002UL#define IOMMU_NUM_CTXS 4096 +#include <linux/iommu-common.h> struct iommu_arena {unsigned long *map;
@@ -24,11 +25,10 @@ struct iommu_arena { };struct iommu { +struct iommu_table tbl;spinlock_t lock; -struct iommu_arena arena; -void (*flush_all)(struct iommu *); +u32 dma_addr_mask;iopte_t *page_table; -u32 page_table_map_base;unsigned long iommu_control;unsigned long iommu_tsbbase;unsigned long iommu_flush;
@@ -40,7 +40,6 @@ struct iommu {unsigned long dummy_page_pa;unsigned long ctx_lowest_free;DECLARE_BITMAP (ctx_bitmap,IOMMU_NUM_CTXS ); -u32 dma_addr_mask; };struct strbuf {
arch/sparc/kernel/iommu.c +57 -125
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arch/sparc/kernel/iommu_common.h +0 -8
@@ -48,12 +48,4 @@ static inline int is_span_boundary(unsigned long entry, return iommu_is_span_boundary(entry, nr, shift, boundary_size); } -unsigned long iommu_range_alloc (struct device *dev, -struct iommu *iommu, -unsigned long npages, -unsigned long *handle); -void iommu_range_free (struct iommu *iommu, -dma_addr_t dma_addr, -unsigned long npages); -#endif /* _IOMMU_COMMON_H */
arch/sparc/kernel/pci_sun4v.c +93 -99
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Signature · 1 line
1.7.1
RFC PATCH v6 3/3 sparc: Make LDC use common iommu poll management functions
In reply to Sowmini VaradhanNote that this conversion is only being done to consolidate the code and ensure that the common code provides the sufficient abstraction. It is not expected to result in any noticeable performance improvement, as there is typically one ldc_iommu per vnet_port, and each one has 8k entries, with a typical request for 1-4 pages. Thus LDC uses npools = 1.
---
v3: added this file to be a consumer of the common iommu library
v4: removed ->cookie_to_index and ->demap from iommu_tbl_ops and instead
inline these calls into ldc before calling into iommu-common
v6: remove iommu_tbl_ops
arch/sparc/kernel/ldc.c | 169 ++++++++++++++++++++++------------------------ 1 files changed, 81 insertions(+), 88 deletions(-)
arch/sparc/kernel/ldc.c +81 -88
@@ -15,6 +15,8 @@#include <linux/list.h> #include <linux/init.h> #include <linux/bitmap.h> +#include <linux/hash.h> +#include <linux/iommu-common.h> #include <asm/hypervisor.h> #include <asm/iommu.h>
@@ -27,6 +29,11 @@#define DRV_MODULE_VERSION "1.1"#define DRV_MODULE_RELDATE "July 22, 2008" +#define COOKIE_PGSZ_CODE 0xf000000000000000ULL +#define COOKIE_PGSZ_CODE_SHIFT 60ULL + +static DEFINE_PER_CPU(unsigned int, ldc_pool_hash); + static char version[] DRV_MODULE_NAME ".c:v" DRV_MODULE_VERSION " (" DRV_MODULE_RELDATE ")\n";#define LDC_PACKET_SIZE 64
@@ -98,10 +105,10 @@ static const struct ldc_mode_ops stream_ops;int ldom_domaining_enabled;struct ldc_iommu { -/* Protects arena alloc/free. */ +/* Protects ldc_unmap. */ spinlock_t lock; -struct iommu_arena arena;struct ldc_mtable_entry *page_table; +struct iommu_table iommu_table; };struct ldc_channel {
@@ -998,31 +1005,73 @@ static void free_queue(unsigned long num_entries, struct ldc_packet *q)free_pages ((unsigned long )q, order); } +static unsigned long ldc_cookie_to_index (u64 cookie,void *arg) +{ +u64 szcode = cookie >>COOKIE_PGSZ_CODE_SHIFT ; +/* struct ldc_iommu *ldc_iommu = (struct ldc_iommu *)arg; */ + + cookie &= ~COOKIE_PGSZ_CODE ; + +return (cookie >> (13ULL + (szcode *3ULL ))); +} + +static void ldc_demap (struct ldc_iommu *iommu,unsigned long id,u64 cookie, +unsigned long entry,unsigned long npages) +{ +struct ldc_mtable_entry *base; +unsigned long i, shift; + + shift = (cookie >>COOKIE_PGSZ_CODE_SHIFT ) *3 ; + base = iommu->page_table + entry; +for (i =0 ; i < npages; i++) { +if (base->cookie) +sun4v_ldc_revoke (id, cookie + (i << shift), + base->cookie); + base->mte =0 ; + } +} +/* XXX Make this configurable... XXX */ #define LDC_IOTABLE_SIZE (8 * 1024) -static int ldc_iommu_init (struct ldc_channel *lp) +static void setup_ldc_pool_hash (void ) +{ +unsigned int i; +static bool do_once; + +if (do_once) +return ; + do_once = true; +for_each_possible_cpu (i) +per_cpu (ldc_pool_hash, i) =hash_32 (i,IOMMU_POOL_HASHBITS ); +} + + +static int ldc_iommu_init (const char *name,struct ldc_channel *lp) {unsigned long sz, num_tsb_entries, tsbsize, order; -struct ldc_iommu *iommu = &lp->iommu; +struct ldc_iommu *ldc_iommu = &lp->iommu; +struct iommu_table *iommu = &ldc_iommu->iommu_table;struct ldc_mtable_entry *table;unsigned long hv_err;int err; num_tsb_entries =LDC_IOTABLE_SIZE ; tsbsize = num_tsb_entries *sizeof (struct ldc_mtable_entry ); - -spin_lock_init (&iommu->lock); +setup_ldc_pool_hash (); +spin_lock_init (&ldc_iommu->lock); sz = num_tsb_entries /8 ; sz = (sz +7UL ) & ~7UL ; - iommu->arena.map =kzalloc (sz,GFP_KERNEL ); -if (!iommu->arena.map) { + iommu->map =kzalloc (sz,GFP_KERNEL ); +if (!iommu->map) { printk(KERN_ERR PFX "Alloc of arena map failed, sz=%lu\n", sz);return -ENOMEM ; } - - iommu->arena.limit = num_tsb_entries; +iommu_tbl_pool_init (iommu, num_tsb_entries,PAGE_SHIFT , +NULL , false/* no large pool */ , +1 /* npools */ , + true/* skip span boundary check */ ); order =get_order (tsbsize);
@@ -1037,7 +1086,7 @@ static int ldc_iommu_init(struct ldc_channel *lp)memset (table,0 ,PAGE_SIZE << order); - iommu->page_table = table; + ldc_iommu->page_table = table; hv_err =sun4v_ldc_set_map_table (lp->id,__pa (table), num_tsb_entries);
@@ -1049,31 +1098,32 @@ static int ldc_iommu_init(struct ldc_channel *lp) out_free_table:free_pages ((unsigned long ) table, order); - iommu->page_table =NULL ; + ldc_iommu->page_table =NULL ; out_free_map: -kfree (iommu->arena.map); - iommu->arena.map =NULL ; +kfree (iommu->map); + iommu->map =NULL ;return err; }static void ldc_iommu_release (struct ldc_channel *lp) { -struct ldc_iommu *iommu = &lp->iommu; +struct ldc_iommu *ldc_iommu = &lp->iommu; +struct iommu_table *iommu = &ldc_iommu->iommu_table;unsigned long num_tsb_entries, tsbsize, order; (void )sun4v_ldc_set_map_table (lp->id,0 ,0 ); - num_tsb_entries = iommu->arena.limit; + num_tsb_entries = iommu->poolsize * iommu->nr_pools; tsbsize = num_tsb_entries *sizeof (struct ldc_mtable_entry ); order =get_order (tsbsize); -free_pages ((unsigned long ) iommu->page_table, order); - iommu->page_table =NULL ; +free_pages ((unsigned long ) ldc_iommu->page_table, order); + ldc_iommu->page_table =NULL ; -kfree (iommu->arena.map); - iommu->arena.map =NULL ; +kfree (iommu->map); + iommu->map =NULL ; } struct ldc_channel *ldc_alloc(unsigned long id,
@@ -1140,7 +1190,7 @@ struct ldc_channel *ldc_alloc(unsigned long id, lp->id = id; - err =ldc_iommu_init (lp); + err =ldc_iommu_init (name, lp);if (err) goto out_free_ldc;
@@ -1885,40 +1935,6 @@ int ldc_read(struct ldc_channel *lp, void *buf, unsigned int size) }EXPORT_SYMBOL (ldc_read); -static long arena_alloc (struct ldc_iommu *iommu,unsigned long npages) -{ -struct iommu_arena *arena = &iommu->arena; -unsigned long n, start, end, limit; -int pass; - - limit = arena->limit; - start = arena->hint; - pass =0 ; - -again: - n =bitmap_find_next_zero_area (arena->map, limit, start, npages,0 ); - end = n + npages; -if (unlikely (end >= limit)) { -if (likely (pass <1 )) { - limit = start; - start =0 ; - pass++; - goto again; - }else { -/* Scanned the whole thing, give up. */ -return -1 ; - } - } -bitmap_set (arena->map, n, npages); - - arena->hint = end; - -return n; -} - -#define COOKIE_PGSZ_CODE 0xf000000000000000ULL -#define COOKIE_PGSZ_CODE_SHIFT 60ULL -static u64 pagesize_code (void ) {switch (PAGE_SIZE ) {
@@ -1945,23 +1961,14 @@ static u64 make_cookie(u64 index, u64 pgsz_code, u64 page_offset) page_offset); } -static u64 cookie_to_index (u64 cookie,unsigned long *shift) -{ -u64 szcode = cookie >>COOKIE_PGSZ_CODE_SHIFT ; - - cookie &= ~COOKIE_PGSZ_CODE ; - - *shift = szcode *3 ; - -return (cookie >> (13ULL + (szcode *3ULL ))); -}static struct ldc_mtable_entry *alloc_npages (struct ldc_iommu *iommu,unsigned long npages) {long entry; - entry =arena_alloc (iommu, npages); + entry =iommu_tbl_range_alloc (NULL , &iommu->iommu_table, npages, +NULL ,__this_cpu_read (ldc_pool_hash));if (unlikely (entry <0 ))return NULL ;
@@ -2090,7 +2097,7 @@ int ldc_map_sg(struct ldc_channel *lp, struct ldc_trans_cookie *cookies, int ncookies, unsigned int map_perm) { - unsigned long i, npages, flags; + unsigned long i, npages;struct ldc_mtable_entry *base;struct cookie_state state;struct ldc_iommu *iommu;
@@ -2109,9 +2116,7 @@ int ldc_map_sg(struct ldc_channel *lp, iommu = &lp->iommu; -spin_lock_irqsave (&iommu->lock, flags); base =alloc_npages (iommu, npages); -spin_unlock_irqrestore (&iommu->lock, flags);if (!base)return -ENOMEM ;
@@ -2136,7 +2141,7 @@ int ldc_map_single(struct ldc_channel *lp, struct ldc_trans_cookie *cookies, int ncookies, unsigned int map_perm) { - unsigned long npages, pa, flags; + unsigned long npages, pa;struct ldc_mtable_entry *base;struct cookie_state state;struct ldc_iommu *iommu;
@@ -2152,9 +2157,7 @@ int ldc_map_single(struct ldc_channel *lp, iommu = &lp->iommu; -spin_lock_irqsave (&iommu->lock, flags); base =alloc_npages (iommu, npages); -spin_unlock_irqrestore (&iommu->lock, flags);if (!base)return -ENOMEM ;
@@ -2172,35 +2175,25 @@ int ldc_map_single(struct ldc_channel *lp, }EXPORT_SYMBOL (ldc_map_single); +static void free_npages (unsigned long id,struct ldc_iommu *iommu,u64 cookie,u64 size) { -struct iommu_arena *arena = &iommu->arena; -unsigned long i, shift, index, npages; -struct ldc_mtable_entry *base; +unsigned long npages, entry; npages =PAGE_ALIGN (((cookie & ~PAGE_MASK ) + size)) >>PAGE_SHIFT ; - index =cookie_to_index (cookie, &shift); - base = iommu->page_table + index; - -BUG_ON (index > arena->limit || - (index + npages) > arena->limit); -for (i =0 ; i < npages; i++) { -if (base->cookie) -sun4v_ldc_revoke (id, cookie + (i << shift), - base->cookie); - base->mte =0 ; -__clear_bit (index + i, arena->map); - } + entry =ldc_cookie_to_index (cookie, iommu); +ldc_demap (iommu, id, cookie, entry, npages); +iommu_tbl_range_free (&iommu->iommu_table, cookie, npages, entry); }void ldc_unmap (struct ldc_channel *lp,struct ldc_trans_cookie *cookies,int ncookies) {struct ldc_iommu *iommu = &lp->iommu; -unsigned long flags;int i; +unsigned long flags;spin_lock_irqsave (&iommu->lock, flags);for (i =0 ; i < ncookies; i++) {
Signature · 1 line
1.7.1
David Miller
maintainerFrom: Sowmini Varadhan <[email protected]>
Date: Tue, 24 Mar 2015 13:10:27 -0400
Quoted 5 lines
Deltas from patchv5:
- removediommu_tbl_ops, and instead pass the ->flush_all as an indirection toiommu_tbl_pool_init()
- only invoke ->flush_all when there is nolarge_pool, based on the assumption that large-pool usage is infrequently encountered.
Generally this looks fine to me.
But about patch #2, I see no reason to have multiple iommu_pool_hash tables. Even from a purely sparc perspective, we can always just do with just one of them.
Furthermore, you can even probably move it down into lib/iommu-common.c itself. iommu_tbl_pool_init() can do the one time initialization.
Quoted 8 lines · David Miller
Generally this looks fine to me.
But about patch #2, I see no reason to have multiple
iommu_pool_hashtables. Even from a purely sparc perspective, we can always just do with just one of them.Furthermore, you can even probably move it down into
lib/iommu-common.citself.iommu_tbl_pool_init()can do the one time initialization.
fixed in v7.
Ben, Alexey, do you need more time to review this?
--Sowmini