More core code ENV_GET_CPU() removals
v2 cover More core code ENV_GET_CPU() removals
Hi Andreas, Richard and all,
I'm moving towards the goal of having no core code usages of ENV_GET_CPU. This has two advantages:
1: It means we are closer to common-obj'ing core code like exec.c, cpus.c and friends.
2: Multi arch is easier if ENV_GET_CPU() stays arch specific. It means I don't need those patches where I reorder the env within the arch specific CPUState. This allows continuing placement of arch specifics before the env in the CPU container (which has TCG perf advantages).
Due to point 1, I'm sending this ahead as I think it has standalone value, rather than send as part of multi-arch.
Regards,
Peter
changed since v1 (AF, Eduardo review):
Rebase of Bharata's patches
Add () to fn's in commit messages
Remove uses of ENV_GET_CPU() in target code
Include and complete cpu-exec patch (formerly in multi-arch RFC v2)
Peter Crosthwaite (5):
translate-all: Change tb_flush() env argument to cpu
gdbserver: _fork: Change fn to accept cpu instead of env
cpus: Change tcg_cpu_exec arg to cpu, not env
cpus: Change exec_init() arg to cpu, not env
cpu-exec: Purge all uses of CPU_GET_ENV()
bsd-user/main.c | 5 +++-- cpu-exec.c | 28 +++++++++++++--------------- cpus.c | 8 +++----- dtc | 2 +- exec.c | 7 +++---- gdbstub.c | 9 +++------ include/exec/exec-all.h | 4 ++-- include/exec/gdbstub.h | 2 +- linux-user/main.c | 30 +++++++++++++++--------------- linux-user/signal.c | 2 +- target-alpha/cpu.c | 2 +- target-alpha/cpu.h | 2 +- target-alpha/sys_helper.c | 2 +- target-arm/cpu.c | 2 +- target-arm/cpu.h | 2 +- target-cris/cpu.c | 2 +- target-cris/cpu.h | 2 +- target-i386/cpu.c | 2 +- target-i386/cpu.h | 2 +- target-i386/translate.c | 2 +- target-lm32/cpu.c | 2 +- target-lm32/cpu.h | 2 +- target-m68k/cpu.c | 2 +- target-m68k/cpu.h | 2 +- target-microblaze/cpu.c | 2 +- target-microblaze/cpu.h | 2 +- target-mips/cpu.c | 2 +- target-mips/cpu.h | 2 +- target-moxie/cpu.c | 2 +- target-moxie/cpu.h | 2 +- target-openrisc/cpu.c | 2 +- target-openrisc/cpu.h | 2 +- target-ppc/cpu.h | 2 +- target-ppc/translate_init.c | 2 +- target-s390x/cpu.c | 2 +- target-s390x/cpu.h | 2 +- target-sh4/cpu.c | 2 +- target-sh4/cpu.h | 2 +- target-sparc/cpu.c | 2 +- target-sparc/cpu.h | 2 +- target-tricore/cpu.c | 2 +- target-tricore/cpu.h | 2 +- target-unicore32/cpu.c | 2 +- target-unicore32/cpu.h | 3 ++- target-xtensa/cpu.c | 2 +- target-xtensa/cpu.h | 2 +- translate-all.c | 6 ++---- 47 files changed, 84 insertions(+), 92 deletions(-)
Signature · 1 line
1.9.1
PATCH v2 1/5 translate-all: Change tb_flush() env argument to cpu
All of the core-code usages of this API have the cpu pointer handy so pass it in. There are only 3 architecture specific usages (2 of which are commented out) which can just use ENV_GET_CPU() locally to get the cpu pointer. The reduces core code usage of the CPU env, which brings us closer to common-obj'ing these core files.
Cc Riku Voipio <[email protected]>
Cc Eduardo Habkost <[email protected]>
Cc Paolo Bonzini <[email protected]>
Reviewed-by Eduardo Habkost <[email protected]>
Acked-by Eduardo Habkost <[email protected]>
Signed-off-by Peter Crosthwaite <[email protected]>
---
changed since v1:
remove target-code uses of ENV_GET_CPU
Add () to fns and macros in commit message
--- dtc | 2 +- exec.c | 3 +-- gdbstub.c | 6 ++---- include/exec/exec-all.h | 2 +- linux-user/signal.c | 2 +- target-alpha/sys_helper.c | 2 +- target-i386/translate.c | 2 +- translate-all.c | 6 ++---- 8 files changed, 10 insertions(+), 15 deletions(-)
dtc +1 -1
@@ -1 +1 @@ -Subproject commit 65cc4d2748a2c2e6f27f1cf39e07a5dbabd80ebf +Subproject commit bc895d6d09695d05ceb8b52486ffe861d6cfbdde
exec.c +1 -2
@@ -798,8 +798,7 @@ void cpu_single_step(CPUState *cpu, int enabled) }else {/* must flush all the translated code to avoid inconsistencies */ /* XXX: only flush what is necessary */ -CPUArchState *env = cpu->env_ptr; -tb_flush (env); +tb_flush (cpu); } } }
gdbstub.c +2 -4
@@ -1223,7 +1223,6 @@ void gdb_set_stop_cpu(CPUState *cpu)static void gdb_vm_state_change (void *opaque,int running,RunState state) {GDBState *s = gdbserver_state; -CPUArchState *env = s->c_cpu->env_ptr;CPUState *cpu = s->c_cpu;char buf[256 ];const char *type;
@@ -1258,7 +1257,7 @@ static void gdb_vm_state_change(void *opaque, int running, RunState state) cpu->watchpoint_hit =NULL ; goto send_packet; } -tb_flush (env); +tb_flush (cpu); ret =GDB_SIGNAL_TRAP ;break ;case RUN_STATE_PAUSED :
@@ -1487,7 +1486,6 @@ gdb_queuesig (void)int gdb_handlesig (CPUState *cpu,int sig) { -CPUArchState *env = cpu->env_ptr;GDBState *s;char buf[256 ];int n;
@@ -1499,7 +1497,7 @@ gdb_handlesig(CPUState *cpu, int sig)/* disable single step if it was enabled */ cpu_single_step (cpu,0 ); -tb_flush (env); +tb_flush (cpu);if (sig !=0 ) {snprintf (buf,sizeof (buf),"S%02x" ,target_signal_to_gdb (sig));
include/exec/exec-all.h +1 -1
@@ -216,7 +216,7 @@ static inline unsigned int tb_phys_hash_func(tb_page_addr_t pc) }void tb_free (TranslationBlock *tb); -void tb_flush (CPUArchState *env); +void tb_flush (CPUState *cpu);void tb_phys_invalidate (TranslationBlock *tb,tb_page_addr_t page_addr);#if defined(USE_DIRECT_JUMP )
linux-user/signal.c +1 -1
@@ -2348,7 +2348,7 @@ static void setup_frame(int sig, struct target_sigaction *ka,/* Flush instruction space. */ //flush_sig_insns(current->mm, (unsigned long) &(sf->insns[0])); -// tb_flush(env); +// tb_flush(CPU(sparc_env_get_cpu(env))); }unlock_user (sf, sf_addr,sizeof (struct target_signal_frame ));return ;
target-alpha/sys_helper.c +1 -1
@@ -74,7 +74,7 @@ void helper_tbis(CPUAlphaState *env, uint64_t p)void helper_tb_flush (CPUAlphaState *env) { -tb_flush (env); +tb_flush (CPU (alpha_env_get_cpu (env))); }void helper_halt (uint64_t restart)
target-i386/translate.c +1 -1
@@ -6925,7 +6925,7 @@ static target_ulong disas_insn(CPUX86State *env, DisasContext *s,gen_debug (s, pc_start - s->cs_base);#else /* start debug */ -tb_flush (env); +tb_flush (CPU (x86_env_get_cpu (env)));qemu_set_log (CPU_LOG_INT |CPU_LOG_TB_IN_ASM );#endif break ;
translate-all.c +2 -4
@@ -769,10 +769,8 @@ static void page_flush_tb(void)/* flush all the translation blocks */ /* XXX: tb_flush is currently not thread safe */ -void tb_flush (CPUArchState *env1) +void tb_flush (CPUState *cpu) { -CPUState *cpu =ENV_GET_CPU (env1); -#if defined(DEBUG_FLUSH ) printf("qemu: flush code_size=%ld nb_tbs=%d avg_tb_size=%ld\n", (unsigned long)(tcg_ctx.code_gen_ptr - tcg_ctx.code_gen_buffer),
@@ -1011,7 +1009,7 @@ TranslationBlock *tb_gen_code(CPUState *cpu, tb =tb_alloc (pc);if (!tb) {/* flush must be done */ -tb_flush (env); +tb_flush (cpu);/* cannot fail at this point */ tb =tb_alloc (pc);/* Don't forget to invalidate previous TB info. */
Signature · 1 line
1.9.1
PATCH v2 2/5 gdbserver: _fork: Change fn to accept cpu instead of env
In reply to Peter CrosthwaiteAll callsites to this function navigate the cpu->env_ptr only for the function to take the env ptr back to the original cpu ptr. Change the function to just pass in the CPU pointer instead. Removes a core code usage of ENV_GET_CPU (in gdbstub.c).
Cc Riku Voipio <[email protected]>
Reviewed-by Andreas Färber <[email protected]>
Signed-off-by Peter Crosthwaite <[email protected]>
--- bsd-user/main.c | 2 +- gdbstub.c | 3 +-- include/exec/gdbstub.h | 2 +- linux-user/main.c | 2 +- 4 files changed, 4 insertions(+), 5 deletions(-)
bsd-user/main.c +1 -1
@@ -92,7 +92,7 @@ void fork_start(void)void fork_end (int child) {if (child) { -gdbserver_fork ((CPUArchState *)thread_cpu->env_ptr); +gdbserver_fork (thread_cpu); } }
gdbstub.c +1 -2
@@ -1626,9 +1626,8 @@ int gdbserver_start(int port) }/* Disable gdb stub for child processes. */ -void gdbserver_fork (CPUArchState *env) +void gdbserver_fork (CPUState *cpu) { -CPUState *cpu =ENV_GET_CPU (env);GDBState *s = gdbserver_state;if (gdbserver_fd <0 || s->fd <0 ) {
include/exec/gdbstub.h +1 -1
@@ -22,7 +22,7 @@ void gdb_exit(CPUArchState *, int);int gdb_queuesig (void );int gdb_handlesig (CPUState *,int );void gdb_signalled (CPUArchState *,int ); -void gdbserver_fork (CPUArchState *); +void gdbserver_fork (CPUState *);#endif /* Get or set a register. Returns the size of the register. */ typedef int (*gdb_reg_cb )(CPUArchState *env,uint8_t *buf,int reg);
linux-user/main.c +1 -1
@@ -130,7 +130,7 @@ void fork_end(int child)pthread_cond_init (&exclusive_cond,NULL );pthread_cond_init (&exclusive_resume,NULL );pthread_mutex_init (&tcg_ctx.tb_ctx.tb_lock,NULL ); -gdbserver_fork ((CPUArchState *)thread_cpu->env_ptr); +gdbserver_fork (thread_cpu); }else {pthread_mutex_unlock (&exclusive_lock);pthread_mutex_unlock (&tcg_ctx.tb_ctx.tb_lock);
Signature · 1 line
1.9.1
PATCH v2 3/5 cpus: Change tcg_cpu_exec arg to cpu, not env
In reply to Peter CrosthwaiteThe sole caller of this function navigates the cpu->env_ptr only for this function to take it back the cpu pointer straight away. Pass in cpu pointer instead and grab the env pointer locally in the function. Removes a core code usage of ENV_GET_CPU().
Reviewed-by Andreas Färber <[email protected]>
Signed-off-by Peter Crosthwaite <[email protected]>
---
Changed since v1:
Add () to ENV_GET_CPU() in commit message
--- cpus.c | 7 +++---- 1 file changed, 3 insertions(+), 4 deletions(-)
cpus.c +3 -4
@@ -1343,9 +1343,9 @@ int vm_stop_force_state(RunState state) } } -static int tcg_cpu_exec (CPUArchState *env) +static int tcg_cpu_exec (CPUState *cpu) { -CPUState *cpu =ENV_GET_CPU (env); +CPUArchState *env = cpu->env_ptr;int ret;#ifdef CONFIG_PROFILER int64_t ti;
@@ -1407,13 +1407,12 @@ static void tcg_exec_all(void) }for (; next_cpu !=NULL && !exit_request; next_cpu =CPU_NEXT (next_cpu)) {CPUState *cpu = next_cpu; -CPUArchState *env = cpu->env_ptr;qemu_clock_enable (QEMU_CLOCK_VIRTUAL , (cpu->singlestep_enabled &SSTEP_NOTIMER ) ==0 );if (cpu_can_run (cpu)) { - r =tcg_cpu_exec (env); + r =tcg_cpu_exec (cpu);if (r ==EXCP_DEBUG ) {cpu_handle_guest_debug (cpu);break ;
Signature · 1 line
1.9.1
PATCH v2 4/5 cpus: Change exec_init() arg to cpu, not env
In reply to Peter CrosthwaiteThe callers (most of them in target-foo/cpu.c) to this function all have the cpu pointer handy. Just pass it to avoid an ENV_GET_CPU() from core code (in exec.c).
Cc Paolo Bonzini <[email protected]>
Cc Richard Henderson <[email protected]>
Cc Peter Maydell <[email protected]>
Cc "Edgar E. Iglesias" <[email protected]>
Cc "Andreas Färber" <[email protected]>
Cc Eduardo Habkost <[email protected]>
Cc Michael Walle <[email protected]>
Cc Aurelien Jarno <[email protected]>
Cc Leon Alrae <[email protected]>
Cc Anthony Green <[email protected]>
Cc Jia Liu <[email protected]>
Cc Alexander Graf <[email protected]>
Cc Blue Swirl <[email protected]>
Cc Mark Cave-Ayland <[email protected]>
Cc Bastian Koppelmann <[email protected]>
Cc Guan Xuetao <[email protected]>
Cc Max Filippov <[email protected]>
Reviewed-by Andreas Färber <[email protected]>
Signed-off-by Peter Crosthwaite <[email protected]>
---
changed since v1:
Add () to function in commit message.
Rebase on Bharata's Error ** patch
--- exec.c | 4 ++-- include/exec/exec-all.h | 2 +- target-alpha/cpu.c | 2 +- target-arm/cpu.c | 2 +- target-cris/cpu.c | 2 +- target-i386/cpu.c | 2 +- target-lm32/cpu.c | 2 +- target-m68k/cpu.c | 2 +- target-microblaze/cpu.c | 2 +- target-mips/cpu.c | 2 +- target-moxie/cpu.c | 2 +- target-openrisc/cpu.c | 2 +- target-ppc/translate_init.c | 2 +- target-s390x/cpu.c | 2 +- target-sh4/cpu.c | 2 +- target-sparc/cpu.c | 2 +- target-tricore/cpu.c | 2 +- target-unicore32/cpu.c | 2 +- target-xtensa/cpu.c | 2 +- 19 files changed, 20 insertions(+), 20 deletions(-)
exec.c +2 -2
@@ -554,9 +554,8 @@ void cpu_exec_exit(CPUState *cpu) }#endif -void cpu_exec_init (CPUArchState *env,Error **errp) +void cpu_exec_init (CPUState *cpu,Error **errp) { -CPUState *cpu =ENV_GET_CPU (env);CPUClass *cc =CPU_GET_CLASS (cpu);int cpu_index;Error *local_err =NULL ;
@@ -585,6 +584,7 @@ void cpu_exec_init(CPUArchState *env, Error **errp)vmstate_register (NULL , cpu_index, &vmstate_cpu_common, cpu); }#if defined(CPU_SAVE_VERSION ) && !defined(CONFIG_USER_ONLY ) +CPUArchState *env = cpu->env_ptr;register_savevm (NULL ,"cpu" , cpu_index,CPU_SAVE_VERSION , cpu_save, cpu_load, env);assert (cc->vmsd ==NULL );
include/exec/exec-all.h +1 -1
@@ -88,7 +88,7 @@ void QEMU_NORETURN cpu_io_recompile(CPUState *cpu, uintptr_t retaddr);TranslationBlock *tb_gen_code (CPUState *cpu,target_ulong pc,target_ulong cs_base,int flags,int cflags); -void cpu_exec_init (CPUArchState *env,Error **errp); +void cpu_exec_init (CPUState *env,Error **errp); void QEMU_NORETURN cpu_loop_exit(CPUState *cpu);#if !defined(CONFIG_USER_ONLY )
target-alpha/cpu.c +1 -1
@@ -257,7 +257,7 @@ static void alpha_cpu_initfn(Object *obj)CPUAlphaState *env = &cpu->env; cs->env_ptr = env; -cpu_exec_init (env, &error_abort); +cpu_exec_init (cs, &error_abort);tlb_flush (cs,1 );alpha_translate_init ();
target-arm/cpu.c +1 -1
@@ -423,7 +423,7 @@ static void arm_cpu_initfn(Object *obj)static bool inited; cs->env_ptr = &cpu->env; -cpu_exec_init (&cpu->env, &error_abort); +cpu_exec_init (cs, &error_abort); cpu->cp_regs =g_hash_table_new_full (g_int_hash, g_int_equal, g_free, g_free);
target-cris/cpu.c +1 -1
@@ -184,7 +184,7 @@ static void cris_cpu_initfn(Object *obj)static bool tcg_initialized; cs->env_ptr = env; -cpu_exec_init (env, &error_abort); +cpu_exec_init (cs, &error_abort); env->pregs[PR_VR ] = ccc->vr;
target-i386/cpu.c +1 -1
@@ -3007,7 +3007,7 @@ static void x86_cpu_initfn(Object *obj)static int inited; cs->env_ptr = env; -cpu_exec_init (env, &error_abort); +cpu_exec_init (cs, &error_abort); object_property_add(obj, "family", "int", x86_cpuid_version_get_family,
target-lm32/cpu.c +1 -1
@@ -151,7 +151,7 @@ static void lm32_cpu_initfn(Object *obj)static bool tcg_initialized; cs->env_ptr = env; -cpu_exec_init (env, &error_abort); +cpu_exec_init (cs, &error_abort); env->flags =0 ;
target-m68k/cpu.c +1 -1
@@ -168,7 +168,7 @@ static void m68k_cpu_initfn(Object *obj)static bool inited; cs->env_ptr = env; -cpu_exec_init (env, &error_abort); +cpu_exec_init (cs, &error_abort);if (tcg_enabled () && !inited) { inited = true;
target-microblaze/cpu.c +1 -1
@@ -136,7 +136,7 @@ static void mb_cpu_initfn(Object *obj)static bool tcg_initialized; cs->env_ptr = env; -cpu_exec_init (env, &error_abort); +cpu_exec_init (cs, &error_abort);set_float_rounding_mode (float_round_nearest_even, &env->fp_status);
target-mips/cpu.c +1 -1
@@ -115,7 +115,7 @@ static void mips_cpu_initfn(Object *obj)CPUMIPSState *env = &cpu->env; cs->env_ptr = env; -cpu_exec_init (env, &error_abort); +cpu_exec_init (cs, &error_abort);if (tcg_enabled ()) {mips_tcg_init ();
target-moxie/cpu.c +1 -1
@@ -66,7 +66,7 @@ static void moxie_cpu_initfn(Object *obj)static int inited; cs->env_ptr = &cpu->env; -cpu_exec_init (&cpu->env, &error_abort); +cpu_exec_init (cs, &error_abort);if (tcg_enabled () && !inited) { inited =1 ;
target-openrisc/cpu.c +1 -1
@@ -92,7 +92,7 @@ static void openrisc_cpu_initfn(Object *obj)static int inited; cs->env_ptr = &cpu->env; -cpu_exec_init (&cpu->env, &error_abort); +cpu_exec_init (cs, &error_abort);#ifndef CONFIG_USER_ONLY cpu_openrisc_mmu_init (cpu);
target-ppc/translate_init.c +1 -1
@@ -8928,7 +8928,7 @@ static void ppc_cpu_realizefn(DeviceState *dev, Error **errp)return ; } -cpu_exec_init (&cpu->env, &local_err); +cpu_exec_init (cs, &local_err);if (local_err !=NULL ) {error_propagate (errp, local_err);return ;
target-s390x/cpu.c +1 -1
@@ -195,7 +195,7 @@ static void s390_cpu_initfn(Object *obj)#endif cs->env_ptr = env; -cpu_exec_init (env, &error_abort); +cpu_exec_init (cs, &error_abort);#if !defined(CONFIG_USER_ONLY )qemu_register_reset (s390_cpu_machine_reset_cb, cpu);qemu_get_timedate (&tm,0 );
target-sh4/cpu.c +1 -1
@@ -248,7 +248,7 @@ static void superh_cpu_initfn(Object *obj)CPUSH4State *env = &cpu->env; cs->env_ptr = env; -cpu_exec_init (env, &error_abort); +cpu_exec_init (cs, &error_abort); env->movcal_backup_tail = &(env->movcal_backup);
target-sparc/cpu.c +1 -1
@@ -802,7 +802,7 @@ static void sparc_cpu_initfn(Object *obj)CPUSPARCState *env = &cpu->env; cs->env_ptr = env; -cpu_exec_init (env, &error_abort); +cpu_exec_init (cs, &error_abort);if (tcg_enabled ()) {gen_intermediate_code_init (env);
target-tricore/cpu.c +1 -1
@@ -92,7 +92,7 @@ static void tricore_cpu_initfn(Object *obj)CPUTriCoreState *env = &cpu->env; cs->env_ptr = env; -cpu_exec_init (env, &error_abort); +cpu_exec_init (cs, &error_abort);if (tcg_enabled ()) {tricore_tcg_init ();
target-unicore32/cpu.c +1 -1
@@ -111,7 +111,7 @@ static void uc32_cpu_initfn(Object *obj)static bool inited; cs->env_ptr = env; -cpu_exec_init (env, &error_abort); +cpu_exec_init (cs, &error_abort);#ifdef CONFIG_USER_ONLY env->uncached_asr =ASR_MODE_USER ;
target-xtensa/cpu.c +1 -1
@@ -114,7 +114,7 @@ static void xtensa_cpu_initfn(Object *obj) cs->env_ptr = env; env->config = xcc->config; -cpu_exec_init (env, &error_abort); +cpu_exec_init (cs, &error_abort);if (tcg_enabled () && !tcg_inited) { tcg_inited = true;
Signature · 1 line
1.9.1
Re: [Qemu-devel] [PATCH v2 4/5] cpus: Change exec_init() arg to cpu, not env
Quoted 298 lines · Peter Crosthwaite
The callers (most of them in
target-foo/cpu.c) to this function all have the cpu pointer handy. Just pass it to avoid anENV_GET_CPU()from core code (inexec.c).Cc Paolo Bonzini <[email protected]>Cc Richard Henderson <[email protected]>Cc Peter Maydell <[email protected]>Cc "Edgar E. Iglesias" <[email protected]>Cc "Andreas Färber" <[email protected]>Cc Eduardo Habkost <[email protected]>Cc Michael Walle <[email protected]>Cc Aurelien Jarno <[email protected]>Cc Leon Alrae <[email protected]>Cc Anthony Green <[email protected]>Cc Jia Liu <[email protected]>Cc Alexander Graf <[email protected]>Cc Blue Swirl <[email protected]>Cc Mark Cave-Ayland <[email protected]>Cc Bastian Koppelmann <[email protected]>Cc Guan Xuetao <[email protected]>Cc Max Filippov <[email protected]>Reviewed-by Andreas Färber <[email protected]>Signed-off-by Peter Crosthwaite <[email protected]>---
changed since v1:
Add () to function in commit message.
Rebase on Bharata's Error ** patch--- exec.c | 4 ++-- include/exec/exec-all.h | 2 +- target-alpha/cpu.c | 2 +- target-arm/cpu.c | 2 +- target-cris/cpu.c | 2 +- target-i386/cpu.c | 2 +- target-lm32/cpu.c | 2 +- target-m68k/cpu.c | 2 +- target-microblaze/cpu.c | 2 +- target-mips/cpu.c | 2 +- target-moxie/cpu.c | 2 +- target-openrisc/cpu.c | 2 +- target-ppc/translate_init.c | 2 +- target-s390x/cpu.c | 2 +- target-sh4/cpu.c | 2 +- target-sparc/cpu.c | 2 +- target-tricore/cpu.c | 2 +- target-unicore32/cpu.c | 2 +- target-xtensa/cpu.c | 2 +- 19 files changed, 20 insertions(+), 20 deletions(-)exec.c +2
-2@@ -554,9 +554,8 @@ void cpu_exec_exit(CPUState *cpu) }#endif -void cpu_exec_init (CPUArchState *env,Error **errp) +void cpu_exec_init (CPUState *cpu,Error **errp) { -CPUState *cpu =ENV_GET_CPU (env);CPUClass *cc =CPU_GET_CLASS (cpu);int cpu_index;Error *local_err =NULL ;@@ -585,6 +584,7 @@ void cpu_exec_init(CPUArchState *env, Error **errp)vmstate_register (NULL , cpu_index, &vmstate_cpu_common, cpu); }#if defined(CPU_SAVE_VERSION ) && !defined(CONFIG_USER_ONLY ) +CPUArchState *env = cpu->env_ptr;register_savevm (NULL ,"cpu" , cpu_index,CPU_SAVE_VERSION , cpu_save, cpu_load, env);assert (cc->vmsd ==NULL );include/exec/exec-all.h +1
-1@@ -88,7 +88,7 @@ void QEMU_NORETURN cpu_io_recompile(CPUState *cpu, uintptr_t retaddr);TranslationBlock *tb_gen_code (CPUState *cpu,target_ulong pc,target_ulong cs_base,int flags,int cflags); -void cpu_exec_init (CPUArchState *env,Error **errp); +void cpu_exec_init (CPUState *env,Error **errp); void QEMU_NORETURN cpu_loop_exit(CPUState *cpu);#if !defined(CONFIG_USER_ONLY )target-alpha/cpu.c +1
-1@@ -257,7 +257,7 @@ static void alpha_cpu_initfn(Object *obj)CPUAlphaState *env = &cpu->env; cs->env_ptr = env; -cpu_exec_init (env, &error_abort); +cpu_exec_init (cs, &error_abort);tlb_flush (cs,1 );alpha_translate_init ();target-arm/cpu.c +1
-1@@ -423,7 +423,7 @@ static void arm_cpu_initfn(Object *obj)static bool inited; cs->env_ptr = &cpu->env; -cpu_exec_init (&cpu->env, &error_abort); +cpu_exec_init (cs, &error_abort); cpu->cp_regs =g_hash_table_new_full (g_int_hash, g_int_equal, g_free, g_free);target-cris/cpu.c +1
-1@@ -184,7 +184,7 @@ static void cris_cpu_initfn(Object *obj)static bool tcg_initialized; cs->env_ptr = env; -cpu_exec_init (env, &error_abort); +cpu_exec_init (cs, &error_abort); env->pregs[PR_VR ] = ccc->vr;target-i386/cpu.c +1
-1@@ -3007,7 +3007,7 @@ static void x86_cpu_initfn(Object *obj)static int inited; cs->env_ptr = env; -cpu_exec_init (env, &error_abort); +cpu_exec_init (cs, &error_abort); object_property_add(obj, "family", "int", x86_cpuid_version_get_family,target-lm32/cpu.c +1
-1@@ -151,7 +151,7 @@ static void lm32_cpu_initfn(Object *obj)static bool tcg_initialized; cs->env_ptr = env; -cpu_exec_init (env, &error_abort); +cpu_exec_init (cs, &error_abort); env->flags =0 ;target-m68k/cpu.c +1
-1@@ -168,7 +168,7 @@ static void m68k_cpu_initfn(Object *obj)static bool inited; cs->env_ptr = env; -cpu_exec_init (env, &error_abort); +cpu_exec_init (cs, &error_abort);if (tcg_enabled () && !inited) { inited = true;target-microblaze/cpu.c +1
-1@@ -136,7 +136,7 @@ static void mb_cpu_initfn(Object *obj)static bool tcg_initialized; cs->env_ptr = env; -cpu_exec_init (env, &error_abort); +cpu_exec_init (cs, &error_abort);set_float_rounding_mode (float_round_nearest_even, &env->fp_status);target-mips/cpu.c +1
-1@@ -115,7 +115,7 @@ static void mips_cpu_initfn(Object *obj)CPUMIPSState *env = &cpu->env; cs->env_ptr = env; -cpu_exec_init (env, &error_abort); +cpu_exec_init (cs, &error_abort);if (tcg_enabled ()) {mips_tcg_init ();target-moxie/cpu.c +1
-1@@ -66,7 +66,7 @@ static void moxie_cpu_initfn(Object *obj)static int inited; cs->env_ptr = &cpu->env; -cpu_exec_init (&cpu->env, &error_abort); +cpu_exec_init (cs, &error_abort);if (tcg_enabled () && !inited) { inited =1 ;target-openrisc/cpu.c +1
-1@@ -92,7 +92,7 @@ static void openrisc_cpu_initfn(Object *obj)static int inited; cs->env_ptr = &cpu->env; -cpu_exec_init (&cpu->env, &error_abort); +cpu_exec_init (cs, &error_abort);#ifndef CONFIG_USER_ONLY cpu_openrisc_mmu_init (cpu);target-ppc/translate_init.c +1
-1@@ -8928,7 +8928,7 @@ static void ppc_cpu_realizefn(DeviceState *dev, Error **errp)return ; } -cpu_exec_init (&cpu->env, &local_err); +cpu_exec_init (cs, &local_err);if (local_err !=NULL ) {error_propagate (errp, local_err);return ;target-s390x/cpu.c +1
-1@@ -195,7 +195,7 @@ static void s390_cpu_initfn(Object *obj)#endif cs->env_ptr = env; -cpu_exec_init (env, &error_abort); +cpu_exec_init (cs, &error_abort);#if !defined(CONFIG_USER_ONLY )qemu_register_reset (s390_cpu_machine_reset_cb, cpu);qemu_get_timedate (&tm,0 );target-sh4/cpu.c +1
-1@@ -248,7 +248,7 @@ static void superh_cpu_initfn(Object *obj)CPUSH4State *env = &cpu->env; cs->env_ptr = env; -cpu_exec_init (env, &error_abort); +cpu_exec_init (cs, &error_abort); env->movcal_backup_tail = &(env->movcal_backup);target-sparc/cpu.c +1
-1@@ -802,7 +802,7 @@ static void sparc_cpu_initfn(Object *obj)CPUSPARCState *env = &cpu->env; cs->env_ptr = env; -cpu_exec_init (env, &error_abort); +cpu_exec_init (cs, &error_abort);if (tcg_enabled ()) {gen_intermediate_code_init (env);target-tricore/cpu.c +1
-1@@ -92,7 +92,7 @@ static void tricore_cpu_initfn(Object *obj)CPUTriCoreState *env = &cpu->env; cs->env_ptr = env; -cpu_exec_init (env, &error_abort); +cpu_exec_init (cs, &error_abort);if (tcg_enabled ()) {tricore_tcg_init ();target-unicore32/cpu.c +1
-1@@ -111,7 +111,7 @@ static void uc32_cpu_initfn(Object *obj)static bool inited; cs->env_ptr = env; -cpu_exec_init (env, &error_abort); +cpu_exec_init (cs, &error_abort);#ifdef CONFIG_USER_ONLY env->uncached_asr =ASR_MODE_USER ;target-xtensa/cpu.c +0
-0
target-xtensa/cpu.c static void xtensa_cpu_initfn(Object *obj) · line 120
Quoted 8 lines
target-xtensa/cpu.c +1
-1@@ -114,7 +114,7 @@ static void xtensa_cpu_initfn(Object *obj) cs->env_ptr = env; env->config = xcc->config; -cpu_exec_init (env, &error_abort); +cpu_exec_init (cs, &error_abort);if (tcg_enabled () && !tcg_inited) { tcg_inited = true;
Reviewed-by Aurelien Jarno <[email protected]>
Signature · 2 lines
Aurelien Jarno GPG: 4096R/1DDD8C9B [email protected] http://www.aurel32.net
PATCH v2 5/5 cpu-exec: Purge all uses of CPU_GET_ENV()
In reply to Peter CrosthwaiteRemove un-needed usages of CPU_GET_ENV() by converting the APIs to use CPUState pointers and retrieving the env_ptr as minimally needed.
Scripted conversion for target-* change:
for I in target-*/cpu.h; do
sed -i \
's/\(^int cpu_[^_]*_exec(\)[^ ][^ ]* \*s);$/\1CPUState *cpu);/' \
$I;done
Signed-off-by Peter Crosthwaite <[email protected]>
---
Changed since RFC v2 (RTH review):
Apply target-* change pattern to all arches.
Avoid use of cpu_ptr for X86 specifics
Add () to ENV_GET_CPU macros in commit message
Add BSD and Linux user needed changes
Add missing architecture changes
--- bsd-user/main.c | 3 ++- cpu-exec.c | 28 +++++++++++++--------------- cpus.c | 3 +-- linux-user/main.c | 28 ++++++++++++++-------------- target-alpha/cpu.h | 2 +- target-arm/cpu.h | 2 +- target-cris/cpu.h | 2 +- target-i386/cpu.h | 2 +- target-lm32/cpu.h | 2 +- target-m68k/cpu.h | 2 +- target-microblaze/cpu.h | 2 +- target-mips/cpu.h | 2 +- target-moxie/cpu.h | 2 +- target-openrisc/cpu.h | 2 +- target-ppc/cpu.h | 2 +- target-s390x/cpu.h | 2 +- target-sh4/cpu.h | 2 +- target-sparc/cpu.h | 2 +- target-tricore/cpu.h | 2 +- target-unicore32/cpu.h | 3 ++- target-xtensa/cpu.h | 2 +- 21 files changed, 48 insertions(+), 49 deletions(-)
bsd-user/main.c +2 -1
@@ -166,6 +166,7 @@ static void set_idt(int n, unsigned int dpl)void cpu_loop (CPUX86State *env) { +CPUState *cs =CPU (x86_env_get_cpu (env));int trapnr;abi_ulong pc;//target_siginfo_t info;
@@ -512,7 +513,7 @@ void cpu_loop(CPUSPARCState *env)//target_siginfo_t info; while (1 ) { - trapnr =cpu_sparc_exec (env); + trapnr =cpu_sparc_exec (cs);switch (trapnr) {#ifndef TARGET_SPARC64
cpu-exec.c +13 -15
@@ -226,10 +226,9 @@ static inline tcg_target_ulong cpu_tb_exec(CPUState *cpu, uint8_t *tb_ptr)/* Execute the code without caching the generated code. An interpreter could be used if available. */ -static void cpu_exec_nocache (CPUArchState *env,int max_cycles, +static void cpu_exec_nocache (CPUState *cpu,int max_cycles,TranslationBlock *orig_tb) { -CPUState *cpu =ENV_GET_CPU (env);TranslationBlock *tb;target_ulong pc = orig_tb->pc;target_ulong cs_base = orig_tb->cs_base;
@@ -253,12 +252,12 @@ static void cpu_exec_nocache(CPUArchState *env, int max_cycles,tb_free (tb); } -static TranslationBlock *tb_find_slow (CPUArchState *env, +static TranslationBlock *tb_find_slow (CPUState *cpu,target_ulong pc,target_ulong cs_base,uint64_t flags) { -CPUState *cpu =ENV_GET_CPU (env); +CPUArchState *env = (CPUArchState *)cpu->env_ptr;TranslationBlock *tb, **ptb1;unsigned int h;tb_page_addr_t phys_pc, phys_page1;
@@ -310,9 +309,9 @@ static TranslationBlock *tb_find_slow(CPUArchState *env,return tb; } -static inline TranslationBlock *tb_find_fast (CPUArchState *env) +static inline TranslationBlock *tb_find_fast (CPUState *cpu) { -CPUState *cpu =ENV_GET_CPU (env); +CPUArchState *env = (CPUArchState *)cpu->env_ptr;TranslationBlock *tb;target_ulong cs_base, pc;int flags;
@@ -324,14 +323,13 @@ static inline TranslationBlock *tb_find_fast(CPUArchState *env) tb = cpu->tb_jmp_cache[tb_jmp_cache_hash_func (pc)];if (unlikely (!tb || tb->pc != pc || tb->cs_base != cs_base || tb->flags != flags)) { - tb =tb_find_slow (env, pc, cs_base, flags); + tb =tb_find_slow (cpu, pc, cs_base, flags); }return tb; } -static void cpu_handle_debug_exception (CPUArchState *env) +static void cpu_handle_debug_exception (CPUState *cpu) { -CPUState *cpu =ENV_GET_CPU (env);CPUClass *cc =CPU_GET_CLASS (cpu);CPUWatchpoint *wp;
@@ -348,12 +346,12 @@ static void cpu_handle_debug_exception(CPUArchState *env)volatile sig_atomic_t exit_request; -int cpu_exec (CPUArchState *env) +int cpu_exec (CPUState *cpu) { -CPUState *cpu =ENV_GET_CPU (env);CPUClass *cc =CPU_GET_CLASS (cpu);#ifdef TARGET_I386 X86CPU *x86_cpu =X86_CPU (cpu); +CPUArchState *env = &x86_cpu->env;#endif int ret, interrupt_request;TranslationBlock *tb;
@@ -406,7 +404,7 @@ int cpu_exec(CPUArchState *env)/* exit request from the cpu execution loop */ ret = cpu->exception_index;if (ret ==EXCP_DEBUG ) { -cpu_handle_debug_exception (env); +cpu_handle_debug_exception (cpu); } cpu->exception_index =-1 ;break ;
@@ -482,7 +480,7 @@ int cpu_exec(CPUArchState *env) }spin_lock (&tcg_ctx.tb_ctx.tb_lock); have_tb_lock = true; - tb =tb_find_fast (env); + tb =tb_find_fast (cpu);/* Note: we do it here to avoid a gcc bug on Mac OS X when doing it in tb_find_slow */ if (tcg_ctx.tb_ctx.tb_invalidated_flag) {
@@ -542,7 +540,7 @@ int cpu_exec(CPUArchState *env)if (insns_left >0 ) {/* Execute remaining instructions. */ tb = (TranslationBlock *)(next_tb & ~TB_EXIT_MASK ); -cpu_exec_nocache (env, insns_left, tb); +cpu_exec_nocache (cpu, insns_left, tb);align_clocks (&sc, cpu); } cpu->exception_index =EXCP_INTERRUPT ;
@@ -566,11 +564,11 @@ int cpu_exec(CPUArchState *env)/* Reload env after longjmp - the compiler may have smashed all * local variables as longjmp is marked 'noreturn'. */ cpu = current_cpu; - env = cpu->env_ptr; cc =CPU_GET_CLASS (cpu); cpu->can_do_io =1 ;#ifdef TARGET_I386 x86_cpu =X86_CPU (cpu); + env = &x86_cpu->env;#endif if (have_tb_lock) {spin_unlock (&tcg_ctx.tb_ctx.tb_lock);
cpus.c +1 -2
@@ -1345,7 +1345,6 @@ int vm_stop_force_state(RunState state)static int tcg_cpu_exec (CPUState *cpu) { -CPUArchState *env = cpu->env_ptr;int ret;#ifdef CONFIG_PROFILER int64_t ti;
@@ -1380,7 +1379,7 @@ static int tcg_cpu_exec(CPUState *cpu) cpu->icount_decr.u16.low = decr; cpu->icount_extra = count; } - ret =cpu_exec (env); + ret =cpu_exec (cpu);#ifdef CONFIG_PROFILER tcg_time +=profile_getclock () - ti;#endif
linux-user/main.c +14 -14
@@ -280,7 +280,7 @@ void cpu_loop(CPUX86State *env)for (;;) {cpu_exec_start (cs); - trapnr =cpu_x86_exec (env); + trapnr =cpu_x86_exec (cs);cpu_exec_end (cs);switch (trapnr) {case 0x80 :
@@ -674,7 +674,7 @@ void cpu_loop(CPUARMState *env)for (;;) {cpu_exec_start (cs); - trapnr =cpu_arm_exec (env); + trapnr =cpu_arm_exec (cs);cpu_exec_end (cs);switch (trapnr) {case EXCP_UDEF :
@@ -1005,7 +1005,7 @@ void cpu_loop(CPUARMState *env)for (;;) {cpu_exec_start (cs); - trapnr =cpu_arm_exec (env); + trapnr =cpu_arm_exec (cs);cpu_exec_end (cs);switch (trapnr) {
@@ -1084,7 +1084,7 @@ void cpu_loop(CPUUniCore32State *env)for (;;) {cpu_exec_start (cs); - trapnr =uc32_cpu_exec (env); + trapnr =uc32_cpu_exec (cs);cpu_exec_end (cs);switch (trapnr) {case UC32_EXCP_PRIV :
@@ -1285,7 +1285,7 @@ void cpu_loop (CPUSPARCState *env)while (1 ) {cpu_exec_start (cs); - trapnr =cpu_sparc_exec (env); + trapnr =cpu_sparc_exec (cs);cpu_exec_end (cs);/* Compute PSR before exposing state. */
@@ -1566,7 +1566,7 @@ void cpu_loop(CPUPPCState *env)for (;;) {cpu_exec_start (cs); - trapnr =cpu_ppc_exec (env); + trapnr =cpu_ppc_exec (cs);cpu_exec_end (cs);switch (trapnr) {case POWERPC_EXCP_NONE :
@@ -2418,7 +2418,7 @@ void cpu_loop(CPUMIPSState *env)for (;;) {cpu_exec_start (cs); - trapnr =cpu_mips_exec (env); + trapnr =cpu_mips_exec (cs);cpu_exec_end (cs);switch (trapnr) {case EXCP_SYSCALL :
@@ -2655,7 +2655,7 @@ void cpu_loop(CPUOpenRISCState *env)for (;;) {cpu_exec_start (cs); - trapnr =cpu_exec (env); + trapnr =cpu_exec (cs);cpu_exec_end (cs); gdbsig =0 ;
@@ -2745,7 +2745,7 @@ void cpu_loop(CPUSH4State *env)while (1 ) {cpu_exec_start (cs); - trapnr =cpu_sh4_exec (env); + trapnr =cpu_sh4_exec (cs);cpu_exec_end (cs);switch (trapnr) {
@@ -2807,7 +2807,7 @@ void cpu_loop(CPUCRISState *env)while (1 ) {cpu_exec_start (cs); - trapnr =cpu_cris_exec (env); + trapnr =cpu_cris_exec (cs);cpu_exec_end (cs);switch (trapnr) {case 0xaa :
@@ -2868,7 +2868,7 @@ void cpu_loop(CPUMBState *env)while (1 ) {cpu_exec_start (cs); - trapnr =cpu_mb_exec (env); + trapnr =cpu_mb_exec (cs);cpu_exec_end (cs);switch (trapnr) {case 0xaa :
@@ -2973,7 +2973,7 @@ void cpu_loop(CPUM68KState *env)for (;;) {cpu_exec_start (cs); - trapnr =cpu_m68k_exec (env); + trapnr =cpu_m68k_exec (cs);cpu_exec_end (cs);switch (trapnr) {case EXCP_ILLEGAL :
@@ -3112,7 +3112,7 @@ void cpu_loop(CPUAlphaState *env)while (1 ) {cpu_exec_start (cs); - trapnr =cpu_alpha_exec (env); + trapnr =cpu_alpha_exec (cs);cpu_exec_end (cs);/* All of the traps imply a transition through PALcode, which
@@ -3300,7 +3300,7 @@ void cpu_loop(CPUS390XState *env)while (1 ) {cpu_exec_start (cs); - trapnr =cpu_s390x_exec (env); + trapnr =cpu_s390x_exec (cs);cpu_exec_end (cs);switch (trapnr) {case EXCP_INTERRUPT :
target-alpha/cpu.h +1 -1
@@ -431,7 +431,7 @@ AlphaCPU *cpu_alpha_init(const char *cpu_model);#define cpu_init (cpu_model) CPU(cpu_alpha_init(cpu_model))void alpha_cpu_list (FILE *f,fprintf_function cpu_fprintf); -int cpu_alpha_exec (CPUAlphaState *s); +int cpu_alpha_exec (CPUState *cpu);/* you can call this signal handler from your SIGBUS and SIGSEGV signal handlers to inform the virtual CPU of exceptions. non zero is returned if the signal was handled by the virtual CPU. */
target-arm/cpu.h +1 -1
@@ -490,7 +490,7 @@ typedef struct CPUARMState {#include "cpu-qom.h" ARMCPU *cpu_arm_init (const char *cpu_model); -int cpu_arm_exec (CPUARMState *s); +int cpu_arm_exec (CPUState *cpu);uint32_t do_arm_semihosting (CPUARMState *env);void aarch64_sync_32_to_64 (CPUARMState *env);void aarch64_sync_64_to_32 (CPUARMState *env);
target-cris/cpu.h +1 -1
@@ -176,7 +176,7 @@ typedef struct CPUCRISState {#include "cpu-qom.h" CRISCPU *cpu_cris_init (const char *cpu_model); -int cpu_cris_exec (CPUCRISState *s); +int cpu_cris_exec (CPUState *cpu);/* you can call this signal handler from your SIGBUS and SIGSEGV signal handlers to inform the virtual CPU of exceptions. non zero is returned if the signal was handled by the virtual CPU. */
target-i386/cpu.h +1 -1
@@ -983,7 +983,7 @@ typedef struct CPUX86State {X86CPU *cpu_x86_init (const char *cpu_model);X86CPU *cpu_x86_create (const char *cpu_model,Error **errp); -int cpu_x86_exec (CPUX86State *s); +int cpu_x86_exec (CPUState *cpu);void x86_cpu_list (FILE *f,fprintf_function cpu_fprintf);void x86_cpudef_setup (void );int cpu_x86_support_mca_broadcast (CPUX86State *env);
target-lm32/cpu.h +1 -1
@@ -199,7 +199,7 @@ static inline lm32_wp_t lm32_wp_type(uint32_t dc, int idx)#include "cpu-qom.h" LM32CPU *cpu_lm32_init (const char *cpu_model); -int cpu_lm32_exec (CPULM32State *s); +int cpu_lm32_exec (CPUState *cpu);/* you can call this signal handler from your SIGBUS and SIGSEGV signal handlers to inform the virtual CPU of exceptions. non zero is returned if the signal was handled by the virtual CPU. */
target-m68k/cpu.h +1 -1
@@ -117,7 +117,7 @@ typedef struct CPUM68KState {void m68k_tcg_init (void );void m68k_cpu_init_gdb (M68kCPU *cpu);M68kCPU *cpu_m68k_init (const char *cpu_model); -int cpu_m68k_exec (CPUM68KState *s); +int cpu_m68k_exec (CPUState *cpu);/* you can call this signal handler from your SIGBUS and SIGSEGV signal handlers to inform the virtual CPU of exceptions. non zero is returned if the signal was handled by the virtual CPU. */
target-microblaze/cpu.h +1 -1
@@ -276,7 +276,7 @@ struct CPUMBState {void mb_tcg_init (void );MicroBlazeCPU *cpu_mb_init (const char *cpu_model); -int cpu_mb_exec (CPUMBState *s); +int cpu_mb_exec (CPUState *cpu);/* you can call this signal handler from your SIGBUS and SIGSEGV signal handlers to inform the virtual CPU of exceptions. non zero is returned if the signal was handled by the virtual CPU. */
target-mips/cpu.h +1 -1
@@ -746,7 +746,7 @@ enum {*/ #define CPU_INTERRUPT_WAKE CPU_INTERRUPT_TGT_INT_0 -int cpu_mips_exec (CPUMIPSState *s); +int cpu_mips_exec (CPUState *cpu);void mips_tcg_init (void );MIPSCPU *cpu_mips_init (const char *cpu_model);int cpu_mips_signal_handler (int host_signum,void *pinfo,void *puc);
target-moxie/cpu.h +1 -1
@@ -112,7 +112,7 @@ static inline MoxieCPU *moxie_env_get_cpu(CPUMoxieState *env)#define ENV_OFFSET offsetof(MoxieCPU, env)MoxieCPU *cpu_moxie_init (const char *cpu_model); -int cpu_moxie_exec (CPUMoxieState *s); +int cpu_moxie_exec (CPUState *cpu);void moxie_cpu_do_interrupt (CPUState *cs);void moxie_cpu_dump_state (CPUState *cpu,FILE *f,fprintf_function cpu_fprintf,int flags);
target-openrisc/cpu.h +1 -1
@@ -346,7 +346,7 @@ static inline OpenRISCCPU *openrisc_env_get_cpu(CPUOpenRISCState *env)OpenRISCCPU *cpu_openrisc_init (const char *cpu_model);void cpu_openrisc_list (FILE *f,fprintf_function cpu_fprintf); -int cpu_openrisc_exec (CPUOpenRISCState *s); +int cpu_openrisc_exec (CPUState *cpu);void openrisc_cpu_do_interrupt (CPUState *cpu);bool openrisc_cpu_exec_interrupt (CPUState *cpu,int int_req); void openrisc_cpu_dump_state(CPUState *cpu, FILE *f,
target-ppc/cpu.h +1 -1
@@ -1164,7 +1164,7 @@ do { \PowerPCCPU *cpu_ppc_init (const char *cpu_model);void ppc_translate_init (void );void gen_update_current_nip (void *opaque); -int cpu_ppc_exec (CPUPPCState *s); +int cpu_ppc_exec (CPUState *s);/* you can call this signal handler from your SIGBUS and SIGSEGV signal handlers to inform the virtual CPU of exceptions. non zero is returned if the signal was handled by the virtual CPU. */
target-s390x/cpu.h +1 -1
@@ -375,7 +375,7 @@ void trigger_pgm_exception(CPUS390XState *env, uint32_t code, uint32_t ilen);S390CPU *cpu_s390x_init (const char *cpu_model);void s390x_translate_init (void ); -int cpu_s390x_exec (CPUS390XState *s); +int cpu_s390x_exec (CPUState *cpu);/* you can call this signal handler from your SIGBUS and SIGSEGV signal handlers to inform the virtual CPU of exceptions. non zero
target-sh4/cpu.h +1 -1
@@ -193,7 +193,7 @@ typedef struct CPUSH4State {void sh4_translate_init (void );SuperHCPU *cpu_sh4_init (const char *cpu_model); -int cpu_sh4_exec (CPUSH4State * s); +int cpu_sh4_exec (CPUState *s);int cpu_sh4_signal_handler (int host_signum,void *pinfo,void *puc); int superh_cpu_handle_mmu_fault(CPUState *cpu, vaddr address, int rw,
target-sparc/cpu.h +1 -1
@@ -537,7 +537,7 @@ int sparc_cpu_memory_rw_debug(CPUState *cpu, vaddr addr,void gen_intermediate_code_init (CPUSPARCState *env);/* cpu-exec.c */ -int cpu_sparc_exec (CPUSPARCState *s); +int cpu_sparc_exec (CPUState *cpu);/* win_helper.c */ target_ulong cpu_get_psr (CPUSPARCState *env1);
target-tricore/cpu.h +1 -1
@@ -372,7 +372,7 @@ enum { };void cpu_state_reset (CPUTriCoreState *s); -int cpu_tricore_exec (CPUTriCoreState *s); +int cpu_tricore_exec (CPUState *cpu);void tricore_tcg_init (void );int cpu_tricore_signal_handler (int host_signum,void *pinfo,void *puc);
target-unicore32/cpu.h +2 -1
@@ -125,7 +125,6 @@ void cpu_asr_write(CPUUniCore32State *env1, target_ulong val, target_ulong mask)#define cpu_exec uc32_cpu_exec#define cpu_signal_handler uc32_cpu_signal_handler -int uc32_cpu_exec (CPUUniCore32State *s);int uc32_cpu_signal_handler (int host_signum,void *pinfo,void *puc);/* MMU modes definitions */
@@ -141,6 +140,8 @@ static inline int cpu_mmu_index(CPUUniCore32State *env)#include "cpu-qom.h" #include "exec/exec-all.h" +int uc32_cpu_exec (CPUState *s); +UniCore32CPU *uc32_cpu_init (const char *cpu_model);#define cpu_init (cpu_model) CPU(uc32_cpu_init(cpu_model))
target-xtensa/cpu.h +1 -1
@@ -383,7 +383,7 @@ XtensaCPU *cpu_xtensa_init(const char *cpu_model);void xtensa_translate_init (void );void xtensa_breakpoint_handler (CPUState *cs); -int cpu_xtensa_exec (CPUXtensaState *s); +int cpu_xtensa_exec (CPUState *cpu);void xtensa_register_core (XtensaConfigList *node);void check_interrupts (CPUXtensaState *s);void xtensa_irq_init (CPUXtensaState *env);
Signature · 1 line
1.9.1
Re: [Qemu-devel] [PATCH v2 5/5] cpu-exec: Purge all uses of CPU_GET_ENV()
Quoted 1 line · Peter Crosthwaite
Remove un-needed usages of
CPU_GET_ENV()by converting the APIs to use
Your patch subject and your commit message talks about CPU_GET_ENV(), while the patch itself changes ENV_GET_CPU().
Quoted 563 lines
CPUState pointers and retrieving the
env_ptras minimally needed.Scripted conversion for target-* change:
for I in
target-*/cpu.h; dosed -i \ 's/\(^int cpu_[^_]*_exec(\)[^ ][^ ]* \*s);$/\1CPUState *cpu);/' \ $I;done
Signed-off-by Peter Crosthwaite <[email protected]>---
Changed since RFC v2 (RTH review):
Apply target-* change pattern to all arches. Avoid use ofcpu_ptrfor X86 specifics Add () toENV_GET_CPUmacros in commit message Add BSD and Linux user needed changes Add missing architecture changes--- bsd-user/main.c | 3 ++- cpu-exec.c | 28 +++++++++++++--------------- cpus.c | 3 +-- linux-user/main.c | 28 ++++++++++++++-------------- target-alpha/cpu.h | 2 +- target-arm/cpu.h | 2 +- target-cris/cpu.h | 2 +- target-i386/cpu.h | 2 +- target-lm32/cpu.h | 2 +- target-m68k/cpu.h | 2 +- target-microblaze/cpu.h | 2 +- target-mips/cpu.h | 2 +- target-moxie/cpu.h | 2 +- target-openrisc/cpu.h | 2 +- target-ppc/cpu.h | 2 +- target-s390x/cpu.h | 2 +- target-sh4/cpu.h | 2 +- target-sparc/cpu.h | 2 +- target-tricore/cpu.h | 2 +- target-unicore32/cpu.h | 3 ++- target-xtensa/cpu.h | 2 +- 21 files changed, 48 insertions(+), 49 deletions(-)bsd-user/main.c +2
-1@@ -166,6 +166,7 @@ static void set_idt(int n, unsigned int dpl)void cpu_loop (CPUX86State *env) { +CPUState *cs =CPU (x86_env_get_cpu (env));int trapnr;abi_ulong pc;//target_siginfo_t info; @@ -512,7 +513,7 @@ void cpu_loop(CPUSPARCState *env)//target_siginfo_t info; while (1 ) { - trapnr =cpu_sparc_exec (env); + trapnr =cpu_sparc_exec (cs);switch (trapnr) {#ifndef TARGET_SPARC64 cpu-exec.c +13
-15@@ -226,10 +226,9 @@ static inline tcg_target_ulong cpu_tb_exec(CPUState *cpu, uint8_t *tb_ptr)/* Execute the code without caching the generated code. An interpreter could be used if available. */ -static void cpu_exec_nocache (CPUArchState *env,int max_cycles, +static void cpu_exec_nocache (CPUState *cpu,int max_cycles,TranslationBlock *orig_tb) { -CPUState *cpu =ENV_GET_CPU (env);TranslationBlock *tb;target_ulong pc = orig_tb->pc;target_ulong cs_base = orig_tb->cs_base;@@ -253,12 +252,12 @@ static void cpu_exec_nocache(CPUArchState *env, int max_cycles,tb_free (tb); } -static TranslationBlock *tb_find_slow (CPUArchState *env, +static TranslationBlock *tb_find_slow (CPUState *cpu,target_ulong pc,target_ulong cs_base,uint64_t flags) { -CPUState *cpu =ENV_GET_CPU (env); +CPUArchState *env = (CPUArchState *)cpu->env_ptr;TranslationBlock *tb, **ptb1;unsigned int h;tb_page_addr_t phys_pc, phys_page1;@@ -310,9 +309,9 @@ static TranslationBlock *tb_find_slow(CPUArchState *env,return tb; } -static inline TranslationBlock *tb_find_fast (CPUArchState *env) +static inline TranslationBlock *tb_find_fast (CPUState *cpu) { -CPUState *cpu =ENV_GET_CPU (env); +CPUArchState *env = (CPUArchState *)cpu->env_ptr;TranslationBlock *tb;target_ulong cs_base, pc;int flags;@@ -324,14 +323,13 @@ static inline TranslationBlock *tb_find_fast(CPUArchState *env) tb = cpu->tb_jmp_cache[tb_jmp_cache_hash_func (pc)];if (unlikely (!tb || tb->pc != pc || tb->cs_base != cs_base || tb->flags != flags)) { - tb =tb_find_slow (env, pc, cs_base, flags); + tb =tb_find_slow (cpu, pc, cs_base, flags); }return tb; } -static void cpu_handle_debug_exception (CPUArchState *env) +static void cpu_handle_debug_exception (CPUState *cpu) { -CPUState *cpu =ENV_GET_CPU (env);CPUClass *cc =CPU_GET_CLASS (cpu);CPUWatchpoint *wp;@@ -348,12 +346,12 @@ static void cpu_handle_debug_exception(CPUArchState *env)volatile sig_atomic_t exit_request; -int cpu_exec (CPUArchState *env) +int cpu_exec (CPUState *cpu) { -CPUState *cpu =ENV_GET_CPU (env);CPUClass *cc =CPU_GET_CLASS (cpu);#ifdef TARGET_I386 X86CPU *x86_cpu =X86_CPU (cpu); +CPUArchState *env = &x86_cpu->env;#endif int ret, interrupt_request;TranslationBlock *tb;@@ -406,7 +404,7 @@ int cpu_exec(CPUArchState *env)/* exit request from the cpu execution loop */ ret = cpu->exception_index;if (ret ==EXCP_DEBUG ) { -cpu_handle_debug_exception (env); +cpu_handle_debug_exception (cpu); } cpu->exception_index =-1 ;break ;@@ -482,7 +480,7 @@ int cpu_exec(CPUArchState *env) }spin_lock (&tcg_ctx.tb_ctx.tb_lock); have_tb_lock = true; - tb =tb_find_fast (env); + tb =tb_find_fast (cpu);/* Note: we do it here to avoid a gcc bug on Mac OS X when doing it in tb_find_slow */ if (tcg_ctx.tb_ctx.tb_invalidated_flag) {@@ -542,7 +540,7 @@ int cpu_exec(CPUArchState *env)if (insns_left >0 ) {/* Execute remaining instructions. */ tb = (TranslationBlock *)(next_tb & ~TB_EXIT_MASK ); -cpu_exec_nocache (env, insns_left, tb); +cpu_exec_nocache (cpu, insns_left, tb);align_clocks (&sc, cpu); } cpu->exception_index =EXCP_INTERRUPT ;@@ -566,11 +564,11 @@ int cpu_exec(CPUArchState *env)/* Reload env after longjmp - the compiler may have smashed all * local variables as longjmp is marked 'noreturn'. */ cpu = current_cpu; - env = cpu->env_ptr; cc =CPU_GET_CLASS (cpu); cpu->can_do_io =1 ;#ifdef TARGET_I386 x86_cpu =X86_CPU (cpu); + env = &x86_cpu->env;#endif if (have_tb_lock) {spin_unlock (&tcg_ctx.tb_ctx.tb_lock);cpus.c +1
-2@@ -1345,7 +1345,6 @@ int vm_stop_force_state(RunState state)static int tcg_cpu_exec (CPUState *cpu) { -CPUArchState *env = cpu->env_ptr;int ret;#ifdef CONFIG_PROFILER int64_t ti;@@ -1380,7 +1379,7 @@ static int tcg_cpu_exec(CPUState *cpu) cpu->icount_decr.u16.low = decr; cpu->icount_extra = count; } - ret =cpu_exec (env); + ret =cpu_exec (cpu);#ifdef CONFIG_PROFILER tcg_time +=profile_getclock () - ti;#endif linux-user/main.c +14
-14@@ -280,7 +280,7 @@ void cpu_loop(CPUX86State *env)for (;;) {cpu_exec_start (cs); - trapnr =cpu_x86_exec (env); + trapnr =cpu_x86_exec (cs);cpu_exec_end (cs);switch (trapnr) {case 0x80 :@@ -674,7 +674,7 @@ void cpu_loop(CPUARMState *env)for (;;) {cpu_exec_start (cs); - trapnr =cpu_arm_exec (env); + trapnr =cpu_arm_exec (cs);cpu_exec_end (cs);switch (trapnr) {case EXCP_UDEF :@@ -1005,7 +1005,7 @@ void cpu_loop(CPUARMState *env)for (;;) {cpu_exec_start (cs); - trapnr =cpu_arm_exec (env); + trapnr =cpu_arm_exec (cs);cpu_exec_end (cs);switch (trapnr) {@@ -1084,7 +1084,7 @@ void cpu_loop(CPUUniCore32State *env)for (;;) {cpu_exec_start (cs); - trapnr =uc32_cpu_exec (env); + trapnr =uc32_cpu_exec (cs);cpu_exec_end (cs);switch (trapnr) {case UC32_EXCP_PRIV :@@ -1285,7 +1285,7 @@ void cpu_loop (CPUSPARCState *env)while (1 ) {cpu_exec_start (cs); - trapnr =cpu_sparc_exec (env); + trapnr =cpu_sparc_exec (cs);cpu_exec_end (cs);/* Compute PSR before exposing state. */ @@ -1566,7 +1566,7 @@ void cpu_loop(CPUPPCState *env)for (;;) {cpu_exec_start (cs); - trapnr =cpu_ppc_exec (env); + trapnr =cpu_ppc_exec (cs);cpu_exec_end (cs);switch (trapnr) {case POWERPC_EXCP_NONE :@@ -2418,7 +2418,7 @@ void cpu_loop(CPUMIPSState *env)for (;;) {cpu_exec_start (cs); - trapnr =cpu_mips_exec (env); + trapnr =cpu_mips_exec (cs);cpu_exec_end (cs);switch (trapnr) {case EXCP_SYSCALL :@@ -2655,7 +2655,7 @@ void cpu_loop(CPUOpenRISCState *env)for (;;) {cpu_exec_start (cs); - trapnr =cpu_exec (env); + trapnr =cpu_exec (cs);cpu_exec_end (cs); gdbsig =0 ;@@ -2745,7 +2745,7 @@ void cpu_loop(CPUSH4State *env)while (1 ) {cpu_exec_start (cs); - trapnr =cpu_sh4_exec (env); + trapnr =cpu_sh4_exec (cs);cpu_exec_end (cs);switch (trapnr) {@@ -2807,7 +2807,7 @@ void cpu_loop(CPUCRISState *env)while (1 ) {cpu_exec_start (cs); - trapnr =cpu_cris_exec (env); + trapnr =cpu_cris_exec (cs);cpu_exec_end (cs);switch (trapnr) {case 0xaa :@@ -2868,7 +2868,7 @@ void cpu_loop(CPUMBState *env)while (1 ) {cpu_exec_start (cs); - trapnr =cpu_mb_exec (env); + trapnr =cpu_mb_exec (cs);cpu_exec_end (cs);switch (trapnr) {case 0xaa :@@ -2973,7 +2973,7 @@ void cpu_loop(CPUM68KState *env)for (;;) {cpu_exec_start (cs); - trapnr =cpu_m68k_exec (env); + trapnr =cpu_m68k_exec (cs);cpu_exec_end (cs);switch (trapnr) {case EXCP_ILLEGAL :@@ -3112,7 +3112,7 @@ void cpu_loop(CPUAlphaState *env)while (1 ) {cpu_exec_start (cs); - trapnr =cpu_alpha_exec (env); + trapnr =cpu_alpha_exec (cs);cpu_exec_end (cs);/* All of the traps imply a transition through PALcode, which @@ -3300,7 +3300,7 @@ void cpu_loop(CPUS390XState *env)while (1 ) {cpu_exec_start (cs); - trapnr =cpu_s390x_exec (env); + trapnr =cpu_s390x_exec (cs);cpu_exec_end (cs);switch (trapnr) {case EXCP_INTERRUPT :target-alpha/cpu.h +1
-1@@ -431,7 +431,7 @@ AlphaCPU *cpu_alpha_init(const char *cpu_model);#define cpu_init (cpu_model) CPU(cpu_alpha_init(cpu_model))void alpha_cpu_list (FILE *f,fprintf_function cpu_fprintf); -int cpu_alpha_exec (CPUAlphaState *s); +int cpu_alpha_exec (CPUState *cpu);/* you can call this signal handler from your SIGBUS and SIGSEGV signal handlers to inform the virtual CPU of exceptions. non zero is returned if the signal was handled by the virtual CPU. */ target-arm/cpu.h +1
-1@@ -490,7 +490,7 @@ typedef struct CPUARMState {#include "cpu-qom.h" ARMCPU *cpu_arm_init (const char *cpu_model); -int cpu_arm_exec (CPUARMState *s); +int cpu_arm_exec (CPUState *cpu);uint32_t do_arm_semihosting (CPUARMState *env);void aarch64_sync_32_to_64 (CPUARMState *env);void aarch64_sync_64_to_32 (CPUARMState *env);target-cris/cpu.h +1
-1@@ -176,7 +176,7 @@ typedef struct CPUCRISState {#include "cpu-qom.h" CRISCPU *cpu_cris_init (const char *cpu_model); -int cpu_cris_exec (CPUCRISState *s); +int cpu_cris_exec (CPUState *cpu);/* you can call this signal handler from your SIGBUS and SIGSEGV signal handlers to inform the virtual CPU of exceptions. non zero is returned if the signal was handled by the virtual CPU. */ target-i386/cpu.h +1
-1@@ -983,7 +983,7 @@ typedef struct CPUX86State {X86CPU *cpu_x86_init (const char *cpu_model);X86CPU *cpu_x86_create (const char *cpu_model,Error **errp); -int cpu_x86_exec (CPUX86State *s); +int cpu_x86_exec (CPUState *cpu);void x86_cpu_list (FILE *f,fprintf_function cpu_fprintf);void x86_cpudef_setup (void );int cpu_x86_support_mca_broadcast (CPUX86State *env);target-lm32/cpu.h +1
-1@@ -199,7 +199,7 @@ static inline lm32_wp_t lm32_wp_type(uint32_t dc, int idx)#include "cpu-qom.h" LM32CPU *cpu_lm32_init (const char *cpu_model); -int cpu_lm32_exec (CPULM32State *s); +int cpu_lm32_exec (CPUState *cpu);/* you can call this signal handler from your SIGBUS and SIGSEGV signal handlers to inform the virtual CPU of exceptions. non zero is returned if the signal was handled by the virtual CPU. */ target-m68k/cpu.h +1
-1@@ -117,7 +117,7 @@ typedef struct CPUM68KState {void m68k_tcg_init (void );void m68k_cpu_init_gdb (M68kCPU *cpu);M68kCPU *cpu_m68k_init (const char *cpu_model); -int cpu_m68k_exec (CPUM68KState *s); +int cpu_m68k_exec (CPUState *cpu);/* you can call this signal handler from your SIGBUS and SIGSEGV signal handlers to inform the virtual CPU of exceptions. non zero is returned if the signal was handled by the virtual CPU. */ target-microblaze/cpu.h +1
-1@@ -276,7 +276,7 @@ struct CPUMBState {void mb_tcg_init (void );MicroBlazeCPU *cpu_mb_init (const char *cpu_model); -int cpu_mb_exec (CPUMBState *s); +int cpu_mb_exec (CPUState *cpu);/* you can call this signal handler from your SIGBUS and SIGSEGV signal handlers to inform the virtual CPU of exceptions. non zero is returned if the signal was handled by the virtual CPU. */ target-mips/cpu.h +1
-1@@ -746,7 +746,7 @@ enum {*/ #define CPU_INTERRUPT_WAKE CPU_INTERRUPT_TGT_INT_0 -int cpu_mips_exec (CPUMIPSState *s); +int cpu_mips_exec (CPUState *cpu);void mips_tcg_init (void );MIPSCPU *cpu_mips_init (const char *cpu_model);int cpu_mips_signal_handler (int host_signum,void *pinfo,void *puc);target-moxie/cpu.h +1
-1@@ -112,7 +112,7 @@ static inline MoxieCPU *moxie_env_get_cpu(CPUMoxieState *env)#define ENV_OFFSET offsetof(MoxieCPU, env)MoxieCPU *cpu_moxie_init (const char *cpu_model); -int cpu_moxie_exec (CPUMoxieState *s); +int cpu_moxie_exec (CPUState *cpu);void moxie_cpu_do_interrupt (CPUState *cs);void moxie_cpu_dump_state (CPUState *cpu,FILE *f,fprintf_function cpu_fprintf,int flags);target-openrisc/cpu.h +1
-1@@ -346,7 +346,7 @@ static inline OpenRISCCPU *openrisc_env_get_cpu(CPUOpenRISCState *env)OpenRISCCPU *cpu_openrisc_init (const char *cpu_model);void cpu_openrisc_list (FILE *f,fprintf_function cpu_fprintf); -int cpu_openrisc_exec (CPUOpenRISCState *s); +int cpu_openrisc_exec (CPUState *cpu);void openrisc_cpu_do_interrupt (CPUState *cpu);bool openrisc_cpu_exec_interrupt (CPUState *cpu,int int_req); void openrisc_cpu_dump_state(CPUState *cpu, FILE *f,target-ppc/cpu.h +1
-1@@ -1164,7 +1164,7 @@ do { \PowerPCCPU *cpu_ppc_init (const char *cpu_model);void ppc_translate_init (void );void gen_update_current_nip (void *opaque); -int cpu_ppc_exec (CPUPPCState *s); +int cpu_ppc_exec (CPUState *s);/* you can call this signal handler from your SIGBUS and SIGSEGV signal handlers to inform the virtual CPU of exceptions. non zero is returned if the signal was handled by the virtual CPU. */ target-s390x/cpu.h +1
-1@@ -375,7 +375,7 @@ void trigger_pgm_exception(CPUS390XState *env, uint32_t code, uint32_t ilen);S390CPU *cpu_s390x_init (const char *cpu_model);void s390x_translate_init (void ); -int cpu_s390x_exec (CPUS390XState *s); +int cpu_s390x_exec (CPUState *cpu);/* you can call this signal handler from your SIGBUS and SIGSEGV signal handlers to inform the virtual CPU of exceptions. non zero target-sh4/cpu.h +1
-1@@ -193,7 +193,7 @@ typedef struct CPUSH4State {void sh4_translate_init (void );SuperHCPU *cpu_sh4_init (const char *cpu_model); -int cpu_sh4_exec (CPUSH4State * s); +int cpu_sh4_exec (CPUState *s);int cpu_sh4_signal_handler (int host_signum,void *pinfo,void *puc); int superh_cpu_handle_mmu_fault(CPUState *cpu, vaddr address, int rw,target-sparc/cpu.h +1
-1@@ -537,7 +537,7 @@ int sparc_cpu_memory_rw_debug(CPUState *cpu, vaddr addr,void gen_intermediate_code_init (CPUSPARCState *env);/* cpu-exec.c */ -int cpu_sparc_exec (CPUSPARCState *s); +int cpu_sparc_exec (CPUState *cpu);/* win_helper.c */ target_ulong cpu_get_psr (CPUSPARCState *env1);target-tricore/cpu.h +1
-1@@ -372,7 +372,7 @@ enum { };void cpu_state_reset (CPUTriCoreState *s); -int cpu_tricore_exec (CPUTriCoreState *s); +int cpu_tricore_exec (CPUState *cpu);void tricore_tcg_init (void );int cpu_tricore_signal_handler (int host_signum,void *pinfo,void *puc);target-unicore32/cpu.h +2
-1@@ -125,7 +125,6 @@ void cpu_asr_write(CPUUniCore32State *env1, target_ulong val, target_ulong mask)#define cpu_exec uc32_cpu_exec#define cpu_signal_handler uc32_cpu_signal_handler -int uc32_cpu_exec (CPUUniCore32State *s);int uc32_cpu_signal_handler (int host_signum,void *pinfo,void *puc);/* MMU modes definitions */ @@ -141,6 +140,8 @@ static inline int cpu_mmu_index(CPUUniCore32State *env)#include "cpu-qom.h" #include "exec/exec-all.h" +int uc32_cpu_exec (CPUState *s); +UniCore32CPU *uc32_cpu_init (const char *cpu_model);#define cpu_init (cpu_model) CPU(uc32_cpu_init(cpu_model))target-xtensa/cpu.h +1
-1@@ -383,7 +383,7 @@ XtensaCPU *cpu_xtensa_init(const char *cpu_model);void xtensa_translate_init (void );void xtensa_breakpoint_handler (CPUState *cs); -int cpu_xtensa_exec (CPUXtensaState *s); +int cpu_xtensa_exec (CPUState *cpu);void xtensa_register_core (XtensaConfigList *node);void check_interrupts (CPUXtensaState *s);void xtensa_irq_init (CPUXtensaState *env);Signature · 1 line
1.9.1
Signature · 2 lines
Aurelien Jarno GPG: 4096R/1DDD8C9B [email protected] http://www.aurel32.net
Re: [Qemu-devel] [PATCH v2 5/5] cpu-exec: Purge all uses of CPU_GET_ENV()
Quoted 6 lines · Aurelien Jarno
Quoted 1 line · Peter Crosthwaite
Remove un-needed usages of
CPU_GET_ENV()by converting the APIs to useYour patch subject and your commit message talks about
CPU_GET_ENV(), while the patch itself changesENV_GET_CPU().
Doh!
Fixed in v3. Thanks.
Regards,
Peter
Quoted 568 lines
Quoted 559 lines
CPUState pointers and retrieving the
env_ptras minimally needed.Scripted conversion for target-* change:
for I in
target-*/cpu.h; dosed -i \ 's/\(^int cpu_[^_]*_exec(\)[^ ][^ ]* \*s);$/\1CPUState *cpu);/' \ $I;done
Signed-off-by Peter Crosthwaite <[email protected]>---
Changed since RFC v2 (RTH review):
Apply target-* change pattern to all arches. Avoid use ofcpu_ptrfor X86 specifics Add () toENV_GET_CPUmacros in commit message Add BSD and Linux user needed changes Add missing architecture changes--- bsd-user/main.c | 3 ++- cpu-exec.c | 28 +++++++++++++--------------- cpus.c | 3 +-- linux-user/main.c | 28 ++++++++++++++-------------- target-alpha/cpu.h | 2 +- target-arm/cpu.h | 2 +- target-cris/cpu.h | 2 +- target-i386/cpu.h | 2 +- target-lm32/cpu.h | 2 +- target-m68k/cpu.h | 2 +- target-microblaze/cpu.h | 2 +- target-mips/cpu.h | 2 +- target-moxie/cpu.h | 2 +- target-openrisc/cpu.h | 2 +- target-ppc/cpu.h | 2 +- target-s390x/cpu.h | 2 +- target-sh4/cpu.h | 2 +- target-sparc/cpu.h | 2 +- target-tricore/cpu.h | 2 +- target-unicore32/cpu.h | 3 ++- target-xtensa/cpu.h | 2 +- 21 files changed, 48 insertions(+), 49 deletions(-)bsd-user/main.c +2
-1@@ -166,6 +166,7 @@ static void set_idt(int n, unsigned int dpl)void cpu_loop (CPUX86State *env) { +CPUState *cs =CPU (x86_env_get_cpu (env));int trapnr;abi_ulong pc;//target_siginfo_t info; @@ -512,7 +513,7 @@ void cpu_loop(CPUSPARCState *env)//target_siginfo_t info; while (1 ) { - trapnr =cpu_sparc_exec (env); + trapnr =cpu_sparc_exec (cs);switch (trapnr) {#ifndef TARGET_SPARC64 cpu-exec.c +13
-15@@ -226,10 +226,9 @@ static inline tcg_target_ulong cpu_tb_exec(CPUState *cpu, uint8_t *tb_ptr)/* Execute the code without caching the generated code. An interpreter could be used if available. */ -static void cpu_exec_nocache (CPUArchState *env,int max_cycles, +static void cpu_exec_nocache (CPUState *cpu,int max_cycles,TranslationBlock *orig_tb) { -CPUState *cpu =ENV_GET_CPU (env);TranslationBlock *tb;target_ulong pc = orig_tb->pc;target_ulong cs_base = orig_tb->cs_base;@@ -253,12 +252,12 @@ static void cpu_exec_nocache(CPUArchState *env, int max_cycles,tb_free (tb); } -static TranslationBlock *tb_find_slow (CPUArchState *env, +static TranslationBlock *tb_find_slow (CPUState *cpu,target_ulong pc,target_ulong cs_base,uint64_t flags) { -CPUState *cpu =ENV_GET_CPU (env); +CPUArchState *env = (CPUArchState *)cpu->env_ptr;TranslationBlock *tb, **ptb1;unsigned int h;tb_page_addr_t phys_pc, phys_page1;@@ -310,9 +309,9 @@ static TranslationBlock *tb_find_slow(CPUArchState *env,return tb; } -static inline TranslationBlock *tb_find_fast (CPUArchState *env) +static inline TranslationBlock *tb_find_fast (CPUState *cpu) { -CPUState *cpu =ENV_GET_CPU (env); +CPUArchState *env = (CPUArchState *)cpu->env_ptr;TranslationBlock *tb;target_ulong cs_base, pc;int flags;@@ -324,14 +323,13 @@ static inline TranslationBlock *tb_find_fast(CPUArchState *env) tb = cpu->tb_jmp_cache[tb_jmp_cache_hash_func (pc)];if (unlikely (!tb || tb->pc != pc || tb->cs_base != cs_base || tb->flags != flags)) { - tb =tb_find_slow (env, pc, cs_base, flags); + tb =tb_find_slow (cpu, pc, cs_base, flags); }return tb; } -static void cpu_handle_debug_exception (CPUArchState *env) +static void cpu_handle_debug_exception (CPUState *cpu) { -CPUState *cpu =ENV_GET_CPU (env);CPUClass *cc =CPU_GET_CLASS (cpu);CPUWatchpoint *wp;@@ -348,12 +346,12 @@ static void cpu_handle_debug_exception(CPUArchState *env)volatile sig_atomic_t exit_request; -int cpu_exec (CPUArchState *env) +int cpu_exec (CPUState *cpu) { -CPUState *cpu =ENV_GET_CPU (env);CPUClass *cc =CPU_GET_CLASS (cpu);#ifdef TARGET_I386 X86CPU *x86_cpu =X86_CPU (cpu); +CPUArchState *env = &x86_cpu->env;#endif int ret, interrupt_request;TranslationBlock *tb;@@ -406,7 +404,7 @@ int cpu_exec(CPUArchState *env)/* exit request from the cpu execution loop */ ret = cpu->exception_index;if (ret ==EXCP_DEBUG ) { -cpu_handle_debug_exception (env); +cpu_handle_debug_exception (cpu); } cpu->exception_index =-1 ;break ;@@ -482,7 +480,7 @@ int cpu_exec(CPUArchState *env) }spin_lock (&tcg_ctx.tb_ctx.tb_lock); have_tb_lock = true; - tb =tb_find_fast (env); + tb =tb_find_fast (cpu);/* Note: we do it here to avoid a gcc bug on Mac OS X when doing it in tb_find_slow */ if (tcg_ctx.tb_ctx.tb_invalidated_flag) {@@ -542,7 +540,7 @@ int cpu_exec(CPUArchState *env)if (insns_left >0 ) {/* Execute remaining instructions. */ tb = (TranslationBlock *)(next_tb & ~TB_EXIT_MASK ); -cpu_exec_nocache (env, insns_left, tb); +cpu_exec_nocache (cpu, insns_left, tb);align_clocks (&sc, cpu); } cpu->exception_index =EXCP_INTERRUPT ;@@ -566,11 +564,11 @@ int cpu_exec(CPUArchState *env)/* Reload env after longjmp - the compiler may have smashed all * local variables as longjmp is marked 'noreturn'. */ cpu = current_cpu; - env = cpu->env_ptr; cc =CPU_GET_CLASS (cpu); cpu->can_do_io =1 ;#ifdef TARGET_I386 x86_cpu =X86_CPU (cpu); + env = &x86_cpu->env;#endif if (have_tb_lock) {spin_unlock (&tcg_ctx.tb_ctx.tb_lock);cpus.c +1
-2@@ -1345,7 +1345,6 @@ int vm_stop_force_state(RunState state)static int tcg_cpu_exec (CPUState *cpu) { -CPUArchState *env = cpu->env_ptr;int ret;#ifdef CONFIG_PROFILER int64_t ti;@@ -1380,7 +1379,7 @@ static int tcg_cpu_exec(CPUState *cpu) cpu->icount_decr.u16.low = decr; cpu->icount_extra = count; } - ret =cpu_exec (env); + ret =cpu_exec (cpu);#ifdef CONFIG_PROFILER tcg_time +=profile_getclock () - ti;#endif linux-user/main.c +14
-14@@ -280,7 +280,7 @@ void cpu_loop(CPUX86State *env)for (;;) {cpu_exec_start (cs); - trapnr =cpu_x86_exec (env); + trapnr =cpu_x86_exec (cs);cpu_exec_end (cs);switch (trapnr) {case 0x80 :@@ -674,7 +674,7 @@ void cpu_loop(CPUARMState *env)for (;;) {cpu_exec_start (cs); - trapnr =cpu_arm_exec (env); + trapnr =cpu_arm_exec (cs);cpu_exec_end (cs);switch (trapnr) {case EXCP_UDEF :@@ -1005,7 +1005,7 @@ void cpu_loop(CPUARMState *env)for (;;) {cpu_exec_start (cs); - trapnr =cpu_arm_exec (env); + trapnr =cpu_arm_exec (cs);cpu_exec_end (cs);switch (trapnr) {@@ -1084,7 +1084,7 @@ void cpu_loop(CPUUniCore32State *env)for (;;) {cpu_exec_start (cs); - trapnr =uc32_cpu_exec (env); + trapnr =uc32_cpu_exec (cs);cpu_exec_end (cs);switch (trapnr) {case UC32_EXCP_PRIV :@@ -1285,7 +1285,7 @@ void cpu_loop (CPUSPARCState *env)while (1 ) {cpu_exec_start (cs); - trapnr =cpu_sparc_exec (env); + trapnr =cpu_sparc_exec (cs);cpu_exec_end (cs);/* Compute PSR before exposing state. */ @@ -1566,7 +1566,7 @@ void cpu_loop(CPUPPCState *env)for (;;) {cpu_exec_start (cs); - trapnr =cpu_ppc_exec (env); + trapnr =cpu_ppc_exec (cs);cpu_exec_end (cs);switch (trapnr) {case POWERPC_EXCP_NONE :@@ -2418,7 +2418,7 @@ void cpu_loop(CPUMIPSState *env)for (;;) {cpu_exec_start (cs); - trapnr =cpu_mips_exec (env); + trapnr =cpu_mips_exec (cs);cpu_exec_end (cs);switch (trapnr) {case EXCP_SYSCALL :@@ -2655,7 +2655,7 @@ void cpu_loop(CPUOpenRISCState *env)for (;;) {cpu_exec_start (cs); - trapnr =cpu_exec (env); + trapnr =cpu_exec (cs);cpu_exec_end (cs); gdbsig =0 ;@@ -2745,7 +2745,7 @@ void cpu_loop(CPUSH4State *env)while (1 ) {cpu_exec_start (cs); - trapnr =cpu_sh4_exec (env); + trapnr =cpu_sh4_exec (cs);cpu_exec_end (cs);switch (trapnr) {@@ -2807,7 +2807,7 @@ void cpu_loop(CPUCRISState *env)while (1 ) {cpu_exec_start (cs); - trapnr =cpu_cris_exec (env); + trapnr =cpu_cris_exec (cs);cpu_exec_end (cs);switch (trapnr) {case 0xaa :@@ -2868,7 +2868,7 @@ void cpu_loop(CPUMBState *env)while (1 ) {cpu_exec_start (cs); - trapnr =cpu_mb_exec (env); + trapnr =cpu_mb_exec (cs);cpu_exec_end (cs);switch (trapnr) {case 0xaa :@@ -2973,7 +2973,7 @@ void cpu_loop(CPUM68KState *env)for (;;) {cpu_exec_start (cs); - trapnr =cpu_m68k_exec (env); + trapnr =cpu_m68k_exec (cs);cpu_exec_end (cs);switch (trapnr) {case EXCP_ILLEGAL :@@ -3112,7 +3112,7 @@ void cpu_loop(CPUAlphaState *env)while (1 ) {cpu_exec_start (cs); - trapnr =cpu_alpha_exec (env); + trapnr =cpu_alpha_exec (cs);cpu_exec_end (cs);/* All of the traps imply a transition through PALcode, which @@ -3300,7 +3300,7 @@ void cpu_loop(CPUS390XState *env)while (1 ) {cpu_exec_start (cs); - trapnr =cpu_s390x_exec (env); + trapnr =cpu_s390x_exec (cs);cpu_exec_end (cs);switch (trapnr) {case EXCP_INTERRUPT :target-alpha/cpu.h +1
-1@@ -431,7 +431,7 @@ AlphaCPU *cpu_alpha_init(const char *cpu_model);#define cpu_init (cpu_model) CPU(cpu_alpha_init(cpu_model))void alpha_cpu_list (FILE *f,fprintf_function cpu_fprintf); -int cpu_alpha_exec (CPUAlphaState *s); +int cpu_alpha_exec (CPUState *cpu);/* you can call this signal handler from your SIGBUS and SIGSEGV signal handlers to inform the virtual CPU of exceptions. non zero is returned if the signal was handled by the virtual CPU. */ target-arm/cpu.h +1
-1@@ -490,7 +490,7 @@ typedef struct CPUARMState {#include "cpu-qom.h" ARMCPU *cpu_arm_init (const char *cpu_model); -int cpu_arm_exec (CPUARMState *s); +int cpu_arm_exec (CPUState *cpu);uint32_t do_arm_semihosting (CPUARMState *env);void aarch64_sync_32_to_64 (CPUARMState *env);void aarch64_sync_64_to_32 (CPUARMState *env);target-cris/cpu.h +1
-1@@ -176,7 +176,7 @@ typedef struct CPUCRISState {#include "cpu-qom.h" CRISCPU *cpu_cris_init (const char *cpu_model); -int cpu_cris_exec (CPUCRISState *s); +int cpu_cris_exec (CPUState *cpu);/* you can call this signal handler from your SIGBUS and SIGSEGV signal handlers to inform the virtual CPU of exceptions. non zero is returned if the signal was handled by the virtual CPU. */ target-i386/cpu.h +1
-1@@ -983,7 +983,7 @@ typedef struct CPUX86State {X86CPU *cpu_x86_init (const char *cpu_model);X86CPU *cpu_x86_create (const char *cpu_model,Error **errp); -int cpu_x86_exec (CPUX86State *s); +int cpu_x86_exec (CPUState *cpu);void x86_cpu_list (FILE *f,fprintf_function cpu_fprintf);void x86_cpudef_setup (void );int cpu_x86_support_mca_broadcast (CPUX86State *env);target-lm32/cpu.h +1
-1@@ -199,7 +199,7 @@ static inline lm32_wp_t lm32_wp_type(uint32_t dc, int idx)#include "cpu-qom.h" LM32CPU *cpu_lm32_init (const char *cpu_model); -int cpu_lm32_exec (CPULM32State *s); +int cpu_lm32_exec (CPUState *cpu);/* you can call this signal handler from your SIGBUS and SIGSEGV signal handlers to inform the virtual CPU of exceptions. non zero is returned if the signal was handled by the virtual CPU. */ target-m68k/cpu.h +1
-1@@ -117,7 +117,7 @@ typedef struct CPUM68KState {void m68k_tcg_init (void );void m68k_cpu_init_gdb (M68kCPU *cpu);M68kCPU *cpu_m68k_init (const char *cpu_model); -int cpu_m68k_exec (CPUM68KState *s); +int cpu_m68k_exec (CPUState *cpu);/* you can call this signal handler from your SIGBUS and SIGSEGV signal handlers to inform the virtual CPU of exceptions. non zero is returned if the signal was handled by the virtual CPU. */ target-microblaze/cpu.h +1
-1@@ -276,7 +276,7 @@ struct CPUMBState {void mb_tcg_init (void );MicroBlazeCPU *cpu_mb_init (const char *cpu_model); -int cpu_mb_exec (CPUMBState *s); +int cpu_mb_exec (CPUState *cpu);/* you can call this signal handler from your SIGBUS and SIGSEGV signal handlers to inform the virtual CPU of exceptions. non zero is returned if the signal was handled by the virtual CPU. */ target-mips/cpu.h +1
-1@@ -746,7 +746,7 @@ enum {*/ #define CPU_INTERRUPT_WAKE CPU_INTERRUPT_TGT_INT_0 -int cpu_mips_exec (CPUMIPSState *s); +int cpu_mips_exec (CPUState *cpu);void mips_tcg_init (void );MIPSCPU *cpu_mips_init (const char *cpu_model);int cpu_mips_signal_handler (int host_signum,void *pinfo,void *puc);target-moxie/cpu.h +1
-1@@ -112,7 +112,7 @@ static inline MoxieCPU *moxie_env_get_cpu(CPUMoxieState *env)#define ENV_OFFSET offsetof(MoxieCPU, env)MoxieCPU *cpu_moxie_init (const char *cpu_model); -int cpu_moxie_exec (CPUMoxieState *s); +int cpu_moxie_exec (CPUState *cpu);void moxie_cpu_do_interrupt (CPUState *cs);void moxie_cpu_dump_state (CPUState *cpu,FILE *f,fprintf_function cpu_fprintf,int flags);target-openrisc/cpu.h +1
-1@@ -346,7 +346,7 @@ static inline OpenRISCCPU *openrisc_env_get_cpu(CPUOpenRISCState *env)OpenRISCCPU *cpu_openrisc_init (const char *cpu_model);void cpu_openrisc_list (FILE *f,fprintf_function cpu_fprintf); -int cpu_openrisc_exec (CPUOpenRISCState *s); +int cpu_openrisc_exec (CPUState *cpu);void openrisc_cpu_do_interrupt (CPUState *cpu);bool openrisc_cpu_exec_interrupt (CPUState *cpu,int int_req); void openrisc_cpu_dump_state(CPUState *cpu, FILE *f,target-ppc/cpu.h +1
-1@@ -1164,7 +1164,7 @@ do { \PowerPCCPU *cpu_ppc_init (const char *cpu_model);void ppc_translate_init (void );void gen_update_current_nip (void *opaque); -int cpu_ppc_exec (CPUPPCState *s); +int cpu_ppc_exec (CPUState *s);/* you can call this signal handler from your SIGBUS and SIGSEGV signal handlers to inform the virtual CPU of exceptions. non zero is returned if the signal was handled by the virtual CPU. */ target-s390x/cpu.h +1
-1@@ -375,7 +375,7 @@ void trigger_pgm_exception(CPUS390XState *env, uint32_t code, uint32_t ilen);S390CPU *cpu_s390x_init (const char *cpu_model);void s390x_translate_init (void ); -int cpu_s390x_exec (CPUS390XState *s); +int cpu_s390x_exec (CPUState *cpu);/* you can call this signal handler from your SIGBUS and SIGSEGV signal handlers to inform the virtual CPU of exceptions. non zero target-sh4/cpu.h +1
-1@@ -193,7 +193,7 @@ typedef struct CPUSH4State {void sh4_translate_init (void );SuperHCPU *cpu_sh4_init (const char *cpu_model); -int cpu_sh4_exec (CPUSH4State * s); +int cpu_sh4_exec (CPUState *s);int cpu_sh4_signal_handler (int host_signum,void *pinfo,void *puc); int superh_cpu_handle_mmu_fault(CPUState *cpu, vaddr address, int rw,target-sparc/cpu.h +1
-1@@ -537,7 +537,7 @@ int sparc_cpu_memory_rw_debug(CPUState *cpu, vaddr addr,void gen_intermediate_code_init (CPUSPARCState *env);/* cpu-exec.c */ -int cpu_sparc_exec (CPUSPARCState *s); +int cpu_sparc_exec (CPUState *cpu);/* win_helper.c */ target_ulong cpu_get_psr (CPUSPARCState *env1);target-tricore/cpu.h +1
-1@@ -372,7 +372,7 @@ enum { };void cpu_state_reset (CPUTriCoreState *s); -int cpu_tricore_exec (CPUTriCoreState *s); +int cpu_tricore_exec (CPUState *cpu);void tricore_tcg_init (void );int cpu_tricore_signal_handler (int host_signum,void *pinfo,void *puc);target-unicore32/cpu.h +2
-1@@ -125,7 +125,6 @@ void cpu_asr_write(CPUUniCore32State *env1, target_ulong val, target_ulong mask)#define cpu_exec uc32_cpu_exec#define cpu_signal_handler uc32_cpu_signal_handler -int uc32_cpu_exec (CPUUniCore32State *s);int uc32_cpu_signal_handler (int host_signum,void *pinfo,void *puc);/* MMU modes definitions */ @@ -141,6 +140,8 @@ static inline int cpu_mmu_index(CPUUniCore32State *env)#include "cpu-qom.h" #include "exec/exec-all.h" +int uc32_cpu_exec (CPUState *s); +UniCore32CPU *uc32_cpu_init (const char *cpu_model);#define cpu_init (cpu_model) CPU(uc32_cpu_init(cpu_model))target-xtensa/cpu.h +1
-2@@ -383,7 +383,7 @@ XtensaCPU *cpu_xtensa_init(const char *cpu_model);void xtensa_translate_init (void );void xtensa_breakpoint_handler (CPUState *cs); -int cpu_xtensa_exec (CPUXtensaState *s); +int cpu_xtensa_exec (CPUState *cpu);void xtensa_register_core (XtensaConfigList *node);void check_interrupts (CPUXtensaState *s);void xtensa_irq_init (CPUXtensaState *env); --Quoted 4 lines
1.9.1
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Aurelien Jarno GPG: 4096R/1DDD8C9B
[email protected] http://www.aurel32.net
Quoted 12 lines · Peter Crosthwaite
Hi Andreas, Richard and all,
I'm moving towards the goal of having no core code usages of
ENV_GET_CPU. This has two advantages:1: It means we are closer to common-obj'ing core code like
exec.c,cpus.cand friends.
2: Multi arch is easier ifENV_GET_CPU()stays arch specific. It means I don't need those patches where I reorder the env within the arch specific CPUState. This allows continuing placement of arch specifics before the env in the CPU container (which has TCG perf advantages).
Quoted 2 lines
Due to point 1, I'm sending this ahead as I think it has standalone value, rather than send as part of multi-arch.
Do you have a git tree? Your series seems to require a version of Bharata's CPU bitmap series to be applied first, but I don't know which one. I also see a small conflict on arm_cpu_initfn() due to commit eb5e1d3c85dffe677da2550d211f9304a7d5ba3b ("target-arm: Use the kernel's idea of MPIDR if we're using KVM").
Signature · 1 line
Eduardo
Quoted 13 lines · Eduardo Habkost
Quoted 12 lines · Peter Crosthwaite
Hi Andreas, Richard and all,
I'm moving towards the goal of having no core code usages of
ENV_GET_CPU. This has two advantages:1: It means we are closer to common-obj'ing core code like
exec.c,cpus.cand friends.
2: Multi arch is easier ifENV_GET_CPU()stays arch specific. It means I don't need those patches where I reorder the env within the arch specific CPUState. This allows continuing placement of arch specifics before the env in the CPU container (which has TCG perf advantages).
Quoted 9 lines
Quoted 2 lines
Due to point 1, I'm sending this ahead as I think it has standalone value, rather than send as part of multi-arch.
Do you have a git tree? Your series seems to require a version of Bharata's CPU bitmap series to be applied first, but I don't know which one. I also see a small conflict on
arm_cpu_initfn()due to commiteb5e1d3c85dffe677da2550d211f9304a7d5ba3b("target-arm: Use the kernel's idea of MPIDR if we're using KVM").
I can make one, but I need to respin this due to Aurelien's comments on P5. Do you just want an all-in-one series?
Regards,
Peter
Quoted 3 lines
--
Eduardo
Quoted 24 lines · Peter Crosthwaite
Quoted 13 lines · Eduardo Habkost
Quoted 12 lines · Peter Crosthwaite
Hi Andreas, Richard and all,
I'm moving towards the goal of having no core code usages of
ENV_GET_CPU. This has two advantages:1: It means we are closer to common-obj'ing core code like
exec.c,cpus.cand friends.
2: Multi arch is easier ifENV_GET_CPU()stays arch specific. It means I don't need those patches where I reorder the env within the arch specific CPUState. This allows continuing placement of arch specifics before the env in the CPU container (which has TCG perf advantages).Quoted 9 lines
Quoted 2 lines
Due to point 1, I'm sending this ahead as I think it has standalone value, rather than send as part of multi-arch.
Do you have a git tree? Your series seems to require a version of Bharata's CPU bitmap series to be applied first, but I don't know which one. I also see a small conflict on
arm_cpu_initfn()due to commiteb5e1d3c85dffe677da2550d211f9304a7d5ba3b("target-arm: Use the kernel's idea of MPIDR if we're using KVM").
Quoted 2 lines
I can make one, but I need to respin this due to Aurelien's comments on P5. Do you just want an all-in-one series?
Whatever works for you (while letting people know how to cleanly apply your series for testing). A git tree is just one way to do it.
If in the next version you just point to the qemu.git commit used as base and mention the specific patch series version(s) you applied before yours, it should be enough.
Signature · 1 line
Eduardo