Add AXS10X I2S PLL clock driver
Subsystems (5)
v5 cover Add AXS10X I2S PLL clock driver
The ARC SDP I2S clock can be programmed using a
specific PLL.
This patch series has the goal of adding a clock driver that programs this PLL.
----
Changes v4 -> v5:
* Documentation update (as suggested by Alexey Brodkin)
* Changed compatible string to "snps,axs10x-i2s-pll-clock" (as suggested by Alexey Brodkin)
* Added DT bindings
Changes v3 -> v4:
* Added binding document (as suggested by Stephen Boyd)
* Minor code style fixes (as suggested by Stephen Boyd)
* Use ioremap (as suggested by Stephen Boyd)
* Implement round_rate (as suggested by Stephen Boyd)
* Change to platform driver (as suggested by Stephen Boyd)
* Use {readl/writel}_relaxed (as suggested by Vineet Gupta)
Changes v2 -> v3:
* Implemented recalc_rate
Changes v1 -> v2:
* Renamed folder to axs10x (as suggested by Alexey Brodkin)
* Added more supported rates
Jose Abreu (2):
clk/axs10x: Add I2S PLL clock driver
arc: axs10x: Add DT bindings for I2S PLL Clock
.../bindings/clock/axs10x-i2s-pll-clock.txt | 17 ++ arch/arc/boot/dts/axs10x_mb.dtsi | 6 + drivers/clk/Makefile | 1 + drivers/clk/axs10x/Makefile | 1 + drivers/clk/axs10x/i2s_pll_clock.c | 217 +++++++++++++++++++++ 5 files changed, 242 insertions(+) create mode 100644 Documentation/devicetree/bindings/clock/axs10x-i2s-pll-clock.txt create mode 100644 drivers/clk/axs10x/Makefile create mode 100644 drivers/clk/axs10x/i2s_pll_clock.c
Signature · 1 line
1.9.1
PATCH v5 1/2 clk/axs10x: Add I2S PLL clock driver
The ARC SDP I2S clock can be programmed using a
specific PLL.
This patch has the goal of adding a clock driver
that programs this PLL.
At this moment the rate values are hardcoded in
a table but in the future it would be ideal to
use a function which determines the PLL values
given the desired rate.
---
Changes v4 -> v5:
* Documentation update (as suggested by Alexey Brodkin)
* Changed compatible string to "snps,axs10x-i2s-pll-clock" (as suggested by Alexey Brodkin)
Changes v3 -> v4:
* Added binding document (as suggested by Stephen Boyd)
* Minor code style fixes (as suggested by Stephen Boyd)
* Use ioremap (as suggested by Stephen Boyd)
* Implement round_rate (as suggested by Stephen Boyd)
* Change to platform driver (as suggested by Stephen Boyd)
* Use {readl/writel}_relaxed (as suggested by Vineet Gupta)
Changes v2 -> v3:
* Implemented recalc_rate
Changes v1 -> v2:
* Renamed folder to axs10x (as suggested by Alexey Brodkin)
* Added more supported rates
.../bindings/clock/axs10x-i2s-pll-clock.txt | 17 ++ drivers/clk/Makefile | 1 + drivers/clk/axs10x/Makefile | 1 + drivers/clk/axs10x/i2s_pll_clock.c | 217 +++++++++++++++++++++ 4 files changed, 236 insertions(+) create mode 100644 Documentation/devicetree/bindings/clock/axs10x-i2s-pll-clock.txt create mode 100644 drivers/clk/axs10x/Makefile create mode 100644 drivers/clk/axs10x/i2s_pll_clock.c
Documentation/devicetree/bindings/clock/axs10x-i2s-pll-clock.txt new file +17 -0
@@ -0,0 +1,17 @@ +Binding for the AXS10X I2S PLL clock + +This binding uses the common clock binding[1]. + +[1] Documentation/devicetree/bindings/clock/clock-bindings.txt + +Required properties: +- compatible: shall be "snps,axs10x-i2s-pll-clock" +- #clock-cells: from common clock binding; Should always be set to 0. +- reg : Address and length of the I2S PLL register set. + +Example: + i2s_clock@100a0 { + compatible = "snps,axs10x-i2s-pll-clock"; + reg = <0x100a0 0x10>; + #clock-cells = <0>; + };
drivers/clk/Makefile +1 -0
@@ -84,3 +84,4 @@ obj-$(CONFIG_X86) += x86/ obj-$(CONFIG_ARCH_ZX) += zte/ obj-$(CONFIG_ARCH_ZYNQ) += zynq/ obj-$(CONFIG_H8300) += h8300/ +obj-$(CONFIG_ARC_PLAT_AXS10X) += axs10x/
drivers/clk/axs10x/Makefile new file +1 -0
@@ -0,0 +1 @@ +obj-y += i2s_pll_clock.o
drivers/clk/axs10x/i2s_pll_clock.c new file +217 -0
217 lines not on this page · raw message
Signature · 1 line
1.9.1
Re: [PATCH 1/2 v5] clk/axs10x: Add I2S PLL clock driver
Quoted 26 lines · Jose Abreu
The ARC SDP I2S clock can be programmed using a specific PLL.
This patch has the goal of adding a clock driver that programs this PLL.
At this moment the rate values are hardcoded in a table but in the future it would be ideal to use a function which determines the PLL values given the desired rate.
Signed-off-by Jose Abreu <[email protected]>---
Changes v4 -> v5:
* Documentation update (as suggested by Alexey Brodkin)
* Changed compatible string to "snps,axs10x-i2s-pll-clock" (as suggested by Alexey Brodkin)Changes v3 -> v4:
* Added binding document (as suggested by Stephen Boyd)
* Minor code style fixes (as suggested by Stephen Boyd)
* Use ioremap (as suggested by Stephen Boyd)
* Implementround_rate(as suggested by Stephen Boyd)
* Change to platform driver (as suggested by Stephen Boyd)
* Use {readl/writel}_relaxed (as suggested by Vineet Gupta)
Quoted 8 lines
Changes v2 -> v3:
* Implementedrecalc_rateChanges v1 -> v2:
* Renamed folder to axs10x (as suggested by Alexey Brodkin)
* Added more supported rates.../bindings/clock/axs10x-i2s-pll-clock.txt | 17 ++
Quoted 7 lines
drivers/clk/Makefile | 1 + drivers/clk/axs10x/Makefile | 1 + drivers/clk/axs10x/i2s_pll_clock.c | 217 +++++++++++++++++++++ 4 files changed, 236 insertions(+) create mode 100644 Documentation/devicetree/bindings/clock/axs10x-i2s-pll-clock.txt create mode 100644 drivers/clk/axs10x/Makefile create mode 100644 drivers/clk/axs10x/i2s_pll_clock.c
PATCH v5 2/2 arc: axs10x: Add DT bindings for I2S PLL Clock
In reply to Jose AbreuAdd device tree bindings for AXS10X I2S PLL Clock driver.
---
This patch was only introduced in v5.
arch/arc/boot/dts/axs10x_mb.dtsi | 6 ++++++ 1 file changed, 6 insertions(+)
arch/arc/boot/dts/axs10x_mb.dtsi +6 -0
@@ -16,6 +16,12 @@ ranges = <0x00000000 0xe0000000 0x10000000>; interrupt-parent = <&mb_intc>; + i2sclk: i2sclk@100a0 { + compatible = "snps,axs10x-i2s-pll-clock"; + reg = <0x100a0 0x10>; + #clock-cells = <0>; + }; + clocks { i2cclk: i2cclk { compatible = "fixed-clock";
Signature · 1 line
1.9.1