net/mlx5: various fixes

PATCH Superseded Nelio Laranjeiro 3 participants 22 messages Sep 7, 2016 – Sep 19, 2016 Network drivers

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Nelio Laranjeiro

author

2016-09-07 07:02 UTC #0 lore raw

cover net/mlx5: various fixes

- Flow director
- Rx Capabilities
- Inline

Adrien Mazarguil (1):
net/mlx5: fix Rx VLAN offload capability report

Nelio Laranjeiro (3):
net/mlx5: force inline for completion function
net/mlx5: re-factorize functions
net/mlx5: fix inline logic

Raslan Darawsheh (1):
net/mlx5: fix removing VLAN filter

Yaacov Hazan (3):
net/mlx5: fix inconsistent return value in Flow Director net/mlx5: refactor allocation of flow director queues net/mlx5: fix support for flow director drop mode

 doc/guides/nics/mlx5.rst       |   3 +-
 drivers/net/mlx5/mlx5.h        |   2 +
 drivers/net/mlx5/mlx5_ethdev.c |   7 +-
 drivers/net/mlx5/mlx5_fdir.c   | 270 +++++++++++++++-------
 drivers/net/mlx5/mlx5_rxq.c    |   2 +
 drivers/net/mlx5/mlx5_rxtx.c   | 499 +++++++++--------------------------------
 drivers/net/mlx5/mlx5_rxtx.h   |   7 +-
 drivers/net/mlx5/mlx5_txq.c    |   9 +-
 drivers/net/mlx5/mlx5_vlan.c   |   3 +-
 9 files changed, 318 insertions(+), 484 deletions(-)

Signature · 1 line

2.1.4

Nelio Laranjeiro

author

2016-09-07 07:02 UTC #1 lore raw

PATCH 1/8 net/mlx5: fix inconsistent return value in Flow Director

From: Yaacov Hazan <[email protected]>

The return value in DPDK is negative errno on failure. Since internal functions in mlx driver return positive values need to negate this value when it returned to dpdk layer.

Fixes 76f5c99 ("mlx5: support flow director")

Signed-off-by Yaacov Hazan <[email protected]>

---
 drivers/net/mlx5/mlx5_fdir.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

drivers/net/mlx5/mlx5_fdir.c +2 -2

index 73eb00e..8207573 100644
@@ -955,7 +955,7 @@ mlx5_dev_filter_ctrl(struct rte_eth_dev *dev,
 		     enum rte_filter_op filter_op,
 		     void *arg)
 {
-	int ret = -EINVAL;
+	int ret = EINVAL;
 	struct priv *priv = dev->data->dev_private;
 
 	switch (filter_type) {

@@ -970,5 +970,5 @@ mlx5_dev_filter_ctrl(struct rte_eth_dev *dev,
 		break;
 	}
 
-	return ret;
+	return -ret;
 }

Signature · 1 line

2.1.4

Nelio Laranjeiro

author

2016-09-07 07:02 UTC #2 lore raw

PATCH 2/8 net/mlx5: fix Rx VLAN offload capability report

In reply to Nelio Laranjeiro

From: Adrien Mazarguil <[email protected]>

This capability is implemented but not reported.

Fixes f3db9489188a ("mlx5: support Rx VLAN stripping")

Signed-off-by Adrien Mazarguil <[email protected]>

---
 drivers/net/mlx5/mlx5_ethdev.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

drivers/net/mlx5/mlx5_ethdev.c +2 -1

index 130e15d..47f323e 100644
@@ -583,7 +583,8 @@ mlx5_dev_infos_get(struct rte_eth_dev *dev, struct rte_eth_dev_info *info)
 		 (DEV_RX_OFFLOAD_IPV4_CKSUM |
 		  DEV_RX_OFFLOAD_UDP_CKSUM |
 		  DEV_RX_OFFLOAD_TCP_CKSUM) :
-		 0);
+		 0) |
+		(priv->hw_vlan_strip ? DEV_RX_OFFLOAD_VLAN_STRIP : 0);
 	if (!priv->mps)
 		info->tx_offload_capa = DEV_TX_OFFLOAD_VLAN_INSERT;
 	if (priv->hw_csum)

Signature · 1 line

2.1.4

Nelio Laranjeiro

author

2016-09-07 07:02 UTC #3 lore raw

PATCH 3/8 net/mlx5: fix removing VLAN filter

In reply to Nelio Laranjeiro

From: Raslan Darawsheh <[email protected]>

memmove was moving bytes as the number of elements next to i, while it should move the number of elements multiplied by the size of each element.

Fixes e9086978 ("mlx5: support VLAN filtering")

Signed-off-by Raslan Darawsheh <[email protected]>

---
 drivers/net/mlx5/mlx5_vlan.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

drivers/net/mlx5/mlx5_vlan.c +2 -1

index 4719e69..fb730e5 100644
@@ -87,7 +87,8 @@ vlan_filter_set(struct rte_eth_dev *dev, uint16_t vlan_id, int on)
 		--priv->vlan_filter_n;
 		memmove(&priv->vlan_filter[i],
 			&priv->vlan_filter[i + 1],
-			priv->vlan_filter_n - i);
+			sizeof(priv->vlan_filter[i]) *
+			(priv->vlan_filter_n - i));
 		priv->vlan_filter[priv->vlan_filter_n] = 0;
 	} else {
 		assert(i == priv->vlan_filter_n);

Signature · 1 line

2.1.4

Nelio Laranjeiro

author

2016-09-07 07:02 UTC #4 lore raw

PATCH 4/8 net/mlx5: refactor allocation of flow director queues

In reply to Nelio Laranjeiro

From: Yaacov Hazan <[email protected]>

This is done to prepare support for drop queues, which are not related to existing RX queues and need to be managed separately.

Signed-off-by Yaacov Hazan <[email protected]>

Signed-off-by Adrien Mazarguil <[email protected]>

---
 drivers/net/mlx5/mlx5.h      |   1 +
 drivers/net/mlx5/mlx5_fdir.c | 229 ++++++++++++++++++++++++++++---------------
 drivers/net/mlx5/mlx5_rxq.c  |   2 +
 drivers/net/mlx5/mlx5_rxtx.h |   4 +-
 4 files changed, 156 insertions(+), 80 deletions(-)

drivers/net/mlx5/mlx5.h +1 -0

index 3a86609..fa78623 100644
@@ -257,6 +257,7 @@ void mlx5_dev_stop(struct rte_eth_dev *);
 
 /* mlx5_fdir.c */
 
+void priv_fdir_queue_destroy(struct priv *, struct fdir_queue *);
 int fdir_init_filters_list(struct priv *);
 void priv_fdir_delete_filters_list(struct priv *);
 void priv_fdir_disable(struct priv *);

drivers/net/mlx5/mlx5_fdir.c +150 ~~-79~~

260 lines not on this page · raw message

drivers/net/mlx5/mlx5_rxq.c +2 -0

index 29c137c..44889d1 100644
@@ -745,6 +745,8 @@ rxq_cleanup(struct rxq_ctrl *rxq_ctrl)
 
 	DEBUG("cleaning up %p", (void *)rxq_ctrl);
 	rxq_free_elts(rxq_ctrl);
+	if (rxq_ctrl->fdir_queue != NULL)
+		priv_fdir_queue_destroy(rxq_ctrl->priv, rxq_ctrl->fdir_queue);
 	if (rxq_ctrl->if_wq != NULL) {
 		assert(rxq_ctrl->priv != NULL);
 		assert(rxq_ctrl->priv->ctx != NULL);

drivers/net/mlx5/mlx5_rxtx.h +3 -1

index f6e2cba..c8a93c0 100644
@@ -87,6 +87,8 @@ struct mlx5_txq_stats {
 struct fdir_queue {
 	struct ibv_qp *qp; /* Associated RX QP. */
 	struct ibv_exp_rwq_ind_table *ind_table; /* Indirection table. */
+	struct ibv_exp_wq *wq; /* Work queue. */
+	struct ibv_cq *cq; /* Completion queue. */
 };
 
 struct priv;

@@ -128,7 +130,7 @@ struct rxq_ctrl {
 	struct ibv_cq *cq; /* Completion Queue. */
 	struct ibv_exp_wq *wq; /* Work Queue. */
 	struct ibv_exp_res_domain *rd; /* Resource Domain. */
-	struct fdir_queue fdir_queue; /* Flow director queue. */
+	struct fdir_queue *fdir_queue; /* Flow director queue. */
 	struct ibv_mr *mr; /* Memory Region (for mp). */
 	struct ibv_exp_wq_family *if_wq; /* WQ burst interface. */
 	struct ibv_exp_cq_family_v1 *if_cq; /* CQ interface. */

Signature · 1 line

2.1.4

Nelio Laranjeiro

author

2016-09-07 07:02 UTC #5 lore raw

PATCH 5/8 net/mlx5: fix support for flow director drop mode

In reply to Nelio Laranjeiro

From: Yaacov Hazan <[email protected]>

Packet rejection was routed to a polled queue. This patch route them to a dummy queue which is not polled.

Fixes 76f5c99e6840 ("mlx5: support flow director")

Signed-off-by Yaacov Hazan <[email protected]>

Signed-off-by Adrien Mazarguil <[email protected]>

Signed-off-by Nelio Laranjeiro <[email protected]>

---
 doc/guides/nics/mlx5.rst     |  3 ++-
 drivers/net/mlx5/mlx5.h      |  1 +
 drivers/net/mlx5/mlx5_fdir.c | 41 +++++++++++++++++++++++++++++++++++++++--
 3 files changed, 42 insertions(+), 3 deletions(-)

doc/guides/nics/mlx5.rst +2 -1

index 5c10cd3..8923173 100644
@@ -84,7 +84,8 @@ Features
 - Promiscuous mode.
 - Multicast promiscuous mode.
 - Hardware checksum offloads.
-- Flow director (RTE_FDIR_MODE_PERFECT and RTE_FDIR_MODE_PERFECT_MAC_VLAN).
+- Flow director (RTE_FDIR_MODE_PERFECT, RTE_FDIR_MODE_PERFECT_MAC_VLAN and
+  RTE_ETH_FDIR_REJECT).
 - Secondary process TX is supported.
 - KVM and VMware ESX SR-IOV modes are supported.

drivers/net/mlx5/mlx5.h +1 -0

index fa78623..8349e5b 100644
@@ -134,6 +134,7 @@ struct priv {
 	unsigned int (*reta_idx)[]; /* RETA index table. */
 	unsigned int reta_idx_n; /* RETA index size. */
 	struct fdir_filter_list *fdir_filter_list; /* Flow director rules. */
+	struct fdir_queue *fdir_drop_queue; /* Flow director drop queue. */
 	rte_spinlock_t lock; /* Lock for control functions. */
 };

drivers/net/mlx5/mlx5_fdir.c +39 -2

72 lines not on this page · raw message

Signature · 1 line

2.1.4

Nelio Laranjeiro

author

2016-09-07 07:02 UTC #6 lore raw

PATCH 6/8 net/mlx5: force inline for completion function

In reply to Nelio Laranjeiro

This function was supposed to be inlined, but was not because several functions calls it. This function should always be inline avoid external function calls and to optimize code in data-path.

Signed-off-by Nelio Laranjeiro <[email protected]>

---
 drivers/net/mlx5/mlx5_rxtx.c | 5 ++++-
 1 file changed, 4 insertions(+), 1 deletion(-)

drivers/net/mlx5/mlx5_rxtx.c +4 -1

index 3757366..5c39cbb 100644
@@ -152,6 +152,9 @@ check_cqe64(volatile struct mlx5_cqe64 *cqe,
 	return 0;
 }
 
+static inline void
+txq_complete(struct txq *txq) __attribute__((always_inline));
+
 /**
  * Manage TX completions.
  *

@@ -160,7 +163,7 @@ check_cqe64(volatile struct mlx5_cqe64 *cqe,
  * @param txq
  *   Pointer to TX queue structure.
  */
-static void
+static inline void
 txq_complete(struct txq *txq)
 {
 	const unsigned int elts_n = txq->elts_n;

Signature · 1 line

2.1.4

Nelio Laranjeiro

author

2016-09-07 07:02 UTC #7 lore raw

PATCH 7/8 net/mlx5: re-factorize functions

In reply to Nelio Laranjeiro

Rework logic of wqe_write() and wqe_write_vlan() which are pretty similar to keep a single one.

Signed-off-by Nelio Laranjeiro <[email protected]>

---
 drivers/net/mlx5/mlx5_rxtx.c | 98 ++++++++++----------------------------------
 1 file changed, 22 insertions(+), 76 deletions(-)

drivers/net/mlx5/mlx5_rxtx.c +22 ~~-76~~

index 5c39cbb..c7e538f 100644
@@ -293,8 +293,8 @@ txq_mp2mr(struct txq *txq, struct rte_mempool *mp)
  *   Pointer to TX queue structure.
  * @param wqe
  *   Pointer to the WQE to fill.
- * @param addr
- *   Buffer data address.
+ * @param buf
+ *   Buffer.
  * @param length
  *   Packet length.
  * @param lkey

@@ -302,54 +302,24 @@ txq_mp2mr(struct txq *txq, struct rte_mempool *mp)
  */
 static inline void
 mlx5_wqe_write(struct txq *txq, volatile union mlx5_wqe *wqe,
-	       uintptr_t addr, uint32_t length, uint32_t lkey)
-{
-	wqe->wqe.ctrl.data[0] = htonl((txq->wqe_ci << 8) | MLX5_OPCODE_SEND);
-	wqe->wqe.ctrl.data[1] = htonl((txq->qp_num_8s) | 4);
-	wqe->wqe.ctrl.data[2] = 0;
-	wqe->wqe.ctrl.data[3] = 0;
-	wqe->inl.eseg.rsvd0 = 0;
-	wqe->inl.eseg.rsvd1 = 0;
-	wqe->inl.eseg.mss = 0;
-	wqe->inl.eseg.rsvd2 = 0;
-	wqe->wqe.eseg.inline_hdr_sz = htons(MLX5_ETH_INLINE_HEADER_SIZE);
-	/* Copy the first 16 bytes into inline header. */
-	rte_memcpy((uint8_t *)(uintptr_t)wqe->wqe.eseg.inline_hdr_start,
-		   (uint8_t *)(uintptr_t)addr,
-		   MLX5_ETH_INLINE_HEADER_SIZE);
-	addr += MLX5_ETH_INLINE_HEADER_SIZE;
-	length -= MLX5_ETH_INLINE_HEADER_SIZE;
-	/* Store remaining data in data segment. */
-	wqe->wqe.dseg.byte_count = htonl(length);
-	wqe->wqe.dseg.lkey = lkey;
-	wqe->wqe.dseg.addr = htonll(addr);
-	/* Increment consumer index. */
-	++txq->wqe_ci;
-}
-
-/**
- * Write a regular WQE with VLAN.
- *
- * @param txq
- *   Pointer to TX queue structure.
- * @param wqe
- *   Pointer to the WQE to fill.
- * @param addr
- *   Buffer data address.
- * @param length
- *   Packet length.
- * @param lkey
- *   Memory region lkey.
- * @param vlan_tci
- *   VLAN field to insert in packet.
- */
-static inline void
-mlx5_wqe_write_vlan(struct txq *txq, volatile union mlx5_wqe *wqe,
-		    uintptr_t addr, uint32_t length, uint32_t lkey,
-		    uint16_t vlan_tci)
+	       struct rte_mbuf *buf, uint32_t length, uint32_t lkey)
 {
-	uint32_t vlan = htonl(0x81000000 | vlan_tci);
-
+	uintptr_t addr = rte_pktmbuf_mtod(buf, uintptr_t);
+
+	rte_mov16((uint8_t *)&wqe->wqe.eseg.inline_hdr_start,
+		  (uint8_t *)addr);
+	addr += 16;
+	length -= 16;
+	/* Need to insert VLAN ? */
+	if (buf->ol_flags & PKT_TX_VLAN_PKT) {
+		uint32_t vlan = htonl(0x81000000 | buf->vlan_tci);
+
+		memcpy((uint8_t *)&wqe->wqe.eseg.inline_hdr_start + 12,
+		       &vlan, sizeof(vlan));
+		addr -= sizeof(vlan);
+		length += sizeof(vlan);
+	}
+	/* Write the WQE. */
 	wqe->wqe.ctrl.data[0] = htonl((txq->wqe_ci << 8) | MLX5_OPCODE_SEND);
 	wqe->wqe.ctrl.data[1] = htonl((txq->qp_num_8s) | 4);
 	wqe->wqe.ctrl.data[2] = 0;

@@ -358,20 +328,7 @@ mlx5_wqe_write_vlan(struct txq *txq, volatile union mlx5_wqe *wqe,
 	wqe->inl.eseg.rsvd1 = 0;
 	wqe->inl.eseg.mss = 0;
 	wqe->inl.eseg.rsvd2 = 0;
-	wqe->wqe.eseg.inline_hdr_sz = htons(MLX5_ETH_VLAN_INLINE_HEADER_SIZE);
-	/*
-	 * Copy 12 bytes of source & destination MAC address.
-	 * Copy 4 bytes of VLAN.
-	 * Copy 2 bytes of Ether type.
-	 */
-	rte_memcpy((uint8_t *)(uintptr_t)wqe->wqe.eseg.inline_hdr_start,
-		   (uint8_t *)(uintptr_t)addr, 12);
-	rte_memcpy((uint8_t *)((uintptr_t)wqe->wqe.eseg.inline_hdr_start + 12),
-		   &vlan, sizeof(vlan));
-	rte_memcpy((uint8_t *)((uintptr_t)wqe->wqe.eseg.inline_hdr_start + 16),
-		   (uint8_t *)((uintptr_t)addr + 12), 2);
-	addr += MLX5_ETH_VLAN_INLINE_HEADER_SIZE - sizeof(vlan);
-	length -= MLX5_ETH_VLAN_INLINE_HEADER_SIZE - sizeof(vlan);
+	wqe->wqe.eseg.inline_hdr_sz = htons(16);
 	/* Store remaining data in data segment. */
 	wqe->wqe.dseg.byte_count = htonl(length);
 	wqe->wqe.dseg.lkey = lkey;

@@ -612,7 +569,6 @@ mlx5_tx_burst(void *dpdk_txq, struct rte_mbuf **pkts, uint16_t pkts_n)
 	do {
 		struct rte_mbuf *buf = *(pkts++);
 		unsigned int elts_head_next;
-		uintptr_t addr;
 		uint32_t length;
 		uint32_t lkey;
 		unsigned int segs_n = buf->nb_segs;

@@ -634,8 +590,6 @@ mlx5_tx_burst(void *dpdk_txq, struct rte_mbuf **pkts, uint16_t pkts_n)
 		rte_prefetch0(wqe);
 		if (pkts_n)
 			rte_prefetch0(*pkts);
-		/* Retrieve buffer information. */
-		addr = rte_pktmbuf_mtod(buf, uintptr_t);
 		length = DATA_LEN(buf);
 		/* Update element. */
 		(*txq->elts)[elts_head] = buf;

@@ -645,11 +599,7 @@ mlx5_tx_burst(void *dpdk_txq, struct rte_mbuf **pkts, uint16_t pkts_n)
 						       volatile void *));
 		/* Retrieve Memory Region key for this memory pool. */
 		lkey = txq_mp2mr(txq, txq_mb2mp(buf));
-		if (buf->ol_flags & PKT_TX_VLAN_PKT)
-			mlx5_wqe_write_vlan(txq, wqe, addr, length, lkey,
-					    buf->vlan_tci);
-		else
-			mlx5_wqe_write(txq, wqe, addr, length, lkey);
+		mlx5_wqe_write(txq, wqe, buf, length, lkey);
 		/* Should we enable HW CKSUM offload */
 		if (buf->ol_flags &
 		    (PKT_TX_IP_CKSUM | PKT_TX_TCP_CKSUM | PKT_TX_UDP_CKSUM)) {

@@ -813,11 +763,7 @@ mlx5_tx_burst_inline(void *dpdk_txq, struct rte_mbuf **pkts, uint16_t pkts_n)
 		} else {
 			/* Retrieve Memory Region key for this memory pool. */
 			lkey = txq_mp2mr(txq, txq_mb2mp(buf));
-			if (buf->ol_flags & PKT_TX_VLAN_PKT)
-				mlx5_wqe_write_vlan(txq, wqe, addr, length,
-						    lkey, buf->vlan_tci);
-			else
-				mlx5_wqe_write(txq, wqe, addr, length, lkey);
+			mlx5_wqe_write(txq, wqe, buf, length, lkey);
 		}
 		while (--segs_n) {
 			/*

Signature · 1 line

2.1.4

Nelio Laranjeiro

author

2016-09-07 07:02 UTC #8 lore raw

PATCH 8/8 net/mlx5: fix inline logic

In reply to Nelio Laranjeiro

To improve performance the NIC expects for large packets to have a pointer to a cache aligned address, old inline code could break this assumption which hurts performance.

Fixes 2a66cf378954 ("net/mlx5: support inline send")

Signed-off-by Nelio Laranjeiro <[email protected]>

Signed-off-by Vasily Philipov <[email protected]>

---
 drivers/net/mlx5/mlx5_ethdev.c |   4 -
 drivers/net/mlx5/mlx5_rxtx.c   | 424 ++++++++++-------------------------------
 drivers/net/mlx5/mlx5_rxtx.h   |   3 +-
 drivers/net/mlx5/mlx5_txq.c    |   9 +-
 4 files changed, 104 insertions(+), 336 deletions(-)

drivers/net/mlx5/mlx5_ethdev.c +0 -4

index 47f323e..1ae80e5 100644
@@ -1398,10 +1398,6 @@ priv_select_tx_function(struct priv *priv)
 	} else if ((priv->sriov == 0) && priv->mps) {
 		priv->dev->tx_pkt_burst = mlx5_tx_burst_mpw;
 		DEBUG("selected MPW TX function");
-	} else if (priv->txq_inline && (priv->txqs_n >= priv->txqs_inline)) {
-		priv->dev->tx_pkt_burst = mlx5_tx_burst_inline;
-		DEBUG("selected inline TX function (%u >= %u queues)",
-		      priv->txqs_n, priv->txqs_inline);
 	}
 }

drivers/net/mlx5/mlx5_rxtx.c +97 ~~-327~~

509 lines not on this page · raw message

drivers/net/mlx5/mlx5_rxtx.h +1 -2

index c8a93c0..8c568ad 100644
@@ -249,7 +249,7 @@ struct txq {
 	uint16_t wqe_n; /* Number of WQ elements. */
 	uint16_t bf_offset; /* Blueflame offset. */
 	uint16_t bf_buf_size; /* Blueflame size. */
-	uint16_t max_inline; /* Maximum size to inline in a WQE. */
+	uint16_t max_inline; /* Multiple of RTE_CACHE_LINE_SIZE to inline. */
 	uint32_t qp_num_8s; /* QP number shifted by 8. */
 	volatile struct mlx5_cqe (*cqes)[]; /* Completion queue. */
 	volatile union mlx5_wqe (*wqes)[]; /* Work queue. */

@@ -314,7 +314,6 @@ uint16_t mlx5_tx_burst_secondary_setup(void *, struct rte_mbuf **, uint16_t);
 /* mlx5_rxtx.c */
 
 uint16_t mlx5_tx_burst(void *, struct rte_mbuf **, uint16_t);
-uint16_t mlx5_tx_burst_inline(void *, struct rte_mbuf **, uint16_t);
 uint16_t mlx5_tx_burst_mpw(void *, struct rte_mbuf **, uint16_t);
 uint16_t mlx5_tx_burst_mpw_inline(void *, struct rte_mbuf **, uint16_t);
 uint16_t mlx5_rx_burst(void *, struct rte_mbuf **, uint16_t);

drivers/net/mlx5/mlx5_txq.c +6 -3

index 6fe61c4..5ddd2fb 100644
@@ -338,9 +338,12 @@ txq_ctrl_setup(struct rte_eth_dev *dev, struct txq_ctrl *txq_ctrl,
 		.comp_mask = (IBV_EXP_QP_INIT_ATTR_PD |
 			      IBV_EXP_QP_INIT_ATTR_RES_DOMAIN),
 	};
-	if (priv->txq_inline && priv->txqs_n >= priv->txqs_inline) {
-		tmpl.txq.max_inline = priv->txq_inline;
-		attr.init.cap.max_inline_data = tmpl.txq.max_inline;
+	if (priv->txq_inline && (priv->txqs_n >= priv->txqs_inline)) {
+		tmpl.txq.max_inline =
+			((priv->txq_inline + (RTE_CACHE_LINE_SIZE - 1)) /
+			 RTE_CACHE_LINE_SIZE);
+		attr.init.cap.max_inline_data =
+			tmpl.txq.max_inline * RTE_CACHE_LINE_SIZE;
 	}
 	tmpl.qp = ibv_exp_create_qp(priv->ctx, &attr.init);
 	if (tmpl.qp == NULL) {

Signature · 1 line

2.1.4

Ferruh Yigit

2016-09-14 10:43 UTC #9 lore raw

Re: [PATCH 8/8] net/mlx5: fix inline logic

Hi Nelio,

Quoted 9 lines · Nelio Laranjeiro

To improve performance the NIC expects for large packets to have a pointer to a cache aligned address, old inline code could break this assumption which hurts performance.
Fixes 2a66cf378954 ("net/mlx5: support inline send")
Signed-off-by Nelio Laranjeiro <[email protected]>
Signed-off-by Vasily Philipov <[email protected]>
---

...

drivers/net/mlx5/mlx5_rxtx.c mlx5_tx_burst(void *dpdk_txq, struct rte_mbuf **pkts, uint16_t pkts_n) · line 526

Quoted 6 lines

drivers/net/mlx5/mlx5_rxtx.c +1 -1

@@ -607,8 +523,13 @@ mlx5_tx_burst(void *dpdk_txq, struct rte_mbuf **pkts, uint16_t pkts_n)
 				MLX5_ETH_WQE_L3_CSUM |
 				MLX5_ETH_WQE_L4_CSUM;
 		} else {
-			wqe->wqe.eseg.cs_flags = 0;
+			wqe->eseg.cs_flags = 0;

This cause a compilation error, and looks like a typo:

.../drivers/net/mlx5/mlx5_rxtx.c: In function ‘mlx5_tx_burst’:
.../drivers/net/mlx5/mlx5_rxtx.c:526:7: error: ‘volatile union mlx5_wqe’ has no member named ‘eseg’

    wqe->eseg.cs_flags = 0;
       ^~

Nélio Laranjeiro

author

2016-09-14 11:07 UTC #10 lore raw

Re: [PATCH 8/8] net/mlx5: fix inline logic

Quoted 24 lines · Ferruh Yigit

Hi Nelio,
Quoted 9 lines · Nelio Laranjeiro
To improve performance the NIC expects for large packets to have a pointer to a cache aligned address, old inline code could break this assumption which hurts performance.
Fixes 2a66cf378954 ("net/mlx5: support inline send")
Signed-off-by Nelio Laranjeiro <[email protected]>
Signed-off-by Vasily Philipov <[email protected]>
---
...
drivers/net/mlx5/mlx5_rxtx.c mlx5_tx_burst(void *dpdk_txq, struct rte_mbuf **pkts, uint16_t pkts_n) · line 526
Quoted 6 lines
drivers/net/mlx5/mlx5_rxtx.c +1 -1
@@ -607,8 +523,13 @@ mlx5_tx_burst(void *dpdk_txq, struct rte_mbuf **pkts, uint16_t pkts_n)
 				MLX5_ETH_WQE_L3_CSUM |
 				MLX5_ETH_WQE_L4_CSUM;
 		} else {
-			wqe->wqe.eseg.cs_flags = 0;
+			wqe->eseg.cs_flags = 0;
This cause a compilation error, and looks like a typo:

Quoted 5 lines

.../drivers/net/mlx5/mlx5_rxtx.c: In function ‘mlx5_tx_burst’:
.../drivers/net/mlx5/mlx5_rxtx.c:526:7: error: ‘volatile union mlx5_wqe’ has no member named ‘eseg’
    wqe->eseg.cs_flags = 0;
       ^~

Hi Ferruh,

You are totally right. I will fix it, re-test and send a V2 today.

Thanks,

Signature · 2 lines

Nélio Laranjeiro
6WIND

Nelio Laranjeiro

author

2016-09-14 11:54 UTC #11 lore raw

v2 cover net/mlx5: various fixes

In reply to Nelio Laranjeiro

- Flow director
- Rx Capabilities
- Inline

Changes in V2:

- Fix a compilation error.

Adrien Mazarguil (1):
net/mlx5: fix Rx VLAN offload capability report

Nelio Laranjeiro (3):
net/mlx5: force inline for completion function
net/mlx5: re-factorize functions
net/mlx5: fix inline logic

Raslan Darawsheh (1):
net/mlx5: fix removing VLAN filter

Yaacov Hazan (3):
net/mlx5: fix inconsistent return value in Flow Director net/mlx5: refactor allocation of flow director queues net/mlx5: fix support for flow director drop mode

 doc/guides/nics/mlx5.rst       |   3 +-
 drivers/net/mlx5/mlx5.h        |   2 +
 drivers/net/mlx5/mlx5_ethdev.c |   7 +-
 drivers/net/mlx5/mlx5_fdir.c   | 270 +++++++++++++++-------
 drivers/net/mlx5/mlx5_rxq.c    |   2 +
 drivers/net/mlx5/mlx5_rxtx.c   | 497 +++++++++--------------------------------
 drivers/net/mlx5/mlx5_rxtx.h   |   7 +-
 drivers/net/mlx5/mlx5_txq.c    |   9 +-
 drivers/net/mlx5/mlx5_vlan.c   |   3 +-
 9 files changed, 317 insertions(+), 483 deletions(-)

Signature · 1 line

2.1.4

Nelio Laranjeiro

author

2016-09-14 11:54 UTC #12 lore raw

PATCH v2 1/8 net/mlx5: fix inconsistent return value in Flow Director

From: Yaacov Hazan <[email protected]>

The return value in DPDK is negative errno on failure. Since internal functions in mlx driver return positive values need to negate this value when it returned to dpdk layer.

Fixes 76f5c99 ("mlx5: support flow director")

Signed-off-by Yaacov Hazan <[email protected]>

---
 drivers/net/mlx5/mlx5_fdir.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

drivers/net/mlx5/mlx5_fdir.c +2 -2

index 73eb00e..8207573 100644
@@ -955,7 +955,7 @@ mlx5_dev_filter_ctrl(struct rte_eth_dev *dev,
 		     enum rte_filter_op filter_op,
 		     void *arg)
 {
-	int ret = -EINVAL;
+	int ret = EINVAL;
 	struct priv *priv = dev->data->dev_private;
 
 	switch (filter_type) {

@@ -970,5 +970,5 @@ mlx5_dev_filter_ctrl(struct rte_eth_dev *dev,
 		break;
 	}
 
-	return ret;
+	return -ret;
 }

Signature · 1 line

2.1.4

Nelio Laranjeiro

author

2016-09-14 11:54 UTC #13 lore raw

PATCH v2 2/8 net/mlx5: fix Rx VLAN offload capability report

In reply to Nelio Laranjeiro

From: Adrien Mazarguil <[email protected]>

This capability is implemented but not reported.

Fixes f3db9489188a ("mlx5: support Rx VLAN stripping")

Signed-off-by Adrien Mazarguil <[email protected]>

---
 drivers/net/mlx5/mlx5_ethdev.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

drivers/net/mlx5/mlx5_ethdev.c +2 -1

index 130e15d..47f323e 100644
@@ -583,7 +583,8 @@ mlx5_dev_infos_get(struct rte_eth_dev *dev, struct rte_eth_dev_info *info)
 		 (DEV_RX_OFFLOAD_IPV4_CKSUM |
 		  DEV_RX_OFFLOAD_UDP_CKSUM |
 		  DEV_RX_OFFLOAD_TCP_CKSUM) :
-		 0);
+		 0) |
+		(priv->hw_vlan_strip ? DEV_RX_OFFLOAD_VLAN_STRIP : 0);
 	if (!priv->mps)
 		info->tx_offload_capa = DEV_TX_OFFLOAD_VLAN_INSERT;
 	if (priv->hw_csum)

Signature · 1 line

2.1.4

Nelio Laranjeiro

author

2016-09-14 11:54 UTC #14 lore raw

PATCH v2 3/8 net/mlx5: fix removing VLAN filter

In reply to Nelio Laranjeiro

From: Raslan Darawsheh <[email protected]>

memmove was moving bytes as the number of elements next to i, while it should move the number of elements multiplied by the size of each element.

Fixes e9086978 ("mlx5: support VLAN filtering")

Signed-off-by Raslan Darawsheh <[email protected]>

---
 drivers/net/mlx5/mlx5_vlan.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

drivers/net/mlx5/mlx5_vlan.c +2 -1

index 4719e69..fb730e5 100644
@@ -87,7 +87,8 @@ vlan_filter_set(struct rte_eth_dev *dev, uint16_t vlan_id, int on)
 		--priv->vlan_filter_n;
 		memmove(&priv->vlan_filter[i],
 			&priv->vlan_filter[i + 1],
-			priv->vlan_filter_n - i);
+			sizeof(priv->vlan_filter[i]) *
+			(priv->vlan_filter_n - i));
 		priv->vlan_filter[priv->vlan_filter_n] = 0;
 	} else {
 		assert(i == priv->vlan_filter_n);

Signature · 1 line

2.1.4

Nelio Laranjeiro

author

2016-09-14 11:54 UTC #15 lore raw

PATCH v2 4/8 net/mlx5: refactor allocation of flow director queues

In reply to Nelio Laranjeiro

From: Yaacov Hazan <[email protected]>

This is done to prepare support for drop queues, which are not related to existing RX queues and need to be managed separately.

Signed-off-by Yaacov Hazan <[email protected]>

Signed-off-by Adrien Mazarguil <[email protected]>

---
 drivers/net/mlx5/mlx5.h      |   1 +
 drivers/net/mlx5/mlx5_fdir.c | 229 ++++++++++++++++++++++++++++---------------
 drivers/net/mlx5/mlx5_rxq.c  |   2 +
 drivers/net/mlx5/mlx5_rxtx.h |   4 +-
 4 files changed, 156 insertions(+), 80 deletions(-)

drivers/net/mlx5/mlx5.h +1 -0

index 3a86609..fa78623 100644
@@ -257,6 +257,7 @@ void mlx5_dev_stop(struct rte_eth_dev *);
 
 /* mlx5_fdir.c */
 
+void priv_fdir_queue_destroy(struct priv *, struct fdir_queue *);
 int fdir_init_filters_list(struct priv *);
 void priv_fdir_delete_filters_list(struct priv *);
 void priv_fdir_disable(struct priv *);

drivers/net/mlx5/mlx5_fdir.c +150 ~~-79~~

260 lines not on this page · raw message

drivers/net/mlx5/mlx5_rxq.c +2 -0

index 29c137c..44889d1 100644
@@ -745,6 +745,8 @@ rxq_cleanup(struct rxq_ctrl *rxq_ctrl)
 
 	DEBUG("cleaning up %p", (void *)rxq_ctrl);
 	rxq_free_elts(rxq_ctrl);
+	if (rxq_ctrl->fdir_queue != NULL)
+		priv_fdir_queue_destroy(rxq_ctrl->priv, rxq_ctrl->fdir_queue);
 	if (rxq_ctrl->if_wq != NULL) {
 		assert(rxq_ctrl->priv != NULL);
 		assert(rxq_ctrl->priv->ctx != NULL);

drivers/net/mlx5/mlx5_rxtx.h +3 -1

index f6e2cba..c8a93c0 100644
@@ -87,6 +87,8 @@ struct mlx5_txq_stats {
 struct fdir_queue {
 	struct ibv_qp *qp; /* Associated RX QP. */
 	struct ibv_exp_rwq_ind_table *ind_table; /* Indirection table. */
+	struct ibv_exp_wq *wq; /* Work queue. */
+	struct ibv_cq *cq; /* Completion queue. */
 };
 
 struct priv;

@@ -128,7 +130,7 @@ struct rxq_ctrl {
 	struct ibv_cq *cq; /* Completion Queue. */
 	struct ibv_exp_wq *wq; /* Work Queue. */
 	struct ibv_exp_res_domain *rd; /* Resource Domain. */
-	struct fdir_queue fdir_queue; /* Flow director queue. */
+	struct fdir_queue *fdir_queue; /* Flow director queue. */
 	struct ibv_mr *mr; /* Memory Region (for mp). */
 	struct ibv_exp_wq_family *if_wq; /* WQ burst interface. */
 	struct ibv_exp_cq_family_v1 *if_cq; /* CQ interface. */

Signature · 1 line

2.1.4

Nelio Laranjeiro

author

2016-09-14 11:54 UTC #16 lore raw

PATCH v2 5/8 net/mlx5: fix support for flow director drop mode

In reply to Nelio Laranjeiro

From: Yaacov Hazan <[email protected]>

Packet rejection was routed to a polled queue. This patch route them to a dummy queue which is not polled.

Fixes 76f5c99e6840 ("mlx5: support flow director")

Signed-off-by Yaacov Hazan <[email protected]>

Signed-off-by Adrien Mazarguil <[email protected]>

Signed-off-by Nelio Laranjeiro <[email protected]>

---
 doc/guides/nics/mlx5.rst     |  3 ++-
 drivers/net/mlx5/mlx5.h      |  1 +
 drivers/net/mlx5/mlx5_fdir.c | 41 +++++++++++++++++++++++++++++++++++++++--
 3 files changed, 42 insertions(+), 3 deletions(-)

doc/guides/nics/mlx5.rst +2 -1

index 5c10cd3..8923173 100644
@@ -84,7 +84,8 @@ Features
 - Promiscuous mode.
 - Multicast promiscuous mode.
 - Hardware checksum offloads.
-- Flow director (RTE_FDIR_MODE_PERFECT and RTE_FDIR_MODE_PERFECT_MAC_VLAN).
+- Flow director (RTE_FDIR_MODE_PERFECT, RTE_FDIR_MODE_PERFECT_MAC_VLAN and
+  RTE_ETH_FDIR_REJECT).
 - Secondary process TX is supported.
 - KVM and VMware ESX SR-IOV modes are supported.

drivers/net/mlx5/mlx5.h +1 -0

index fa78623..8349e5b 100644
@@ -134,6 +134,7 @@ struct priv {
 	unsigned int (*reta_idx)[]; /* RETA index table. */
 	unsigned int reta_idx_n; /* RETA index size. */
 	struct fdir_filter_list *fdir_filter_list; /* Flow director rules. */
+	struct fdir_queue *fdir_drop_queue; /* Flow director drop queue. */
 	rte_spinlock_t lock; /* Lock for control functions. */
 };

drivers/net/mlx5/mlx5_fdir.c +39 -2

72 lines not on this page · raw message

Signature · 1 line

2.1.4

Nelio Laranjeiro

author

2016-09-14 11:54 UTC #17 lore raw

PATCH v2 6/8 net/mlx5: force inline for completion function

In reply to Nelio Laranjeiro

This function was supposed to be inlined, but was not because several functions calls it. This function should always be inline avoid external function calls and to optimize code in data-path.

Signed-off-by Nelio Laranjeiro <[email protected]>

---
 drivers/net/mlx5/mlx5_rxtx.c | 5 ++++-
 1 file changed, 4 insertions(+), 1 deletion(-)

drivers/net/mlx5/mlx5_rxtx.c +4 -1

index 3757366..5c39cbb 100644
@@ -152,6 +152,9 @@ check_cqe64(volatile struct mlx5_cqe64 *cqe,
 	return 0;
 }
 
+static inline void
+txq_complete(struct txq *txq) __attribute__((always_inline));
+
 /**
  * Manage TX completions.
  *

@@ -160,7 +163,7 @@ check_cqe64(volatile struct mlx5_cqe64 *cqe,
  * @param txq
  *   Pointer to TX queue structure.
  */
-static void
+static inline void
 txq_complete(struct txq *txq)
 {
 	const unsigned int elts_n = txq->elts_n;

Signature · 1 line

2.1.4

Nelio Laranjeiro

author

2016-09-14 11:54 UTC #18 lore raw

PATCH v2 7/8 net/mlx5: re-factorize functions

In reply to Nelio Laranjeiro

Rework logic of wqe_write() and wqe_write_vlan() which are pretty similar to keep a single one.

Signed-off-by Nelio Laranjeiro <[email protected]>

---
 drivers/net/mlx5/mlx5_rxtx.c | 98 ++++++++++----------------------------------
 1 file changed, 22 insertions(+), 76 deletions(-)

drivers/net/mlx5/mlx5_rxtx.c +22 ~~-76~~

index 5c39cbb..c7e538f 100644
@@ -293,8 +293,8 @@ txq_mp2mr(struct txq *txq, struct rte_mempool *mp)
  *   Pointer to TX queue structure.
  * @param wqe
  *   Pointer to the WQE to fill.
- * @param addr
- *   Buffer data address.
+ * @param buf
+ *   Buffer.
  * @param length
  *   Packet length.
  * @param lkey

@@ -302,54 +302,24 @@ txq_mp2mr(struct txq *txq, struct rte_mempool *mp)
  */
 static inline void
 mlx5_wqe_write(struct txq *txq, volatile union mlx5_wqe *wqe,
-	       uintptr_t addr, uint32_t length, uint32_t lkey)
-{
-	wqe->wqe.ctrl.data[0] = htonl((txq->wqe_ci << 8) | MLX5_OPCODE_SEND);
-	wqe->wqe.ctrl.data[1] = htonl((txq->qp_num_8s) | 4);
-	wqe->wqe.ctrl.data[2] = 0;
-	wqe->wqe.ctrl.data[3] = 0;
-	wqe->inl.eseg.rsvd0 = 0;
-	wqe->inl.eseg.rsvd1 = 0;
-	wqe->inl.eseg.mss = 0;
-	wqe->inl.eseg.rsvd2 = 0;
-	wqe->wqe.eseg.inline_hdr_sz = htons(MLX5_ETH_INLINE_HEADER_SIZE);
-	/* Copy the first 16 bytes into inline header. */
-	rte_memcpy((uint8_t *)(uintptr_t)wqe->wqe.eseg.inline_hdr_start,
-		   (uint8_t *)(uintptr_t)addr,
-		   MLX5_ETH_INLINE_HEADER_SIZE);
-	addr += MLX5_ETH_INLINE_HEADER_SIZE;
-	length -= MLX5_ETH_INLINE_HEADER_SIZE;
-	/* Store remaining data in data segment. */
-	wqe->wqe.dseg.byte_count = htonl(length);
-	wqe->wqe.dseg.lkey = lkey;
-	wqe->wqe.dseg.addr = htonll(addr);
-	/* Increment consumer index. */
-	++txq->wqe_ci;
-}
-
-/**
- * Write a regular WQE with VLAN.
- *
- * @param txq
- *   Pointer to TX queue structure.
- * @param wqe
- *   Pointer to the WQE to fill.
- * @param addr
- *   Buffer data address.
- * @param length
- *   Packet length.
- * @param lkey
- *   Memory region lkey.
- * @param vlan_tci
- *   VLAN field to insert in packet.
- */
-static inline void
-mlx5_wqe_write_vlan(struct txq *txq, volatile union mlx5_wqe *wqe,
-		    uintptr_t addr, uint32_t length, uint32_t lkey,
-		    uint16_t vlan_tci)
+	       struct rte_mbuf *buf, uint32_t length, uint32_t lkey)
 {
-	uint32_t vlan = htonl(0x81000000 | vlan_tci);
-
+	uintptr_t addr = rte_pktmbuf_mtod(buf, uintptr_t);
+
+	rte_mov16((uint8_t *)&wqe->wqe.eseg.inline_hdr_start,
+		  (uint8_t *)addr);
+	addr += 16;
+	length -= 16;
+	/* Need to insert VLAN ? */
+	if (buf->ol_flags & PKT_TX_VLAN_PKT) {
+		uint32_t vlan = htonl(0x81000000 | buf->vlan_tci);
+
+		memcpy((uint8_t *)&wqe->wqe.eseg.inline_hdr_start + 12,
+		       &vlan, sizeof(vlan));
+		addr -= sizeof(vlan);
+		length += sizeof(vlan);
+	}
+	/* Write the WQE. */
 	wqe->wqe.ctrl.data[0] = htonl((txq->wqe_ci << 8) | MLX5_OPCODE_SEND);
 	wqe->wqe.ctrl.data[1] = htonl((txq->qp_num_8s) | 4);
 	wqe->wqe.ctrl.data[2] = 0;

@@ -358,20 +328,7 @@ mlx5_wqe_write_vlan(struct txq *txq, volatile union mlx5_wqe *wqe,
 	wqe->inl.eseg.rsvd1 = 0;
 	wqe->inl.eseg.mss = 0;
 	wqe->inl.eseg.rsvd2 = 0;
-	wqe->wqe.eseg.inline_hdr_sz = htons(MLX5_ETH_VLAN_INLINE_HEADER_SIZE);
-	/*
-	 * Copy 12 bytes of source & destination MAC address.
-	 * Copy 4 bytes of VLAN.
-	 * Copy 2 bytes of Ether type.
-	 */
-	rte_memcpy((uint8_t *)(uintptr_t)wqe->wqe.eseg.inline_hdr_start,
-		   (uint8_t *)(uintptr_t)addr, 12);
-	rte_memcpy((uint8_t *)((uintptr_t)wqe->wqe.eseg.inline_hdr_start + 12),
-		   &vlan, sizeof(vlan));
-	rte_memcpy((uint8_t *)((uintptr_t)wqe->wqe.eseg.inline_hdr_start + 16),
-		   (uint8_t *)((uintptr_t)addr + 12), 2);
-	addr += MLX5_ETH_VLAN_INLINE_HEADER_SIZE - sizeof(vlan);
-	length -= MLX5_ETH_VLAN_INLINE_HEADER_SIZE - sizeof(vlan);
+	wqe->wqe.eseg.inline_hdr_sz = htons(16);
 	/* Store remaining data in data segment. */
 	wqe->wqe.dseg.byte_count = htonl(length);
 	wqe->wqe.dseg.lkey = lkey;

@@ -612,7 +569,6 @@ mlx5_tx_burst(void *dpdk_txq, struct rte_mbuf **pkts, uint16_t pkts_n)
 	do {
 		struct rte_mbuf *buf = *(pkts++);
 		unsigned int elts_head_next;
-		uintptr_t addr;
 		uint32_t length;
 		uint32_t lkey;
 		unsigned int segs_n = buf->nb_segs;

@@ -634,8 +590,6 @@ mlx5_tx_burst(void *dpdk_txq, struct rte_mbuf **pkts, uint16_t pkts_n)
 		rte_prefetch0(wqe);
 		if (pkts_n)
 			rte_prefetch0(*pkts);
-		/* Retrieve buffer information. */
-		addr = rte_pktmbuf_mtod(buf, uintptr_t);
 		length = DATA_LEN(buf);
 		/* Update element. */
 		(*txq->elts)[elts_head] = buf;

@@ -645,11 +599,7 @@ mlx5_tx_burst(void *dpdk_txq, struct rte_mbuf **pkts, uint16_t pkts_n)
 						       volatile void *));
 		/* Retrieve Memory Region key for this memory pool. */
 		lkey = txq_mp2mr(txq, txq_mb2mp(buf));
-		if (buf->ol_flags & PKT_TX_VLAN_PKT)
-			mlx5_wqe_write_vlan(txq, wqe, addr, length, lkey,
-					    buf->vlan_tci);
-		else
-			mlx5_wqe_write(txq, wqe, addr, length, lkey);
+		mlx5_wqe_write(txq, wqe, buf, length, lkey);
 		/* Should we enable HW CKSUM offload */
 		if (buf->ol_flags &
 		    (PKT_TX_IP_CKSUM | PKT_TX_TCP_CKSUM | PKT_TX_UDP_CKSUM)) {

@@ -813,11 +763,7 @@ mlx5_tx_burst_inline(void *dpdk_txq, struct rte_mbuf **pkts, uint16_t pkts_n)
 		} else {
 			/* Retrieve Memory Region key for this memory pool. */
 			lkey = txq_mp2mr(txq, txq_mb2mp(buf));
-			if (buf->ol_flags & PKT_TX_VLAN_PKT)
-				mlx5_wqe_write_vlan(txq, wqe, addr, length,
-						    lkey, buf->vlan_tci);
-			else
-				mlx5_wqe_write(txq, wqe, addr, length, lkey);
+			mlx5_wqe_write(txq, wqe, buf, length, lkey);
 		}
 		while (--segs_n) {
 			/*

Signature · 1 line

2.1.4

Nelio Laranjeiro

author

2016-09-14 11:54 UTC #19 lore raw

PATCH v2 8/8 net/mlx5: fix inline logic

In reply to Nelio Laranjeiro

To improve performance the NIC expects for large packets to have a pointer to a cache aligned address, old inline code could break this assumption which hurts performance.

Fixes 2a66cf378954 ("net/mlx5: support inline send")

Signed-off-by Nelio Laranjeiro <[email protected]>

Signed-off-by Vasily Philipov <[email protected]>

---
 drivers/net/mlx5/mlx5_ethdev.c |   4 -
 drivers/net/mlx5/mlx5_rxtx.c   | 422 ++++++++++-------------------------------
 drivers/net/mlx5/mlx5_rxtx.h   |   3 +-
 drivers/net/mlx5/mlx5_txq.c    |   9 +-
 4 files changed, 103 insertions(+), 335 deletions(-)

drivers/net/mlx5/mlx5_ethdev.c +0 -4

index 47f323e..1ae80e5 100644
@@ -1398,10 +1398,6 @@ priv_select_tx_function(struct priv *priv)
 	} else if ((priv->sriov == 0) && priv->mps) {
 		priv->dev->tx_pkt_burst = mlx5_tx_burst_mpw;
 		DEBUG("selected MPW TX function");
-	} else if (priv->txq_inline && (priv->txqs_n >= priv->txqs_inline)) {
-		priv->dev->tx_pkt_burst = mlx5_tx_burst_inline;
-		DEBUG("selected inline TX function (%u >= %u queues)",
-		      priv->txqs_n, priv->txqs_inline);
 	}
 }

drivers/net/mlx5/mlx5_rxtx.c +96 ~~-326~~

506 lines not on this page · raw message

drivers/net/mlx5/mlx5_rxtx.h +1 -2

index c8a93c0..8c568ad 100644
@@ -249,7 +249,7 @@ struct txq {
 	uint16_t wqe_n; /* Number of WQ elements. */
 	uint16_t bf_offset; /* Blueflame offset. */
 	uint16_t bf_buf_size; /* Blueflame size. */
-	uint16_t max_inline; /* Maximum size to inline in a WQE. */
+	uint16_t max_inline; /* Multiple of RTE_CACHE_LINE_SIZE to inline. */
 	uint32_t qp_num_8s; /* QP number shifted by 8. */
 	volatile struct mlx5_cqe (*cqes)[]; /* Completion queue. */
 	volatile union mlx5_wqe (*wqes)[]; /* Work queue. */

@@ -314,7 +314,6 @@ uint16_t mlx5_tx_burst_secondary_setup(void *, struct rte_mbuf **, uint16_t);
 /* mlx5_rxtx.c */
 
 uint16_t mlx5_tx_burst(void *, struct rte_mbuf **, uint16_t);
-uint16_t mlx5_tx_burst_inline(void *, struct rte_mbuf **, uint16_t);
 uint16_t mlx5_tx_burst_mpw(void *, struct rte_mbuf **, uint16_t);
 uint16_t mlx5_tx_burst_mpw_inline(void *, struct rte_mbuf **, uint16_t);
 uint16_t mlx5_rx_burst(void *, struct rte_mbuf **, uint16_t);

drivers/net/mlx5/mlx5_txq.c +6 -3

index 6fe61c4..5ddd2fb 100644
@@ -338,9 +338,12 @@ txq_ctrl_setup(struct rte_eth_dev *dev, struct txq_ctrl *txq_ctrl,
 		.comp_mask = (IBV_EXP_QP_INIT_ATTR_PD |
 			      IBV_EXP_QP_INIT_ATTR_RES_DOMAIN),
 	};
-	if (priv->txq_inline && priv->txqs_n >= priv->txqs_inline) {
-		tmpl.txq.max_inline = priv->txq_inline;
-		attr.init.cap.max_inline_data = tmpl.txq.max_inline;
+	if (priv->txq_inline && (priv->txqs_n >= priv->txqs_inline)) {
+		tmpl.txq.max_inline =
+			((priv->txq_inline + (RTE_CACHE_LINE_SIZE - 1)) /
+			 RTE_CACHE_LINE_SIZE);
+		attr.init.cap.max_inline_data =
+			tmpl.txq.max_inline * RTE_CACHE_LINE_SIZE;
 	}
 	tmpl.qp = ibv_exp_create_qp(priv->ctx, &attr.init);
 	if (tmpl.qp == NULL) {

Signature · 1 line

2.1.4

Nélio Laranjeiro

author

2016-09-14 12:21 UTC #20 lore raw

In reply to Nelio Laranjeiro

Quoted 24 lines · Nelio Laranjeiro

- Flow director
- Rx Capabilities
- Inline
Changes in V2:
- Fix a compilation error.
Adrien Mazarguil (1):
net/mlx5: fix Rx VLAN offload capability report
Nelio Laranjeiro (3):
net/mlx5: force inline for completion function
net/mlx5: re-factorize functions
net/mlx5: fix inline logic
Raslan Darawsheh (1):
net/mlx5: fix removing VLAN filter
Yaacov Hazan (3):
net/mlx5: fix inconsistent return value in Flow Director net/mlx5: refactor allocation of flow director queues net/mlx5: fix support for flow director drop mode

Quoted 14 lines

 doc/guides/nics/mlx5.rst       |   3 +-
 drivers/net/mlx5/mlx5.h        |   2 +
 drivers/net/mlx5/mlx5_ethdev.c |   7 +-
 drivers/net/mlx5/mlx5_fdir.c   | 270 +++++++++++++++-------
 drivers/net/mlx5/mlx5_rxq.c    |   2 +
 drivers/net/mlx5/mlx5_rxtx.c   | 497 +++++++++--------------------------------
 drivers/net/mlx5/mlx5_rxtx.h   |   7 +-
 drivers/net/mlx5/mlx5_txq.c    |   9 +-
 drivers/net/mlx5/mlx5_vlan.c   |   3 +-
 9 files changed, 317 insertions(+), 483 deletions(-)

Signature · 1 line

2.1.4

Sorry Ferruh, I forgot to add you in this serie.

Signature · 2 lines

Nélio Laranjeiro
6WIND

Bruce Richardson

Applied

2016-09-19 15:30 UTC #21 lore raw

In reply to Nelio Laranjeiro

Quoted 16 lines · Nelio Laranjeiro

- Flow director
- Rx Capabilities
- Inline
Changes in V2:
- Fix a compilation error.
Adrien Mazarguil (1):
net/mlx5: fix Rx VLAN offload capability report
Nelio Laranjeiro (3):
net/mlx5: force inline for completion function
net/mlx5: re-factorize functions
net/mlx5: fix inline logic

Quoted 8 lines

Raslan Darawsheh (1):
net/mlx5: fix removing VLAN filter
Yaacov Hazan (3):
net/mlx5: fix inconsistent return value in Flow Director net/mlx5: refactor allocation of flow director queues net/mlx5: fix support for flow director drop mode

Applied to dpdk-next-net/rel_16_11

/Bruce