drm/i915/audio: audio cleanups, 4k fixes
Subsystems (2)
v2 cover drm/i915/audio: audio cleanups, 4k fixes
This is v2 of [1], basically just a rebase on top of current nightly.
BR,
Jani.
[1] https://patchwork.freedesktop.org/series/12754/
Jani Nikula (7):
drm/i915/audio: abstract audio config update drm/i915/audio: port is going to be just fine, simplify checks drm/i915/audio: use the same code for updating audio config drm/i915/audio: split dp and hdmi audio config update drm/i915/audio: add register macros for audio config N value drm/i915/audio: rename N value getter to emphasize it's for hdmi drm/i915: set proper N/M in modeset
Libin Yang (2):
drm/i915/audio: set proper N/MCTS on more platforms drm/i915/audio: HDMI audio gets the TMDS clock by crtc_clock
drivers/gpu/drm/i915/i915_reg.h | 11 ++ drivers/gpu/drm/i915/intel_audio.c | 260 ++++++++++++++++++++++++------------- 2 files changed, 179 insertions(+), 92 deletions(-)
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2.1.4 _______________________________________________ Intel-gfx mailing list [email protected] https://lists.freedesktop.org/mailman/listinfo/intel-gfx
PATCH v2 1/9 drm/i915/audio: abstract audio config update
Prepare for using the same code for updating HSW_AUD_CFG register. No functional changes.
--- drivers/gpu/drm/i915/intel_audio.c | 68 ++++++++++++++++++++++---------------- 1 file changed, 40 insertions(+), 28 deletions(-)
drivers/gpu/drm/i915/intel_audio.c +40 -28
@@ -245,6 +245,45 @@ static void g4x_audio_codec_enable(struct drm_connector *connector,I915_WRITE (G4X_AUD_CNTL_ST , tmp); } +static void hsw_audio_config_update (struct intel_crtc *intel_crtc, +enum port port, +const struct drm_display_mode *adjusted_mode) +{ +struct drm_i915_private *dev_priv =to_i915 (intel_crtc->base.dev); +struct i915_audio_component *acomp = dev_priv->audio_component; +enum pipe pipe = intel_crtc->pipe; +int n, rate; +u32 tmp; + + tmp =I915_READ (HSW_AUD_CFG (pipe)); + tmp &= ~AUD_CONFIG_N_VALUE_INDEX ; + tmp &= ~AUD_CONFIG_PIXEL_CLOCK_HDMI_MASK ; +if (intel_crtc_has_dp_encoder (intel_crtc->config)) + tmp |=AUD_CONFIG_N_VALUE_INDEX ; +else + tmp |=audio_config_hdmi_pixel_clock (adjusted_mode); + + tmp &= ~AUD_CONFIG_N_PROG_ENABLE ; +if (audio_rate_need_prog (intel_crtc, adjusted_mode)) { +if (!acomp) + rate =0 ; +else if (port >=PORT_A && port <=PORT_E ) + rate = acomp->aud_sample_rate[port]; +else { +DRM_ERROR ("invalid port: %d\n" , port); + rate =0 ; + } + + n =audio_config_get_n (adjusted_mode, rate); +if (n !=0 ) + tmp =audio_config_setup_n_reg (n, tmp); +else +DRM_DEBUG_KMS ("no suitable N value is found\n" ); + } + +I915_WRITE (HSW_AUD_CFG (pipe), tmp); +} +static void hsw_audio_codec_disable (struct intel_encoder *encoder) {struct drm_i915_private *dev_priv =to_i915 (encoder->base.dev);
@@ -283,11 +322,9 @@ static void hsw_audio_codec_enable(struct drm_connector *connector,struct intel_crtc *intel_crtc =to_intel_crtc (intel_encoder->base.crtc);enum pipe pipe = intel_crtc->pipe;enum port port = intel_encoder->port; -struct i915_audio_component *acomp = dev_priv->audio_component;const uint8_t *eld = connector->eld;uint32_t tmp;int len, i; -int n, rate;DRM_DEBUG_KMS ("Enable audio codec on pipe %c, %u bytes ELD\n" ,pipe_name (pipe),drm_eld_size (eld));
@@ -323,32 +360,7 @@ static void hsw_audio_codec_enable(struct drm_connector *connector,I915_WRITE (HSW_AUD_PIN_ELD_CP_VLD , tmp);/* Enable timestamps */ - tmp =I915_READ (HSW_AUD_CFG (pipe)); - tmp &= ~AUD_CONFIG_N_VALUE_INDEX ; - tmp &= ~AUD_CONFIG_PIXEL_CLOCK_HDMI_MASK ; -if (intel_crtc_has_dp_encoder (intel_crtc->config)) - tmp |=AUD_CONFIG_N_VALUE_INDEX ; -else - tmp |=audio_config_hdmi_pixel_clock (adjusted_mode); - - tmp &= ~AUD_CONFIG_N_PROG_ENABLE ; -if (audio_rate_need_prog (intel_crtc, adjusted_mode)) { -if (!acomp) - rate =0 ; -else if (port >=PORT_A && port <=PORT_E ) - rate = acomp->aud_sample_rate[port]; -else { -DRM_ERROR ("invalid port: %d\n" , port); - rate =0 ; - } - n =audio_config_get_n (adjusted_mode, rate); -if (n !=0 ) - tmp =audio_config_setup_n_reg (n, tmp); -else -DRM_DEBUG_KMS ("no suitable N value is found\n" ); - } - -I915_WRITE (HSW_AUD_CFG (pipe), tmp); +hsw_audio_config_update (intel_crtc, port, adjusted_mode);mutex_unlock (&dev_priv->av_mutex); }
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PATCH v2 2/9 drm/i915/audio: port is going to be just fine, simplify checks
In reply to Jani NikulaIf it was wrong, we'd be screwed already.
--- drivers/gpu/drm/i915/intel_audio.c | 12 ++---------- 1 file changed, 2 insertions(+), 10 deletions(-)
drivers/gpu/drm/i915/intel_audio.c +2 -10
@@ -251,8 +251,9 @@ static void hsw_audio_config_update(struct intel_crtc *intel_crtc, {struct drm_i915_private *dev_priv =to_i915 (intel_crtc->base.dev);struct i915_audio_component *acomp = dev_priv->audio_component; +int rate = acomp ? acomp->aud_sample_rate[port] :0 ;enum pipe pipe = intel_crtc->pipe; -int n, rate; +int n;u32 tmp; tmp =I915_READ (HSW_AUD_CFG (pipe));
@@ -265,15 +266,6 @@ static void hsw_audio_config_update(struct intel_crtc *intel_crtc, tmp &= ~AUD_CONFIG_N_PROG_ENABLE ;if (audio_rate_need_prog (intel_crtc, adjusted_mode)) { -if (!acomp) - rate =0 ; -else if (port >=PORT_A && port <=PORT_E ) - rate = acomp->aud_sample_rate[port]; -else { -DRM_ERROR ("invalid port: %d\n" , port); - rate =0 ; - } - n =audio_config_get_n (adjusted_mode, rate);if (n !=0 ) tmp =audio_config_setup_n_reg (n, tmp);
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PATCH v2 3/9 drm/i915/audio: use the same code for updating audio config
In reply to Jani NikulaIt gets fragile to duplicate the code for updating HSW_AUD_CFG. The only change should be that the hdmi pixel clock is also updated in i915_audio_component_sync_audio_rate(), but it should not be any different.
--- drivers/gpu/drm/i915/intel_audio.c | 29 +++-------------------------- 1 file changed, 3 insertions(+), 26 deletions(-)
drivers/gpu/drm/i915/intel_audio.c +3 -26
@@ -671,10 +671,8 @@ static int i915_audio_component_sync_audio_rate(struct device *kdev, int port,struct drm_i915_private *dev_priv =kdev_to_i915 (kdev);struct intel_encoder *intel_encoder;struct intel_crtc *crtc; -struct drm_display_mode *mode; +struct drm_display_mode *adjusted_mode;struct i915_audio_component *acomp = dev_priv->audio_component; -u32 tmp; -int n;int err =0 ;/* HSW, BDW, SKL, KBL need this fix */
@@ -700,33 +698,12 @@ static int i915_audio_component_sync_audio_rate(struct device *kdev, int port, crtc =to_intel_crtc (intel_encoder->base.crtc); pipe = crtc->pipe; - mode = &crtc->config->base.adjusted_mode; + adjusted_mode = &crtc->config->base.adjusted_mode;/* port must be valid now, otherwise the pipe will be invalid */ acomp->aud_sample_rate[port] = rate; -/* 2. check whether to set the N/CTS/M manually or not */ -if (!audio_rate_need_prog (crtc, mode)) { - tmp =I915_READ (HSW_AUD_CFG (pipe)); - tmp &= ~AUD_CONFIG_N_PROG_ENABLE ; -I915_WRITE (HSW_AUD_CFG (pipe), tmp); - goto unlock; - } - - n =audio_config_get_n (mode, rate); -if (n ==0 ) { -DRM_DEBUG_KMS ("Using automatic mode for N value on port %c\n" , -port_name (port)); - tmp =I915_READ (HSW_AUD_CFG (pipe)); - tmp &= ~AUD_CONFIG_N_PROG_ENABLE ; -I915_WRITE (HSW_AUD_CFG (pipe), tmp); - goto unlock; - } - -/* 3. set the N/CTS/M */ - tmp =I915_READ (HSW_AUD_CFG (pipe)); - tmp =audio_config_setup_n_reg (n, tmp); -I915_WRITE (HSW_AUD_CFG (pipe), tmp); +hsw_audio_config_update (crtc, port, adjusted_mode); unlock:mutex_unlock (&dev_priv->av_mutex);
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PATCH v2 4/9 drm/i915/audio: split dp and hdmi audio config update
In reply to Jani NikulaThe code for dp and hdmi are already different, and they're about to diverge even more. Split them for clarity in future work. No functional changes.
--- drivers/gpu/drm/i915/intel_audio.c | 55 +++++++++++++++++++++++--------------- 1 file changed, 34 insertions(+), 21 deletions(-)
drivers/gpu/drm/i915/intel_audio.c +34 -21
@@ -148,18 +148,6 @@ static uint32_t audio_config_setup_n_reg(int n, uint32_t val)return tmp; } -/* check whether N/CTS/M need be set manually */ -static bool audio_rate_need_prog (struct intel_crtc *crtc, -const struct drm_display_mode *mode) -{ -if (((mode->clock ==TMDS_297M ) || - (mode->clock ==TMDS_296M )) && -intel_crtc_has_type (crtc->config,INTEL_OUTPUT_HDMI )) -return true; -else -return false; -} - static bool intel_eld_uptodate(struct drm_connector *connector, i915_reg_t reg_eldv, uint32_t bits_eldv, i915_reg_t reg_elda, uint32_t bits_elda,
@@ -245,9 +233,26 @@ static void g4x_audio_codec_enable(struct drm_connector *connector,I915_WRITE (G4X_AUD_CNTL_ST , tmp); } -static void hsw_audio_config_update (struct intel_crtc *intel_crtc, -enum port port, -const struct drm_display_mode *adjusted_mode) +static void +hsw_dp_audio_config_update (struct intel_crtc *intel_crtc,enum port port, +const struct drm_display_mode *adjusted_mode) +{ +struct drm_i915_private *dev_priv =to_i915 (intel_crtc->base.dev); +enum pipe pipe = intel_crtc->pipe; +u32 tmp; + + tmp =I915_READ (HSW_AUD_CFG (pipe)); + tmp &= ~AUD_CONFIG_N_VALUE_INDEX ; + tmp &= ~AUD_CONFIG_PIXEL_CLOCK_HDMI_MASK ; + tmp &= ~AUD_CONFIG_N_PROG_ENABLE ; + tmp |=AUD_CONFIG_N_VALUE_INDEX ; + +I915_WRITE (HSW_AUD_CFG (pipe), tmp); +} + +static void +hsw_hdmi_audio_config_update (struct intel_crtc *intel_crtc,enum port port, +const struct drm_display_mode *adjusted_mode) {struct drm_i915_private *dev_priv =to_i915 (intel_crtc->base.dev);struct i915_audio_component *acomp = dev_priv->audio_component;
@@ -259,13 +264,11 @@ static void hsw_audio_config_update(struct intel_crtc *intel_crtc, tmp =I915_READ (HSW_AUD_CFG (pipe)); tmp &= ~AUD_CONFIG_N_VALUE_INDEX ; tmp &= ~AUD_CONFIG_PIXEL_CLOCK_HDMI_MASK ; -if (intel_crtc_has_dp_encoder (intel_crtc->config)) - tmp |=AUD_CONFIG_N_VALUE_INDEX ; -else - tmp |=audio_config_hdmi_pixel_clock (adjusted_mode); - tmp &= ~AUD_CONFIG_N_PROG_ENABLE ; -if (audio_rate_need_prog (intel_crtc, adjusted_mode)) { + tmp |=audio_config_hdmi_pixel_clock (adjusted_mode); + +if (adjusted_mode->clock ==TMDS_296M || + adjusted_mode->clock ==TMDS_297M ) { n =audio_config_get_n (adjusted_mode, rate);if (n !=0 ) tmp =audio_config_setup_n_reg (n, tmp);
@@ -276,6 +279,16 @@ static void hsw_audio_config_update(struct intel_crtc *intel_crtc,I915_WRITE (HSW_AUD_CFG (pipe), tmp); } +static void +hsw_audio_config_update (struct intel_crtc *intel_crtc,enum port port, +const struct drm_display_mode *adjusted_mode) +{ +if (intel_crtc_has_dp_encoder (intel_crtc->config)) +hsw_dp_audio_config_update (intel_crtc, port, adjusted_mode); +else +hsw_hdmi_audio_config_update (intel_crtc, port, adjusted_mode); +} +static void hsw_audio_codec_disable (struct intel_encoder *encoder) {struct drm_i915_private *dev_priv =to_i915 (encoder->base.dev);
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PATCH v2 5/9 drm/i915/audio: set proper N/MCTS on more platforms
In reply to Jani NikulaFrom: Libin Yang <[email protected]>
This patch applies setting proper N/M, N/CTS on more platforms.
--- drivers/gpu/drm/i915/intel_audio.c | 6 +----- 1 file changed, 1 insertion(+), 5 deletions(-)
drivers/gpu/drm/i915/intel_audio.c +1 -5
@@ -688,11 +688,7 @@ static int i915_audio_component_sync_audio_rate(struct device *kdev, int port,struct i915_audio_component *acomp = dev_priv->audio_component;int err =0 ; -/* HSW, BDW, SKL, KBL need this fix */ -if (!IS_SKYLAKE (dev_priv) && - !IS_KABYLAKE (dev_priv) && - !IS_BROADWELL (dev_priv) && - !IS_HASWELL (dev_priv)) +if (!HAS_DDI (dev_priv))return 0 ;i915_audio_component_get_power (kdev);
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PATCH v2 6/9 drm/i915/audio: HDMI audio gets the TMDS clock by crtc_clock
In reply to Jani NikulaFrom: Libin Yang <[email protected]>
HDMI audio should use crtc_clock to get the TMDS clock.
This patch renames mode to adjusted_mode to unify the name.
--- drivers/gpu/drm/i915/intel_audio.c | 9 +++++---- 1 file changed, 5 insertions(+), 4 deletions(-)
drivers/gpu/drm/i915/intel_audio.c +5 -4
@@ -121,13 +121,14 @@ static u32 audio_config_hdmi_pixel_clock(const struct drm_display_mode *adjustedreturn hdmi_audio_clock[i].config; } -static int audio_config_get_n (const struct drm_display_mode *mode,int rate) +static int audio_config_get_n (const struct drm_display_mode *adjusted_mode, +int rate) {int i;for (i =0 ; i <ARRAY_SIZE (aud_ncts); i++) {if ((rate == aud_ncts[i].sample_rate) && - (mode->clock == aud_ncts[i].clock)) { + (adjusted_mode->crtc_clock == aud_ncts[i].clock)) {return aud_ncts[i].n; } }
@@ -267,8 +268,8 @@ hsw_hdmi_audio_config_update(struct intel_crtc *intel_crtc, enum port port, tmp &= ~AUD_CONFIG_N_PROG_ENABLE ; tmp |=audio_config_hdmi_pixel_clock (adjusted_mode); -if (adjusted_mode->clock ==TMDS_296M || - adjusted_mode->clock ==TMDS_297M ) { +if (adjusted_mode->crtc_clock ==TMDS_296M || + adjusted_mode->crtc_clock ==TMDS_297M ) { n =audio_config_get_n (adjusted_mode, rate);if (n !=0 ) tmp =audio_config_setup_n_reg (n, tmp);
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PATCH v2 7/9 drm/i915/audio: add register macros for audio config N value
In reply to Jani NikulaHave generic macros in line with the rest of the register bit definition macros instead of a dedicated function in intel_audio.c, and use them. No functional changes.
--- drivers/gpu/drm/i915/i915_reg.h | 4 ++++ drivers/gpu/drm/i915/intel_audio.c | 23 ++++++----------------- 2 files changed, 10 insertions(+), 17 deletions(-)
drivers/gpu/drm/i915/i915_reg.h +4 -0
@@ -7331,6 +7331,10 @@ enum {#define AUD_CONFIG_UPPER_N_MASK (0xff << 20)#define AUD_CONFIG_LOWER_N_SHIFT 4#define AUD_CONFIG_LOWER_N_MASK (0xfff << 4) +#define AUD_CONFIG_N_MASK (AUD_CONFIG_UPPER_N_MASK | AUD_CONFIG_LOWER_N_MASK) +#define AUD_CONFIG_N (n) \ + (((((n) >> 12) & 0xff) << AUD_CONFIG_UPPER_N_SHIFT) | \ + (((n) & 0xfff) << AUD_CONFIG_LOWER_N_SHIFT))#define AUD_CONFIG_PIXEL_CLOCK_HDMI_SHIFT 16#define AUD_CONFIG_PIXEL_CLOCK_HDMI_MASK (0xf << 16)#define AUD_CONFIG_PIXEL_CLOCK_HDMI_25175 (0 << 16)
drivers/gpu/drm/i915/intel_audio.c +6 -17
@@ -135,20 +135,6 @@ static int audio_config_get_n(const struct drm_display_mode *adjusted_mode,return 0 ; } -static uint32_t audio_config_setup_n_reg (int n,uint32_t val) -{ -int n_low, n_up; -uint32_t tmp = val; - - n_low = n &0xfff ; - n_up = (n >>12 ) &0xff ; - tmp &= ~(AUD_CONFIG_UPPER_N_MASK |AUD_CONFIG_LOWER_N_MASK ); - tmp |= ((n_up <<AUD_CONFIG_UPPER_N_SHIFT ) | - (n_low <<AUD_CONFIG_LOWER_N_SHIFT ) | -AUD_CONFIG_N_PROG_ENABLE ); -return tmp; -} - static bool intel_eld_uptodate(struct drm_connector *connector, i915_reg_t reg_eldv, uint32_t bits_eldv, i915_reg_t reg_elda, uint32_t bits_elda,
@@ -271,10 +257,13 @@ hsw_hdmi_audio_config_update(struct intel_crtc *intel_crtc, enum port port,if (adjusted_mode->crtc_clock ==TMDS_296M || adjusted_mode->crtc_clock ==TMDS_297M ) { n =audio_config_get_n (adjusted_mode, rate); -if (n !=0 ) - tmp =audio_config_setup_n_reg (n, tmp); -else +if (n !=0 ) { + tmp &= ~AUD_CONFIG_N_MASK ; + tmp |=AUD_CONFIG_N (n); + tmp |=AUD_CONFIG_N_PROG_ENABLE ; + }else {DRM_DEBUG_KMS ("no suitable N value is found\n" ); + } }I915_WRITE (HSW_AUD_CFG (pipe), tmp);
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PATCH v2 8/9 drm/i915/audio: rename N value getter to emphasize it's for hdmi
In reply to Jani NikulaWe'll be getting a function and a table for dp parameters soon enough, so rename the function and table for hdmi. No functional changes.
--- drivers/gpu/drm/i915/intel_audio.c | 16 ++++++++-------- 1 file changed, 8 insertions(+), 8 deletions(-)
drivers/gpu/drm/i915/intel_audio.c +8 -8
@@ -81,7 +81,7 @@ static const struct {int clock;int n;int cts; -} aud_ncts[] = { +} hdmi_aud_ncts[] = { { 44100, TMDS_296M, 4459, 234375 }, { 44100, TMDS_297M, 4704, 247500 }, { 48000, TMDS_296M, 5824, 281250 },
@@ -121,15 +121,15 @@ static u32 audio_config_hdmi_pixel_clock(const struct drm_display_mode *adjustedreturn hdmi_audio_clock[i].config; } -static int audio_config_get_n (const struct drm_display_mode *adjusted_mode, -int rate) +static int audio_config_hdmi_get_n (const struct drm_display_mode *adjusted_mode, +int rate) {int i; -for (i =0 ; i <ARRAY_SIZE (aud_ncts); i++) { -if ((rate == aud_ncts[i].sample_rate) && - (adjusted_mode->crtc_clock == aud_ncts[i].clock)) { -return aud_ncts[i].n; +for (i =0 ; i <ARRAY_SIZE (hdmi_aud_ncts); i++) { +if (rate == hdmi_aud_ncts[i].sample_rate && + adjusted_mode->crtc_clock == hdmi_aud_ncts[i].clock) { +return hdmi_aud_ncts[i].n; } }return 0 ;
@@ -256,7 +256,7 @@ hsw_hdmi_audio_config_update(struct intel_crtc *intel_crtc, enum port port,if (adjusted_mode->crtc_clock ==TMDS_296M || adjusted_mode->crtc_clock ==TMDS_297M ) { - n =audio_config_get_n (adjusted_mode, rate); + n =audio_config_hdmi_get_n (adjusted_mode, rate);if (n !=0 ) { tmp &= ~AUD_CONFIG_N_MASK ; tmp |=AUD_CONFIG_N (n);
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PATCH v2 9/9 drm/i915: set proper N/M in modeset
In reply to Jani NikulaWhen modeset occurs and the LS_CLK is set to some special values in DP mode, the N/M need to be set manually if audio is playing. Otherwise the first several seconds may be silent in audio playback.
The relationship of Maud and Naud is expressed in the following equation:
Maud/Naud = 512 * fs / f_LS_Clk
Please refer VESA DisplayPort Standard spec for details.
--- drivers/gpu/drm/i915/i915_reg.h | 7 +++ drivers/gpu/drm/i915/intel_audio.c | 100 ++++++++++++++++++++++++++++++++++++- 2 files changed, 105 insertions(+), 2 deletions(-)
drivers/gpu/drm/i915/i915_reg.h +7 -0
@@ -7358,6 +7358,13 @@ enum {#define _HSW_AUD_MISC_CTRL_B 0x65110#define HSW_AUD_MISC_CTRL (pipe) _MMIO_PIPE(pipe, _HSW_AUD_MISC_CTRL_A, _HSW_AUD_MISC_CTRL_B) +#define _HSW_AUD_M_CTS_ENABLE_A 0x65028 +#define _HSW_AUD_M_CTS_ENABLE_B 0x65128 +#define HSW_AUD_M_CTS_ENABLE (pipe) _MMIO_PIPE(pipe, _HSW_AUD_M_CTS_ENABLE_A, _HSW_AUD_M_CTS_ENABLE_B) +#define AUD_M_CTS_M_VALUE_INDEX (1 << 21) +#define AUD_M_CTS_M_PROG_ENABLE (1 << 20) +#define AUD_CONFIG_M_MASK 0xfffff +#define _HSW_AUD_DIP_ELD_CTRL_ST_A 0x650b4#define _HSW_AUD_DIP_ELD_CTRL_ST_B 0x651b4#define HSW_AUD_DIP_ELD_CTRL (pipe) _MMIO_PIPE(pipe, _HSW_AUD_DIP_ELD_CTRL_ST_A, _HSW_AUD_DIP_ELD_CTRL_ST_B)
drivers/gpu/drm/i915/intel_audio.c +98 -2
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Patchwork
CI✓ Fi.CI.BAT: success for drm/i915/audio: audio cleanups, 4k fixes (rev2)
In reply to Jani Nikula== Series Details ==
== Series Details ==
Series: drm/i915/audio: audio cleanups, 4k fixes (rev2)
URL : https://patchwork.freedesktop.org/series/12754/
State : success
== Summary ==
Series 12754v2 drm/i915/audio: audio cleanups, 4k fixes
https://patchwork.freedesktop.org/api/1.0/series/12754/revisions/2/mbox/
Test kms_cursor_legacy:
Subgroup basic-flip-after-cursor-legacy:
dmesg-warn -> PASS (fi-byt-n2820)fi-bdw-5557u total:244 pass:229 dwarn:0 dfail:0 fail:0 skip:15 fi-bsw-n3050 total:244 pass:202 dwarn:0 dfail:0 fail:0 skip:42 fi-byt-n2820 total:244 pass:208 dwarn:0 dfail:0 fail:1 skip:35 fi-hsw-4770 total:244 pass:222 dwarn:0 dfail:0 fail:0 skip:22 fi-hsw-4770r total:244 pass:222 dwarn:0 dfail:0 fail:0 skip:22 fi-ilk-650 total:244 pass:182 dwarn:0 dfail:0 fail:2 skip:60 fi-ivb-3520m total:244 pass:219 dwarn:0 dfail:0 fail:0 skip:25 fi-ivb-3770 total:244 pass:207 dwarn:0 dfail:0 fail:0 skip:37 fi-skl-6260u total:244 pass:230 dwarn:0 dfail:0 fail:0 skip:14 fi-skl-6700hq total:244 pass:221 dwarn:1 dfail:0 fail:0 skip:22 fi-skl-6700k total:244 pass:219 dwarn:1 dfail:0 fail:0 skip:24 fi-skl-6770hq total:244 pass:228 dwarn:1 dfail:0 fail:1 skip:14 fi-snb-2520m total:244 pass:208 dwarn:0 dfail:0 fail:0 skip:36 fi-snb-2600 total:244 pass:206 dwarn:0 dfail:0 fail:0 skip:38
Results at /archive/results/CI_IGT_test/Patchwork_2572/
c9f6c206fe35021c45419a30deb1cba85910453a drm-intel-nightly: 2016y-09m-23d-10h-30m-14s UTC integration manifest 4444741 drm/i915: set proper N/M in modeset
48018c7 drm/i915/audio: rename N value getter to emphasize it's for hdmi
36bc4b0 drm/i915/audio: add register macros for audio config N value
b095203 drm/i915/audio: HDMI audio gets the TMDS clock by crtc_clock
13e0bf3 drm/i915/audio: set proper N/MCTS on more platforms
5363f9e drm/i915/audio: split dp and hdmi audio config update
6a8d52e drm/i915/audio: use the same code for updating audio config
326321f drm/i915/audio: port is going to be just fine, simplify checks
29fa361 drm/i915/audio: abstract audio config update
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