Add HAX support
v2 cover Add HAX support
I took a stab at trying to rebase/upstream the support for Intel HAXM. (Hardware Accelerated Execution Manager).
Intel HAX is kernel-based hardware acceleration module for Windows and MacOSX.
I have based my work on the last version of the source code I found:
the emu-2.2-release branch in the external/qemu-android repository as used by the Android emulator.
In patch 2/5, I have forward-ported the core HAX code mostly unmodified from there, I just did some minor touch up to make it build and run properly, and fixed the style issues to go through checkpatch.pl.
I have not included the Darwin support.
It might contain some outdated constructs and probably requires more attention (thus the 'RFC' for this patchset).
In patch 3/5, I'm removing a good chunk of the support for CPUs without UG mode as advised by Paolo to simplify the initial version.
In patch 5/5, I have put the plumbing into the QEMU code base, I did some clean up there and it is reasonably intrusive: i.e.
Makefile.target | 1 + configure | 18 ++++++++++ cpus.c | 87 ++++++++++++++++++++++++++++++++++++++++++++++- exec.c | 16 +++++++++ hw/intc/apic_common.c | 3 +- include/qom/cpu.h | 5 +++ include/sysemu/hw_accel.h | 9 +++++ qemu-options.hx | 11 ++++++ target-i386/Makefile.objs | 7 ++++ vl.c | 15 ++++++-- 10 files changed, 167 insertions(+), 5 deletions(-)
The qemu_cpu_kick_thread mess in cpus.c is probably still not perfact though.
The patch 1/5 just extracts from KVM specific header the cpu_synchronize_ functions that HAX is also using.
I have tested the end result on a Windows 10 Pro machine (with UG support) with the Intel HAXM module 6.0.4 and a large ChromiumOS x86_64 image to exercise various code paths. It looks stable.
I also did a quick regression testing of the integration by running a Linux build with KVM enabled.
Changes from v1 to v2:
- fix all style issues in the original code to get it through checkpatch.pl.
- remove Darwin support, it was barely tested and not fully functional.
- remove the support for CPU without UG mode.
- fix most review comments
Vincent Palatin (5):
kvm: move cpu synchronization code
target-i386: Add Intel HAX files
hax: remove non UG code
hax: simplify init
Plumb the HAXM-based hardware acceleration support
Makefile.target | 1 + configure | 18 + cpus.c | 88 ++- exec.c | 16 + gdbstub.c | 1 + hax-stub.c | 39 ++ hw/i386/kvm/apic.c | 1 + hw/i386/kvmvapic.c | 1 + hw/intc/apic_common.c | 3 +- hw/misc/vmport.c | 2 +- include/qom/cpu.h | 5 + include/sysemu/hax.h | 56 ++ include/sysemu/hw_accel.h | 48 ++ include/sysemu/kvm.h | 23 - monitor.c | 2 +- qemu-options.hx | 11 + qom/cpu.c | 2 +- target-arm/cpu.c | 2 +- target-i386/Makefile.objs | 7 + target-i386/hax-all.c | 1327 +++++++++++++++++++++++++++++++++++++++++++ target-i386/hax-i386.h | 90 +++ target-i386/hax-interface.h | 357 ++++++++++++ target-i386/hax-slot.c | 333 +++++++++++ target-i386/hax-slot.h | 58 ++ target-i386/hax-windows.c | 489 ++++++++++++++++ target-i386/hax-windows.h | 89 +++ target-i386/helper.c | 1 + target-i386/kvm.c | 1 + vl.c | 15 +- 29 files changed, 3054 insertions(+), 32 deletions(-) create mode 100644 hax-stub.c create mode 100644 include/sysemu/hax.h create mode 100644 include/sysemu/hw_accel.h create mode 100644 target-i386/hax-all.c create mode 100644 target-i386/hax-i386.h create mode 100644 target-i386/hax-interface.h create mode 100644 target-i386/hax-slot.c create mode 100644 target-i386/hax-slot.h create mode 100644 target-i386/hax-windows.c create mode 100644 target-i386/hax-windows.h
Signature · 1 line
2.8.0.rc3.226.g39d4020
PATCH v2 1/5 kvm: move cpu synchronization code
Move the generic cpu_synchronize_ functions to the common hw_accel.h header, in order to prepare for the addition of a second hardware accelerator.
--- cpus.c | 1 + gdbstub.c | 1 + hw/i386/kvm/apic.c | 1 + hw/i386/kvmvapic.c | 1 + hw/misc/vmport.c | 2 +- include/sysemu/hw_accel.h | 39 +++++++++++++++++++++++++++++++++++++++ include/sysemu/kvm.h | 23 ----------------------- monitor.c | 2 +- qom/cpu.c | 2 +- target-arm/cpu.c | 2 +- target-i386/helper.c | 1 + target-i386/kvm.c | 1 + 12 files changed, 49 insertions(+), 27 deletions(-) create mode 100644 include/sysemu/hw_accel.h
cpus.c +1 -0
@@ -33,6 +33,7 @@#include "sysemu/block-backend.h" #include "exec/gdbstub.h" #include "sysemu/dma.h" +#include "sysemu/hw_accel.h" #include "sysemu/kvm.h" #include "qmp-commands.h" #include "exec/exec-all.h"
gdbstub.c +1 -0
@@ -32,6 +32,7 @@#define MAX_PACKET_LENGTH 4096#include "qemu/sockets.h" +#include "sysemu/hw_accel.h" #include "sysemu/kvm.h" #include "exec/semihost.h" #include "exec/exec-all.h"
hw/i386/kvm/apic.c +1 -0
@@ -14,6 +14,7 @@#include "cpu.h" #include "hw/i386/apic_internal.h" #include "hw/pci/msi.h" +#include "sysemu/hw_accel.h" #include "sysemu/kvm.h" #include "target-i386/kvm_i386.h"
hw/i386/kvmvapic.c +1 -0
@@ -14,6 +14,7 @@#include "exec/exec-all.h" #include "sysemu/sysemu.h" #include "sysemu/cpus.h" +#include "sysemu/hw_accel.h" #include "sysemu/kvm.h" #include "hw/i386/apic_internal.h" #include "hw/sysbus.h"
hw/misc/vmport.c +1 -1
@@ -25,7 +25,7 @@#include "hw/hw.h" #include "hw/isa/isa.h" #include "hw/i386/pc.h" -#include "sysemu/kvm.h" +#include "sysemu/hw_accel.h" #include "hw/qdev.h" //#define VMPORT_DEBUG
include/sysemu/hw_accel.h new file +39 -0
@@ -0,0 +1,39 @@ +/* +* QEMU Hardware accelertors support +* +* Copyright 2016 Google, Inc. +* +* This work is licensed under the terms of the GNU GPL, version 2 or later. +* See the COPYING file in the top-level directory. +* +*/ + +#ifndef QEMU_HW_ACCEL_H +#define QEMU_HW_ACCEL_H + +#include "qom/cpu.h" +#include "sysemu/hax.h" +#include "sysemu/kvm.h" + +static inline void cpu_synchronize_state (CPUState *cpu) +{ +if (kvm_enabled ()) { +kvm_cpu_synchronize_state (cpu); + } +} + +static inline void cpu_synchronize_post_reset (CPUState *cpu) +{ +if (kvm_enabled ()) { +kvm_cpu_synchronize_post_reset (cpu); + } +} + +static inline void cpu_synchronize_post_init (CPUState *cpu) +{ +if (kvm_enabled ()) { +kvm_cpu_synchronize_post_init (cpu); + } +} + +#endif /* QEMU_HW_ACCEL_H */
include/sysemu/kvm.h +0 -23
@@ -461,29 +461,6 @@ void kvm_cpu_synchronize_state(CPUState *cpu);void kvm_cpu_synchronize_post_reset (CPUState *cpu);void kvm_cpu_synchronize_post_init (CPUState *cpu); -/* generic hooks - to be moved/refactored once there are more users */ - -static inline void cpu_synchronize_state (CPUState *cpu) -{ -if (kvm_enabled ()) { -kvm_cpu_synchronize_state (cpu); - } -} - -static inline void cpu_synchronize_post_reset (CPUState *cpu) -{ -if (kvm_enabled ()) { -kvm_cpu_synchronize_post_reset (cpu); - } -} - -static inline void cpu_synchronize_post_init (CPUState *cpu) -{ -if (kvm_enabled ()) { -kvm_cpu_synchronize_post_init (cpu); - } -} -/** * kvm_irqchip_add_msi_route - Add MSI route for specific vector * @s: KVM state
monitor.c +1 -1
@@ -50,7 +50,7 @@#include "sysemu/balloon.h" #include "qemu/timer.h" #include "migration/migration.h" -#include "sysemu/kvm.h" +#include "sysemu/hw_accel.h" #include "qemu/acl.h" #include "sysemu/tpm.h" #include "qapi/qmp/qerror.h"
qom/cpu.c +1 -1
@@ -22,7 +22,7 @@#include "qapi/error.h" #include "qemu-common.h" #include "qom/cpu.h" -#include "sysemu/kvm.h" +#include "sysemu/hw_accel.h" #include "qemu/notify.h" #include "qemu/log.h" #include "exec/log.h"
target-arm/cpu.c +1 -1
@@ -31,7 +31,7 @@#endif #include "hw/arm/arm.h" #include "sysemu/sysemu.h" -#include "sysemu/kvm.h" +#include "sysemu/hw_accel.h" #include "kvm_arm.h" static void arm_cpu_set_pc (CPUState *cs,vaddr value)
target-i386/helper.c +1 -0
@@ -24,6 +24,7 @@#include "kvm_i386.h" #ifndef CONFIG_USER_ONLY #include "sysemu/sysemu.h" +#include "sysemu/hw_accel.h" #include "monitor/monitor.h" #include "hw/i386/apic_internal.h" #endif
target-i386/kvm.c +1 -0
@@ -23,6 +23,7 @@#include "qemu-common.h" #include "cpu.h" #include "sysemu/sysemu.h" +#include "sysemu/hw_accel.h" #include "sysemu/kvm_int.h" #include "kvm_i386.h" #include "hyperv.h"
Signature · 1 line
2.8.0.rc3.226.g39d4020
PATCH v2 2/5 target-i386: Add Intel HAX files
In reply to Vincent PalatinThat's a forward port of the core HAX interface code mostly unmodified from emu-2.2-release branch in the external/qemu-android repository as used by the Android emulator.
The original commit was "target-i386: Add Intel HAX to android emulator" saying:
"""
Backport of 2b3098ff27bab079caab9b46b58546b5036f5c0c
from studio-1.4-dev into emu-master-dev
Intel HAX (harware acceleration) will enhance android emulator performance in Windows and Mac OS X in the systems powered by Intel processors with "Intel Hardware Accelerated Execution Manager" package installed when user runs android emulator with Intel target.
"""
It has minor modifications to build and run along with the current code base.
The formatting has been fixed to go through scripts/checkpatch.pl. Update the DPRINTF macros to get the instanciations checked by the compiler.
Does not include the Darwin support.
--- hax-stub.c | 74 +++ include/sysemu/hax.h | 66 ++ target-i386/hax-all.c | 1490 +++++++++++++++++++++++++++++++++++++++++++ target-i386/hax-i386.h | 91 +++ target-i386/hax-interface.h | 357 +++++++++++ target-i386/hax-slot.c | 333 ++++++++++ target-i386/hax-slot.h | 58 ++ target-i386/hax-windows.c | 509 +++++++++++++++ target-i386/hax-windows.h | 89 +++ 9 files changed, 3067 insertions(+) create mode 100644 hax-stub.c create mode 100644 include/sysemu/hax.h create mode 100644 target-i386/hax-all.c create mode 100644 target-i386/hax-i386.h create mode 100644 target-i386/hax-interface.h create mode 100644 target-i386/hax-slot.c create mode 100644 target-i386/hax-slot.h create mode 100644 target-i386/hax-windows.c create mode 100644 target-i386/hax-windows.h
hax-stub.c new file +74 -0
@@ -0,0 +1,74 @@ +/* +* QEMU HAXM support +* +* Copyright (c) 2015, Intel Corporation +* +* Copyright 2016 Google, Inc. +* +* This software is licensed under the terms of the GNU General Public +* License version 2, as published by the Free Software Foundation, and +* may be copied, distributed, and modified under those terms. +* +* See the COPYING file in the top-level directory. +* +*/ + +#include "qemu/osdep.h" +#include "qemu-common.h" +#include "cpu.h" +#include "sysemu/hax.h" + +int hax_sync_vcpus (void ) +{ +return 0 ; +} + +void hax_disable (int disable) +{ +return ; +} + +int hax_pre_init (uint64_t ram_size) +{ +return 0 ; +} + +int hax_get_max_ram (uint64_t *max_ram) +{ +return 0 ; +} + +int hax_populate_ram (uint64_t va,uint32_t size) +{ +return -ENOSYS ; +} + +int hax_init_vcpu (CPUState *cpu) +{ +return -ENOSYS ; +} + +int hax_smp_cpu_exec (CPUState *cpu) +{ +return -ENOSYS ; +} + +int hax_vcpu_exec (CPUState *cpu) +{ +return -ENOSYS ; +} + +int hax_vcpu_emulation_mode (CPUState *cpu) +{ +return 0 ; +} + +int hax_stop_emulation (CPUState *cpu) +{ +return 0 ; +} + +int hax_stop_translate (CPUState *cpu) +{ +return 0 ; +}
include/sysemu/hax.h new file +66 -0
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target-i386/hax-all.c new file +1490 -0
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target-i386/hax-i386.h new file +91 -0
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target-i386/hax-interface.h new file +357 -0
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target-i386/hax-slot.c new file +333 -0
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target-i386/hax-slot.h new file +58 -0
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target-i386/hax-windows.c new file +509 -0
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target-i386/hax-windows.h new file +89 -0
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Signature · 1 line
2.8.0.rc3.226.g39d4020
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Re: [Qemu-devel] [PATCH v2 2/5] target-i386: Add Intel HAX files
Am 11.11.2016 um 12:28 schrieb Vincent Palatin:
[...]
Quoted 6 lines
Signed-off-by Vincent Palatin <[email protected]>--- hax-stub.c | 74 +++ include/sysemu/hax.h | 66 ++ target-i386/hax-all.c | 1490 +++++++++++++++++++++++++++++++++++++++++++
Git warns about a whitespace issue:
The empty last line of target-i386/hax-all.c should be removed.
Stefan
Re: [Qemu-devel] [PATCH v2 2/5] target-i386: Add Intel HAX files
Quoted 11 lines · Stefan Weil
Am 11.11.2016 um 12:28 schrieb Vincent Palatin:
[...]Quoted 6 lines
Signed-off-by Vincent Palatin <[email protected]>--- hax-stub.c | 74 +++ include/sysemu/hax.h | 66 ++ target-i386/hax-all.c | 1490 +++++++++++++++++++++++++++++++++++++++++++Git warns about a whitespace issue:
The empty last line oftarget-i386/hax-all.cshould be removed.
Done, I will send it with the v3 series.
Signature · 1 line
Vincent
Re: [Qemu-devel] [PATCH v2 2/5] target-i386: Add Intel HAX files
In reply to Vincent Palatintarget-i386/hax-all.c line 1345
Quoted 3 lines · Vincent Palatin
target-i386/hax-all.c new file +3
-0+ +memcpy (env->xmm_regs, fpu.mmx_1,sizeof (fpu.mmx_1)); +memcpy ((ZMMReg *) (env->xmm_regs) +8 , fpu.mmx_2,sizeof (fpu.mmx_2));
HAX will only support SSE (128-bit) registers, while env->xmm_regs supports AVX512 (512-bit) so you have to copy registers one by one.
Is there documentation for HAX? In particular I'm curious as to what the CPUID information looks like in the guest, and whether there are ioctls to change it.
Quoted 6 lines
target-i386/hax-all.c new file +6
-0+ +static int hax_handle_fastmmio (CPUArchState *env,struct hax_fastmmio *hft) +{ +uint64_t buf =0 ; +/* +* With fast MMIO, QEMU need not sync vCPU state with HAXM
target-i386/hax-all.c line 646
Quoted 10 lines
target-i386/hax-all.c new file +10
-0+* driver because it will only invoke MMIO handler +* However, some MMIO operations utilize virtual address like qemu_pipe +* Thus we need to sync the CR0, CR3 and CR4 so that QEMU +* can translate the guest virtual address to guest physical +* address +*/ + env->cr[0 ] = hft->_cr0; + env->cr[2 ] = hft->_cr2; + env->cr[3 ] = hft->_cr3; + env->cr[4 ] = hft->_cr4;
These seem to apply only to some parts of the Android emulator that are not upstream, so you can remove them.
target-i386/hax-all.c line 654
Quoted 7 lines
target-i386/hax-all.c new file +7
-0+ buf = hft->value; + +cpu_physical_memory_rw (hft->gpa, (uint8_t *) &buf, hft->size, + hft->direction); +if (hft->direction ==0 ) { + hft->value = buf; + }
No need to use "buf", you can use &hft->value directly.
Quoted 30 lines
target-i386/hax-all.c new file +30
-0+return 0 ; +} + +static int hax_handle_io (CPUArchState *env,uint32_t df,uint16_t port, +int direction,int size,int count,void *buffer) +{ +uint8_t *ptr; +int i; + +if (!df) { + ptr = (uint8_t *) buffer; + }else { + ptr = buffer + size * count - size; + } +for (i =0 ; i < count; i++) { +if (direction ==HAX_EXIT_IO_IN ) { +switch (size) { +case 1 : +stb_p (ptr,cpu_inb (port)); +break ; +case 2 : +stw_p (ptr,cpu_inw (port)); +break ; +case 4 : +stl_p (ptr,cpu_inl (port)); +break ; + } + }else { +switch (size) { +case 1 :
target-i386/hax-all.c line 695
Quoted 10 lines
target-i386/hax-all.c new file +10
-0+cpu_outb (port,ldub_p (ptr)); +break ; +case 2 : +cpu_outw (port,lduw_p (ptr)); +break ; +case 4 : +cpu_outl (port,ldl_p (ptr)); +break ; + } + }
The whole "if" can be replaced by
MemTxAttrs = { 0 };
...
address_space_rw(&address_space_io, port, attrs,
ptr, size, direction == HAX_EXIT_IO_OUT);Thanks,
Paolo
Quoted 10 lines
target-i386/hax-all.c new file +10
-0+if (!df) { + ptr += size; + }else { + ptr -= size; + } + } + +return 0 ; +} +
Re: [Qemu-devel] [PATCH v2 2/5] target-i386: Add Intel HAX files
Quoted 9 lines · Paolo Bonzini
target-i386/hax-all.c line 1345
Quoted 3 lines · Vincent Palatin
target-i386/hax-all.c new file +3
-0+ +memcpy (env->xmm_regs, fpu.mmx_1,sizeof (fpu.mmx_1)); +memcpy ((ZMMReg *) (env->xmm_regs) +8 , fpu.mmx_2,sizeof (fpu.mmx_2));HAX will only support SSE (128-bit) registers, while
env->xmm_regssupports AVX512 (512-bit) so you have to copy registers one by one.
Good point,
I will fix this
Quoted 2 lines
Is there documentation for HAX?
No developer doc I know of,
both Intel website and the download packages contain only installation documentations as far as I can tell.
I will ask Intel when I have the chance.
Quoted 3 lines
In particular I'm curious as to what
the CPUID information looks like in the guest, and whether there are ioctls to change it.
No idea for the interface, but I have put an example below if you are interested.
Quoted 1 line
In particular I would expect XSAVE to be disabled.
For EAX=1 I'm seeing ECX = 00d82201 => [26] = 0 && [27] = 0. We should be fine for XSAVE.
On the Intel Core i5-6200U CPU I was running my tests on, I have dumped the CPUID inside the emulator with HAX and on the Windows host:
========== emulation with HAX ==========
eax in eax ebx ecx edx
00000000 00000004 756e6547 6c65746e 49656e69 00000001 000106f1 00010400 00d82201 1f88fbff 00000002 03020101 00000000 00000000 0c040844 00000003 00000000 00000000 00000000 00000000 00000004 00000000 00000000 00000000 00000000 00000005 00000040 00000040 00000003 11142120 00000006 000027f7 00000002 00000009 00000000 00000007 00000000 029c67af 00000000 00000000 00000008 00000000 00000000 00000000 00000000 00000009 00000000 00000000 00000000 00000000 0000000a 07300404 00000000 00000000 00000603 0000000b 00000001 00000002 00000100 00000001 0000000c 00000000 00000000 00000000 00000000 0000000d 0000001f 00000440 00000440 00000000 0000000e 00000000 00000000 00000000 00000000 0000000f 00000000 00000000 00000000 00000000 00000010 00000000 00000000 00000000 00000000 00000011 00000000 00000000 00000000 00000000 00000012 00000000 00000000 00000000 00000000 00000013 00000000 00000000 00000000 00000000 00000014 00000001 0000000f 00000007 00000000 00000015 00000002 000000c8 00000000 00000000 00000016 00000960 00000af0 00000064 00000000 80000000 80000008 00000000 00000000 00000000 80000001 00000000 00000000 00000000 20000800 80000002 74726956 206c6175 20555043 00000000 80000003 00000000 00000000 00000000 00000000 80000004 00000000 00000000 00000000 00000000 80000005 00000000 00000000 00000000 00000000 80000006 00000000 00000000 04008040 00000000 80000007 00000000 00000000 00000000 00000000 80000008 00003027 00000000 00000000 00000000
========== Windows host ==========
eax in eax ebx ecx edx
00000000 00000016 756e6547 6c65746e 49656e69 00000001 000406e3 00100800 7ffafbbf bfebfbff 00000002 76036301 00f0b5ff 00000000 00c30000 00000003 00000000 00000000 00000000 00000000 00000004 00000000 00000000 00000000 00000000 00000005 00000040 00000040 00000003 11142120 00000006 000027f7 00000002 00000009 00000000 00000007 00000000 00000000 00000000 00000000 00000008 00000000 00000000 00000000 00000000 00000009 00000000 00000000 00000000 00000000 0000000a 07300404 00000000 00000000 00000603 0000000b 00000000 00000000 000000c3 00000000 0000000c 00000000 00000000 00000000 00000000 0000000d 00000000 00000000 00000000 00000000 0000000e 00000000 00000000 00000000 00000000 0000000f 00000000 00000000 00000000 00000000 00000010 00000000 00000000 00000000 00000000 00000011 00000000 00000000 00000000 00000000 00000012 00000000 00000000 00000000 00000000 00000013 00000000 00000000 00000000 00000000 00000014 00000000 00000000 00000000 00000000 00000015 00000002 000000c8 00000000 00000000 00000016 00000960 00000af0 00000064 00000000 80000000 80000008 00000000 00000000 00000000 80000001 00000000 00000000 00000121 2c100000 80000002 65746e49 2952286c 726f4320 4d542865 80000003 35692029 3032362d 43205530 40205550 80000004 332e3220 7a484730 00000000 00000000 80000005 00000000 00000000 00000000 00000000 80000006 00000000 00000000 01006040 00000000 80000007 00000000 00000000 00000000 00000100 80000008 00003027 00000000 00000000 00000000
Quoted 12 lines
Quoted 12 lines
target-i386/hax-all.c new file +11
-0+ +static int hax_handle_fastmmio (CPUArchState *env,struct hax_fastmmio *hft) +{ +uint64_t buf =0 ; +/* +* With fast MMIO, QEMU need not sync vCPU state with HAXM +* driver because it will only invoke MMIO handler +* However, some MMIO operations utilize virtual address like qemu_pipe +* Thus we need to sync the CR0, CR3 and CR4 so that QEMU +* can translate the guest virtual address to guest physical +* address
Quoted 8 lines
target-i386/hax-all.c line 646
Quoted 5 lines
target-i386/hax-all.c new file +5
-0+*/ + env->cr[0 ] = hft->_cr0; + env->cr[2 ] = hft->_cr2; + env->cr[3 ] = hft->_cr3; + env->cr[4 ] = hft->_cr4;These seem to apply only to some parts of the Android emulator that are not upstream, so you can remove them.
Ok, removed.
Re-tested my own image still works ...
Quoted 10 lines
target-i386/hax-all.c line 654
Quoted 8 lines
target-i386/hax-all.c new file +7
-0+ buf = hft->value; + +cpu_physical_memory_rw (hft->gpa, (uint8_t *) &buf, hft->size, + hft->direction); +if (hft->direction ==0 ) { + hft->value = buf; + }No need to use "buf", you can use
&hft->valuedirectly.
Updated.
Quoted 44 lines
Quoted 31 lines
target-i386/hax-all.c new file +30
-0+return 0 ; +} + +static int hax_handle_io (CPUArchState *env,uint32_t df,uint16_t port, +int direction,int size,int count,void *buffer) +{ +uint8_t *ptr; +int i; + +if (!df) { + ptr = (uint8_t *) buffer; + }else { + ptr = buffer + size * count - size; + } +for (i =0 ; i < count; i++) { +if (direction ==HAX_EXIT_IO_IN ) { +switch (size) { +case 1 : +stb_p (ptr,cpu_inb (port)); +break ; +case 2 : +stw_p (ptr,cpu_inw (port)); +break ; +case 4 : +stl_p (ptr,cpu_inl (port)); +break ; + } + }else { +switch (size) { +case 1 :target-i386/hax-all.c line 695
Quoted 10 lines
target-i386/hax-all.c new file +10
-0+cpu_outb (port,ldub_p (ptr)); +break ; +case 2 : +cpu_outw (port,lduw_p (ptr)); +break ; +case 4 : +cpu_outl (port,ldl_p (ptr)); +break ; + } + }The whole "if" can be replaced by
Quoted 6 lines
MemTxAttrs = { 0 };
...
address_space_rw(&address_space_io, port, attrs,
ptr, size, direction == HAX_EXIT_IO_OUT);Nice, updated and queued for my V3 series.
Quoted 11 lines
Quoted 11 lines
target-i386/hax-all.c new file +10
-0+if (!df) { + ptr += size; + }else { + ptr -= size; + } + } + +return 0 ; +} +
Re: [Qemu-devel] [PATCH v2 2/5] target-i386: Add Intel HAX files
In reply to Vincent Palatintarget-i386/hax-all.c line 1345
Quoted 3 lines · Vincent Palatin
target-i386/hax-all.c new file +3
-0+ +memcpy (env->xmm_regs, fpu.mmx_1,sizeof (fpu.mmx_1)); +memcpy ((ZMMReg *) (env->xmm_regs) +8 , fpu.mmx_2,sizeof (fpu.mmx_2));
HAX will only support SSE (128-bit) registers, while env->xmm_regs supports AVX512 (512-bit) so you have to copy registers one by one.
Is there documentation for HAX? In particular I'm curious as to what the CPUID information looks like in the guest, and whether there are ioctls to change it. In particular I would expect XSAVE to be disabled.
Paolo
PATCH v2 3/5 hax: remove non UG code
In reply to Vincent PalatinSimplify the implementation by removing the code for supporting the hardware without Unrestricted Guest (UG) mode.
--- hax-stub.c | 20 ----- include/sysemu/hax.h | 6 -- target-i386/hax-all.c | 200 ++++++++----------------------------------------- target-i386/hax-i386.h | 1 - 4 files changed, 31 insertions(+), 196 deletions(-)
hax-stub.c +0 -20
@@ -52,23 +52,3 @@ int hax_smp_cpu_exec(CPUState *cpu) {return -ENOSYS ; } - -int hax_vcpu_exec (CPUState *cpu) -{ -return -ENOSYS ; -} - -int hax_vcpu_emulation_mode (CPUState *cpu) -{ -return 0 ; -} - -int hax_stop_emulation (CPUState *cpu) -{ -return 0 ; -} - -int hax_stop_translate (CPUState *cpu) -{ -return 0 ; -}
include/sysemu/hax.h +0 -6
@@ -30,10 +30,6 @@ int hax_sync_vcpus(void);void hax_disable (int disable);int hax_init_vcpu (CPUState *cpu);int hax_smp_cpu_exec (CPUState *cpu); -int hax_vcpu_exec (CPUState *cpu); -int hax_vcpu_emulation_mode (CPUState *cpu); -int hax_stop_emulation (CPUState *cpu); -int hax_stop_translate (CPUState *cpu);/* get the max haxm ram even before haxm library is initialized */ int hax_get_max_ram (uint64_t *max_ram);int hax_populate_ram (uint64_t va,uint32_t size);
@@ -45,7 +41,6 @@ void hax_cpu_synchronize_post_init(CPUState *cpu);#ifdef CONFIG_HAX int hax_enabled (void ); -int hax_ug_platform (void );#include "hw/hw.h" #include "qemu/bitops.h"
@@ -59,7 +54,6 @@ void hax_reset_vcpu_state(void *opaque);#else /* CONFIG_HAX */ #define hax_enabled () (0) -#define hax_ug_platform () (0)#endif /* CONFIG_HAX */
target-i386/hax-all.c +31 -169
270 lines not on this page · raw message
target-i386/hax-i386.h +0 -1
@@ -28,7 +28,6 @@ extern struct hax_state hax_global;struct hax_vcpu_state {hax_fd fd;int vcpu_id; -int resync;int emulation_state;struct hax_tunnel *tunnel;unsigned char *iobuf;
Signature · 1 line
2.8.0.rc3.226.g39d4020
PATCH v2 4/5 hax: simplify init
In reply to Vincent Palatinremove the leftovers from the Android specific code,
and use the AccelClass allowed field as expected.
then we can simplify the remaining logic and remove the hax_pre_init callback.
--- hax-stub.c | 15 --------------- include/sysemu/hax.h | 4 ---- target-i386/hax-all.c | 49 ++++++++++++----------------------------------- target-i386/hax-windows.c | 20 ------------------- 4 files changed, 12 insertions(+), 76 deletions(-)
hax-stub.c +0 -15
@@ -23,21 +23,6 @@ int hax_sync_vcpus(void)return 0 ; } -void hax_disable (int disable) -{ -return ; -} - -int hax_pre_init (uint64_t ram_size) -{ -return 0 ; -} - -int hax_get_max_ram (uint64_t *max_ram) -{ -return 0 ; -} -int hax_populate_ram (uint64_t va,uint32_t size) {return -ENOSYS ;
include/sysemu/hax.h +0 -4
@@ -25,13 +25,9 @@#include "config-host.h" #include "qemu-common.h" -int hax_pre_init (uint64_t ram_size);int hax_sync_vcpus (void ); -void hax_disable (int disable);int hax_init_vcpu (CPUState *cpu);int hax_smp_cpu_exec (CPUState *cpu); -/* get the max haxm ram even before haxm library is initialized */ -int hax_get_max_ram (uint64_t *max_ram);int hax_populate_ram (uint64_t va,uint32_t size);void hax_cpu_synchronize_state (CPUState *cpu);
target-i386/hax-all.c +12 -37
101 lines not on this page · raw message
target-i386/hax-windows.c +0 -20
@@ -54,26 +54,6 @@ static int hax_open_device(hax_fd *fd)return 0 ; } -int hax_get_max_ram (uint64_t *max_ram) -{ -DWORD dSize =0 ; -struct hax_capabilityinfo cap; -hax_fd fd =hax_mod_open (); -if (fd ==NULL ) { -return -1 ; - } -int result =DeviceIoControl (fd,HAX_IOCTL_CAPABILITY ,NULL ,0 , &cap, -sizeof (cap), &dSize, (LPOVERLAPPED )NULL ); -CloseHandle (fd); - -if (!result) { -return -2 ; - } - *max_ram = cap.mem_quota; - -return 0 ; -} -/* hax_fd hax_mod_open */ hax_fd hax_mod_open (void ) {
Signature · 1 line
2.8.0.rc3.226.g39d4020
PATCH v2 5/5 Plumb the HAXM-based hardware acceleration support
In reply to Vincent PalatinUse the Intel HAX is kernel-based hardware acceleration module for Windows and MacOSX (similar to KVM on Linux).
Based on the "target-i386: Add Intel HAX to android emulator" patch from David Chou <[email protected]>
--- Makefile.target | 1 + configure | 18 ++++++++++ cpus.c | 87 ++++++++++++++++++++++++++++++++++++++++++++++- exec.c | 16 +++++++++ hw/intc/apic_common.c | 3 +- include/qom/cpu.h | 5 +++ include/sysemu/hw_accel.h | 9 +++++ qemu-options.hx | 11 ++++++ target-i386/Makefile.objs | 7 ++++ vl.c | 15 ++++++-- 10 files changed, 167 insertions(+), 5 deletions(-)
Makefile.target +1 -0
@@ -96,6 +96,7 @@ obj-y += target-$(TARGET_BASE_ARCH)/ obj-y += disas.o obj-y += tcg-runtime.o obj-$(call notempty,$(TARGET_XML_FILES)) += gdbstub-xml.o +obj-$(call lnot,$(CONFIG_HAX)) += hax-stub.o obj-$(call lnot,$(CONFIG_KVM)) += kvm-stub.o obj-$(CONFIG_LIBDECNUMBER) += libdecnumber/decContext.o
configure +18 -0
@@ -230,6 +230,7 @@ vhost_net="no" vhost_scsi="no" vhost_vsock="no" kvm="no" +hax="no" colo="yes" rdma="" gprof="no"
@@ -563,6 +564,7 @@ CYGWIN*) ;; MINGW32*) mingw32="yes" + hax="yes" audio_possible_drivers="dsound sdl" if check_include dsound.h; then audio_drv_list="dsound"
@@ -610,6 +612,7 @@ OpenBSD) Darwin) bsd="yes" darwin="yes" + hax="yes" LDFLAGS_SHARED="-bundle -undefined dynamic_lookup" if [ "$cpu" = "x86_64" ] ; then QEMU_CFLAGS="-arch x86_64 $QEMU_CFLAGS"
@@ -919,6 +922,10 @@ for opt do ;; --enable-kvm) kvm="yes" ;; + --disable-hax) hax="no" + ;; + --enable-hax) hax="yes" + ;; --disable-colo) colo="no" ;; --enable-colo) colo="yes"
@@ -1371,6 +1378,7 @@ disabled with --disable-FEATURE, default is enabled if available: fdt fdt device tree bluez bluez stack connectivity kvm KVM acceleration support + hax HAX acceleration support colo COarse-grain LOck-stepping VM for Non-stop Service rdma RDMA-based migration support vde support for vde network
@@ -5043,6 +5051,7 @@ echo "ATTR/XATTR support $attr" echo "Install blobs $blobs" echo "KVM support $kvm" echo "COLO support $colo" +echo "HAX support $hax" echo "RDMA support $rdma" echo "TCG interpreter $tcg_interpreter" echo "fdt support $fdt"
@@ -6027,6 +6036,15 @@ case "$target_name" in fi fi esac +if test "$hax" = "yes" ; then + if test "$target_softmmu" = "yes" ; then + case "$target_name" in + i386|x86_64) + echo "CONFIG_HAX=y" >> $config_target_mak + ;; + esac + fi +fi if test "$target_bigendian" = "yes" ; then echo "TARGET_WORDS_BIGENDIAN=y" >> $config_target_mak fi
cpus.c +86 -1
123 lines not on this page · raw message
exec.c +16 -0
@@ -31,6 +31,7 @@#include "hw/xen/xen.h" #endif #include "sysemu/kvm.h" +#include "sysemu/hax.h" #include "sysemu/sysemu.h" #include "qemu/timer.h" #include "qemu/config-file.h"
@@ -1617,6 +1618,21 @@ static void ram_block_add(RAMBlock *new_block, Error **errp) }else { new_block->host =phys_mem_alloc (new_block->max_length, &new_block->mr->align); +/* +* In Hax, the qemu allocate the virtual address, and HAX kernel +* populate the memory with physical memory. Currently we have no +* paging, so user should make sure enough free memory in advance +*/ +if (hax_enabled ()) { +int ret; + ret =hax_populate_ram ((uint64_t )(uintptr_t )new_block->host, + new_block->max_length); +if (ret <0 ) { +error_setg (errp,"Hax failed to populate ram" ); +return ; + } + } +if (!new_block->host) { error_setg_errno(errp, errno, "cannot set up guest memory '%s'",
hw/intc/apic_common.c +2 -1
@@ -26,6 +26,7 @@#include "hw/i386/apic.h" #include "hw/i386/apic_internal.h" #include "trace.h" +#include "sysemu/hax.h" #include "sysemu/kvm.h" #include "hw/qdev.h" #include "hw/sysbus.h"
@@ -316,7 +317,7 @@ static void apic_common_realize(DeviceState *dev, Error **errp)/* Note: We need at least 1M to map the VAPIC option ROM */ if (!vapic && s->vapic_control &VAPIC_ENABLE_MASK && - ram_size >=1024 *1024 ) { + !hax_enabled () && ram_size >=1024 *1024 ) { vapic =sysbus_create_simple ("kvmvapic" ,-1 ,NULL ); } s->vapic = vapic;
include/qom/cpu.h +5 -0
@@ -227,6 +227,8 @@ struct CPUWatchpoint {struct KVMState ;struct kvm_run ; +struct hax_vcpu_state ; +#define TB_JMP_CACHE_BITS 12#define TB_JMP_CACHE_SIZE (1 << TB_JMP_CACHE_BITS)
@@ -392,6 +394,9 @@ struct CPUState {(absolute value) offset as small as possible. This reduces code size, especially for hosts without large memory offsets. */ uint32_t tcg_exit_req; + +bool hax_vcpu_dirty; +struct hax_vcpu_state *hax_vcpu; };QTAILQ_HEAD (CPUTailQ, CPUState);
include/sysemu/hw_accel.h +9 -0
@@ -20,6 +20,9 @@ static inline void cpu_synchronize_state(CPUState *cpu)if (kvm_enabled ()) {kvm_cpu_synchronize_state (cpu); } +if (hax_enabled ()) { +hax_cpu_synchronize_state (cpu); + } }static inline void cpu_synchronize_post_reset (CPUState *cpu)
@@ -27,6 +30,9 @@ static inline void cpu_synchronize_post_reset(CPUState *cpu)if (kvm_enabled ()) {kvm_cpu_synchronize_post_reset (cpu); } +if (hax_enabled ()) { +hax_cpu_synchronize_post_reset (cpu); + } }static inline void cpu_synchronize_post_init (CPUState *cpu)
@@ -34,6 +40,9 @@ static inline void cpu_synchronize_post_init(CPUState *cpu)if (kvm_enabled ()) {kvm_cpu_synchronize_post_init (cpu); } +if (hax_enabled ()) { +hax_cpu_synchronize_post_init (cpu); + } }#endif /* QEMU_HW_ACCEL_H */
qemu-options.hx +11 -0
@@ -3259,6 +3259,17 @@ Enable KVM full virtualization support. This option is only available if KVM support is enabled when compiling. ETEXI +DEF("enable-hax", 0, QEMU_OPTION_enable_hax, \ + "-enable-hax enable HAX virtualization support\n", QEMU_ARCH_I386) +STEXI +@item -enable-hax +@findex -enable-hax +Enable HAX (Hardware-based Acceleration eXecution) support. This option +is only available if HAX support is enabled when compiling. HAX is only +applicable to MAC and Windows platform, and thus does not conflict with +KVM. +ETEXI + DEF("xen-domid", HAS_ARG, QEMU_OPTION_xen_domid, "-xen-domid id specify xen guest domain id\n", QEMU_ARCH_ALL) DEF("xen-create", 0, QEMU_OPTION_xen_create,
target-i386/Makefile.objs +7 -0
@@ -5,3 +5,10 @@ obj-y += gdbstub.o obj-$(CONFIG_SOFTMMU) += machine.o arch_memory_mapping.o arch_dump.o monitor.o obj-$(CONFIG_KVM) += kvm.o hyperv.o obj-$(call lnot,$(CONFIG_KVM)) += kvm-stub.o +# HAX support +ifdef CONFIG_WIN32 +obj-$(CONFIG_HAX) += hax-all.o hax-slot.o hax-windows.o +endif +ifdef CONFIG_DARWIN +obj-$(CONFIG_HAX) += hax-all.o hax-slot.o hax-darwin.o +endif
vl.c +12 -3
@@ -92,6 +92,7 @@ int main(int argc, char **argv)#include "sysemu/cpus.h" #include "migration/colo.h" #include "sysemu/kvm.h" +#include "sysemu/hax.h" #include "qapi/qmp/qjson.h" #include "qemu/option.h" #include "qemu/config-file.h"
@@ -1959,7 +1960,7 @@ static void main_loop(void)int64_t ti;#endif do { - nonblocking = !kvm_enabled() && !xen_enabled() && last_io > 0; + nonblocking = tcg_enabled() && last_io > 0; #ifdef CONFIG_PROFILER ti = profile_getclock(); #endif
@@ -3724,6 +3725,10 @@ int main(int argc, char **argv, char **envp) olist =qemu_find_opts ("machine" );qemu_opts_parse_noisily (olist,"accel=kvm" , false);break ; +case QEMU_OPTION_enable_hax: + olist =qemu_find_opts ("machine" ); +qemu_opts_parse_noisily (olist,"accel=hax" , false); +break ;case QEMU_OPTION_M :case QEMU_OPTION_machine: olist =qemu_find_opts ("machine" );
@@ -4418,8 +4423,8 @@ int main(int argc, char **argv, char **envp)cpu_ticks_init ();if (icount_opts) { -if (kvm_enabled () ||xen_enabled ()) { -error_report ("-icount is not allowed with kvm or xen" ); +if (!tcg_enabled ()) { +error_report ("-icount is not allowed with hardware virtualization" );exit (1 ); }configure_icount (icount_opts, &error_abort);
@@ -4555,6 +4560,10 @@ int main(int argc, char **argv, char **envp)numa_post_machine_init (); +if (hax_enabled ()) { +hax_sync_vcpus (); + } +if (qemu_opts_foreach (qemu_find_opts ("fw_cfg" ), parse_fw_cfg,fw_cfg_find (),NULL ) !=0 ) {exit (1 );
Signature · 1 line
2.8.0.rc3.226.g39d4020
Re: [Qemu-devel] [PATCH v2 5/5] Plumb the HAXM-based hardware acceleration support
Quoted 8 lines · Vincent Palatin
exec.c +8
-0+/* +* In Hax, the qemu allocate the virtual address, and HAX kernel +* populate the memory with physical memory. Currently we have no +* paging, so user should make sure enough free memory in advance +*/ +if (hax_enabled ()) { +int ret; + ret = hax_populate_ram((uint64_t)(uintptr_t)new_block->host,
exec.c static void ram_block_add(RAMBlock *new_block, Error **errp) · line 1638
Quoted 10 lines
exec.c +7
-0+ new_block->max_length); +if (ret <0 ) { +error_setg (errp,"Hax failed to populate ram" ); +return ; + } + } +if (!new_block->host) { error_setg_errno(errp, errno, "cannot set up guest memory '%s'",
The hax_enabled() check should be after the "if (!new_block->host)" block.
Paolo
Re: [Qemu-devel] [PATCH v2 5/5] Plumb the HAXM-based hardware acceleration support
Quoted 22 lines · Paolo Bonzini
Quoted 8 lines · Vincent Palatin
exec.c +8
-0+/* +* In Hax, the qemu allocate the virtual address, and HAX kernel +* populate the memory with physical memory. Currently we have no +* paging, so user should make sure enough free memory in advance +*/ +if (hax_enabled ()) { +int ret; + ret = hax_populate_ram((uint64_t)(uintptr_t)new_block->host,exec.c static void ram_block_add(RAMBlock *new_block, Error **errp) · line 1638
Quoted 10 lines
exec.c +7
-0+ new_block->max_length); +if (ret <0 ) { +error_setg (errp,"Hax failed to populate ram" ); +return ; + } + } +if (!new_block->host) { error_setg_errno(errp, errno, "cannot set up guest memory '%s'",
Quoted 1 line
The
hax_enabled()check should be after the "if (!new_block->host)" block.
Indeed, fixed in v3 series.
Thansk !
Signature · 1 line
Vincent
Your series seems to have some coding style problems. See output below for more information:
Hi,
Your series seems to have some coding style problems. See output below for more information:
Type: series
Subject: [Qemu-devel] [PATCH v2 0/5] [RFC] Add HAX support
Message-id: [email protected]
=== TEST SCRIPT BEGIN ===
#!/bin/bash
BASE=base
n=1
total=$(git log --oneline $BASE.. | wc -l)
failed=0
# Useful git options
git config --local diff.renamelimit 0
git config --local diff.renames True
commits="$(git log --format=%H --reverse $BASE..)" for c in $commits; do
echo "Checking PATCH $n/$total: $(git show --no-patch --format=%s $c)..."
if ! git show $c --format=email | ./scripts/checkpatch.pl --mailback -; then
failed=1
echo
fi
n=$((n+1))done
exit $failed
=== TEST SCRIPT END ===
Updating 3c8cf5a9c21ff8782164d1def7f44bd888713384 Switched to a new branch 'test'
b9d801a Plumb the HAXM-based hardware acceleration support c855846 hax: simplify init
577d188 hax: remove non UG code
edf12f7 target-i386: Add Intel HAX files
cfebedf kvm: move cpu synchronization code
=== OUTPUT BEGIN ===
fatal: unrecognized argument: --no-patch
Checking PATCH 1/5: ...
fatal: unrecognized argument: --no-patch
Checking PATCH 2/5: ...
fatal: unrecognized argument: --no-patch
Checking PATCH 3/5: ...
fatal: unrecognized argument: --no-patch
Checking PATCH 4/5: ...
fatal: unrecognized argument: --no-patch
Checking PATCH 5/5: ...
ERROR: spaces required around that '-' (ctx:WxV)
#158: FILE: cpus.c:1276:
+ if (SuspendThread(cpu->hThread) == (DWORD) -1) {
^ERROR: spaces required around that '-' (ctx:WxV)
#176: FILE: cpus.c:1294:
+ if (ResumeThread(cpu->hThread) == (DWORD) -1) {
^total: 2 errors, 0 warnings, 349 lines checked
Your patch has style problems, please review. If any of these errors are false positives report them to the maintainer, see CHECKPATCH in MAINTAINERS.
=== OUTPUT END ===
Test command exited with code: 1
---
Email generated automatically by Patchew [http://patchew.org/].
Please send your feedback to [email protected]
Quoted 55 lines · On Sun, Nov 13, 2016 at 4:20 AM, <[email protected]> wrote:
Hi,
Your series seems to have some coding style problems. See output below for more information:
Type: series
Subject: [Qemu-devel] [PATCH v2 0/5] [RFC] Add HAX support
Message-id: [email protected]=== TEST SCRIPT BEGIN ===
#!/bin/bashBASE=base
n=1
total=$(git log --oneline $BASE.. | wc -l)
failed=0# Useful git options
git config --local diff.renamelimit 0
git config --local diff.renames Truecommits="$(git log --format=%H --reverse $BASE..)" for c in $commits; do
echo "Checking PATCH $n/$total: $(git show --no-patch --format=%s $c)..." if ! git show $c --format=email | ./scripts/checkpatch.pl --mailback -; then failed=1 echo fi n=$((n+1))done
exit $failed
=== TEST SCRIPT END ===Updating
3c8cf5a9c21ff8782164d1def7f44bd888713384Switched to a new branch 'test'
b9d801a Plumb the HAXM-based hardware acceleration support c855846 hax: simplify init
577d188 hax: remove non UG code
edf12f7 target-i386: Add Intel HAX files
cfebedf kvm: move cpu synchronization code=== OUTPUT BEGIN ===
fatal: unrecognized argument: --no-patch
Checking PATCH 1/5: ...
fatal: unrecognized argument: --no-patch
Checking PATCH 2/5: ...
fatal: unrecognized argument: --no-patch
Checking PATCH 3/5: ...
fatal: unrecognized argument: --no-patch
Checking PATCH 4/5: ...
fatal: unrecognized argument: --no-patch
Checking PATCH 5/5: ...
ERROR: spaces required around that '-' (ctx:WxV)
#158: FILE: cpus.c:1276:
Quoted 8 lines
+ if (SuspendThread(cpu->hThread) == (DWORD) -1) { ^ERROR: spaces required around that '-' (ctx:WxV)
#176: FILE: cpus.c:1294:+ if (ResumeThread(cpu->hThread) == (DWORD) -1) { ^
Apparently I missed this couple of warnings when I did my final checkpatch pass. At the same time, I have no idea how to solve this one, can anybody enlighten me ?
Having a space on both sides of a unary minus doesn't seem what we want, so I imagine something else is wrong and confuse a bit checkpatch.pl.
Quoted 14 lines
total: 2 errors, 0 warnings, 349 lines checked
Your patch has style problems, please review. If any of these errors are false positives report them to the maintainer, see CHECKPATCH in
MAINTAINERS.=== OUTPUT END ===
Test command exited with code: 1
---
Email generated automatically by Patchew [http://patchew.org/].
Please send your feedback to [email protected]
Quoted 65 lines · Vincent Palatin
Quoted 55 lines · On Sun, Nov 13, 2016 at 4:20 AM, <[email protected]> wrote:
Hi,
Your series seems to have some coding style problems. See output below for more information:
Type: series
Subject: [Qemu-devel] [PATCH v2 0/5] [RFC] Add HAX support
Message-id: [email protected]=== TEST SCRIPT BEGIN ===
#!/bin/bashBASE=base
n=1
total=$(git log --oneline $BASE.. | wc -l)
failed=0# Useful git options
git config --local diff.renamelimit 0
git config --local diff.renames Truecommits="$(git log --format=%H --reverse $BASE..)" for c in $commits; do
echo "Checking PATCH $n/$total: $(git show --no-patch --format=%s $c)..." if ! git show $c --format=email | ./scripts/checkpatch.pl --mailback -; then failed=1 echo fi n=$((n+1))done
exit $failed
=== TEST SCRIPT END ===Updating
3c8cf5a9c21ff8782164d1def7f44bd888713384Switched to a new branch 'test'
b9d801a Plumb the HAXM-based hardware acceleration support c855846 hax: simplify init
577d188 hax: remove non UG code
edf12f7 target-i386: Add Intel HAX files
cfebedf kvm: move cpu synchronization code=== OUTPUT BEGIN ===
fatal: unrecognized argument: --no-patch
Checking PATCH 1/5: ...
fatal: unrecognized argument: --no-patch
Checking PATCH 2/5: ...
fatal: unrecognized argument: --no-patch
Checking PATCH 3/5: ...
fatal: unrecognized argument: --no-patch
Checking PATCH 4/5: ...
fatal: unrecognized argument: --no-patch
Checking PATCH 5/5: ...
ERROR: spaces required around that '-' (ctx:WxV)
#158: FILE: cpus.c:1276:Quoted 8 lines
+ if (SuspendThread(cpu->hThread) == (DWORD) -1) { ^ERROR: spaces required around that '-' (ctx:WxV)
#176: FILE: cpus.c:1294:+ if (ResumeThread(cpu->hThread) == (DWORD) -1) { ^
Quoted 5 lines
Apparently I missed this couple of warnings when I did my final checkpatch pass. At the same time, I have no idea how to solve this one, can anybody enlighten me ?
Having a space on both sides of a unary minus doesn't seem what we want, so I imagine something else is wrong and confuse a bit checkpatch.pl.
Yes, I think it's the Win32 "DWORD" type that confuses it. You can ignore it.
Paolo
Quoted 24 lines · Vincent Palatin
Quoted 14 lines · On Sun, Nov 13, 2016 at 4:20 AM, <[email protected]> wrote:
=== OUTPUT BEGIN ===
fatal: unrecognized argument: --no-patch
Checking PATCH 1/5: ...
fatal: unrecognized argument: --no-patch
Checking PATCH 2/5: ...
fatal: unrecognized argument: --no-patch
Checking PATCH 3/5: ...
fatal: unrecognized argument: --no-patch
Checking PATCH 4/5: ...
fatal: unrecognized argument: --no-patch
Checking PATCH 5/5: ...
ERROR: spaces required around that '-' (ctx:WxV)
#158: FILE: cpus.c:1276:Quoted 8 lines
+ if (SuspendThread(cpu->hThread) == (DWORD) -1) { ^ERROR: spaces required around that '-' (ctx:WxV)
#176: FILE: cpus.c:1294:+ if (ResumeThread(cpu->hThread) == (DWORD) -1) { ^
Quoted 5 lines
Apparently I missed this couple of warnings when I did my final checkpatch pass. At the same time, I have no idea how to solve this one, can anybody enlighten me ?
Having a space on both sides of a unary minus doesn't seem what we want, so I imagine something else is wrong and confuse a bit checkpatch.pl.
(DWORK)(-1) works for checkpatch.pl.
I noticed a strange behaviour of checkpatch.pl:
If I run it on all of your five commits, it does not find any error. If I run it only on the 5th commit, it shows the two errors like above.
Stefan
Quoted 36 lines · Stefan Weil
Quoted 26 lines · Vincent Palatin
Quoted 15 lines · On Sun, Nov 13, 2016 at 4:20 AM, <[email protected]> wrote:
=== OUTPUT BEGIN ===
fatal: unrecognized argument: --no-patch
Checking PATCH 1/5: ...
fatal: unrecognized argument: --no-patch
Checking PATCH 2/5: ...
fatal: unrecognized argument: --no-patch
Checking PATCH 3/5: ...
fatal: unrecognized argument: --no-patch
Checking PATCH 4/5: ...
fatal: unrecognized argument: --no-patch
Checking PATCH 5/5: ...
ERROR: spaces required around that '-' (ctx:WxV)
#158: FILE: cpus.c:1276:Quoted 8 lines
+ if (SuspendThread(cpu->hThread) == (DWORD) -1) { ^ERROR: spaces required around that '-' (ctx:WxV)
#176: FILE: cpus.c:1294:+ if (ResumeThread(cpu->hThread) == (DWORD) -1) { ^Quoted 6 lines
Apparently I missed this couple of warnings when I did my final checkpatch pass.
At the same time, I have no idea how to solve this one, can anybody enlighten me ?
Having a space on both sides of a unary minus doesn't seem what we want, so I imagine something else is wrong and confuse a bit checkpatch.pl.
Quoted 1 line
(DWORK)(-1) works for checkpatch.pl.
Yes, thanks. This should be an acceptable workaround, I will update my next series.
Quoted 5 lines
I noticed a strange behaviour of checkpatch.pl:
If I run it on all of your five commits, it does not find any error. If I run it only on the 5th commit, it shows the two errors like above.
Interesting, that's why I missed it in first place ... I was a bit confused.
Signature · 1 line
Vincent
Am 11.11.2016 um 12:28 schrieb Vincent Palatin:
Quoted 33 lines
I took a stab at trying to rebase/upstream the support for Intel HAXM. (Hardware Accelerated Execution Manager).
Intel HAX is kernel-based hardware acceleration module for Windows and MacOSX.I have based my work on the last version of the source code I found:
the emu-2.2-release branch in the external/qemu-android repository as used by the Android emulator.
In patch 2/5, I have forward-ported the core HAX code mostly unmodified from there, I just did some minor touch up to make it build and run properly, and fixed the style issues to go through checkpatch.pl.
I have not included the Darwin support.
It might contain some outdated constructs and probably requires more attention (thus the 'RFC' for this patchset).In patch 3/5, I'm removing a good chunk of the support for CPUs without UG mode as advised by Paolo to simplify the initial version.
In patch 5/5, I have put the plumbing into the QEMU code base, I did some clean up there and it is reasonably intrusive: i.e.
Makefile.target | 1 + configure | 18 ++++++++++ cpus.c | 87 ++++++++++++++++++++++++++++++++++++++++++++++- exec.c | 16 +++++++++ hw/intc/apic_common.c | 3 +- include/qom/cpu.h | 5 +++ include/sysemu/hw_accel.h | 9 +++++ qemu-options.hx | 11 ++++++ target-i386/Makefile.objs | 7 ++++ vl.c | 15 ++++++-- 10 files changed, 167 insertions(+), 5 deletions(-)The
qemu_cpu_kick_threadmess incpus.cis probably still not perfact though.
Quoted 8 lines
The patch 1/5 just extracts from KVM specific header the
cpu_synchronize_functions that HAX is also using.I have tested the end result on a Windows 10 Pro machine (with UG support) with the Intel HAXM module 6.0.4 and a large ChromiumOS
x86_64image to exercise various code paths. It looks stable.
I also did a quick regression testing of the integration by running a Linux build with KVM enabled.
A full build for Windows needs the patch below to
fix missing declarations, otherwise it fails with
compiler warnings and linker errors.
Stefan
Quoted 1 line
From
91481639a1005ed3278eb55c77c99bb1bcc135ceMon Sep 17 00:00:00 2001
From: Stefan Weil <[email protected]>
Date: Mon, 14 Nov 2016 13:09:53 +0100
Subject: [PATCH] Fix include statements for HAXM support
We need sysemu/hw_accel.h. As sysemu/hw_accel.h already includes sysemu/kvm.h, that one can be removed.
--- hw/ppc/pnv_xscom.c | 2 +- hw/ppc/ppce500_spin.c | 4 ++-- hw/ppc/spapr.c | 2 +- hw/ppc/spapr_hcall.c | 2 +- hw/s390x/s390-pci-inst.c | 1 + target-ppc/mmu-hash64.c | 2 +- target-ppc/translate_init.c | 2 +- target-s390x/gdbstub.c | 1 + 8 files changed, 9 insertions(+), 7 deletions(-)
hw/ppc/pnv_xscom.c +1 -1
@@ -20,7 +20,7 @@#include "qapi/error.h" #include "hw/hw.h" #include "qemu/log.h" -#include "sysemu/kvm.h" +#include "sysemu/hw_accel.h" #include "target-ppc/cpu.h" #include "hw/sysbus.h"
hw/ppc/ppce500_spin.c +2 -2
@@ -29,9 +29,9 @@#include "qemu/osdep.h" #include "hw/hw.h" -#include "sysemu/sysemu.h" #include "hw/sysbus.h" -#include "sysemu/kvm.h" +#include "sysemu/hw_accel.h" +#include "sysemu/sysemu.h" #include "e500.h" #define MAX_CPUS 32
hw/ppc/spapr.c +1 -1
@@ -36,7 +36,7 @@#include "sysemu/device_tree.h" #include "sysemu/block-backend.h" #include "sysemu/cpus.h" -#include "sysemu/kvm.h" +#include "sysemu/hw_accel.h" #include "kvm_ppc.h" #include "migration/migration.h" #include "mmu-hash64.h"
hw/ppc/spapr_hcall.c +1 -1
@@ -1,5 +1,6 @@#include "qemu/osdep.h" #include "qapi/error.h" +#include "sysemu/hw_accel.h" #include "sysemu/sysemu.h" #include "qemu/log.h" #include "cpu.h"
@@ -9,7 +10,6 @@#include "mmu-hash64.h" #include "cpu-models.h" #include "trace.h" -#include "sysemu/kvm.h" #include "kvm_ppc.h" #include "hw/ppc/spapr_ovec.h"
hw/s390x/s390-pci-inst.c +1 -0
@@ -18,6 +18,7 @@#include "s390-pci-bus.h" #include "exec/memory-internal.h" #include "qemu/error-report.h" +#include "sysemu/hw_accel.h" /* #define DEBUG_S390PCI_INST */ #ifdef DEBUG_S390PCI_INST
target-ppc/mmu-hash64.c +1 -1
@@ -23,7 +23,7 @@#include "exec/exec-all.h" #include "exec/helper-proto.h" #include "qemu/error-report.h" -#include "sysemu/kvm.h" +#include "sysemu/hw_accel.h" #include "kvm_ppc.h" #include "mmu-hash64.h" #include "exec/log.h"
target-ppc/translate_init.c +1 -1
@@ -21,10 +21,10 @@#include "qemu/osdep.h" #include "disas/bfd.h" #include "exec/gdbstub.h" -#include "sysemu/kvm.h" #include "kvm_ppc.h" #include "sysemu/arch_init.h" #include "sysemu/cpus.h" +#include "sysemu/hw_accel.h" #include "cpu-models.h" #include "mmu-hash32.h" #include "mmu-hash64.h"
target-s390x/gdbstub.c +1 -0
@@ -23,6 +23,7 @@#include "exec/exec-all.h" #include "exec/gdbstub.h" #include "qemu/bitops.h" +#include "sysemu/hw_accel.h" int s390_cpu_gdb_read_register (CPUState *cs,uint8_t *mem_buf,int n) {
Signature · 1 line
2.10.2
Quoted 44 lines · Stefan Weil
Am 11.11.2016 um 12:28 schrieb Vincent Palatin:
Quoted 33 lines
I took a stab at trying to rebase/upstream the support for Intel HAXM. (Hardware Accelerated Execution Manager).
Intel HAX is kernel-based hardware acceleration module for Windows and MacOSX.I have based my work on the last version of the source code I found:
the emu-2.2-release branch in the external/qemu-android repository as used by the Android emulator.
In patch 2/5, I have forward-ported the core HAX code mostly unmodified from there, I just did some minor touch up to make it build and run properly, and fixed the style issues to go through checkpatch.pl.
I have not included the Darwin support.
It might contain some outdated constructs and probably requires more attention (thus the 'RFC' for this patchset).In patch 3/5, I'm removing a good chunk of the support for CPUs without UG mode as advised by Paolo to simplify the initial version.
In patch 5/5, I have put the plumbing into the QEMU code base, I did some clean up there and it is reasonably intrusive: i.e.
Makefile.target | 1 + configure | 18 ++++++++++ cpus.c | 87 ++++++++++++++++++++++++++++++++++++++++++++++- exec.c | 16 +++++++++ hw/intc/apic_common.c | 3 +- include/qom/cpu.h | 5 +++ include/sysemu/hw_accel.h | 9 +++++ qemu-options.hx | 11 ++++++ target-i386/Makefile.objs | 7 ++++ vl.c | 15 ++++++-- 10 files changed, 167 insertions(+), 5 deletions(-)The
qemu_cpu_kick_threadmess incpus.cis probably still not perfact though.Quoted 8 lines
The patch 1/5 just extracts from KVM specific header the
cpu_synchronize_functions that HAX is also using.I have tested the end result on a Windows 10 Pro machine (with UG support) with the Intel HAXM module 6.0.4 and a large ChromiumOS
x86_64image to exercise various code paths. It looks stable.
I also did a quick regression testing of the integration by running a Linux build with KVM enabled.
Quoted 3 lines
A full build for Windows needs the patch below to
fix missing declarations, otherwise it fails with
compiler warnings and linker errors.
Thanks for filing the gaps. That's very helpful !
Do you mind if I merge it with your SoB into Patch 1/5 where it belongs ? or do you prefer keeping it as a separate patch ?
Quoted 137 lines
From
91481639a1005ed3278eb55c77c99bb1bcc135ceMon Sep 17 00:00:00 2001
From: Stefan Weil <[email protected]>
Date: Mon, 14 Nov 2016 13:09:53 +0100
Subject: [PATCH] Fix include statements for HAXM supportWe need
sysemu/hw_accel.h. Assysemu/hw_accel.halready includessysemu/kvm.h, that one can be removed.Signed-off-by Stefan Weil <[email protected]>--- hw/ppc/pnv_xscom.c | 2 +- hw/ppc/ppce500_spin.c | 4 ++-- hw/ppc/spapr.c | 2 +- hw/ppc/spapr_hcall.c | 2 +- hw/s390x/s390-pci-inst.c | 1 + target-ppc/mmu-hash64.c | 2 +- target-ppc/translate_init.c | 2 +- target-s390x/gdbstub.c | 1 + 8 files changed, 9 insertions(+), 7 deletions(-)hw/ppc/pnv_xscom.c +1
-1@@ -20,7 +20,7 @@#include "qapi/error.h" #include "hw/hw.h" #include "qemu/log.h" -#include "sysemu/kvm.h" +#include "sysemu/hw_accel.h" #include "target-ppc/cpu.h" #include "hw/sysbus.h" hw/ppc/ppce500_spin.c +2
-2@@ -29,9 +29,9 @@#include "qemu/osdep.h" #include "hw/hw.h" -#include "sysemu/sysemu.h" #include "hw/sysbus.h" -#include "sysemu/kvm.h" +#include "sysemu/hw_accel.h" +#include "sysemu/sysemu.h" #include "e500.h" #define MAX_CPUS 32hw/ppc/spapr.c +1
-1@@ -36,7 +36,7 @@#include "sysemu/device_tree.h" #include "sysemu/block-backend.h" #include "sysemu/cpus.h" -#include "sysemu/kvm.h" +#include "sysemu/hw_accel.h" #include "kvm_ppc.h" #include "migration/migration.h" #include "mmu-hash64.h" hw/ppc/spapr_hcall.c +1
-1@@ -1,5 +1,6 @@#include "qemu/osdep.h" #include "qapi/error.h" +#include "sysemu/hw_accel.h" #include "sysemu/sysemu.h" #include "qemu/log.h" #include "cpu.h" @@ -9,7 +10,6 @@#include "mmu-hash64.h" #include "cpu-models.h" #include "trace.h" -#include "sysemu/kvm.h" #include "kvm_ppc.h" #include "hw/ppc/spapr_ovec.h" hw/s390x/s390-pci-inst.c +1
-0@@ -18,6 +18,7 @@#include "s390-pci-bus.h" #include "exec/memory-internal.h" #include "qemu/error-report.h" +#include "sysemu/hw_accel.h" /* #define DEBUG_S390PCI_INST */ #ifdef DEBUG_S390PCI_INST target-ppc/mmu-hash64.c +1
-1@@ -23,7 +23,7 @@#include "exec/exec-all.h" #include "exec/helper-proto.h" #include "qemu/error-report.h" -#include "sysemu/kvm.h" +#include "sysemu/hw_accel.h" #include "kvm_ppc.h" #include "mmu-hash64.h" #include "exec/log.h" target-ppc/translate_init.c +1
-1@@ -21,10 +21,10 @@#include "qemu/osdep.h" #include "disas/bfd.h" #include "exec/gdbstub.h" -#include "sysemu/kvm.h" #include "kvm_ppc.h" #include "sysemu/arch_init.h" #include "sysemu/cpus.h" +#include "sysemu/hw_accel.h" #include "cpu-models.h" #include "mmu-hash32.h" #include "mmu-hash64.h" target-s390x/gdbstub.c +1
-1@@ -23,6 +23,7 @@#include "exec/exec-all.h" #include "exec/gdbstub.h" #include "qemu/bitops.h" +#include "sysemu/hw_accel.h" int s390_cpu_gdb_read_register (CPUState *cs,uint8_t *mem_buf,int n) { --2.10.2
Am 14.11.2016 um 13:33 schrieb Vincent Palatin:
Quoted 8 lines · Stefan Weil
Quoted 4 lines
A full build for Windows needs the patch below to
fix missing declarations, otherwise it fails with
compiler warnings and linker errors.Thanks for filing the gaps. That's very helpful !
Do you mind if I merge it with your SoB into Patch 1/5 where it belongs ? or do you prefer keeping it as a separate patch ?
Just merge it where it belongs to (I did not check). You may add my SoB as well for that part.
Cheers,
Stefan
Am 11.11.2016 um 12:28 schrieb Vincent Palatin:
[...]
Quoted 5 lines
I have tested the end result on a Windows 10 Pro machine (with UG support) with the Intel HAXM module 6.0.4 and a large ChromiumOS
x86_64image to exercise various code paths. It looks stable.
I also did a quick regression testing of the integration by running a Linux build with KVM enabled.
My test on Windows 7 with HAXM 6.0.4 fails:
$ test/qemu-system-x86_64.exe --enable-hax HAX is working and emulator runs in fast virt mode. Unknown hax vcpu return 1
This application has requested the Runtime to terminate it in an unusual way.
Please contact the application's support team for more information.
$ test/qemu-system-i386.exe --enable-hax HAX is working and emulator runs in fast virt mode. Unknown hax vcpu return 1
This application has requested the Runtime to terminate it in an unusual way.
Please contact the application's support team for more information.
I tested debug code (configure --enable-debug && make) based on latest QEMU from git, this patch series and my include fixes.
Stefan
Quoted 8 lines · Stefan Weil
Am 11.11.2016 um 12:28 schrieb Vincent Palatin:
[...]Quoted 5 lines
I have tested the end result on a Windows 10 Pro machine (with UG support) with the Intel HAXM module 6.0.4 and a large ChromiumOS
x86_64image to exercise various code paths. It looks stable.
I also did a quick regression testing of the integration by running a Linux build with KVM enabled.
Quoted 5 lines
My test on Windows 7 with HAXM 6.0.4 fails:
$ test/qemu-system-x86_64.exe --enable-hax HAX is working and emulator runs in fast virt mode. Unknown hax vcpu return 1
Sorry about this.
I did notice that just running the default Seabios/iPXE was triggering an issue and forgot to debug it (as I'm mostly running Chromium OS images).
I will have a look and try to sort this out..
Quoted 18 lines
This application has requested the Runtime to terminate it in an unusual way.
Please contact the application's support team for more information.$ test/qemu-system-i386.exe --enable-hax HAX is working and emulator runs in fast virt mode. Unknown hax vcpu return 1This application has requested the Runtime to terminate it in an unusual way.
Please contact the application's support team for more information.I tested debug code (configure --enable-debug && make) based on latest QEMU from git, this patch series and my include fixes.
Stefan
Quoted 15 lines · Vincent Palatin
Quoted 8 lines · Stefan Weil
Am 11.11.2016 um 12:28 schrieb Vincent Palatin:
[...]Quoted 5 lines
I have tested the end result on a Windows 10 Pro machine (with UG support) with the Intel HAXM module 6.0.4 and a large ChromiumOS
x86_64image to exercise various code paths. It looks stable.
I also did a quick regression testing of the integration by running a Linux build with KVM enabled.Quoted 5 lines
My test on Windows 7 with HAXM 6.0.4 fails:
$ test/qemu-system-x86_64.exe --enable-hax HAX is working and emulator runs in fast virt mode. Unknown hax vcpu return 1
Quoted 5 lines
Sorry about this.
I did notice that just running the default Seabios/iPXE was triggering an issue and forgot to debug it (as I'm mostly running Chromium OS images).
I will have a look and try to sort this out..
I did more debugging on this and opened a whole new can of worms... The actual crash was the first MMIO access in the iPXE option ROM. The intel network driver there is triggering the MMIO emulation path (ie the HAX kernel module is asking us to emulate the MMIO instruction rather than using the 'fast MMIO' path as all other MMIOs), this path was never correctly plumbed for the UG case in the original Intel patchset, and still is not.... We can run a full linux image without triggering it showing how unlikely it is, but it is not documented why it is not using the normal fast MMIO in some rare case even in UG mode (and I don't have much clues, maybe related to the second bug described below ?).
Adding back a whole TCG emulation fall-back just for this is somewhat large and complex, I will try to find first why it's not using the normal path.
For what it worth '-net nic,model=pcnet' works as a workaround (by not triggering the MMIO of death)
In addition to this, as you might have noticed, there is no character on the (virtual) screen.
The VGA emulation is not triggered because the VGA hole is badly mapped. Digging into this, that's due to the fact that the .region_del() callback of the MemoryListener is missing a proper implementation, so the system cannot remove the initial large mapping of memory on top of those MMIO holes.
But there is a deeper issue to solve this: I'm not seeing in their current kernel module API (aka the hax-interface.h header) a (documented) way of removing a mapping...
So I will probably send the v3 patchset with those caveats still opened to be sure the other changes are not lost,
then I will work further on this and maybe try to get Intel inputs on those API behaviors.
Quoted 19 lines
Quoted 19 lines
This application has requested the Runtime to terminate it in an unusual way.
Please contact the application's support team for more information.$ test/qemu-system-i386.exe --enable-hax HAX is working and emulator runs in fast virt mode. Unknown hax vcpu return 1This application has requested the Runtime to terminate it in an unusual way.
Please contact the application's support team for more information.I tested debug code (configure --enable-debug && make) based on latest QEMU from git, this patch series and my include fixes.
Stefan
Quoted 22 lines · Vincent Palatin
Quoted 15 lines · Vincent Palatin
Quoted 8 lines · Stefan Weil
Am 11.11.2016 um 12:28 schrieb Vincent Palatin:
[...]Quoted 5 lines
I have tested the end result on a Windows 10 Pro machine (with UG support) with the Intel HAXM module 6.0.4 and a large ChromiumOS
x86_64image to exercise various code paths. It looks stable.
I also did a quick regression testing of the integration by running a Linux build with KVM enabled.Quoted 5 lines
My test on Windows 7 with HAXM 6.0.4 fails:
$ test/qemu-system-x86_64.exe --enable-hax HAX is working and emulator runs in fast virt mode. Unknown hax vcpu return 1Quoted 5 lines
Sorry about this.
I did notice that just running the default Seabios/iPXE was triggering an issue and forgot to debug it (as I'm mostly running Chromium OS images).
I will have a look and try to sort this out..
Quoted 10 lines
I did more debugging on this and opened a whole new can of worms... The actual crash was the first MMIO access in the iPXE option ROM. The intel network driver there is triggering the MMIO emulation path (ie the HAX kernel module is asking us to emulate the MMIO instruction rather than using the 'fast MMIO' path as all other MMIOs), this path was never correctly plumbed for the UG case in the original Intel patchset, and still is not.... We can run a full linux image without triggering it showing how unlikely it is, but it is not documented why it is not using the normal fast MMIO in some rare case even in UG mode
It seems I mis-read my earlier traces, this is likely due to the fact that the option ROM is doing those MMIO in 'real mode'.
Quoted 41 lines
Adding back a whole TCG emulation fall-back just for this is somewhat large and complex, I will try to find first why it's not using the normal path.
For what it worth '-net nic,model=pcnet' works as a workaround (by not triggering the MMIO of death)In addition to this, as you might have noticed, there is no character on the (virtual) screen.
The VGA emulation is not triggered because the VGA hole is badly mapped. Digging into this, that's due to the fact that the .region_del() callback of the MemoryListener is missing a proper implementation, so the system cannot remove the initial large mapping of memory on top of those MMIO holes.
But there is a deeper issue to solve this: I'm not seeing in their current kernel module API (aka thehax-interface.hheader) a (documented) way of removing a mapping...So I will probably send the v3 patchset with those caveats still opened to be sure the other changes are not lost,
then I will work further on this and maybe try to get Intel inputs on those API behaviors.Quoted 19 lines
Quoted 19 lines
This application has requested the Runtime to terminate it in an unusual way.
Please contact the application's support team for more information.$ test/qemu-system-i386.exe --enable-hax HAX is working and emulator runs in fast virt mode. Unknown hax vcpu return 1This application has requested the Runtime to terminate it in an unusual way.
Please contact the application's support team for more information.I tested debug code (configure --enable-debug && make) based on latest QEMU from git, this patch series and my include fixes.
Stefan