adding new glue driver dwmac-dwc-qos-eth
Subsystems (6)
v6 cover adding new glue driver dwmac-dwc-qos-eth
This patch set contains the porting of the synopsys/dwc_eth_qos.c driver to the stmmac structure. This operation resulted in the creation of a new platform glue driver called dwmac-dwc-qos-eth which was based in the dwc_eth_qos as is.
dwmac-dwc-qos-eth inherited dwc_eth_qos DT bindings, to assure that current and old users can continue to use it as before. We can see this driver as being deprecated, since all new development will be done in stmmac.
Please check each patch for implementation details.
Joao Pinto (3):
stmmac: adding DT parameter for LPI tx clock gating
stmmac: move stmmac_clk, pclk, clk_ptp_ref and stmmac_rst to platform
structure
stmmac: adding new glue driver dwmac-dwc-qos-eth
.../bindings/net/snps,dwc-qos-ethernet.txt | 3 + Documentation/devicetree/bindings/net/stmmac.txt | 2 + drivers/net/ethernet/stmicro/stmmac/Kconfig | 9 + drivers/net/ethernet/stmicro/stmmac/Makefile | 1 + drivers/net/ethernet/stmicro/stmmac/common.h | 3 +- .../ethernet/stmicro/stmmac/dwmac-dwc-qos-eth.c | 202 +++++++++++++++++++++ .../net/ethernet/stmicro/stmmac/dwmac-socfpga.c | 2 +- .../net/ethernet/stmicro/stmmac/dwmac1000_core.c | 5 +- drivers/net/ethernet/stmicro/stmmac/dwmac4.h | 1 + drivers/net/ethernet/stmicro/stmmac/dwmac4_core.c | 6 +- drivers/net/ethernet/stmicro/stmmac/stmmac.h | 5 - .../net/ethernet/stmicro/stmmac/stmmac_ethtool.c | 4 +- drivers/net/ethernet/stmicro/stmmac/stmmac_main.c | 85 ++------- .../net/ethernet/stmicro/stmmac/stmmac_platform.c | 65 ++++++- include/linux/stmmac.h | 6 + 15 files changed, 317 insertions(+), 82 deletions(-) create mode 100644 drivers/net/ethernet/stmicro/stmmac/dwmac-dwc-qos-eth.c
Signature · 1 line
2.9.3
PATCH v6 1/3 stmmac: adding DT parameter for LPI tx clock gating
This patch adds a new parameter to the stmmac DT: snps,en-tx-lpi-clockgating. It was ported from synopsys/dwc_eth_qos.c and it is useful if lpi tx clock gating is needed by stmmac users also.
---
changes v5 -> v6:
- rebased master branch to achieve clean patch changes v1 -> v5:
- Nothing changed, just to keep up patch set version
Documentation/devicetree/bindings/net/stmmac.txt | 2 ++ drivers/net/ethernet/stmicro/stmmac/common.h | 3 ++- drivers/net/ethernet/stmicro/stmmac/dwmac1000_core.c | 5 ++++- drivers/net/ethernet/stmicro/stmmac/dwmac4.h | 1 + drivers/net/ethernet/stmicro/stmmac/dwmac4_core.c | 6 +++++- drivers/net/ethernet/stmicro/stmmac/stmmac_main.c | 3 ++- drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c | 3 +++ include/linux/stmmac.h | 1 + 8 files changed, 20 insertions(+), 4 deletions(-)
Documentation/devicetree/bindings/net/stmmac.txt +2 -0
@@ -49,6 +49,8 @@ Optional properties: - snps,force_sf_dma_mode Force DMA to use the Store and Forward mode for both tx and rx. This flag is ignored if force_thresh_dma_mode is set. +- snps,en-tx-lpi-clockgating Enable gating of the MAC TX clock during + TX low-power mode - snps,multicast-filter-bins: Number of multicast filter hash bins supported by this device instance - snps,perfect-filter-entries: Number of perfect filter entries supported
drivers/net/ethernet/stmicro/stmmac/common.h +2 -1
@@ -476,7 +476,8 @@ struct stmmac_ops { unsigned int reg_n);void (*get_umac_addr)(struct mac_device_info *hw,unsigned char *addr,unsigned int reg_n); -void (*set_eee_mode)(struct mac_device_info *hw); +void (*set_eee_mode)(struct mac_device_info *hw, +bool en_tx_lpi_clockgating);void (*reset_eee_mode)(struct mac_device_info *hw);void (*set_eee_timer)(struct mac_device_info *hw,int ls,int tw);void (*set_eee_pls)(struct mac_device_info *hw,int link);
drivers/net/ethernet/stmicro/stmmac/dwmac1000_core.c +4 -1
@@ -343,11 +343,14 @@ static int dwmac1000_irq_status(struct mac_device_info *hw,return ret; } -static void dwmac1000_set_eee_mode (struct mac_device_info *hw) +static void dwmac1000_set_eee_mode (struct mac_device_info *hw, +bool en_tx_lpi_clockgating) {void __iomem *ioaddr = hw->pcsr;u32 value; +/*TODO - en_tx_lpi_clockgating treatment */ +/* Enable the link status receive on RGMII, SGMII ore SMII * receive path and instruct the transmit to enter in LPI * state.
drivers/net/ethernet/stmicro/stmmac/dwmac4.h +1 -0
@@ -98,6 +98,7 @@ enum power_event {#define GMAC4_LPI_TIMER_CTRL 0xd4/* LPI control and status defines */ +#define GMAC4_LPI_CTRL_STATUS_LPITCSE BIT(21)/* LPI Tx Clock Stop Enable */ #define GMAC4_LPI_CTRL_STATUS_LPITXA BIT(19)/* Enable LPI TX Automate */ #define GMAC4_LPI_CTRL_STATUS_PLS BIT(17)/* PHY Link Status */ #define GMAC4_LPI_CTRL_STATUS_LPIEN BIT(16)/* LPI Enable */
drivers/net/ethernet/stmicro/stmmac/dwmac4_core.c +5 -1
@@ -137,7 +137,8 @@ static void dwmac4_get_umac_addr(struct mac_device_info *hw, GMAC_ADDR_LOW(reg_n)); } -static void dwmac4_set_eee_mode (struct mac_device_info *hw) +static void dwmac4_set_eee_mode (struct mac_device_info *hw, +bool en_tx_lpi_clockgating) {void __iomem *ioaddr = hw->pcsr;u32 value;
@@ -149,6 +150,9 @@ static void dwmac4_set_eee_mode(struct mac_device_info *hw) value =readl (ioaddr +GMAC4_LPI_CTRL_STATUS ); value |=GMAC4_LPI_CTRL_STATUS_LPIEN |GMAC4_LPI_CTRL_STATUS_LPITXA ; +if (en_tx_lpi_clockgating) + value |=GMAC4_LPI_CTRL_STATUS_LPITCSE ; +writel (value, ioaddr +GMAC4_LPI_CTRL_STATUS ); }
drivers/net/ethernet/stmicro/stmmac/stmmac_main.c +2 -1
@@ -239,7 +239,8 @@ static void stmmac_enable_eee_mode(struct stmmac_priv *priv)/* Check and enter in LPI mode */ if ((priv->dirty_tx == priv->cur_tx) && (priv->tx_path_in_lpi_mode == false)) - priv->hw->mac->set_eee_mode (priv->hw); + priv->hw->mac->set_eee_mode (priv->hw, + priv->plat->en_tx_lpi_clockgating); }/**
drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c +3 -0
@@ -248,6 +248,9 @@ stmmac_probe_config_dt(struct platform_device *pdev, const char **mac) plat->force_sf_dma_mode =of_property_read_bool (np,"snps,force_sf_dma_mode" ); + plat->en_tx_lpi_clockgating = +of_property_read_bool (np,"snps,en-tx-lpi-clockgating" ); +/* Set the maxmtu to a default of JUMBO_LEN in case the * parameter is not present in the device tree. */
include/linux/stmmac.h +1 -0
@@ -142,5 +142,6 @@ struct plat_stmmacenet_data {int has_gmac4;bool tso_en;int mac_port_sel_speed; + bool en_tx_lpi_clockgating; };#endif
Signature · 1 line
2.9.3
PATCH v6 2/3 stmmac: move stmmac_clk, pclk, clk_ptp_ref and stmmac_rst to platform structure
In reply to Joao PintoThis patch moves stmmac_clk, pclk, clk_ptp_ref and stmmac_rst to the plat_stmmacenet_data structure. It also moves these platform variables initialization to stmmac_platform. This was done for two reasons:
a) If PCI is used, platform related code is being executed in stmmac_main resulting in warnings that have no sense and conceptually was not right
b) stmmac as a synopsys reference ethernet driver stack will be hosting more and more drivers to its structure like synopsys/dwc_eth_qos.c. These drivers have their own DT bindings that are not compatible with stmmac's. One of the most important are the clock names, and so they need to be parsed in the glue logic and initialized there, and that is the main reason why the clocks were passed to the platform structure.
---
changes v5 -> v6:
- rebased master branch to achieve clean patch
changes v3 -> v5:
- Nothing changed, just to keep up patch set version
changes v2 -> v3:
- dwmac-socfpga glue driver was also using stmmac_rst from priv struct and was causing a build error caught by kbuild robot
changes v1 -> v2:
- Nothing changed, just to keep up patch set version
.../net/ethernet/stmicro/stmmac/dwmac-socfpga.c | 2 +- drivers/net/ethernet/stmicro/stmmac/stmmac.h | 5 -- .../net/ethernet/stmicro/stmmac/stmmac_ethtool.c | 4 +- drivers/net/ethernet/stmicro/stmmac/stmmac_main.c | 82 ++++------------------ .../net/ethernet/stmicro/stmmac/stmmac_platform.c | 47 +++++++++++++ include/linux/stmmac.h | 5 ++ 6 files changed, 70 insertions(+), 75 deletions(-)
drivers/net/ethernet/stmicro/stmmac/dwmac-socfpga.c +1 -1
@@ -341,7 +341,7 @@ static int socfpga_dwmac_probe(struct platform_device *pdev)* mode. Create a copy of the core reset handle so it can be used by * the driver later. */ - dwmac->stmmac_rst = stpriv->stmmac_rst; + dwmac->stmmac_rst = stpriv->plat->stmmac_rst; ret =socfpga_dwmac_set_phy_mode (dwmac);if (ret)
drivers/net/ethernet/stmicro/stmmac/stmmac.h +0 -5
@@ -106,9 +106,6 @@ struct stmmac_priv {u32 msg_enable;int wolopts;int wol_irq; -struct clk *stmmac_clk; -struct clk *pclk; -struct reset_control *stmmac_rst;int clk_csr;struct timer_list eee_ctrl_timer;int lpi_irq;
@@ -120,8 +117,6 @@ struct stmmac_priv {struct ptp_clock *ptp_clock;struct ptp_clock_info ptp_clock_ops;unsigned int default_addend; -struct clk *clk_ptp_ref; -unsigned int clk_ptp_rate;u32 adv_ts;int use_riwt;int irq_wake;
drivers/net/ethernet/stmicro/stmmac/stmmac_ethtool.c +2 -2
@@ -712,7 +712,7 @@ static int stmmac_ethtool_op_set_eee(struct net_device *dev,static u32 stmmac_usec2riwt (u32 usec,struct stmmac_priv *priv) { -unsigned long clk =clk_get_rate (priv->stmmac_clk); +unsigned long clk =clk_get_rate (priv->plat->stmmac_clk);if (!clk)return 0 ;
@@ -722,7 +722,7 @@ static u32 stmmac_usec2riwt(u32 usec, struct stmmac_priv *priv)static u32 stmmac_riwt2usec (u32 riwt,struct stmmac_priv *priv) { -unsigned long clk =clk_get_rate (priv->stmmac_clk); +unsigned long clk =clk_get_rate (priv->plat->stmmac_clk);if (!clk)return 0 ;
drivers/net/ethernet/stmicro/stmmac/stmmac_main.c +15 -67
142 lines not on this page · raw message
drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c +47 -0
54 lines not on this page · raw message
include/linux/stmmac.h +5 -0
@@ -138,6 +138,11 @@ struct plat_stmmacenet_data {int (*init)(struct platform_device *pdev,void *priv);void (*exit)(struct platform_device *pdev,void *priv);void *bsp_priv; +struct clk *stmmac_clk; +struct clk *pclk; +struct clk *clk_ptp_ref; +unsigned int clk_ptp_rate; +struct reset_control *stmmac_rst;struct stmmac_axi *axi;int has_gmac4;bool tso_en;
Signature · 1 line
2.9.3
PATCH v6 3/3 stmmac: adding new glue driver dwmac-dwc-qos-eth
In reply to Joao PintoThis patch adds a new glue driver called dwmac-dwc-qos-eth which was based in the dwc_eth_qos as is. To assure retro-compatibility a slight tweak was also added to stmmac_platform.
---
changes v5 -> v6:
- rebased master branch to achieve clean patch changes v4 -> v5:
- memset was not done properly
changes v3 -> v4:
- stmmac_res is now being initialized to 0
changes v2 -> v3:
- Nothing changed, just to keep up patch set version changes v1 -> v2:
- WOL was not declared in the new glue driver
- clocks were switched and now fixed (apb_pclk and phy_ref_clk)
.../bindings/net/snps,dwc-qos-ethernet.txt | 3 + drivers/net/ethernet/stmicro/stmmac/Kconfig | 9 + drivers/net/ethernet/stmicro/stmmac/Makefile | 1 + .../ethernet/stmicro/stmmac/dwmac-dwc-qos-eth.c | 202 +++++++++++++++++++++ .../net/ethernet/stmicro/stmmac/stmmac_platform.c | 15 +- 5 files changed, 227 insertions(+), 3 deletions(-) create mode 100644 drivers/net/ethernet/stmicro/stmmac/dwmac-dwc-qos-eth.c
Documentation/devicetree/bindings/net/snps,dwc-qos-ethernet.txt +3 -0
@@ -1,5 +1,8 @@ * Synopsys DWC Ethernet QoS IP version 4.10 driver (GMAC) +This binding is deprecated, but it continues to be supported, but new +features should be preferably added to the stmmac binding document. + This binding supports the Synopsys Designware Ethernet QoS (Quality Of Service) IP block. The IP supports multiple options for bus type, clocking and reset structure, and feature list. Consequently, a number of properties and list
drivers/net/ethernet/stmicro/stmmac/Kconfig +9 -0
@@ -29,6 +29,15 @@ config STMMAC_PLATFORM if STMMAC_PLATFORM +config DWMAC_DWC_QOS_ETH + tristate "Support for snps,dwc-qos-ethernet.txt DT binding." + select PHYLIB + select CRC32 + select MII + depends on OF && HAS_DMA + help + Support for chips using the snps,dwc-qos-ethernet.txt DT binding. + config DWMAC_GENERIC tristate "Generic driver for DWMAC" default STMMAC_PLATFORM
drivers/net/ethernet/stmicro/stmmac/Makefile +1 -0
@@ -16,6 +16,7 @@ obj-$(CONFIG_DWMAC_SOCFPGA) += dwmac-altr-socfpga.o obj-$(CONFIG_DWMAC_STI) += dwmac-sti.o obj-$(CONFIG_DWMAC_STM32) += dwmac-stm32.o obj-$(CONFIG_DWMAC_SUNXI) += dwmac-sunxi.o +obj-$(CONFIG_DWMAC_DWC_QOS_ETH) += dwmac-dwc-qos-eth.o obj-$(CONFIG_DWMAC_GENERIC) += dwmac-generic.o stmmac-platform-objs:= stmmac_platform.o dwmac-altr-socfpga-objs := altr_tse_pcs.o dwmac-socfpga.o
drivers/net/ethernet/stmicro/stmmac/dwmac-dwc-qos-eth.c new file +202 -0
202 lines not on this page · raw message
drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c +12 -3
@@ -180,10 +180,19 @@ static int stmmac_dt_phy(struct plat_stmmacenet_data *plat, mdio = false; } -/* If snps,dwmac-mdio is passed from DT, always register the MDIO */ -for_each_child_of_node (np, plat->mdio_node) { -if (of_device_is_compatible (plat->mdio_node,"snps,dwmac-mdio" )) +/* exception for dwmac-dwc-qos-eth glue logic */ +if (of_device_is_compatible (np,"snps,dwc-qos-ethernet-4.10" )) { + plat->mdio_node =of_get_child_by_name (np,"mdio" ); + }else { +/** +* If snps,dwmac-mdio is passed from DT, always register +* the MDIO +*/ +for_each_child_of_node (np, plat->mdio_node) { +if (of_device_is_compatible (plat->mdio_node, +"snps,dwmac-mdio" ))break ; + } }if (plat->mdio_node) {
Signature · 1 line
2.9.3
David Miller
maintainerFrom: Joao Pinto <[email protected]>
Date: Mon, 9 Jan 2017 12:35:07 +0000
Quoted 10 lines
This patch set contains the porting of the
synopsys/dwc_eth_qos.cdriver to the stmmac structure. This operation resulted in the creation of a new platform glue driver called dwmac-dwc-qos-eth which was based in thedwc_eth_qosas is.dwmac-dwc-qos-eth inherited
dwc_eth_qosDT bindings, to assure that current and old users can continue to use it as before. We can see this driver as being deprecated, since all new development will be done in stmmac.Please check each patch for implementation details.
Series applied, thanks Joao.