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Andes(nds32) Linux Kernel Port

PATCH Superseded Greentime Hu 9 participants 62 messages Dec 8, 2017 – Dec 19, 2017

Subsystems (9)

v3 of 7 Superseded Latest is v7 →

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v3 cover Andes(nds32) Linux Kernel Port

This is the 3rd version patchset to add the Linux kernel port for Andes(nds32) processors. Almost all of the feedbacks from v2 patchseries has been addressed. Thanks to everyone who provided feedback on the previous version.

This patchset adds core architecture support to Linux for Andestech's N13, N15, D15, N10, D10 processor cores.

Based on the 16/32-bit AndeStar RISC-like architecture, we designed the configurable AndesCore series of embedded processor families. AndesCores range from highly performance-efficient small-footprint cores for microcontrollers and deeply-embedded applications to 1GHz+ cores running Linux, covering general-purpose N-series cores for a wide range of computing need, DSP-capable D-series cores for digital signal control, instruction-extensible E-series cores for application-specific acceleration, and secure S-series cores for best protection of the most valuable.

The patches are based on v4.14-rc8, and can also be found in the following git tree:
https://github.com/andestech/linux.git nds32-4.14-rc8-v3

The build script and toolchain repositories are able to be found here:
https://github.com/andestech/build_script.git

Freely available instruction set and architecture overview documents can be found on the following page:
http://www.andestech.com/product.php?cls=9

Vincent Ren-Wei Chen and I will maintain this port. Thanks to everyone who helped us and contributed to it. :) Any feedback is welcome.

Changes in v3:
- Use arch's io.h instead of generic one
- Add andestech-boards binding document
- Update nds32/cpus.txt binding document
- Remove atcpit100 timer drivers
- Select NO_BOOTMEM and delete HAVE_MEMBLOCK_NODE_MAP
- make CPU_BIG_ENDIAN and CPU_LITTLE_ENDIAN are dependent
- Add cpu type to select HWZOL/CPU_CACHE_ALIASING
- Change CPU_CACHE_NONALIASING to CPU_CACHE_ALIASING
- Remove bootarg from device tree script
- Update ag101p.dts and ae3xx.dts for correct board name.
- Clear and simplify defconfig
- Implement L2C_R_REG/ L2C_W_REG with readl/writel instead of __raw_readl/__raw_writel for endian save
- Remove early_init_dt_add_memory_arch/early_init_dt_alloc_memory_arch to use the generic ones
- Refine devicetree.c
- Fix bug https://lkml.kernel.org/r/[email protected]
- Refine irqchip/irq-ativic32.c implementations
- Add COMPILE_TEST in drivers/net/ethernet/faraday/Kconfig
- Refine cache operations
- Add CONFIG_HW_SUPPORT_UNALIGNMENT_ACCESS
- Fix ZERO_PAGE define
- Remove SA_RESTORER
- Remove uapi/asm/signal.h
- Redefine user_pt_regs
- Remove spinlock.h
- Remove __ARCH_WANT_RENAMEAT and __ARCH_WANT_SYSCALL_OFF_T from unistd.h
- Remove set_fs(USER_DS) because flush_old_exec() will do this setting
- Replace in_atomic() with faulthandler_disabled()
- Add barrier.h
- Select COMMON_CLK
- Add clk_pll in dts
- Add of_clk_init() in arch/nds32/kernel/time.c

Changes in v2:
- Set GENERIC_CALIBRATE_DELAY default n
- Add earlycon support
- Remove earlyprintk
- Add CPU_BIG_ENDIAN, CPU_LITTLE_ENDIAN support
- Refine unalignment access exception handler
- Add VMSPLIT support
- Use only one defconfig
- Change interrupt-cells from 2 to 1
- Refine andestech cpu names in bindings/nds32/cpus.txt
- Get clock frequency in dts because fpga bitmap doesn't include this feature
- Update MAINTAINERS for bindings
- Remove unused configs in Kconfig
- Refine device tree scripts
- Refine coding style
- Use generic ioremap_nocache
- Remove L2CC_PA_BASE define and its codes in head.S. It will be moved to bootloader.
- Set PHYS_OFFSET to 0x0 instead of CONFIG_MEMORY_START
- Remove unused macros
- Simplify cpu_cache_* API
- Change __asm__ __volatile__ to asm volatile
- Refine uaccess.h
- Remove unused/deprecated syscall
- Use generic posix_types.h
- Remove arch_trace_hardirqs_on/arch_trace_hardirqs_off
- Fix bug of restart syscall
- Refine syscall implementations
- Use IS_ENABLED to replace ifdef as possible
- Remove device_initcall(nds32_device_probe)
- Refine vdso implementations
- Refine copy_from_user()/copy_to_user()/clear_user()/get_user()/memmove()/memcpy()
- Refine ioremap.c
- Refine irq-ativic32.c
- Fix a bug of earlycon.c
- Export ioremap_nocache/ioremap_uc/ioremap_wc/ioremap_wt
- Add atcpit100 driver

Greentime Hu (33):
asm-generic/io.h: move
ioremap_nocache/ioremap_uc/ioremap_wc/ioremap_wt out of ifndef
CONFIG_MMU
earlycon: add reg-offset to physical address before mapping
nds32: Assembly macros and definitions
nds32: Kernel booting and initialization
nds32: Exception handling
nds32: MMU definitions
nds32: MMU initialization
nds32: MMU fault handling and page table management
nds32: Cache and TLB routines
nds32: Process management
nds32: IRQ handling
nds32: Atomic operations
nds32: Device specific operations
nds32: DMA mapping API
nds32: ELF definitions
nds32: System calls handling
nds32: VDSO support
nds32: Signal handling support
nds32: Library functions
nds32: Debugging support
nds32: L2 cache support
nds32: Loadable modules
nds32: Generic timers support
nds32: Device tree support
nds32: Miscellaneous header files
nds32: defconfig
nds32: Build infrastructure
MAINTAINERS: Add nds32
dt-bindings: nds32 CPU Bindings
dt-bindings: nds32 SoC Bindings
dt-bindings: interrupt-controller: Andestech Internal Vector
Interrupt Controller
irqchip: Andestech Internal Vector Interrupt Controller driver
net: faraday add nds32 support.

 .../interrupt-controller/andestech,ativic32.txt    |   19 +
 .../devicetree/bindings/nds32/andestech-boards     |   40 +
 Documentation/devicetree/bindings/nds32/cpus.txt   |   37 +
 MAINTAINERS                                        |   11 +
 arch/nds32/Kconfig                                 |  108 +++
 arch/nds32/Kconfig.cpu                             |  161 ++++
 arch/nds32/Makefile                                |   66 ++
 arch/nds32/boot/Makefile                           |   15 +
 arch/nds32/boot/dts/Makefile                       |    8 +
 arch/nds32/boot/dts/ae3xx.dts                      |   67 ++
 arch/nds32/boot/dts/ag101p.dts                     |   70 ++
 arch/nds32/configs/defconfig                       |  108 +++
 arch/nds32/include/asm/Kbuild                      |   53 ++
 arch/nds32/include/asm/assembler.h                 |   52 ++
 arch/nds32/include/asm/barrier.h                   |   28 +
 arch/nds32/include/asm/bitfield.h                  |  976 ++++++++++++++++++++
 arch/nds32/include/asm/cache.h                     |   25 +
 arch/nds32/include/asm/cache_info.h                |   26 +
 arch/nds32/include/asm/cacheflush.h                |   57 ++
 arch/nds32/include/asm/current.h                   |   25 +
 arch/nds32/include/asm/delay.h                     |   51 +
 arch/nds32/include/asm/dma-mapping.h               |   27 +
 arch/nds32/include/asm/elf.h                       |  192 ++++
 arch/nds32/include/asm/fixmap.h                    |   42 +
 arch/nds32/include/asm/futex.h                     |  116 +++
 arch/nds32/include/asm/highmem.h                   |   78 ++
 arch/nds32/include/asm/io.h                        |   96 ++
 arch/nds32/include/asm/irqflags.h                  |   49 +
 arch/nds32/include/asm/l2_cache.h                  |  155 ++++
 arch/nds32/include/asm/linkage.h                   |   24 +
 arch/nds32/include/asm/memory.h                    |  118 +++
 arch/nds32/include/asm/mmu.h                       |   25 +
 arch/nds32/include/asm/mmu_context.h               |   81 ++
 arch/nds32/include/asm/module.h                    |   24 +
 arch/nds32/include/asm/nds32.h                     |   96 ++
 arch/nds32/include/asm/page.h                      |   78 ++
 arch/nds32/include/asm/pgalloc.h                   |  109 +++
 arch/nds32/include/asm/pgtable.h                   |  426 +++++++++
 arch/nds32/include/asm/proc-fns.h                  |   57 ++
 arch/nds32/include/asm/processor.h                 |  115 +++
 arch/nds32/include/asm/ptrace.h                    |   79 ++
 arch/nds32/include/asm/shmparam.h                  |   32 +
 arch/nds32/include/asm/string.h                    |   30 +
 arch/nds32/include/asm/swab.h                      |   48 +
 arch/nds32/include/asm/syscall.h                   |  203 ++++
 arch/nds32/include/asm/syscalls.h                  |   26 +
 arch/nds32/include/asm/thread_info.h               |   91 ++
 arch/nds32/include/asm/tlb.h                       |   41 +
 arch/nds32/include/asm/tlbflush.h                  |   60 ++
 arch/nds32/include/asm/uaccess.h                   |  296 ++++++
 arch/nds32/include/asm/unistd.h                    |   19 +
 arch/nds32/include/asm/vdso.h                      |   35 +
 arch/nds32/include/asm/vdso_datapage.h             |   51 +
 arch/nds32/include/uapi/asm/Kbuild                 |   28 +
 arch/nds32/include/uapi/asm/auxvec.h               |   25 +
 arch/nds32/include/uapi/asm/byteorder.h            |   26 +
 arch/nds32/include/uapi/asm/cachectl.h             |   19 +
 arch/nds32/include/uapi/asm/param.h                |   24 +
 arch/nds32/include/uapi/asm/ptrace.h               |   38 +
 arch/nds32/include/uapi/asm/sigcontext.h           |   73 ++
 arch/nds32/include/uapi/asm/unistd.h               |   25 +
 arch/nds32/kernel/Makefile                         |   23 +
 arch/nds32/kernel/asm-offsets.c                    |   41 +
 arch/nds32/kernel/atl2c.c                          |   77 ++
 arch/nds32/kernel/cacheinfo.c                      |   62 ++
 arch/nds32/kernel/devtree.c                        |   32 +
 arch/nds32/kernel/dma.c                            |  472 ++++++++++
 arch/nds32/kernel/ex-entry.S                       |  170 ++++
 arch/nds32/kernel/ex-exit.S                        |  206 +++++
 arch/nds32/kernel/ex-scall.S                       |  119 +++
 arch/nds32/kernel/head.S                           |  202 ++++
 arch/nds32/kernel/irq.c                            |   22 +
 arch/nds32/kernel/module.c                         |  299 ++++++
 arch/nds32/kernel/nds32_ksyms.c                    |   44 +
 arch/nds32/kernel/process.c                        |  217 +++++
 arch/nds32/kernel/ptrace.c                         |  325 +++++++
 arch/nds32/kernel/setup.c                          |  396 ++++++++
 arch/nds32/kernel/signal.c                         |  350 +++++++
 arch/nds32/kernel/stacktrace.c                     |   60 ++
 arch/nds32/kernel/sys_nds32.c                      |   74 ++
 arch/nds32/kernel/syscall_table.c                  |   30 +
 arch/nds32/kernel/time.c                           |   24 +
 arch/nds32/kernel/traps.c                          |  441 +++++++++
 arch/nds32/kernel/vdso.c                           |  245 +++++
 arch/nds32/kernel/vdso/Makefile                    |   82 ++
 arch/nds32/kernel/vdso/datapage.S                  |   34 +
 arch/nds32/kernel/vdso/gen_vdso_offsets.sh         |   15 +
 arch/nds32/kernel/vdso/gettimeofday.c              |  266 ++++++
 arch/nds32/kernel/vdso/note.S                      |   29 +
 arch/nds32/kernel/vdso/sigreturn.S                 |   36 +
 arch/nds32/kernel/vdso/vdso.S                      |   33 +
 arch/nds32/kernel/vdso/vdso.lds.S                  |   87 ++
 arch/nds32/kernel/vmlinux.lds.S                    |   70 ++
 arch/nds32/lib/Makefile                            |    3 +
 arch/nds32/lib/clear_user.S                        |   55 ++
 arch/nds32/lib/copy_from_user.S                    |   58 ++
 arch/nds32/lib/copy_page.S                         |   50 +
 arch/nds32/lib/copy_template.S                     |   83 ++
 arch/nds32/lib/copy_to_user.S                      |   58 ++
 arch/nds32/lib/memcpy.S                            |   43 +
 arch/nds32/lib/memmove.S                           |   83 ++
 arch/nds32/lib/memset.S                            |   46 +
 arch/nds32/lib/memzero.S                           |   31 +
 arch/nds32/mm/Makefile                             |    7 +
 arch/nds32/mm/alignment.c                          |  622 +++++++++++++
 arch/nds32/mm/cacheflush.c                         |  331 +++++++
 arch/nds32/mm/extable.c                            |   29 +
 arch/nds32/mm/fault.c                              |  424 +++++++++
 arch/nds32/mm/highmem.c                            |   92 ++
 arch/nds32/mm/init.c                               |  290 ++++++
 arch/nds32/mm/ioremap.c                            |   75 ++
 arch/nds32/mm/mm-nds32.c                           |  103 +++
 arch/nds32/mm/mmap.c                               |   86 ++
 arch/nds32/mm/proc.c                               |  527 +++++++++++
 arch/nds32/mm/tlb.c                                |   63 ++
 drivers/irqchip/Makefile                           |    1 +
 drivers/irqchip/irq-ativic32.c                     |  120 +++
 drivers/net/ethernet/faraday/Kconfig               |    6 +-
 drivers/tty/serial/earlycon.c                      |    3 +-
 include/asm-generic/io.h                           |   18 +-
 120 files changed, 13057 insertions(+), 13 deletions(-)
 create mode 100644 Documentation/devicetree/bindings/interrupt-controller/andestech,ativic32.txt
 create mode 100644 Documentation/devicetree/bindings/nds32/andestech-boards
 create mode 100644 Documentation/devicetree/bindings/nds32/cpus.txt
 create mode 100644 arch/nds32/Kconfig
 create mode 100644 arch/nds32/Kconfig.cpu
 create mode 100644 arch/nds32/Makefile
 create mode 100644 arch/nds32/boot/Makefile
 create mode 100644 arch/nds32/boot/dts/Makefile
 create mode 100644 arch/nds32/boot/dts/ae3xx.dts
 create mode 100644 arch/nds32/boot/dts/ag101p.dts
 create mode 100644 arch/nds32/configs/defconfig
 create mode 100644 arch/nds32/include/asm/Kbuild
 create mode 100644 arch/nds32/include/asm/assembler.h
 create mode 100644 arch/nds32/include/asm/barrier.h
 create mode 100644 arch/nds32/include/asm/bitfield.h
 create mode 100644 arch/nds32/include/asm/cache.h
 create mode 100644 arch/nds32/include/asm/cache_info.h
 create mode 100644 arch/nds32/include/asm/cacheflush.h
 create mode 100644 arch/nds32/include/asm/current.h
 create mode 100644 arch/nds32/include/asm/delay.h
 create mode 100644 arch/nds32/include/asm/dma-mapping.h
 create mode 100644 arch/nds32/include/asm/elf.h
 create mode 100644 arch/nds32/include/asm/fixmap.h
 create mode 100644 arch/nds32/include/asm/futex.h
 create mode 100644 arch/nds32/include/asm/highmem.h
 create mode 100644 arch/nds32/include/asm/io.h
 create mode 100644 arch/nds32/include/asm/irqflags.h
 create mode 100644 arch/nds32/include/asm/l2_cache.h
 create mode 100644 arch/nds32/include/asm/linkage.h
 create mode 100644 arch/nds32/include/asm/memory.h
 create mode 100644 arch/nds32/include/asm/mmu.h
 create mode 100644 arch/nds32/include/asm/mmu_context.h
 create mode 100644 arch/nds32/include/asm/module.h
 create mode 100644 arch/nds32/include/asm/nds32.h
 create mode 100644 arch/nds32/include/asm/page.h
 create mode 100644 arch/nds32/include/asm/pgalloc.h
 create mode 100644 arch/nds32/include/asm/pgtable.h
 create mode 100644 arch/nds32/include/asm/proc-fns.h
 create mode 100644 arch/nds32/include/asm/processor.h
 create mode 100644 arch/nds32/include/asm/ptrace.h
 create mode 100644 arch/nds32/include/asm/shmparam.h
 create mode 100644 arch/nds32/include/asm/string.h
 create mode 100644 arch/nds32/include/asm/swab.h
 create mode 100644 arch/nds32/include/asm/syscall.h
 create mode 100644 arch/nds32/include/asm/syscalls.h
 create mode 100644 arch/nds32/include/asm/thread_info.h
 create mode 100644 arch/nds32/include/asm/tlb.h
 create mode 100644 arch/nds32/include/asm/tlbflush.h
 create mode 100644 arch/nds32/include/asm/uaccess.h
 create mode 100644 arch/nds32/include/asm/unistd.h
 create mode 100644 arch/nds32/include/asm/vdso.h
 create mode 100644 arch/nds32/include/asm/vdso_datapage.h
 create mode 100644 arch/nds32/include/uapi/asm/Kbuild
 create mode 100644 arch/nds32/include/uapi/asm/auxvec.h
 create mode 100644 arch/nds32/include/uapi/asm/byteorder.h
 create mode 100644 arch/nds32/include/uapi/asm/cachectl.h
 create mode 100644 arch/nds32/include/uapi/asm/param.h
 create mode 100644 arch/nds32/include/uapi/asm/ptrace.h
 create mode 100644 arch/nds32/include/uapi/asm/sigcontext.h
 create mode 100644 arch/nds32/include/uapi/asm/unistd.h
 create mode 100644 arch/nds32/kernel/Makefile
 create mode 100644 arch/nds32/kernel/asm-offsets.c
 create mode 100644 arch/nds32/kernel/atl2c.c
 create mode 100644 arch/nds32/kernel/cacheinfo.c
 create mode 100644 arch/nds32/kernel/devtree.c
 create mode 100644 arch/nds32/kernel/dma.c
 create mode 100644 arch/nds32/kernel/ex-entry.S
 create mode 100644 arch/nds32/kernel/ex-exit.S
 create mode 100644 arch/nds32/kernel/ex-scall.S
 create mode 100644 arch/nds32/kernel/head.S
 create mode 100644 arch/nds32/kernel/irq.c
 create mode 100644 arch/nds32/kernel/module.c
 create mode 100644 arch/nds32/kernel/nds32_ksyms.c
 create mode 100644 arch/nds32/kernel/process.c
 create mode 100644 arch/nds32/kernel/ptrace.c
 create mode 100644 arch/nds32/kernel/setup.c
 create mode 100644 arch/nds32/kernel/signal.c
 create mode 100644 arch/nds32/kernel/stacktrace.c
 create mode 100644 arch/nds32/kernel/sys_nds32.c
 create mode 100644 arch/nds32/kernel/syscall_table.c
 create mode 100644 arch/nds32/kernel/time.c
 create mode 100644 arch/nds32/kernel/traps.c
 create mode 100644 arch/nds32/kernel/vdso.c
 create mode 100644 arch/nds32/kernel/vdso/Makefile
 create mode 100644 arch/nds32/kernel/vdso/datapage.S
 create mode 100755 arch/nds32/kernel/vdso/gen_vdso_offsets.sh
 create mode 100644 arch/nds32/kernel/vdso/gettimeofday.c
 create mode 100644 arch/nds32/kernel/vdso/note.S
 create mode 100644 arch/nds32/kernel/vdso/sigreturn.S
 create mode 100644 arch/nds32/kernel/vdso/vdso.S
 create mode 100644 arch/nds32/kernel/vdso/vdso.lds.S
 create mode 100644 arch/nds32/kernel/vmlinux.lds.S
 create mode 100644 arch/nds32/lib/Makefile
 create mode 100644 arch/nds32/lib/clear_user.S
 create mode 100644 arch/nds32/lib/copy_from_user.S
 create mode 100644 arch/nds32/lib/copy_page.S
 create mode 100644 arch/nds32/lib/copy_template.S
 create mode 100644 arch/nds32/lib/copy_to_user.S
 create mode 100644 arch/nds32/lib/memcpy.S
 create mode 100644 arch/nds32/lib/memmove.S
 create mode 100644 arch/nds32/lib/memset.S
 create mode 100644 arch/nds32/lib/memzero.S
 create mode 100644 arch/nds32/mm/Makefile
 create mode 100644 arch/nds32/mm/alignment.c
 create mode 100644 arch/nds32/mm/cacheflush.c
 create mode 100644 arch/nds32/mm/extable.c
 create mode 100644 arch/nds32/mm/fault.c
 create mode 100644 arch/nds32/mm/highmem.c
 create mode 100644 arch/nds32/mm/init.c
 create mode 100644 arch/nds32/mm/ioremap.c
 create mode 100644 arch/nds32/mm/mm-nds32.c
 create mode 100644 arch/nds32/mm/mmap.c
 create mode 100644 arch/nds32/mm/proc.c
 create mode 100644 arch/nds32/mm/tlb.c
 create mode 100644 drivers/irqchip/irq-ativic32.c
Signature · 1 line
1.7.9.5
#1 lore raw

PATCH v3 1/33 asm-generic/io.h: move ioremap_nocache/ioremap_uc/ioremap_wc/ioremap_wt out of ifndef CONFIG_MMU

From: Greentime Hu <[email protected]>

It allows some architectures to use this generic macro instead of defining theirs.

---
 include/asm-generic/io.h |   18 +++++++++---------
 1 file changed, 9 insertions(+), 9 deletions(-)
include/asm-generic/io.h +9 -9
index b4531e3..7c6a39e 100644
@@ -852,7 +852,16 @@ static inline void __iomem *__ioremap(phys_addr_t offset, size_t size,
 }
 #endif
 
+#ifndef iounmap
+#define iounmap iounmap
+
+static inline void iounmap(void __iomem *addr)
+{
+}
+#endif
+#endif /* CONFIG_MMU */
 #ifndef ioremap_nocache
+void __iomem *ioremap(phys_addr_t phys_addr, size_t size);
 #define ioremap_nocache ioremap_nocache
 static inline void __iomem *ioremap_nocache(phys_addr_t offset, size_t size)
 {
@@ -884,15 +893,6 @@ static inline void __iomem *ioremap_wt(phys_addr_t offset, size_t size)
 }
 #endif
 
-#ifndef iounmap
-#define iounmap iounmap
-
-static inline void iounmap(void __iomem *addr)
-{
-}
-#endif
-#endif /* CONFIG_MMU */
-
 #ifdef CONFIG_HAS_IOPORT_MAP
 #ifndef CONFIG_GENERIC_IOMAP
 #ifndef ioport_map
Signature · 1 line
1.7.9.5
#2 lore raw

PATCH v3 2/33 earlycon: add reg-offset to physical address before mapping

In reply to Greentime Hu

From: Greentime Hu <[email protected]>

It will get the wrong virtual address because port->mapbase is not added the correct reg-offset yet. We have to update it before earlycon_map() is called

---
 drivers/tty/serial/earlycon.c |    3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)
drivers/tty/serial/earlycon.c +2 -1
index 98928f0..17dba0a 100644
@@ -253,11 +253,12 @@ int __init of_setup_earlycon(const struct earlycon_id *match,
 	}
 	port->mapbase = addr;
 	port->uartclk = BASE_BAUD * 16;
-	port->membase = earlycon_map(port->mapbase, SZ_4K);
 
 	val = of_get_flat_dt_prop(node, "reg-offset", NULL);
 	if (val)
 		port->mapbase += be32_to_cpu(*val);
+	port->membase = earlycon_map(port->mapbase, SZ_4K);
+
 	val = of_get_flat_dt_prop(node, "reg-shift", NULL);
 	if (val)
 		port->regshift = be32_to_cpu(*val);
Signature · 1 line
1.7.9.5
#3 lore raw

PATCH v3 3/33 nds32: Assembly macros and definitions

In reply to Greentime Hu

From: Greentime Hu <greentime-MUIXKm3Oiri1Z/[email protected]>

This patch includes assembly macros, bit field definitions used in .S files across arch/nds32/.

---
 arch/nds32/include/asm/assembler.h |   52 ++
 arch/nds32/include/asm/bitfield.h  |  976 ++++++++++++++++++++++++++++++++++++
 arch/nds32/include/asm/nds32.h     |   96 ++++
 arch/nds32/kernel/asm-offsets.c    |   41 ++
 4 files changed, 1165 insertions(+)
 create mode 100644 arch/nds32/include/asm/assembler.h
 create mode 100644 arch/nds32/include/asm/bitfield.h
 create mode 100644 arch/nds32/include/asm/nds32.h
 create mode 100644 arch/nds32/kernel/asm-offsets.c
arch/nds32/include/asm/assembler.h new file +52 -0
new file mode 100644
index 0000000..d469af0
@@ -0,0 +1,52 @@
+/*
+ * Copyright (C) 2005-2017 Andes Technology Corporation
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program.  If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#ifndef __NDS32_ASSEMBLER_H__
+#define __NDS32_ASSEMBLER_H__
+
+.macro gie_disable
+	setgie.d
+	dsb
+.endm
+
+.macro gie_enable
+	setgie.e
+	dsb
+.endm
+
+.macro gie_save oldpsw
+	mfsr \oldpsw, $ir0
+	setgie.d
+        dsb
+.endm
+
+.macro gie_restore oldpsw
+	andi \oldpsw, \oldpsw, #0x1
+	beqz \oldpsw, 7001f
+	setgie.e
+	dsb
+7001:
+.endm
+
+
+#define USER(insn,  reg, addr, opr)	\
+9999:	insn  reg, addr, opr;		\
+	.section __ex_table,"a";	\
+	.align 3;			\
+	.long	9999b, 9001f;		\
+	.previous
+
+#endif /* __NDS32_ASSEMBLER_H__ */
arch/nds32/include/asm/bitfield.h new file +976 -0

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arch/nds32/include/asm/nds32.h new file +96 -0

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arch/nds32/kernel/asm-offsets.c new file +41 -0

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Signature · 6 lines
1.7.9.5

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#4 lore raw

PATCH v3 4/33 nds32: Kernel booting and initialization

In reply to Greentime Hu

From: Greentime Hu <[email protected]>

This patch includes the kernel startup code. It can get dtb pointer passed from bootloader. It will create a temp mapping by tlb instructions at beginning and goto start_kernel.

---
 arch/nds32/kernel/head.S  |  202 +++++++++++++++++++++++
 arch/nds32/kernel/setup.c |  396 +++++++++++++++++++++++++++++++++++++++++++++
 2 files changed, 598 insertions(+)
 create mode 100644 arch/nds32/kernel/head.S
 create mode 100644 arch/nds32/kernel/setup.c
arch/nds32/kernel/head.S new file +202 -0
new file mode 100644
index 0000000..fcd7922
@@ -0,0 +1,202 @@
+/*
+ * Copyright (C) 2005-2017 Andes Technology Corporation
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program.  If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#include <linux/linkage.h>
+#include <linux/init.h>
+#include <asm/ptrace.h>
+#include <asm/asm-offsets.h>
+#include <asm/page.h>
+#include <asm/pgtable.h>
+#include <asm/l2_cache.h>
+#include <asm/sizes.h>
+#include <asm/thread_info.h>
+
+#ifdef CONFIG_CPU_BIG_ENDIAN
+#define OF_DT_MAGIC 0xd00dfeed
+#else
+#define OF_DT_MAGIC 0xedfe0dd0
+#endif
+
+	.globl  swapper_pg_dir
+	.equ    swapper_pg_dir, TEXTADDR - 0x4000
+
+/*
+ * Kernel startup entry point.
+ */
+	.section ".head.text", "ax"
+	.type   _stext, %function
+ENTRY(_stext)
+	setgie.d                            ! Disable interrupt
+	isb
+/*
+ * Disable I/D-cache and enable it at a proper time
+ */
+	mfsr    $r0, $mr8
+	li      $r1, #~(CACHE_CTL_mskIC_EN|CACHE_CTL_mskDC_EN)
+	and     $r0, $r0, $r1
+	mtsr    $r0, $mr8
+
+/*
+ * Process device tree blob
+ */
+	andi 	$r0,$r2,#0x3
+	li	$r10, 0
+	bne     $r0, $r10, _nodtb
+	lwi	$r0, [$r2]
+	li	$r1, OF_DT_MAGIC
+	bne     $r0, $r1, _nodtb
+	move	$r10, $r2
+_nodtb:
+
+/*
+ * Create a temporary mapping area for booting, before start_kernel
+ */
+	sethi   $r4, hi20(swapper_pg_dir)
+	li      $p0, (PAGE_OFFSET - PHYS_OFFSET)
+	sub     $r4, $r4, $p0
+	tlbop   FlushAll            ! invalidate TLB\n"
+	isb
+	mtsr    $r4, $L1_PPTB       ! load page table pointer\n"
+
+/* set NTC0 cacheable/writeback, mutliple page size in use */
+	mfsr    $r3, $MMU_CTL
+	li      $r0, #~MMU_CTL_mskNTC0
+	and     $r3, $r3, $r0
+#ifdef CONFIG_ANDES_PAGE_SIZE_4KB
+	ori     $r3, $r3, #(MMU_CTL_mskMPZIU|(MMU_CTL_CACHEABLE_WB << MMU_CTL_offNTC0))
+#else
+	ori     $r3, $r3, #(MMU_CTL_mskMPZIU|(MMU_CTL_CACHEABLE_WB << MMU_CTL_offNTC0)|MMU_CTL_D8KB)
+#endif
+#ifdef CONFIG_HW_SUPPORT_UNALIGNMENT_ACCESS
+	li      $r0, #MMU_CTL_UNA
+	or      $r3, $r3, $r0
+#endif
+	mtsr    $r3, $MMU_CTL
+	isb
+
+/* set page size and size of kernel image */
+        mfsr    $r0, $MMU_CFG
+        srli    $r3, $r0, MMU_CFG_offfEPSZ
+        zeb     $r3, $r3
+        bnez    $r3, _extra_page_size_support
+#ifdef CONFIG_ANDES_PAGE_SIZE_4KB
+        li      $r5, #SZ_4K                 ! Use 4KB page size
+#else
+        li      $r5, #SZ_8K                 ! Use 8KB page size
+        li      $r3, #1
+#endif
+        mtsr    $r3, $TLB_MISC
+        b       _image_size_check
+
+_extra_page_size_support:                    ! Use epzs pages size
+        clz     $r6, $r3
+        subri   $r2, $r6, #31
+        li      $r3, #1
+        sll     $r3, $r3, $r2
+        /* MMU_CFG.EPSZ value -> meaning */
+        mul     $r5, $r3, $r3
+        slli    $r5, $r5, #14
+        /* MMU_CFG.EPSZ  -> TLB_MISC.ACC_PSZ */
+        addi    $r3, $r2, #0x2
+        mtsr    $r3, $TLB_MISC
+
+_image_size_check:
+        /* calculate the image maximum size accepted by TLB config */
+        andi    $r6, $r0, MMU_CFG_mskTBW
+        andi    $r0, $r0, MMU_CFG_mskTBS
+        srli    $r6, $r6, MMU_CFG_offTBW
+        srli    $r0, $r0, MMU_CFG_offTBS
+        /*
+         * we just map the kernel to the maximum way - 1 of tlb
+         * reserver one way for UART VA mapping
+         * it will cause page fault if UART mapping cover the kernel mapping
+         *
+         * direct mapping is not supported now.
+         */
+        li      $r2, 't'
+        beqz    $r6, __error                 ! MMU_CFG.TBW = 0 is direct mappin
+        addi    $r0, $r0, #0x2               ! MMU_CFG.TBS value -> meaning
+        sll     $r0, $r6, $r0                ! entries = k-way * n-set
+        mul     $r6, $r0, $r5                ! max size = entries * page size
+        /* check kernel image size */
+        la      $r3, (_end - PAGE_OFFSET)
+        li      $r2, 's'
+        bgt     $r3, $r6, __error
+
+	li      $r2, #(PHYS_OFFSET + TLB_DATA_kernel_text_attr)
+        li      $r3, PAGE_OFFSET
+        add     $r6, $r6, $r3
+
+_tlb:
+	mtsr    $r3, $TLB_VPN
+	dsb
+	tlbop   $r2, RWR
+	isb
+	add     $r3, $r3, $r5
+	add     $r2, $r2, $r5
+	bgt     $r6, $r3, _tlb
+	mfsr    $r3, $TLB_MISC      ! setup access page size
+	li      $r2, #~0xf
+	and     $r3, $r3, $r2
+#ifdef CONFIG_ANDES_PAGE_SIZE_8KB
+	ori    $r3, $r3, #0x1
+#endif
+	mtsr    $r3, $TLB_MISC
+
+	mfsr    $r0, $MISC_CTL      ! Enable BTB and RTP and shadow sp
+	ori     $r0, $r0, #MISC_init
+	mtsr    $r0, $MISC_CTL
+
+	mfsr    $p1, $PSW
+	li      $r15, #~PSW_clr             ! clear WBNA|DME|IME|DT|IT|POM|INTL|GIE
+	and     $p1, $p1, $r15
+	ori     $p1, $p1, #PSW_init
+	mtsr    $p1, $IPSW                  ! when iret, it will automatically enable MMU
+	la      $lp, __mmap_switched
+	mtsr    $lp, $IPC
+	iret
+	nop
+
+	.type   __switch_data, %object
+__switch_data:
+	.long   __bss_start                 ! $r6
+	.long   _end                        ! $r7
+	.long	__atags_pointer 	    ! $atag_pointer
+	.long   init_task                   ! $r9, move to $r25
+	.long   init_thread_union + THREAD_SIZE    ! $sp
+
+
+/*
+ * The following fragment of code is executed with the MMU on in MMU mode,
+ * and uses absolute addresses; this is not position independent.
+ */
+	.align
+	.type   __mmap_switched, %function
+__mmap_switched:
+	la  $r3, __switch_data
+	lmw.bim $r6, [$r3], $r9, #0b0001
+	move	$r25, $r9
+	move    $fp, #0             ! Clear  BSS (and zero $fp)
+	beq $r7, $r6, _RRT
+1:	swi.bi  $fp, [$r6], #4
+	bne $r7, $r6, 1b
+	swi	$r10, [$r8]
+
+_RRT:
+	b   start_kernel
+
+__error:
+	b   __error
arch/nds32/kernel/setup.c new file +396 -0

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Signature · 1 line
1.7.9.5
#5 lore raw

Re: [PATCH v3 04/33] nds32: Kernel booting and initialization

Dear Greentime,

Quoted 8 lines · Greentime Hu

From: Greentime Hu <[email protected]>

This patch includes the kernel startup code. It can get dtb pointer passed from bootloader. It will create a temp mapping by tlb instructions at beginning and goto start_kernel.

[]

Quoted 8 lines
arch/nds32/kernel/head.S new file +5 -0
@@ -0,0 +1,202 @@
+/*
+ * Copyright (C) 2005-2017 Andes Technology Corporation
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as

arch/nds32/kernel/head.S line 15

Quoted 10 lines
arch/nds32/kernel/head.S new file +10 -0
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program.  If not, see <http://www.gnu.org/licenses/>.
+ */

Have you considered using the new SPDX ids instead of this fine legalese? e.g.:

// SPDX-License-Identifier: GPL-2.0
// Copyright (C) 2005-2017 Andes Technology Corporation

This is much shorter and neater (unless you are a legalese lover of course!)

Check also Thomas doc patches and Linus comments on why he prefers the C++ comment style for these.

Signature · 2 lines
Cordially
Philippe Ombredanne, your friendly licensing scruffy bot
#6 lore raw

Re: [PATCH v3 04/33] nds32: Kernel booting and initialization

Hi, Philippe:

2017-12-08 21:19 GMT+08:00 Philippe Ombredanne <[email protected]>:

Quoted 35 lines

Dear Greentime,

Quoted 8 lines · Greentime Hu

From: Greentime Hu <[email protected]>

This patch includes the kernel startup code. It can get dtb pointer passed from bootloader. It will create a temp mapping by tlb instructions at beginning and goto start_kernel.

[]

Quoted 8 lines
arch/nds32/kernel/head.S new file +5 -0
@@ -0,0 +1,202 @@
+/*
+ * Copyright (C) 2005-2017 Andes Technology Corporation
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as

arch/nds32/kernel/head.S line 15

Quoted 10 lines
arch/nds32/kernel/head.S new file +10 -0
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program.  If not, see <http://www.gnu.org/licenses/>.
+ */

Have you considered using the new SPDX ids instead of this fine legalese? e.g.:

Quoted 7 lines

// SPDX-License-Identifier: GPL-2.0
// Copyright (C) 2005-2017 Andes Technology Corporation

This is much shorter and neater (unless you are a legalese lover of course!)

Check also Thomas doc patches and Linus comments on why he prefers the C++ comment style for these.

Thanks for your suggestions. We'd like to do this change. I will apply it in the next version patch.

#7 lore raw

PATCH v3 5/33 nds32: Exception handling

In reply to Greentime Hu

From: Greentime Hu <[email protected]>

This patch includes the exception/interrupt entries, pt_reg structure and related accessors.

---
 arch/nds32/include/asm/ptrace.h |   79 +++++
 arch/nds32/kernel/ex-entry.S    |  170 +++++++++++
 arch/nds32/kernel/ex-exit.S     |  206 +++++++++++++
 arch/nds32/kernel/stacktrace.c  |   60 ++++
 arch/nds32/kernel/traps.c       |  441 +++++++++++++++++++++++++++
 arch/nds32/mm/alignment.c       |  622 +++++++++++++++++++++++++++++++++++++++
 6 files changed, 1578 insertions(+)
 create mode 100644 arch/nds32/include/asm/ptrace.h
 create mode 100644 arch/nds32/kernel/ex-entry.S
 create mode 100644 arch/nds32/kernel/ex-exit.S
 create mode 100644 arch/nds32/kernel/stacktrace.c
 create mode 100644 arch/nds32/kernel/traps.c
 create mode 100644 arch/nds32/mm/alignment.c
arch/nds32/include/asm/ptrace.h new file +79 -0
new file mode 100644
index 0000000..2c9c03d
@@ -0,0 +1,79 @@
+/*
+ * Copyright (C) 2005-2017 Andes Technology Corporation
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program.  If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#ifndef __ASM_NDS32_PTRACE_H
+#define __ASM_NDS32_PTRACE_H
+
+#define PTRACE_GETREGS		12
+#define PTRACE_SETREGS		13
+#define PTRACE_GETFPREGS	14
+#define PTRACE_SETFPREGS	15
+
+#include <uapi/asm/ptrace.h>
+
+#ifndef __ASSEMBLY__
+
+struct pt_regs {
+	union {
+		struct user_pt_regs user_regs;
+		struct {
+			long uregs[26];
+			long fp;
+			long gp;
+			long lp;
+			long sp;
+			long ipc;
+#if defined(CONFIG_HWZOL)
+			long lb;
+			long le;
+			long lc;
+#else
+			long dummy[3];
+#endif
+			long syscallno;
+		};
+	};
+	long orig_r0;
+	long ir0;
+	long ipsw;
+	long pipsw;
+	long pipc;
+	long pp0;
+	long pp1;
+	long fucop_ctl;
+	long osp;
+};
+
+#include <asm/bitfield.h>
+extern void show_regs(struct pt_regs *);
+/* Avoid circular header include via sched.h */
+struct task_struct;
+extern void send_sigtrap(struct task_struct *tsk, struct pt_regs *regs,
+			 int error_code, int si_code);
+
+#define arch_has_single_step()		(1)
+#define user_mode(regs)			(((regs)->ipsw & PSW_mskPOM) == 0)
+#define interrupts_enabled(regs)	(!!((regs)->ipsw & PSW_mskGIE))
+#define valid_user_regs(regs)		(user_mode(regs) && interrupts_enabled(regs))
+#define regs_return_value(regs)		((regs)->uregs[0])
+#define instruction_pointer(regs)	((regs)->ipc)
+#define user_stack_pointer(regs)        ((regs)->sp)
+#define profile_pc(regs) 		instruction_pointer(regs)
+
+#define ARCH_HAS_USER_SINGLE_STEP_INFO
+
+#endif /* __ASSEMBLY__ */
+#endif
arch/nds32/kernel/ex-entry.S new file +170 -0

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arch/nds32/kernel/ex-exit.S new file +206 -0

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arch/nds32/kernel/stacktrace.c new file +60 -0

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arch/nds32/kernel/traps.c new file +441 -0

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arch/nds32/mm/alignment.c new file +622 -0

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Signature · 1 line
1.7.9.5
#8 lore raw

Re: [PATCH v3 05/33] nds32: Exception handling

Quoted 21 lines · Greentime Hu
arch/nds32/kernel/traps.c new file +15 -0
new file mode 100644
index 0000000..30a275d
@@ -0,0 +1,441 @@
+/*
+ * Copyright (C) 2005-2017 Andes Technology Corporation
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program.  If not, see <http://www.gnu.org/licenses/>.
+ */

arch/nds32/kernel/traps.c line 25

Quoted 10 lines
arch/nds32/kernel/traps.c new file +10 -0
+
+#include <linux/module.h>
+#include <linux/personality.h>
+#include <linux/kallsyms.h>
+#include <linux/hardirq.h>
+#include <linux/kdebug.h>
+#include <linux/sched/task_stack.h>
+
+#include <asm/proc-fns.h>
+#include <asm/uaccess.h>

The only include of asm/uaccess.h should be in linux/uaccess.h; everything else should include linux/uaccess.h. The same goes for other patches in the series.

#9 lore raw

PATCH v3 6/33 nds32: MMU definitions

In reply to Greentime Hu

From: Greentime Hu <[email protected]>

This patch includes virtual memory layout, PHYS_OFFSET is defined as 0x0. It also includes the 4KB/8KB page size configurations and pte operations.

---
 arch/nds32/include/asm/fixmap.h   |   42 ++++
 arch/nds32/include/asm/highmem.h  |   78 +++++++
 arch/nds32/include/asm/memory.h   |  118 ++++++++++
 arch/nds32/include/asm/mmu.h      |   25 +++
 arch/nds32/include/asm/page.h     |   78 +++++++
 arch/nds32/include/asm/pgalloc.h  |  109 ++++++++++
 arch/nds32/include/asm/pgtable.h  |  426 +++++++++++++++++++++++++++++++++++++
 arch/nds32/include/asm/shmparam.h |   32 +++
 8 files changed, 908 insertions(+)
 create mode 100644 arch/nds32/include/asm/fixmap.h
 create mode 100644 arch/nds32/include/asm/highmem.h
 create mode 100644 arch/nds32/include/asm/memory.h
 create mode 100644 arch/nds32/include/asm/mmu.h
 create mode 100644 arch/nds32/include/asm/page.h
 create mode 100644 arch/nds32/include/asm/pgalloc.h
 create mode 100644 arch/nds32/include/asm/pgtable.h
 create mode 100644 arch/nds32/include/asm/shmparam.h
arch/nds32/include/asm/fixmap.h new file +42 -0
new file mode 100644
index 0000000..daeddab
@@ -0,0 +1,42 @@
+/*
+ * Copyright (C) 2005-2017 Andes Technology Corporation
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program.  If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#ifndef __ASM_NDS32_FIXMAP_H
+#define __ASM_NDS32_FIXMAP_H
+
+#ifdef CONFIG_HIGHMEM
+#include <linux/threads.h>
+#include <asm/kmap_types.h>
+#endif
+
+enum fixed_addresses {
+	FIX_HOLE,
+	FIX_KMAP_RESERVED,
+	FIX_KMAP_BEGIN,
+#ifdef CONFIG_HIGHMEM
+	FIX_KMAP_END = FIX_KMAP_BEGIN + (KM_TYPE_NR * NR_CPUS),
+#endif
+	FIX_EARLYCON_MEM_BASE,
+	__end_of_fixed_addresses
+};
+#define FIXADDR_TOP             ((unsigned long) (-(16 * PAGE_SIZE)))
+#define FIXADDR_SIZE		((__end_of_fixed_addresses) << PAGE_SHIFT)
+#define FIXADDR_START		(FIXADDR_TOP - FIXADDR_SIZE)
+#define FIXMAP_PAGE_IO		__pgprot(PAGE_DEVICE)
+void __set_fixmap(enum fixed_addresses idx, phys_addr_t phys, pgprot_t prot);
+
+#include <asm-generic/fixmap.h>
+#endif /* __ASM_NDS32_FIXMAP_H */
arch/nds32/include/asm/highmem.h new file +78 -0

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arch/nds32/include/asm/memory.h new file +118 -0

118 lines not on this page · raw message

arch/nds32/include/asm/mmu.h new file +25 -0
new file mode 100644
index 0000000..147fd06
@@ -0,0 +1,25 @@
+/*
+ * Copyright (C) 2005-2017 Andes Technology Corporation
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program.  If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#ifndef __NDS32_MMU_H
+#define __NDS32_MMU_H
+
+typedef struct {
+	unsigned int id;
+	void *vdso;
+} mm_context_t;
+
+#endif
arch/nds32/include/asm/page.h new file +78 -0

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arch/nds32/include/asm/pgalloc.h new file +109 -0

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arch/nds32/include/asm/pgtable.h new file +426 -0

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arch/nds32/include/asm/shmparam.h new file +32 -0
new file mode 100644
index 0000000..f05c539
@@ -0,0 +1,32 @@
+/*
+ * Copyright (C) 2005-2017 Andes Technology Corporation
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program.  If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#ifndef _ASMNDS32_SHMPARAM_H
+#define _ASMNDS32_SHMPARAM_H
+
+/*
+ * This should be the size of the virtually indexed cache/ways,
+ * whichever is greater since the cache aliases every size/ways
+ * bytes.
+ */
+#define	SHMLBA	(4 * SZ_8K)	/* attach addr a multiple of this */
+
+/*
+ * Enforce SHMLBA in shmat
+ */
+#define __ARCH_FORCE_SHMLBA
+
+#endif /* _ASMNDS32_SHMPARAM_H */
Signature · 1 line
1.7.9.5
#10 lore raw

PATCH v3 7/33 nds32: MMU initialization

In reply to Greentime Hu

From: Greentime Hu <greentime-MUIXKm3Oiri1Z/[email protected]>

This patch includes memory initializations and highmem supporting.

---
 arch/nds32/mm/highmem.c  |   92 +++++++++++++++
 arch/nds32/mm/init.c     |  290 ++++++++++++++++++++++++++++++++++++++++++++++
 arch/nds32/mm/mm-nds32.c |  103 ++++++++++++++++
 3 files changed, 485 insertions(+)
 create mode 100644 arch/nds32/mm/highmem.c
 create mode 100644 arch/nds32/mm/init.c
 create mode 100644 arch/nds32/mm/mm-nds32.c
arch/nds32/mm/highmem.c new file +92 -0
new file mode 100644
index 0000000..d5101bd
@@ -0,0 +1,92 @@
+/*
+ * Copyright (C) 2005-2017 Andes Technology Corporation
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program.  If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#include <linux/export.h>
+#include <linux/highmem.h>
+#include <linux/sched.h>
+#include <linux/smp.h>
+#include <linux/interrupt.h>
+#include <linux/bootmem.h>
+#include <asm/fixmap.h>
+#include <asm/tlbflush.h>
+
+void *kmap(struct page *page)
+{
+	unsigned long vaddr;
+	might_sleep();
+	if (!PageHighMem(page))
+		return page_address(page);
+	vaddr = (unsigned long)kmap_high(page);
+	return (void *)vaddr;
+}
+
+EXPORT_SYMBOL(kmap);
+
+void kunmap(struct page *page)
+{
+	BUG_ON(in_interrupt());
+	if (!PageHighMem(page))
+		return;
+	kunmap_high(page);
+}
+
+EXPORT_SYMBOL(kunmap);
+
+void *kmap_atomic(struct page *page)
+{
+	unsigned int idx;
+	unsigned long vaddr, pte;
+	int type;
+	pte_t *ptep;
+
+	preempt_disable();
+	pagefault_disable();
+	if (!PageHighMem(page))
+		return page_address(page);
+
+	type = kmap_atomic_idx_push();
+
+	idx = type + KM_TYPE_NR * smp_processor_id();
+	vaddr = __fix_to_virt(FIX_KMAP_BEGIN + idx);
+	pte = (page_to_pfn(page) << PAGE_SHIFT) | (PAGE_KERNEL);
+	ptep = pte_offset_kernel(pmd_off_k(vaddr), vaddr);
+	set_pte(ptep, pte);
+
+	__nds32__tlbop_inv(vaddr);
+	__nds32__mtsr_dsb(vaddr, NDS32_SR_TLB_VPN);
+	__nds32__tlbop_rwr(pte);
+	__nds32__isb();
+	return (void *)vaddr;
+}
+
+EXPORT_SYMBOL(kmap_atomic);
+
+void __kunmap_atomic(void *kvaddr)
+{
+	if (kvaddr >= (void *)FIXADDR_START) {
+		unsigned long vaddr = (unsigned long)kvaddr;
+		pte_t *ptep;
+		kmap_atomic_idx_pop();
+		__nds32__tlbop_inv(vaddr);
+		__nds32__isb();
+		ptep = pte_offset_kernel(pmd_off_k(vaddr), vaddr);
+		set_pte(ptep, 0);
+	}
+	pagefault_enable();
+	preempt_enable();
+}
+
+EXPORT_SYMBOL(__kunmap_atomic);
arch/nds32/mm/init.c new file +290 -0

290 lines not on this page · raw message

arch/nds32/mm/mm-nds32.c new file +103 -0

103 lines not on this page · raw message

Signature · 6 lines
1.7.9.5

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#11 lore raw

Re: [PATCH v3 07/33] nds32: MMU initialization

Hi Greentime,

On Fri, Dec 08, 2017 at 05:11:50PM +0800, Greentime Hu wrote:
[...]

Quoted 2 lines
arch/nds32/mm/highmem.c +0 -0

[...]

arch/nds32/mm/highmem.c line 32

Quoted 7 lines
arch/nds32/mm/highmem.c +7 -0
+void *kmap(struct page *page)
+{
+	unsigned long vaddr;
+	might_sleep();
+	if (!PageHighMem(page))
+		return page_address(page);
+	vaddr = (unsigned long)kmap_high(page);

Here should invalid the cpu_mmu_tlb's entry, Or invalid it in the set_pte().

eg:
vaddr0 = kmap(page0)
*vaddr0 = val0 //It will cause tlb-miss, and hard-refill to MMU-tlb kunmap(page0)
vaddr1 = kmap(page1) // Mostly vaddr1 = vaddr0
val = vaddr1; //No tlb-miss and it will get page0's val not page1, because
last expired vaddr0's entry is left in CPU-MMU-tlb.

Best Regards
Guo Ren

#12 lore raw

Re: [PATCH v3 07/33] nds32: MMU initialization

Hi, Guo Ren:

2017-12-18 17:08 GMT+08:00 Guo Ren <[email protected]>:

Quoted 17 lines

Hi Greentime,

On Fri, Dec 08, 2017 at 05:11:50PM +0800, Greentime Hu wrote:
[...]

Quoted 2 lines
arch/nds32/mm/highmem.c +0 -0

[...]

arch/nds32/mm/highmem.c line 32

Quoted 7 lines
arch/nds32/mm/highmem.c +7 -0
+void *kmap(struct page *page)
+{
+     unsigned long vaddr;
+     might_sleep();
+     if (!PageHighMem(page))
+             return page_address(page);
+     vaddr = (unsigned long)kmap_high(page);

Here should invalid the cpu_mmu_tlb's entry, Or invalid it in the set_pte().

Quoted 8 lines

eg:
vaddr0 = kmap(page0)
*vaddr0 = val0 //It will cause tlb-miss, and hard-refill to MMU-tlb kunmap(page0)
vaddr1 = kmap(page1) // Mostly vaddr1 = vaddr0
val = vaddr1; //No tlb-miss and it will get page0's val not page1, because
last expired vaddr0's entry is left in CPU-MMU-tlb.

Thanks.
I will add __nds32__tlbop_inv(vaddr); to invalidate this mapping before retrun vaddr.
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#13 lore raw

Re: [PATCH v3 07/33] nds32: MMU initialization

Quoted 29 lines · Greentime Hu

Hi, Guo Ren:

2017-12-18 17:08 GMT+08:00 Guo Ren <[email protected]>:

Quoted 17 lines

Hi Greentime,

On Fri, Dec 08, 2017 at 05:11:50PM +0800, Greentime Hu wrote:
[...]

Quoted 2 lines
arch/nds32/mm/highmem.c +0 -0

[...]

arch/nds32/mm/highmem.c line 32

Quoted 7 lines
arch/nds32/mm/highmem.c +7 -0
+void *kmap(struct page *page)
+{
+     unsigned long vaddr;
+     might_sleep();
+     if (!PageHighMem(page))
+             return page_address(page);
+     vaddr = (unsigned long)kmap_high(page);

Here should invalid the cpu_mmu_tlb's entry, Or invalid it in the set_pte().

Quoted 8 lines

eg:
vaddr0 = kmap(page0)
*vaddr0 = val0 //It will cause tlb-miss, and hard-refill to MMU-tlb kunmap(page0)
vaddr1 = kmap(page1) // Mostly vaddr1 = vaddr0
val = vaddr1; //No tlb-miss and it will get page0's val not page1, because
last expired vaddr0's entry is left in CPU-MMU-tlb.

Quoted 3 lines

Thanks.
I will add __nds32__tlbop_inv(vaddr); to invalidate this mapping before retrun vaddr.

Sorry, perhaps I'm wrong. See kmap->kmap_high->map_new_virtual->get_next_pkmap_nr(color).

Seems pkmap will return the vaddr by vaddr + 1 until no_more_pkmaps(), and then flush_all_zero_pkmaps. Just kmap_atomic need it, and you've done.

But I don't know why mips need flush_tlb_one in arch/mips/mm/highmem.c:kmap(). VIPT? but kmap give the get_pkmap_color for aliasing.

Best Regards
Guo Ren

#14 lore raw

Re: [PATCH v3 07/33] nds32: MMU initialization

Hi, Guo Ren:

2017-12-18 20:22 GMT+08:00 Guo Ren <[email protected]>:

Quoted 34 lines · Greentime Hu
Quoted 29 lines

Hi, Guo Ren:

2017-12-18 17:08 GMT+08:00 Guo Ren <[email protected]>:

Quoted 17 lines

Hi Greentime,

On Fri, Dec 08, 2017 at 05:11:50PM +0800, Greentime Hu wrote:
[...]

Quoted 2 lines
arch/nds32/mm/highmem.c +0 -0

[...]

arch/nds32/mm/highmem.c line 32

Quoted 7 lines
arch/nds32/mm/highmem.c +7 -0
+void *kmap(struct page *page)
+{
+     unsigned long vaddr;
+     might_sleep();
+     if (!PageHighMem(page))
+             return page_address(page);
+     vaddr = (unsigned long)kmap_high(page);

Here should invalid the cpu_mmu_tlb's entry, Or invalid it in the set_pte().

Quoted 8 lines

eg:
vaddr0 = kmap(page0)
*vaddr0 = val0 //It will cause tlb-miss, and hard-refill to MMU-tlb kunmap(page0)
vaddr1 = kmap(page1) // Mostly vaddr1 = vaddr0
val = vaddr1; //No tlb-miss and it will get page0's val not page1, because
last expired vaddr0's entry is left in CPU-MMU-tlb.

Quoted 3 lines

Thanks.
I will add __nds32__tlbop_inv(vaddr); to invalidate this mapping before retrun vaddr.

Quoted 6 lines

Sorry, perhaps I'm wrong. See kmap->kmap_high->map_new_virtual->get_next_pkmap_nr(color).

Seems pkmap will return the vaddr by vaddr + 1 until no_more_pkmaps(), and then flush_all_zero_pkmaps. Just kmap_atomic need it, and you've done.

Thanks for double checking this case. :)
As you said, it will flush tlb in the generic code flow.

#15 lore raw

PATCH v3 8/33 nds32: MMU fault handling and page table management

In reply to Greentime Hu

From: Greentime Hu <[email protected]>

This patch includes page fault handler, mmap and fixup implementations.

---
 arch/nds32/lib/copy_page.S |   50 ++++++
 arch/nds32/mm/extable.c    |   29 +++
 arch/nds32/mm/fault.c      |  424 ++++++++++++++++++++++++++++++++++++++++++++
 arch/nds32/mm/mmap.c       |   86 +++++++++
 4 files changed, 589 insertions(+)
 create mode 100644 arch/nds32/lib/copy_page.S
 create mode 100644 arch/nds32/mm/extable.c
 create mode 100644 arch/nds32/mm/fault.c
 create mode 100644 arch/nds32/mm/mmap.c
arch/nds32/lib/copy_page.S new file +50 -0
new file mode 100644
index 0000000..a55a5cc
@@ -0,0 +1,50 @@
+/*
+ * Copyright (C) 2005-2017 Andes Technology Corporation
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program.  If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#include <linux/linkage.h>
+#include <asm/page.h>
+
+	.text
+ENTRY(copy_page)
+	pushm	$r2, $r10
+	movi	$r2, PAGE_SIZE >> 5
+.Lcopy_loop:
+	lmw.bim	$r3, [$r1], $r10
+	smw.bim	$r3, [$r0], $r10
+	subi45	$r2, #1
+	bnez38	$r2, .Lcopy_loop
+	popm	$r2, $r10
+	ret
+ENDPROC(copy_page)
+
+ENTRY(clear_page)
+	pushm	$r1, $r9
+	movi	$r1, PAGE_SIZE >> 5
+	movi55	$r2, #0
+	movi55	$r3, #0
+	movi55	$r4, #0
+	movi55	$r5, #0
+	movi55	$r6, #0
+	movi55	$r7, #0
+	movi55	$r8, #0
+	movi55	$r9, #0
+.Lclear_loop:
+	smw.bim	$r2, [$r0], $r9
+	subi45	$r1, #1
+	bnez38	$r1, .Lclear_loop
+	popm	$r1, $r9
+        ret
+ENDPROC(clear_page)
arch/nds32/mm/extable.c new file +29 -0
new file mode 100644
index 0000000..bce62d7
@@ -0,0 +1,29 @@
+/*
+ * Copyright (C) 2005-2017 Andes Technology Corporation
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program.  If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#include <linux/extable.h>
+#include <asm/uaccess.h>
+
+int fixup_exception(struct pt_regs *regs)
+{
+	const struct exception_table_entry *fixup;
+
+	fixup = search_exception_tables(instruction_pointer(regs));
+	if (fixup)
+		regs->ipc = fixup->fixup;
+
+	return fixup != NULL;
+}
arch/nds32/mm/fault.c new file +424 -0

424 lines not on this page · raw message

arch/nds32/mm/mmap.c new file +86 -0

86 lines not on this page · raw message

Signature · 1 line
1.7.9.5
#16 lore raw

PATCH v3 9/33 nds32: Cache and TLB routines

In reply to Greentime Hu

From: Greentime Hu <[email protected]>

This patch contains cache and TLB maintenance functions.

---
 arch/nds32/include/asm/cache.h         |   25 ++
 arch/nds32/include/asm/cache_info.h    |   26 ++
 arch/nds32/include/asm/cacheflush.h    |   57 ++++
 arch/nds32/include/asm/mmu_context.h   |   81 +++++
 arch/nds32/include/asm/proc-fns.h      |   57 ++++
 arch/nds32/include/asm/tlb.h           |   41 +++
 arch/nds32/include/asm/tlbflush.h      |   60 ++++
 arch/nds32/include/uapi/asm/cachectl.h |   19 ++
 arch/nds32/kernel/cacheinfo.c          |   62 ++++
 arch/nds32/mm/cacheflush.c             |  331 ++++++++++++++++++++
 arch/nds32/mm/proc.c                   |  527 ++++++++++++++++++++++++++++++++
 arch/nds32/mm/tlb.c                    |   63 ++++
 12 files changed, 1349 insertions(+)
 create mode 100644 arch/nds32/include/asm/cache.h
 create mode 100644 arch/nds32/include/asm/cache_info.h
 create mode 100644 arch/nds32/include/asm/cacheflush.h
 create mode 100644 arch/nds32/include/asm/mmu_context.h
 create mode 100644 arch/nds32/include/asm/proc-fns.h
 create mode 100644 arch/nds32/include/asm/tlb.h
 create mode 100644 arch/nds32/include/asm/tlbflush.h
 create mode 100644 arch/nds32/include/uapi/asm/cachectl.h
 create mode 100644 arch/nds32/kernel/cacheinfo.c
 create mode 100644 arch/nds32/mm/cacheflush.c
 create mode 100644 arch/nds32/mm/proc.c
 create mode 100644 arch/nds32/mm/tlb.c
arch/nds32/include/asm/cache.h new file +25 -0
new file mode 100644
index 0000000..36ec549
@@ -0,0 +1,25 @@
+/*
+ * Copyright (C) 2005-2017 Andes Technology Corporation
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program.  If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#ifndef __NDS32_CACHE_H__
+#define __NDS32_CACHE_H__
+
+#define L1_CACHE_BYTES	32
+#define L1_CACHE_SHIFT	5
+
+#define ARCH_DMA_MINALIGN   L1_CACHE_BYTES
+
+#endif /* __NDS32_CACHE_H__ */
arch/nds32/include/asm/cache_info.h new file +26 -0
new file mode 100644
index 0000000..2b17b7d
@@ -0,0 +1,26 @@
+/*
+ * Copyright (C) 2005-2017 Andes Technology Corporation
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program.  If not, see <http://www.gnu.org/licenses/>.
+ */
+
+struct cache_info {
+	unsigned char ways;
+	unsigned char line_size;
+	unsigned short sets;
+	unsigned short size;
+#if defined(CONFIG_CPU_CACHE_ALIASING)
+	unsigned short aliasing_num;
+	unsigned int aliasing_mask;
+#endif
+};
arch/nds32/include/asm/cacheflush.h new file +57 -0

57 lines not on this page · raw message

arch/nds32/include/asm/mmu_context.h new file +81 -0

81 lines not on this page · raw message

arch/nds32/include/asm/proc-fns.h new file +57 -0

57 lines not on this page · raw message

arch/nds32/include/asm/tlb.h new file +41 -0

41 lines not on this page · raw message

arch/nds32/include/asm/tlbflush.h new file +60 -0

60 lines not on this page · raw message

arch/nds32/include/uapi/asm/cachectl.h new file +19 -0
new file mode 100644
index 0000000..a56a37d
@@ -0,0 +1,19 @@
+/*
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License.  See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ * Copyright (C) 1994, 1995, 1996 by Ralf Baechle
+ * Copyright (C) 2005-2017 Andes Technology Corporation
+ */
+#ifndef	_ASM_CACHECTL
+#define	_ASM_CACHECTL
+
+/*
+ * Options for cacheflush system call
+ */
+#define	ICACHE	0		/* flush instruction cache        */
+#define	DCACHE	1		/* writeback and flush data cache */
+#define	BCACHE	2		/* flush instruction cache + writeback and flush data cache */
+
+#endif /* _ASM_CACHECTL */
arch/nds32/kernel/cacheinfo.c new file +62 -0

62 lines not on this page · raw message

arch/nds32/mm/cacheflush.c new file +331 -0

331 lines not on this page · raw message

arch/nds32/mm/proc.c new file +527 -0

527 lines not on this page · raw message

arch/nds32/mm/tlb.c new file +63 -0

63 lines not on this page · raw message

Signature · 1 line
1.7.9.5
#17 lore raw

Re: [PATCH v3 09/33] nds32: Cache and TLB routines

Quoted 1 line · Greentime Hu

From: Greentime Hu <[email protected]>

[...]

Quoted 1 line
arch/nds32/mm/cacheflush.c +0 -0

[...]

Quoted 3 lines
arch/nds32/mm/cacheflush.c +3 -0
+#ifndef CONFIG_CPU_CACHE_ALIASING
+void update_mmu_cache(struct vm_area_struct *vma, unsigned long addr,
+		      pte_t * pte)

[...]

arch/nds32/mm/cacheflush.c line 43

Quoted 5 lines
arch/nds32/mm/cacheflush.c +5 -0
+	if (vma->vm_mm == current->active_mm) {
+
+		__nds32__mtsr_dsb(addr, NDS32_SR_TLB_VPN);
+		__nds32__tlbop_rwr(*pte);
+		__nds32__isb();

If there is an interruption between "mtsr_dsb" and "tlbop_rwr" and a update_mmu_cache() is invoked again, then an error page mapping is set up in your tlb-buffer when tlbop_rwr is excuted from interrupt. Because it's another addr in NDS32_SR_TLB_VPN.

It seems that tlb-hardrefill can help build tlb-buffer mapping, why you update it in this software way?

Guo Ren

#18 lore raw

Re: [PATCH v3 09/33] nds32: Cache and TLB routines

2017-12-13 10:16 GMT+08:00 Guo Ren <[email protected]>:

Quoted 14 lines · Greentime Hu
Quoted 1 line

From: Greentime Hu <[email protected]>

[...]

Quoted 1 line
arch/nds32/mm/cacheflush.c +0 -0

[...]

Quoted 3 lines
arch/nds32/mm/cacheflush.c +3 -0
+#ifndef CONFIG_CPU_CACHE_ALIASING
+void update_mmu_cache(struct vm_area_struct *vma, unsigned long addr,
+                   pte_t * pte)

[...]

arch/nds32/mm/cacheflush.c line 43

Quoted 5 lines
arch/nds32/mm/cacheflush.c +5 -0
+     if (vma->vm_mm == current->active_mm) {
+
+             __nds32__mtsr_dsb(addr, NDS32_SR_TLB_VPN);
+             __nds32__tlbop_rwr(*pte);
+             __nds32__isb();
Quoted 8 lines

If there is an interruption between "mtsr_dsb" and "tlbop_rwr" and a update_mmu_cache() is invoked again, then an error page mapping is set up in your tlb-buffer when tlbop_rwr is excuted from interrupt. Because it's another addr in NDS32_SR_TLB_VPN.

It seems that tlb-hardrefill can help build tlb-buffer mapping, why you update it in this software way?

Hi, Guo Ren:

I think it should be fine if an interruption between mtsr_dsb and tlbop_rwr because this is a optimization by sw.
The page mapping has been created and it is just not in TLB yet. What we did is to insert this mapping to TLB by SW thus it can prevent TLB miss one time.
It will be fine even if TLB miss. HW will walk through page table and insert this mapping to TLB anyway.

Based on Documentation/cachetlb.txt
5) ``void update_mmu_cache(struct vm_area_struct *vma, unsigned long address, pte_t *ptep)``

At the end of every page fault, this routine is invoked to tell the architecture specific code that a translation now exists at virtual address "address" for address space "vma->vm_mm", in the software page tables.

A port may use this information in any way it so chooses. For example, it could use this event to pre-load TLB ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ translations for software managed TLB configurations. ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^

#19 lore raw

Re: [PATCH v3 09/33] nds32: Cache and TLB routines

Quoted 2 lines · Greentime Hu

I think it should be fine if an interruption between mtsr_dsb and tlbop_rwr because this is a optimization by sw.

Fine? When there is an unexpected vaddr in SR_TLB_VPN, tlbop_rwr(*pte) will break that vaddr's pfn in the CPU tlb-buffer entry. When linux access the vaddr, it will get wrong data unless the entry has been replaced out. --
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#20 lore raw

Re: [PATCH v3 09/33] nds32: Cache and TLB routines

2017-12-13 16:19 GMT+08:00 Guo Ren <[email protected]>:

Quoted 8 lines · Greentime Hu
Quoted 3 lines

I think it should be fine if an interruption between mtsr_dsb and tlbop_rwr because this is a optimization by sw.

Fine? When there is an unexpected vaddr in SR_TLB_VPN, tlbop_rwr(*pte) will break that vaddr's pfn in the CPU tlb-buffer entry. When linux access the vaddr, it will get wrong data unless the entry has been replaced out.

Hi, Guo Ren:

Thanks. I get your point.
It is needed to be protected.
I will fix it in the next version patch.

if (vma->vm_mm == current->active_mm) {
        local_irq_save(flags);
        __nds32__mtsr_dsb(addr, NDS32_SR_TLB_VPN);
        __nds32__tlbop_rwr(*pte);
        __nds32__isb();
        local_irq_restore(flags);
}
#21 lore raw

Re: [PATCH v3 09/33] nds32: Cache and TLB routines

Quoted 16 lines · Greentime Hu

2017-12-13 16:19 GMT+08:00 Guo Ren <[email protected]>:

Quoted 8 lines · Greentime Hu
Quoted 3 lines

I think it should be fine if an interruption between mtsr_dsb and tlbop_rwr because this is a optimization by sw.

Fine? When there is an unexpected vaddr in SR_TLB_VPN, tlbop_rwr(*pte) will break that vaddr's pfn in the CPU tlb-buffer entry. When linux access the vaddr, it will get wrong data unless the entry has been replaced out.

Hi, Guo Ren:

Thanks. I get your point.
It is needed to be protected.
I will fix it in the next version patch.

Quoted 7 lines
if (vma->vm_mm == current->active_mm) {
        local_irq_save(flags);
        __nds32__mtsr_dsb(addr, NDS32_SR_TLB_VPN);
        __nds32__tlbop_rwr(*pte);
        __nds32__isb();
        local_irq_restore(flags);
}

If hardware tlbop_rwr could invalid NDS32_SR_TLB_VPN, then you needn't protect.
I mean:
mtsr addr1 NDS32_SR_TLB_VPN
mtsr addr2 NDS32_SR_TLB_VPN
tlbop_rwr(*pte) // OK, and it will hit a hardware invalid bit internal. tlbop_rwr(*pte) // SR_TLB_VPN invalided, then it will not cause problem.

:) How my idea?
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#22 lore raw

Re: [PATCH v3 09/33] nds32: Cache and TLB routines

2017-12-13 16:53 GMT+08:00 Guo Ren <[email protected]>:

Quoted 33 lines · Greentime Hu
Quoted 16 lines

2017-12-13 16:19 GMT+08:00 Guo Ren <[email protected]>:

Quoted 8 lines · Greentime Hu
Quoted 3 lines

I think it should be fine if an interruption between mtsr_dsb and tlbop_rwr because this is a optimization by sw.

Fine? When there is an unexpected vaddr in SR_TLB_VPN, tlbop_rwr(*pte) will break that vaddr's pfn in the CPU tlb-buffer entry. When linux access the vaddr, it will get wrong data unless the entry has been replaced out.

Hi, Guo Ren:

Thanks. I get your point.
It is needed to be protected.
I will fix it in the next version patch.

Quoted 7 lines
if (vma->vm_mm == current->active_mm) {
        local_irq_save(flags);
        __nds32__mtsr_dsb(addr, NDS32_SR_TLB_VPN);
        __nds32__tlbop_rwr(*pte);
        __nds32__isb();
        local_irq_restore(flags);
}

If hardware tlbop_rwr could invalid NDS32_SR_TLB_VPN, then you needn't protect.
I mean:
mtsr addr1 NDS32_SR_TLB_VPN
mtsr addr2 NDS32_SR_TLB_VPN
tlbop_rwr(*pte) // OK, and it will hit a hardware invalid bit internal. tlbop_rwr(*pte) // SR_TLB_VPN invalided, then it will not cause problem.

Quoted 1 line

:) How my idea?

Hi, Guo Ren:

The reason I think it might have problem is that

mtsr addr1 NDS32_SR_TLB_VPN
interrupt coming
mtsr addr2 NDS32_SR_TLB_VPN <- TLB_VPN has been set to addr2 tlbop_rwr(*pte);
interrupt finish
tlbop_rwr(*pte); <- it will use the wrong TLB_VPN

I think all these TLB operations should be protected because tlbop will operate with TLB_VPN.
Thanks :)

#23 lore raw

Re: [PATCH v3 09/33] nds32: Cache and TLB routines

Hello,

CPU team could improve the tlbop_*. Eg: Design a hardware internal flag bit for SR_TLB_VPN, tlbop_* will invalid it and mtsr SR_TLB_VPN will valid it.

So:

Quoted 3 lines · Greentime Hu

mtsr addr1 NDS32_SR_TLB_VPN
interrupt coming
mtsr addr2 NDS32_SR_TLB_VPN <- TLB_VPN has been set to addr2

mtsr SR_TLB_VPN will valid the flag bit

Quoted 1 line
        tlbop_rwr(*pte);

tlbop_rwr will invalid SR_TLB_VPN flag bit

Quoted 2 lines

interrupt finish
tlbop_rwr(*pte); <- it will use the wrong TLB_VPN

Because SR_TLB_VPN is in a invalid state, no operation happen on tlbop_rwr.

Then they are atomic safe ,no spin_lock_irq need.
:)

Guo Ren

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#24 lore raw

Re: [PATCH v3 09/33] nds32: Cache and TLB routines

2017-12-13 17:45 GMT+08:00 Guo Ren <[email protected]>:

Quoted 13 lines

Hello,

CPU team could improve the tlbop_*. Eg: Design a hardware internal flag bit for SR_TLB_VPN, tlbop_* will invalid it and mtsr SR_TLB_VPN will valid it.

So:

Quoted 3 lines · Greentime Hu

mtsr addr1 NDS32_SR_TLB_VPN
interrupt coming
mtsr addr2 NDS32_SR_TLB_VPN <- TLB_VPN has been set to addr2

mtsr SR_TLB_VPN will valid the flag bit

Quoted 1 line
        tlbop_rwr(*pte);
Quoted 9 lines

tlbop_rwr will invalid SR_TLB_VPN flag bit

Quoted 2 lines

interrupt finish
tlbop_rwr(*pte); <- it will use the wrong TLB_VPN

Because SR_TLB_VPN is in a invalid state, no operation happen on tlbop_rwr.

Then they are atomic safe ,no spin_lock_irq need.
:)

Oh, I see. I may propose this idea to our ARCH colleagues for the next version design.
Many thanks.
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#25 lore raw

PATCH v3 10/33 nds32: Process management

In reply to Greentime Hu

From: Greentime Hu <[email protected]>

This patch includes copy_thread(), start_thread() implementation and cpu_context structure definition. nds32 uses $r25 to get current task_struct.

---
 arch/nds32/include/asm/current.h     |   25 ++++
 arch/nds32/include/asm/processor.h   |  115 ++++++++++++++++++
 arch/nds32/include/asm/thread_info.h |   91 ++++++++++++++
 arch/nds32/kernel/process.c          |  217 ++++++++++++++++++++++++++++++++++
 4 files changed, 448 insertions(+)
 create mode 100644 arch/nds32/include/asm/current.h
 create mode 100644 arch/nds32/include/asm/processor.h
 create mode 100644 arch/nds32/include/asm/thread_info.h
 create mode 100644 arch/nds32/kernel/process.c
arch/nds32/include/asm/current.h new file +25 -0
new file mode 100644
index 0000000..027f7df
@@ -0,0 +1,25 @@
+/*
+ * Copyright (C) 2005-2017 Andes Technology Corporation
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program.  If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#ifndef _ASM_NDS32_CURRENT_H
+#define _ASM_NDS32_CURRENT_H
+
+#ifndef __ASSEMBLY__
+register struct task_struct *current asm("$r25");
+#endif /* __ASSEMBLY__ */
+#define tsk $r25
+
+#endif /* _ASM_NDS32_CURRENT_H */
arch/nds32/include/asm/processor.h new file +115 -0

115 lines not on this page · raw message

arch/nds32/include/asm/thread_info.h new file +91 -0

91 lines not on this page · raw message

arch/nds32/kernel/process.c new file +217 -0

217 lines not on this page · raw message

Signature · 1 line
1.7.9.5
#26 lore raw

PATCH v3 11/33 nds32: IRQ handling

In reply to Greentime Hu

From: Greentime Hu <[email protected]>

This patch includes irq related functions and irqchip_init().

---
 arch/nds32/include/asm/irqflags.h |   49 +++++++++++++++++++++++++++++++++++++
 arch/nds32/kernel/irq.c           |   22 +++++++++++++++++
 2 files changed, 71 insertions(+)
 create mode 100644 arch/nds32/include/asm/irqflags.h
 create mode 100644 arch/nds32/kernel/irq.c
arch/nds32/include/asm/irqflags.h new file +49 -0
new file mode 100644
index 0000000..7c1940f
@@ -0,0 +1,49 @@
+/*
+ * Copyright (C) 2005-2017 Andes Technology Corporation
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program.  If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#include <asm/nds32.h>
+#include <nds32_intrinsic.h>
+
+#define arch_local_irq_disable()	\
+	GIE_DISABLE();
+
+#define arch_local_irq_enable()	\
+	GIE_ENABLE();
+static inline unsigned long arch_local_irq_save(void)
+{
+	unsigned long flags;
+	flags = __nds32__mfsr(NDS32_SR_PSW) & PSW_mskGIE;
+	GIE_DISABLE();
+	return flags;
+}
+
+static inline unsigned long arch_local_save_flags(void)
+{
+	unsigned long flags;
+	flags = __nds32__mfsr(NDS32_SR_PSW) & PSW_mskGIE;
+	return flags;
+}
+
+static inline void arch_local_irq_restore(unsigned long flags)
+{
+	if(flags)
+		GIE_ENABLE();
+}
+
+static inline int arch_irqs_disabled_flags(unsigned long flags)
+{
+	return !flags;
+}
arch/nds32/kernel/irq.c new file +22 -0
new file mode 100644
index 0000000..119dc9f
@@ -0,0 +1,22 @@
+/*
+ * Copyright (C) 2005-2017 Andes Technology Corporation
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program.  If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#include <linux/irqchip.h>
+
+void __init init_IRQ(void)
+{
+	irqchip_init();
+}
Signature · 1 line
1.7.9.5
#27 lore raw

PATCH v3 12/33 nds32: Atomic operations

In reply to Greentime Hu

From: Greentime Hu <greentime-MUIXKm3Oiri1Z/[email protected]>

This patch includes the atomic and futex operations. Many atomic operations use the load-lock word(llw) and store-condition word(scw) operations.

---
 arch/nds32/include/asm/barrier.h |   28 +++++++++
 arch/nds32/include/asm/futex.h   |  116 ++++++++++++++++++++++++++++++++++++++
 2 files changed, 144 insertions(+)
 create mode 100644 arch/nds32/include/asm/barrier.h
 create mode 100644 arch/nds32/include/asm/futex.h
arch/nds32/include/asm/barrier.h new file +28 -0
new file mode 100644
index 0000000..d325a78
@@ -0,0 +1,28 @@
+/*
+ * Copyright (C) 2005-2017 Andes Technology Corporation
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program.  If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#ifndef __NDS32_ASM_BARRIER_H
+#define __NDS32_ASM_BARRIER_H
+
+#ifndef __ASSEMBLY__
+#define mb()		asm volatile("msync all":::"memory")
+#define rmb()		asm volatile("msync all":::"memory")
+#define wmb()		asm volatile("msync store":::"memory")
+#include <asm-generic/barrier.h>
+
+#endif	/* __ASSEMBLY__ */
+
+#endif	/* __NDS32_ASM_BARRIER_H */
arch/nds32/include/asm/futex.h new file +116 -0

116 lines not on this page · raw message

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#28 lore raw

PATCH v3 13/33 nds32: Device specific operations

In reply to Greentime Hu

From: Greentime Hu <greentime-MUIXKm3Oiri1Z/[email protected]>

This patch introduces ioremap implementations.

---
 arch/nds32/include/asm/io.h |   96 +++++++++++++++++++++++++++++++++++++++++++
 arch/nds32/mm/ioremap.c     |   75 +++++++++++++++++++++++++++++++++
 2 files changed, 171 insertions(+)
 create mode 100644 arch/nds32/include/asm/io.h
 create mode 100644 arch/nds32/mm/ioremap.c
arch/nds32/include/asm/io.h new file +96 -0
new file mode 100644
index 0000000..16ff6a5
@@ -0,0 +1,96 @@
+/*
+ * Copyright (C) 2005-2017 Andes Technology Corporation
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program.  If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#ifndef __ASM_NDS32_IO_H
+#define __ASM_NDS32_IO_H
+
+extern void iounmap(void __iomem *addr);
+#define __raw_writeb __raw_writeb
+static inline void __raw_writeb(u8 val, volatile void __iomem *addr)
+{
+	asm volatile("sbi %0, [%1]" : : "r" (val), "r" (addr));
+}
+
+#define __raw_writew __raw_writew
+static inline void __raw_writew(u16 val, volatile void __iomem *addr)
+{
+	asm volatile("shi %0, [%1]" : : "r" (val), "r" (addr));
+}
+
+#define __raw_writel __raw_writel
+static inline void __raw_writel(u32 val, volatile void __iomem *addr)
+{
+	asm volatile("swi %0, [%1]" : : "r" (val), "r" (addr));
+}
+
+#define __raw_readb __raw_readb
+static inline u8 __raw_readb(const volatile void __iomem *addr)
+{
+	u8 val;
+
+	asm volatile("lbi %0, [%1]" : "=r" (val) : "r" (addr));
+	return val;
+}
+
+#define __raw_readw __raw_readw
+static inline u16 __raw_readw(const volatile void __iomem *addr)
+{
+	u16 val;
+
+	asm volatile("lhi %0, [%1]" : "=r" (val) : "r" (addr));
+	return val;
+}
+
+#define __raw_readl __raw_readl
+static inline u32 __raw_readl(const volatile void __iomem *addr)
+{
+	u32 val;
+
+	asm volatile("lwi %0, [%1]" : "=r" (val) : "r" (addr));
+	return val;
+}
+
+#define __iormb()               rmb()
+#define __iowmb()               wmb()
+
+#define mmiowb()        __asm__ __volatile__ ("msync all" : : : "memory");
+
+/*
+ * {read,write}{b,w,l,q}_relaxed() are like the regular version, but
+ * are not guaranteed to provide ordering against spinlocks or memory
+ * accesses.
+ */
+
+#define readb_relaxed(c)	({ u8  __v = __raw_readb(c); __v; })
+#define readw_relaxed(c)	({ u16 __v = le16_to_cpu((__force __le16)__raw_readw(c)); __v; })
+#define readl_relaxed(c)	({ u32 __v = le32_to_cpu((__force __le32)__raw_readl(c)); __v; })
+#define writeb_relaxed(v,c)	((void)__raw_writeb((v),(c)))
+#define writew_relaxed(v,c)	((void)__raw_writew((__force u16)cpu_to_le16(v),(c)))
+#define writel_relaxed(v,c)	((void)__raw_writel((__force u32)cpu_to_le32(v),(c)))
+
+/*
+ * {read,write}{b,w,l,q}() access little endian memory and return result in
+ * native endianness.
+ */
+#define readb(c)	({ u8  __v = readb_relaxed(c); __iormb(); __v; })
+#define readw(c)	({ u16 __v = readw_relaxed(c); __iormb(); __v; })
+#define readl(c)	({ u32 __v = readl_relaxed(c); __iormb(); __v; })
+
+#define writeb(v,c)	({ __iowmb(); writeb_relaxed((v),(c)); })
+#define writew(v,c)	({ __iowmb(); writew_relaxed((v),(c)); })
+#define writel(v,c)	({ __iowmb(); writel_relaxed((v),(c)); })
+#include <asm-generic/io.h>
+#endif /* __ASM_NDS32_IO_H */
arch/nds32/mm/ioremap.c new file +75 -0

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#29 lore raw

PATCH v3 14/33 nds32: DMA mapping API

In reply to Greentime Hu

From: Greentime Hu <[email protected]>

This patch adds support for the DMA mapping API. It uses dma_map_ops for flexibility.

---
 arch/nds32/include/asm/dma-mapping.h |   27 ++
 arch/nds32/kernel/dma.c              |  472 ++++++++++++++++++++++++++++++++++
 2 files changed, 499 insertions(+)
 create mode 100644 arch/nds32/include/asm/dma-mapping.h
 create mode 100644 arch/nds32/kernel/dma.c
arch/nds32/include/asm/dma-mapping.h new file +27 -0
new file mode 100644
index 0000000..63dbeb7
@@ -0,0 +1,27 @@
+/*
+ * Copyright (C) 2005-2017 Andes Technology Corporation
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program.  If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#ifndef ASMNDS32_DMA_MAPPING_H
+#define ASMNDS32_DMA_MAPPING_H
+
+extern struct dma_map_ops nds32_dma_ops;
+
+static inline struct dma_map_ops *get_arch_dma_ops(struct bus_type *bus)
+{
+	return &nds32_dma_ops;
+}
+
+#endif
arch/nds32/kernel/dma.c new file +472 -0

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#30 lore raw

PATCH v3 15/33 nds32: ELF definitions

In reply to Greentime Hu

From: Greentime Hu <[email protected]>

This patch adds definitions for the ELF format, relocation types, vdso locations and EXEC_PAGESIZE.

---
 arch/nds32/include/asm/elf.h         |  192 ++++++++++++++++++++++++++++++++++
 arch/nds32/include/uapi/asm/auxvec.h |   25 +++++
 arch/nds32/include/uapi/asm/param.h  |   24 +++++
 3 files changed, 241 insertions(+)
 create mode 100644 arch/nds32/include/asm/elf.h
 create mode 100644 arch/nds32/include/uapi/asm/auxvec.h
 create mode 100644 arch/nds32/include/uapi/asm/param.h
arch/nds32/include/asm/elf.h new file +192 -0
new file mode 100644
index 0000000..a6e4c56
@@ -0,0 +1,192 @@
+/*
+ * Copyright (C) 2005-2017 Andes Technology Corporation
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program.  If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#ifndef __ASMNDS32_ELF_H
+#define __ASMNDS32_ELF_H
+
+/*
+ * ELF register definitions..
+ */
+
+#include <asm/ptrace.h>
+
+typedef unsigned long elf_greg_t;
+typedef unsigned long elf_freg_t[3];
+
+extern unsigned int elf_hwcap;
+
+#define EM_NDS32			167
+
+#define R_NDS32_NONE			0
+#define R_NDS32_16_RELA			19
+#define R_NDS32_32_RELA			20
+#define R_NDS32_9_PCREL_RELA		22
+#define R_NDS32_15_PCREL_RELA		23
+#define R_NDS32_17_PCREL_RELA		24
+#define R_NDS32_25_PCREL_RELA		25
+#define R_NDS32_HI20_RELA		26
+#define R_NDS32_LO12S3_RELA		27
+#define R_NDS32_LO12S2_RELA		28
+#define R_NDS32_LO12S1_RELA		29
+#define R_NDS32_LO12S0_RELA		30
+#define R_NDS32_SDA15S3_RELA    	31
+#define R_NDS32_SDA15S2_RELA    	32
+#define R_NDS32_SDA15S1_RELA    	33
+#define R_NDS32_SDA15S0_RELA    	34
+#define R_NDS32_GOT20			37
+#define R_NDS32_25_PLTREL		38
+#define R_NDS32_COPY			39
+#define R_NDS32_GLOB_DAT		40
+#define R_NDS32_JMP_SLOT		41
+#define R_NDS32_RELATIVE		42
+#define R_NDS32_GOTOFF			43
+#define R_NDS32_GOTPC20			44
+#define R_NDS32_GOT_HI20		45
+#define R_NDS32_GOT_LO12		46
+#define R_NDS32_GOTPC_HI20		47
+#define R_NDS32_GOTPC_LO12		48
+#define R_NDS32_GOTOFF_HI20		49
+#define R_NDS32_GOTOFF_LO12		50
+#define R_NDS32_INSN16			51
+#define R_NDS32_LABEL			52
+#define R_NDS32_LONGCALL1		53
+#define R_NDS32_LONGCALL2		54
+#define R_NDS32_LONGCALL3		55
+#define R_NDS32_LONGJUMP1		56
+#define R_NDS32_LONGJUMP2		57
+#define R_NDS32_LONGJUMP3		58
+#define R_NDS32_LOADSTORE		59
+#define R_NDS32_9_FIXED_RELA		60
+#define R_NDS32_15_FIXED_RELA		61
+#define R_NDS32_17_FIXED_RELA		62
+#define R_NDS32_25_FIXED_RELA		63
+#define R_NDS32_PLTREL_HI20		64
+#define R_NDS32_PLTREL_LO12		65
+#define R_NDS32_PLT_GOTREL_HI20		66
+#define R_NDS32_PLT_GOTREL_LO12		67
+#define R_NDS32_LO12S0_ORI_RELA		72
+#define R_NDS32_DWARF2_OP1_RELA     	77
+#define R_NDS32_DWARF2_OP2_RELA     	78
+#define R_NDS32_DWARF2_LEB_RELA     	79
+#define R_NDS32_WORD_9_PCREL_RELA	94
+#define R_NDS32_LONGCALL4 		107
+#define R_NDS32_RELA_NOP_MIX		192
+#define R_NDS32_RELA_NOP_MAX		255
+
+#define ELF_NGREG (sizeof (struct pt_regs) / sizeof(elf_greg_t))
+typedef elf_greg_t elf_gregset_t[ELF_NGREG];
+
+/* Core file format: The core file is written in such a way that gdb
+   can understand it and provide useful information to the user (under
+   linux we use the 'trad-core' bfd).  There are quite a number of
+   obstacles to being able to view the contents of the floating point
+   registers, and until these are solved you will not be able to view the
+   contents of them.  Actually, you can read in the core file and look at
+   the contents of the user struct to find out what the floating point
+   registers contain.
+   The actual file contents are as follows:
+   UPAGE: 1 page consisting of a user struct that tells gdb what is present
+   in the file.  Directly after this is a copy of the task_struct, which
+   is currently not used by gdb, but it may come in useful at some point.
+   All of the registers are stored as part of the upage.  The upage should
+   always be only one page.
+   DATA: The data area is stored.  We use current->end_text to
+   current->brk to pick up all of the user variables, plus any memory
+   that may have been malloced.  No attempt is made to determine if a page
+   is demand-zero or if a page is totally unused, we just cover the entire
+   range.  All of the addresses are rounded in such a way that an integral
+   number of pages is written.
+   STACK: We need the stack information in order to get a meaningful
+   backtrace.  We need to write the data from (esp) to
+   current->start_stack, so we round each of these off in order to be able
+   to write an integer number of pages.
+   The minimum core file size is 3 pages, or 12288 bytes.
+*/
+
+struct user_fp {
+	struct fp_reg {
+		unsigned int sign1:1;
+		unsigned int unused:15;
+		unsigned int sign2:1;
+		unsigned int exponent:14;
+		unsigned int j:1;
+		unsigned int mantissa1:31;
+		unsigned int mantissa0:32;
+	} fpregs[8];
+	unsigned int fpsr:32;
+	unsigned int fpcr:32;
+	unsigned char ftype[8];
+	unsigned int init_flag;
+};
+
+typedef struct user_fp elf_fpregset_t;
+
+struct elf32_hdr;
+#define elf_check_arch(x)		((x)->e_machine == EM_NDS32)
+
+/*
+ * These are used to set parameters in the core dumps.
+ */
+#define ELF_CLASS	ELFCLASS32
+#ifdef __NDS32_EB__
+#define ELF_DATA	ELFDATA2MSB;
+#else
+#define ELF_DATA	ELFDATA2LSB;
+#endif
+#define ELF_ARCH	EM_NDS32
+#define USE_ELF_CORE_DUMP
+#define ELF_EXEC_PAGESIZE	PAGE_SIZE
+
+/* This is the location that an ET_DYN program is loaded if exec'ed.  Typical
+   use of this is to invoke "./ld.so someprog" to test out a new version of
+   the loader.  We need to make sure that it is out of the way of the program
+   that it will "exec", and that there is sufficient room for the brk.  */
+
+#define ELF_ET_DYN_BASE	(2 * TASK_SIZE / 3)
+
+/* When the program starts, a1 contains a pointer to a function to be
+   registered with atexit, as per the SVR4 ABI.  A value of 0 means we
+   have no such handler.  */
+#define ELF_PLAT_INIT(_r, load_addr)	(_r)->uregs[0] = 0
+
+/* This yields a mask that user programs can use to figure out what
+   instruction set this cpu supports. */
+
+#define ELF_HWCAP	(elf_hwcap)
+
+#ifdef __KERNEL__
+
+#define ELF_PLATFORM    (NULL)
+
+/* Old NetWinder binaries were compiled in such a way that the iBCS
+   heuristic always trips on them.  Until these binaries become uncommon
+   enough not to care, don't trust the `ibcs' flag here.  In any case
+   there is no other ELF system currently supported by iBCS.
+   @@ Could print a warning message to encourage users to upgrade.  */
+#define SET_PERSONALITY(ex)	set_personality(PER_LINUX)
+
+#endif
+
+#define ARCH_DLINFO						\
+do {								\
+	NEW_AUX_ENT(AT_SYSINFO_EHDR,				\
+		    (elf_addr_t)current->mm->context.vdso);	\
+} while (0)
+#define ARCH_HAS_SETUP_ADDITIONAL_PAGES 1
+struct linux_binprm;
+int arch_setup_additional_pages(struct linux_binprm *, int);
+
+#endif
arch/nds32/include/uapi/asm/auxvec.h new file +25 -0
new file mode 100644
index 0000000..02e9757
@@ -0,0 +1,25 @@
+/*
+ * Copyright (C) 2005-2017 Andes Technology Corporation
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program.  If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#ifndef __ASM_AUXVEC_H
+#define __ASM_AUXVEC_H
+
+/* VDSO location */
+#define AT_SYSINFO_EHDR	33
+
+#define AT_VECTOR_SIZE_ARCH 1
+
+#endif
arch/nds32/include/uapi/asm/param.h new file +24 -0
new file mode 100644
index 0000000..2e4527f3
@@ -0,0 +1,24 @@
+/*
+ * Copyright (C) 2005-2017 Andes Technology Corporation
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program.  If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#ifndef __ASM_NDS32_PARAM_H
+#define __ASM_NDS32_PARAM_H
+
+#define EXEC_PAGESIZE	8192
+
+#include <asm-generic/param.h>
+
+#endif /* __ASM_NDS32_PARAM_H */
Signature · 1 line
1.7.9.5
#31 lore raw

PATCH v3 16/33 nds32: System calls handling

In reply to Greentime Hu

From: Greentime Hu <[email protected]>

This patch adds support for system calls.

---
 arch/nds32/include/asm/syscall.h     |  203 ++++++++++++++++++++++++++++++++++
 arch/nds32/include/asm/syscalls.h    |   26 +++++
 arch/nds32/include/asm/unistd.h      |   19 ++++
 arch/nds32/include/uapi/asm/unistd.h |   25 +++++
 arch/nds32/kernel/ex-scall.S         |  119 ++++++++++++++++++++
 arch/nds32/kernel/sys_nds32.c        |   74 +++++++++++++
 arch/nds32/kernel/syscall_table.c    |   30 +++++
 7 files changed, 496 insertions(+)
 create mode 100644 arch/nds32/include/asm/syscall.h
 create mode 100644 arch/nds32/include/asm/syscalls.h
 create mode 100644 arch/nds32/include/asm/unistd.h
 create mode 100644 arch/nds32/include/uapi/asm/unistd.h
 create mode 100644 arch/nds32/kernel/ex-scall.S
 create mode 100644 arch/nds32/kernel/sys_nds32.c
 create mode 100644 arch/nds32/kernel/syscall_table.c
arch/nds32/include/asm/syscall.h new file +203 -0
new file mode 100644
index 0000000..3066bae
@@ -0,0 +1,203 @@
+/*
+ * Access to user system call parameters and results
+ *
+ * Copyright (C) 2008-2009 Red Hat, Inc.  All rights reserved.
+ * Copyright (C) 2005-2017 Andes Technology Corporation
+ *
+ * This copyrighted material is made available to anyone wishing to use,
+ * modify, copy, or redistribute it subject to the terms and conditions
+ * of the GNU General Public License v.2.
+ *
+ * This file is a stub providing documentation for what functions
+ * asm-ARCH/syscall.h files need to define.  Most arch definitions
+ * will be simple inlines.
+ *
+ * All of these functions expect to be called with no locks,
+ * and only when the caller is sure that the task of interest
+ * cannot return to user mode while we are looking at it.
+ */
+
+#ifndef _ASM_NDS32_SYSCALL_H
+#define _ASM_NDS32_SYSCALL_H	1
+
+#include <linux/err.h>
+struct task_struct;
+struct pt_regs;
+
+/**
+ * syscall_get_nr - find what system call a task is executing
+ * @task:	task of interest, must be blocked
+ * @regs:	task_pt_regs() of @task
+ *
+ * If @task is executing a system call or is at system call
+ * tracing about to attempt one, returns the system call number.
+ * If @task is not executing a system call, i.e. it's blocked
+ * inside the kernel for a fault or signal, returns -1.
+ *
+ * Note this returns int even on 64-bit machines.  Only 32 bits of
+ * system call number can be meaningful.  If the actual arch value
+ * is 64 bits, this truncates to 32 bits so 0xffffffff means -1.
+ *
+ * It's only valid to call this when @task is known to be blocked.
+ */
+int syscall_get_nr(struct task_struct *task, struct pt_regs *regs)
+{
+	return regs->syscallno;
+}
+
+/**
+ * syscall_rollback - roll back registers after an aborted system call
+ * @task:	task of interest, must be in system call exit tracing
+ * @regs:	task_pt_regs() of @task
+ *
+ * It's only valid to call this when @task is stopped for system
+ * call exit tracing (due to TIF_SYSCALL_TRACE or TIF_SYSCALL_AUDIT),
+ * after tracehook_report_syscall_entry() returned nonzero to prevent
+ * the system call from taking place.
+ *
+ * This rolls back the register state in @regs so it's as if the
+ * system call instruction was a no-op.  The registers containing
+ * the system call number and arguments are as they were before the
+ * system call instruction.  This may not be the same as what the
+ * register state looked like at system call entry tracing.
+ */
+void syscall_rollback(struct task_struct *task, struct pt_regs *regs)
+{
+	regs->uregs[0] = regs->orig_r0;
+}
+
+/**
+ * syscall_get_error - check result of traced system call
+ * @task:	task of interest, must be blocked
+ * @regs:	task_pt_regs() of @task
+ *
+ * Returns 0 if the system call succeeded, or -ERRORCODE if it failed.
+ *
+ * It's only valid to call this when @task is stopped for tracing on exit
+ * from a system call, due to %TIF_SYSCALL_TRACE or %TIF_SYSCALL_AUDIT.
+ */
+long syscall_get_error(struct task_struct *task, struct pt_regs *regs)
+{
+	unsigned long error = regs->uregs[0];
+	return IS_ERR_VALUE(error) ? error : 0;
+}
+
+/**
+ * syscall_get_return_value - get the return value of a traced system call
+ * @task:	task of interest, must be blocked
+ * @regs:	task_pt_regs() of @task
+ *
+ * Returns the return value of the successful system call.
+ * This value is meaningless if syscall_get_error() returned nonzero.
+ *
+ * It's only valid to call this when @task is stopped for tracing on exit
+ * from a system call, due to %TIF_SYSCALL_TRACE or %TIF_SYSCALL_AUDIT.
+ */
+long syscall_get_return_value(struct task_struct *task, struct pt_regs *regs)
+{
+	return regs->uregs[0];
+}
+
+/**
+ * syscall_set_return_value - change the return value of a traced system call
+ * @task:	task of interest, must be blocked
+ * @regs:	task_pt_regs() of @task
+ * @error:	negative error code, or zero to indicate success
+ * @val:	user return value if @error is zero
+ *
+ * This changes the results of the system call that user mode will see.
+ * If @error is zero, the user sees a successful system call with a
+ * return value of @val.  If @error is nonzero, it's a negated errno
+ * code; the user sees a failed system call with this errno code.
+ *
+ * It's only valid to call this when @task is stopped for tracing on exit
+ * from a system call, due to %TIF_SYSCALL_TRACE or %TIF_SYSCALL_AUDIT.
+ */
+void syscall_set_return_value(struct task_struct *task, struct pt_regs *regs,
+			      int error, long val)
+{
+	regs->uregs[0] = (long)error ? error : val;
+}
+
+/**
+ * syscall_get_arguments - extract system call parameter values
+ * @task:	task of interest, must be blocked
+ * @regs:	task_pt_regs() of @task
+ * @i:		argument index [0,5]
+ * @n:		number of arguments; n+i must be [1,6].
+ * @args:	array filled with argument values
+ *
+ * Fetches @n arguments to the system call starting with the @i'th argument
+ * (from 0 through 5).  Argument @i is stored in @args[0], and so on.
+ * An arch inline version is probably optimal when @i and @n are constants.
+ *
+ * It's only valid to call this when @task is stopped for tracing on
+ * entry to a system call, due to %TIF_SYSCALL_TRACE or %TIF_SYSCALL_AUDIT.
+ * It's invalid to call this with @i + @n > 6; we only support system calls
+ * taking up to 6 arguments.
+ */
+#define SYSCALL_MAX_ARGS 6
+void syscall_get_arguments(struct task_struct *task, struct pt_regs *regs,
+			   unsigned int i, unsigned int n, unsigned long *args)
+{
+	if (n == 0)
+		return;
+	if (i + n > SYSCALL_MAX_ARGS) {
+		unsigned long *args_bad = args + SYSCALL_MAX_ARGS - i;
+		unsigned int n_bad = n + i - SYSCALL_MAX_ARGS;
+		pr_warning("%s called with max args %d, handling only %d\n",
+			   __func__, i + n, SYSCALL_MAX_ARGS);
+		memset(args_bad, 0, n_bad * sizeof(args[0]));
+		memset(args_bad, 0, n_bad * sizeof(args[0]));
+	}
+
+	if (i == 0) {
+		args[0] = regs->orig_r0;
+		args++;
+		i++;
+		n--;
+	}
+
+	memcpy(args, &regs->uregs[0] + i, n * sizeof(args[0]));
+}
+
+/**
+ * syscall_set_arguments - change system call parameter value
+ * @task:	task of interest, must be in system call entry tracing
+ * @regs:	task_pt_regs() of @task
+ * @i:		argument index [0,5]
+ * @n:		number of arguments; n+i must be [1,6].
+ * @args:	array of argument values to store
+ *
+ * Changes @n arguments to the system call starting with the @i'th argument.
+ * Argument @i gets value @args[0], and so on.
+ * An arch inline version is probably optimal when @i and @n are constants.
+ *
+ * It's only valid to call this when @task is stopped for tracing on
+ * entry to a system call, due to %TIF_SYSCALL_TRACE or %TIF_SYSCALL_AUDIT.
+ * It's invalid to call this with @i + @n > 6; we only support system calls
+ * taking up to 6 arguments.
+ */
+void syscall_set_arguments(struct task_struct *task, struct pt_regs *regs,
+			   unsigned int i, unsigned int n,
+			   const unsigned long *args)
+{
+	if (n == 0)
+		return;
+
+	if (i + n > SYSCALL_MAX_ARGS) {
+		pr_warn("%s called with max args %d, handling only %d\n",
+			__func__, i + n, SYSCALL_MAX_ARGS);
+		n = SYSCALL_MAX_ARGS - i;
+	}
+
+	if (i == 0) {
+		regs->orig_r0 = args[0];
+		args++;
+		i++;
+		n--;
+	}
+
+	memcpy(&regs->uregs[0] + i, args, n * sizeof(args[0]));
+}
+#endif /* _ASM_NDS32_SYSCALL_H */
arch/nds32/include/asm/syscalls.h new file +26 -0
new file mode 100644
index 0000000..bb0578a
@@ -0,0 +1,26 @@
+/*
+ * Copyright (C) 2005-2017 Andes Technology Corporation
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program.  If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#ifndef __ASM_NDS32_SYSCALLS_H
+#define __ASM_NDS32_SYSCALLS_H
+
+asmlinkage long sys_cacheflush(unsigned long addr, unsigned long len, unsigned int op);
+asmlinkage long sys_fadvise64_64_wrapper(int fd, int advice, loff_t offset, loff_t len);
+asmlinkage long sys_rt_sigreturn_wrapper(void);
+
+#include <asm-generic/syscalls.h>
+
+#endif /* __ASM_NDS32_SYSCALLS_H */
arch/nds32/include/asm/unistd.h new file +19 -0
new file mode 100644
index 0000000..a66b8bb
@@ -0,0 +1,19 @@
+/*
+ * Copyright (C) 2005-2017 Andes Technology Corporation
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program.  If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#define __ARCH_WANT_SYS_CLONE
+
+#include <uapi/asm/unistd.h>
arch/nds32/include/uapi/asm/unistd.h new file +25 -0
new file mode 100644
index 0000000..325ca3b
@@ -0,0 +1,25 @@
+/*
+ * Copyright (C) 2005-2017 Andes Technology Corporation
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program.  If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#define __ARCH_WANT_SYNC_FILE_RANGE2
+
+/* Use the standard ABI for syscalls */
+#include <asm-generic/unistd.h>
+
+/* Additional NDS32 specific syscalls. */
+#define __NR_cacheflush		(__NR_arch_specific_syscall)
+#define __NR__llseek             __NR_llseek
+__SYSCALL(__NR_cacheflush, sys_cacheflush)
arch/nds32/kernel/ex-scall.S new file +119 -0

119 lines not on this page · raw message

arch/nds32/kernel/sys_nds32.c new file +74 -0

74 lines not on this page · raw message

arch/nds32/kernel/syscall_table.c new file +30 -0
new file mode 100644
index 0000000..c1edc85
@@ -0,0 +1,30 @@
+/*
+ * Copyright (C) 2005-2017 Andes Technology Corporation
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program.  If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#include <linux/syscalls.h>
+#include <linux/signal.h>
+#include <linux/unistd.h>
+#include <asm/syscalls.h>
+
+#undef __SYSCALL
+#define __SYSCALL(nr, call) [nr] = (call),
+
+#define sys_rt_sigreturn sys_rt_sigreturn_wrapper
+#define sys_fadvise64_64 sys_fadvise64_64_wrapper
+void *sys_call_table[__NR_syscalls] __aligned(8192) = {
+	[0 ... __NR_syscalls - 1] = sys_ni_syscall,
+#include <asm/unistd.h>
+};
Signature · 1 line
1.7.9.5
#32 lore raw

PATCH v3 17/33 nds32: VDSO support

In reply to Greentime Hu

From: Greentime Hu <[email protected]>

This patch adds VDSO support. The VDSO code is currently used for sys_rt_sigreturn() and optimised gettimeofday() (using the SoC timer counter).

---
 arch/nds32/include/asm/vdso.h              |   35 ++++
 arch/nds32/include/asm/vdso_datapage.h     |   51 ++++++
 arch/nds32/kernel/vdso.c                   |  245 +++++++++++++++++++++++++
 arch/nds32/kernel/vdso/Makefile            |   82 +++++++++
 arch/nds32/kernel/vdso/datapage.S          |   34 ++++
 arch/nds32/kernel/vdso/gen_vdso_offsets.sh |   15 ++
 arch/nds32/kernel/vdso/gettimeofday.c      |  266 ++++++++++++++++++++++++++++
 arch/nds32/kernel/vdso/note.S              |   29 +++
 arch/nds32/kernel/vdso/sigreturn.S         |   36 ++++
 arch/nds32/kernel/vdso/vdso.S              |   33 ++++
 arch/nds32/kernel/vdso/vdso.lds.S          |   87 +++++++++
 11 files changed, 913 insertions(+)
 create mode 100644 arch/nds32/include/asm/vdso.h
 create mode 100644 arch/nds32/include/asm/vdso_datapage.h
 create mode 100644 arch/nds32/kernel/vdso.c
 create mode 100644 arch/nds32/kernel/vdso/Makefile
 create mode 100644 arch/nds32/kernel/vdso/datapage.S
 create mode 100755 arch/nds32/kernel/vdso/gen_vdso_offsets.sh
 create mode 100644 arch/nds32/kernel/vdso/gettimeofday.c
 create mode 100644 arch/nds32/kernel/vdso/note.S
 create mode 100644 arch/nds32/kernel/vdso/sigreturn.S
 create mode 100644 arch/nds32/kernel/vdso/vdso.S
 create mode 100644 arch/nds32/kernel/vdso/vdso.lds.S
arch/nds32/include/asm/vdso.h new file +35 -0
new file mode 100644
index 0000000..7298c49
@@ -0,0 +1,35 @@
+/*
+ * Copyright (C) 2005-2017 Andes Technology Corporation
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program.  If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#ifndef __ASM_VDSO_H
+#define __ASM_VDSO_H
+
+#ifdef __KERNEL__
+
+#ifndef __ASSEMBLY__
+
+#include <generated/vdso-offsets.h>
+
+#define VDSO_SYMBOL(base, name)						   \
+({									   \
+	(unsigned long)(vdso_offset_##name + (unsigned long)(base)); \
+})
+
+#endif /* !__ASSEMBLY__ */
+
+#endif /* __KERNEL__ */
+
+#endif /* __ASM_VDSO_H */
arch/nds32/include/asm/vdso_datapage.h new file +51 -0

51 lines not on this page · raw message

arch/nds32/kernel/vdso.c new file +245 -0

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arch/nds32/kernel/vdso/Makefile new file +82 -0

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arch/nds32/kernel/vdso/datapage.S new file +34 -0
new file mode 100644
index 0000000..d86af66
@@ -0,0 +1,34 @@
+/*
+ * Copyright (C) 2005-2017 Andes Technology Corporation
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program.  If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#include <linux/linkage.h>
+#include <asm/page.h>
+
+ENTRY(__get_timerpage)
+	sethi	$r0, hi20(. + PAGE_SIZE + 8)
+	ori	$r0, $r0, lo12(. + PAGE_SIZE + 4)
+	mfusr	$r1, $pc
+	sub	$r0, $r1, $r0
+	ret
+ENDPROC(__get_timerpage)
+
+ENTRY(__get_datapage)
+	sethi	$r0, hi20(. + 2*PAGE_SIZE + 8)
+	ori	$r0, $r0, lo12(. + 2*PAGE_SIZE + 4)
+	mfusr	$r1, $pc
+	sub	$r0, $r1, $r0
+	ret
+ENDPROC(__get_datapage)
arch/nds32/kernel/vdso/gen_vdso_offsets.sh new file +15 -0
new file mode 100755
index 0000000..01924ff
@@ -0,0 +1,15 @@
+#!/bin/sh
+
+#
+# Match symbols in the DSO that look like VDSO_*; produce a header file
+# of constant offsets into the shared object.
+#
+# Doing this inside the Makefile will break the $(filter-out) function,
+# causing Kbuild to rebuild the vdso-offsets header file every time.
+#
+# Author: Will Deacon <[email protected]
+#
+
+LC_ALL=C
+sed -n -e 's/^00*/0/' -e \
+'s/^\([0-9a-fA-F]*\) . VDSO_\([a-zA-Z0-9_]*\)$/\#define vdso_offset_\2\t0x\1/p'
arch/nds32/kernel/vdso/gettimeofday.c new file +266 -0

266 lines not on this page · raw message

arch/nds32/kernel/vdso/note.S new file +29 -0
new file mode 100644
index 0000000..59c6397
@@ -0,0 +1,29 @@
+/*
+ * Copyright (C) 2012 ARM Limited
+ * Copyright (C) 2005-2017 Andes Technology Corporation
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program.  If not, see <http://www.gnu.org/licenses/>.
+ *
+ * Author: Will Deacon <[email protected]>
+ *
+ * This supplies .note.* sections to go into the PT_NOTE inside the vDSO text.
+ * Here we can supply some information useful to userland.
+ */
+
+#include <linux/uts.h>
+#include <linux/version.h>
+#include <linux/elfnote.h>
+
+ELFNOTE_START(Linux, 0, "a")
+	.long LINUX_VERSION_CODE
+ELFNOTE_END
arch/nds32/kernel/vdso/sigreturn.S new file +36 -0
new file mode 100644
index 0000000..8b4bd4e
@@ -0,0 +1,36 @@
+/*
+ * Sigreturn trampoline for returning from a signal
+ *
+ * Copyright (C) 2012 ARM Limited
+ * Copyright (C) 2005-2017 Andes Technology Corporation
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program.  If not, see <http://www.gnu.org/licenses/>.
+ *
+ * Author: Will Deacon <[email protected]>
+ */
+
+#include <linux/linkage.h>
+#include <asm/unistd.h>
+
+	.text
+
+ENTRY(__kernel_rt_sigreturn)
+	.cfi_startproc
+	movi $r15, __NR_rt_sigreturn
+	/*
+	 * The SWID of syscall should be __NR_rt_sigreturn to synchronize
+	 * the unwinding scheme in gcc
+	 */
+	syscall	__NR_rt_sigreturn
+	.cfi_endproc
+ENDPROC(__kernel_rt_sigreturn)
arch/nds32/kernel/vdso/vdso.S new file +33 -0
new file mode 100644
index 0000000..4444082
@@ -0,0 +1,33 @@
+/*
+ * Copyright (C) 2012 ARM Limited
+ * Copyright (C) 2005-2017 Andes Technology Corporation
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program.  If not, see <http://www.gnu.org/licenses/>.
+ *
+ * Author: Will Deacon <[email protected]>
+ */
+
+#include <linux/init.h>
+#include <linux/linkage.h>
+#include <linux/const.h>
+#include <asm/page.h>
+
+	.globl vdso_start, vdso_end
+	.section .rodata
+	.balign PAGE_SIZE
+vdso_start:
+	.incbin "arch/nds32/kernel/vdso/vdso.so"
+	.balign PAGE_SIZE
+vdso_end:
+
+	.previous
arch/nds32/kernel/vdso/vdso.lds.S new file +87 -0

87 lines not on this page · raw message

Signature · 1 line
1.7.9.5
#33 lore raw

Re: [PATCH v3 17/33] nds32: VDSO support

Quoted 4 lines · Greentime Hu

From: Greentime Hu <[email protected]>

This patch adds VDSO support. The VDSO code is currently used for sys_rt_sigreturn() and optimised gettimeofday() (using the SoC timer counter).

[...]

arch/nds32/kernel/vdso.c line 72

Quoted 5 lines
arch/nds32/kernel/vdso.c new file +5 -0
+static int grab_timer_node_info(void)
+{
+	struct device_node *timer_node;
+
+	timer_node = of_find_node_by_name(NULL, "timer");

Please use a compatible string, rather than matching the timer by name.

It's plausible that you have multiple nodes called "timer" in the DT, under different parent nodes, and this might not be the device you think it is. I see your dt in patch 24 has two timer nodes.

It would be best if your clocksource driver exposed some stuct that you looked at here, so that you're guaranteed to user the same device.

arch/nds32/kernel/vdso.c line 76

Quoted 4 lines
arch/nds32/kernel/vdso.c new file +4 -0
+	of_property_read_u32(timer_node, "cycle-count-offset",
+			     &vdso_data->cycle_count_offset);
+	vdso_data->cycle_count_down =
+	    of_property_read_bool(timer_node, "cycle-count-down");

... and then you'd only need to parse these in one place, too.

IIUC these are proeprties for the atcpit device, which has no documentation or driver in this series.

So I'm rather confused as to what's going on here.

Quoted 4 lines
arch/nds32/kernel/vdso.c new file +3 -0
+	return of_address_to_resource(timer_node, 0, &timer_res);
+}
 
+int arch_setup_additional_pages(struct linux_binprm *bprm, int uses_interp)

arch/nds32/kernel/vdso.c line 189

Quoted 10 lines
arch/nds32/kernel/vdso.c new file +9 -0
+{
 
+	/*Map timer to user space */
+	vdso_base += PAGE_SIZE;
+	prot = __pgprot(_PAGE_V | _PAGE_M_UR_KR | _PAGE_D |
+			_PAGE_G | _PAGE_C_DEV);
+	ret = io_remap_pfn_range(vma, vdso_base, timer_res.start >> PAGE_SHIFT,
+				 PAGE_SIZE, prot);
+	if (ret)
+		goto up_fail;

Maybe this is fine, but it looks a bit suspicious.

Is it safe to map IO memory to a userspace process like this?

In general that isn't safe, since userspace could access other registers (if those exist), perform accesses that change the state of hardware, or make unsupported access types (e.g. unaligned, atomic) that result in errors the kernel can't handle.

Does none of that apply here?

Thanks,
Mark.

#34 lore raw

Re: [PATCH v3 17/33] nds32: VDSO support

Hi, Mark:

2017-12-08 18:21 GMT+08:00 Mark Rutland <[email protected]>:

Quoted 16 lines · Greentime Hu
Quoted 4 lines

From: Greentime Hu <[email protected]>

This patch adds VDSO support. The VDSO code is currently used for sys_rt_sigreturn() and optimised gettimeofday() (using the SoC timer counter).

[...]

arch/nds32/kernel/vdso.c line 72

Quoted 5 lines
arch/nds32/kernel/vdso.c new file +5 -0
+static int grab_timer_node_info(void)
+{
+     struct device_node *timer_node;
+
+     timer_node = of_find_node_by_name(NULL, "timer");

Please use a compatible string, rather than matching the timer by name.

Quoted 6 lines

It's plausible that you have multiple nodes called "timer" in the DT, under different parent nodes, and this might not be the device you think it is. I see your dt in patch 24 has two timer nodes.

It would be best if your clocksource driver exposed some stuct that you looked at here, so that you're guaranteed to user the same device.

We'd like to use "timer" here because there are 2 different timer IPs and we are sure that they won't be in the same SoC.
We think this implementation in VDSO should be platform independent to get cycle-count register.
Our customer or other SoC provider who can use "timer" and define cycle-count-offset or cycle-count-down then we can get the correct cycle-count.

We sent atcpit100 patch last time along with our arch, however we'd like to send it to its sub system this time and my colleague is still working on it.
He may send the timer patch next week.

Quoted 5 lines

arch/nds32/kernel/vdso.c line 76

Quoted 4 lines
arch/nds32/kernel/vdso.c new file +4 -0
+     of_property_read_u32(timer_node, "cycle-count-offset",
+                          &vdso_data->cycle_count_offset);
+     vdso_data->cycle_count_down =
+         of_property_read_bool(timer_node, "cycle-count-down");
Quoted 7 lines

... and then you'd only need to parse these in one place, too.

IIUC these are proeprties for the atcpit device, which has no documentation or driver in this series.

So I'm rather confused as to what's going on here.

These properties are defined in dts which can provide the cycle count register offset address of that timer, so that we can get cycle-count.

Quoted 17 lines
Quoted 4 lines
arch/nds32/kernel/vdso.c new file +3 -0
+     return of_address_to_resource(timer_node, 0, &timer_res);
+}
 
+int arch_setup_additional_pages(struct linux_binprm *bprm, int uses_interp)

arch/nds32/kernel/vdso.c line 189

Quoted 10 lines
arch/nds32/kernel/vdso.c new file +9 -0
+{
 
+     /*Map timer to user space */
+     vdso_base += PAGE_SIZE;
+     prot = __pgprot(_PAGE_V | _PAGE_M_UR_KR | _PAGE_D |
+                     _PAGE_G | _PAGE_C_DEV);
+     ret = io_remap_pfn_range(vma, vdso_base, timer_res.start >> PAGE_SHIFT,
+                              PAGE_SIZE, prot);
+     if (ret)
+             goto up_fail;

Maybe this is fine, but it looks a bit suspicious.

Quoted 8 lines

Is it safe to map IO memory to a userspace process like this?

In general that isn't safe, since userspace could access other registers (if those exist), perform accesses that change the state of hardware, or make unsupported access types (e.g. unaligned, atomic) that result in errors the kernel can't handle.

Does none of that apply here?

We only provide read permission to this page so hareware state won't be chagned. It will trigger exception if we try to write. We will check about the alignment/atomic issue of this region.

Thanks.

#35 lore raw

Re: [PATCH v3 17/33] nds32: VDSO support

Quoted 17 lines · Greentime Hu

2017-12-08 18:21 GMT+08:00 Mark Rutland <[email protected]>:

Quoted 9 lines · Greentime Hu

arch/nds32/kernel/vdso.c line 72

Quoted 5 lines
arch/nds32/kernel/vdso.c new file +5 -0
+static int grab_timer_node_info(void)
+{
+     struct device_node *timer_node;
+
+     timer_node = of_find_node_by_name(NULL, "timer");

Please use a compatible string, rather than matching the timer by name.

Quoted 6 lines

It's plausible that you have multiple nodes called "timer" in the DT, under different parent nodes, and this might not be the device you think it is. I see your dt in patch 24 has two timer nodes.

It would be best if your clocksource driver exposed some stuct that you looked at here, so that you're guaranteed to user the same device.

Quoted 7 lines

We'd like to use "timer" here because there are 2 different timer IPs and we are sure that they won't be in the same SoC.
We think this implementation in VDSO should be platform independent to get cycle-count register.
Our customer or other SoC provider who can use "timer" and define cycle-count-offset or cycle-count-down then we can get the correct cycle-count.

This is not the right way to do things.

So from a DT perspective, NAK.

You should not add properties to arbitrary DT bindings to handle a Linux implementation detail.

Please remove this DT code, and have the drivers for those timer blocks export this information to your vdso code somehow.

Quoted 4 lines

We sent atcpit100 patch last time along with our arch, however we'd like to send it to its sub system this time and my colleague is still working on it.
He may send the timer patch next week.

I think that it would make sense for that patch to be part of the arch port, especially given that (AFAICT) there is no dirver for the other timer IP that you mention.

[...]

Quoted 21 lines
Quoted 21 lines

arch/nds32/kernel/vdso.c line 189

Quoted 11 lines
arch/nds32/kernel/vdso.c new file +10 -0
+int arch_setup_additional_pages(struct linux_binprm *bprm, int uses_interp)
+{
 
+     /*Map timer to user space */
+     vdso_base += PAGE_SIZE;
+     prot = __pgprot(_PAGE_V | _PAGE_M_UR_KR | _PAGE_D |
+                     _PAGE_G | _PAGE_C_DEV);
+     ret = io_remap_pfn_range(vma, vdso_base, timer_res.start >> PAGE_SHIFT,
+                              PAGE_SIZE, prot);
+     if (ret)
+             goto up_fail;

Maybe this is fine, but it looks a bit suspicious.

Is it safe to map IO memory to a userspace process like this?

In general that isn't safe, since userspace could access other registers (if those exist), perform accesses that change the state of hardware, or make unsupported access types (e.g. unaligned, atomic) that result in errors the kernel can't handle.

Quoted 5 lines
Quoted 1 line

Does none of that apply here?

We only provide read permission to this page so hareware state won't be chagned. It will trigger exception if we try to write. We will check about the alignment/atomic issue of this region.

Ok, thanks.

This is another reason to only do this for devices/drivers that we have drivers for, since we can't know that this is safe in general.

Thanks,
Mark.

#36 lore raw

Re: [PATCH v3 17/33] nds32: VDSO support

2017-12-08 20:14 GMT+08:00 Mark Rutland <[email protected]>:

Quoted 28 lines · Greentime Hu
Quoted 17 lines

2017-12-08 18:21 GMT+08:00 Mark Rutland <[email protected]>:

Quoted 9 lines · Greentime Hu

arch/nds32/kernel/vdso.c line 72

Quoted 5 lines
arch/nds32/kernel/vdso.c new file +5 -0
+static int grab_timer_node_info(void)
+{
+     struct device_node *timer_node;
+
+     timer_node = of_find_node_by_name(NULL, "timer");

Please use a compatible string, rather than matching the timer by name.

Quoted 6 lines

It's plausible that you have multiple nodes called "timer" in the DT, under different parent nodes, and this might not be the device you think it is. I see your dt in patch 24 has two timer nodes.

It would be best if your clocksource driver exposed some stuct that you looked at here, so that you're guaranteed to user the same device.

Quoted 7 lines

We'd like to use "timer" here because there are 2 different timer IPs and we are sure that they won't be in the same SoC.
We think this implementation in VDSO should be platform independent to get cycle-count register.
Our customer or other SoC provider who can use "timer" and define cycle-count-offset or cycle-count-down then we can get the correct cycle-count.

This is not the right way to do things.

Quoted 8 lines

So from a DT perspective, NAK.

You should not add properties to arbitrary DT bindings to handle a Linux implementation detail.

Please remove this DT code, and have the drivers for those timer blocks export this information to your vdso code somehow.

Hi, Mark:
Based on your suggestion, we define a new sturct timer_info to let timer driver record the value
of cycle-count-offset and cycle-count-down in timer_init function. The above code in timer driver
is validate only when CONFIG_NDS32 is defined.

Quoted 5 lines
Quoted 4 lines

We sent atcpit100 patch last time along with our arch, however we'd like to send it to its sub system this time and my colleague is still working on it.
He may send the timer patch next week.

Quoted 33 lines

I think that it would make sense for that patch to be part of the arch port, especially given that (AFAICT) there is no dirver for the other timer IP that you mention.

[...]

Quoted 26 lines
Quoted 14 lines

arch/nds32/kernel/vdso.c line 189

Quoted 11 lines
arch/nds32/kernel/vdso.c new file +10 -0
+int arch_setup_additional_pages(struct linux_binprm *bprm, int uses_interp)
+{
 
+     /*Map timer to user space */
+     vdso_base += PAGE_SIZE;
+     prot = __pgprot(_PAGE_V | _PAGE_M_UR_KR | _PAGE_D |
+                     _PAGE_G | _PAGE_C_DEV);
+     ret = io_remap_pfn_range(vma, vdso_base, timer_res.start >> PAGE_SHIFT,
+                              PAGE_SIZE, prot);
+     if (ret)
+             goto up_fail;

Maybe this is fine, but it looks a bit suspicious.

Quoted 8 lines

Is it safe to map IO memory to a userspace process like this?

In general that isn't safe, since userspace could access other registers (if those exist), perform accesses that change the state of hardware, or make unsupported access types (e.g. unaligned, atomic) that result in errors the kernel can't handle.

Does none of that apply here?

We only provide read permission to this page so hareware state won't be chagned. It will trigger exception if we try to write. We will check about the alignment/atomic issue of this region.

For alignment issue, we intentionally make an un-alignment read to access this region and we
got "Segmentation fault" as expected.

Thanks,
Vincent

Quoted 7 lines

Ok, thanks.

This is another reason to only do this for devices/drivers that we have drivers for, since we can't know that this is safe in general.

Thanks,
Mark.

#37 lore raw

Re: [PATCH v3 17/33] nds32: VDSO support

In reply to Greentime Hu
Quoted 80 lines · Greentime Hu

Hi, Mark:

2017-12-08 18:21 GMT+08:00 Mark Rutland <[email protected]>:

Quoted 16 lines · Greentime Hu
Quoted 4 lines

From: Greentime Hu <[email protected]>

This patch adds VDSO support. The VDSO code is currently used for sys_rt_sigreturn() and optimised gettimeofday() (using the SoC timer counter).

[...]

arch/nds32/kernel/vdso.c line 72

Quoted 5 lines
arch/nds32/kernel/vdso.c new file +5 -0
+static int grab_timer_node_info(void)
+{
+     struct device_node *timer_node;
+
+     timer_node = of_find_node_by_name(NULL, "timer");

Please use a compatible string, rather than matching the timer by name.

Quoted 6 lines

It's plausible that you have multiple nodes called "timer" in the DT, under different parent nodes, and this might not be the device you think it is. I see your dt in patch 24 has two timer nodes.

It would be best if your clocksource driver exposed some stuct that you looked at here, so that you're guaranteed to user the same device.

We'd like to use "timer" here because there are 2 different timer IPs and we are sure that they won't be in the same SoC.
We think this implementation in VDSO should be platform independent to get cycle-count register.
Our customer or other SoC provider who can use "timer" and define cycle-count-offset or cycle-count-down then we can get the correct cycle-count.

We sent atcpit100 patch last time along with our arch, however we'd like to send it to its sub system this time and my colleague is still working on it.
He may send the timer patch next week.

Quoted 5 lines

arch/nds32/kernel/vdso.c line 76

Quoted 4 lines
arch/nds32/kernel/vdso.c new file +4 -0
+     of_property_read_u32(timer_node, "cycle-count-offset",
+                          &vdso_data->cycle_count_offset);
+     vdso_data->cycle_count_down =
+         of_property_read_bool(timer_node, "cycle-count-down");
Quoted 7 lines

... and then you'd only need to parse these in one place, too.

IIUC these are proeprties for the atcpit device, which has no documentation or driver in this series.

So I'm rather confused as to what's going on here.

These properties are defined in dts which can provide the cycle count register offset address of that timer, so that we can get cycle-count.

Quoted 24 lines
Quoted 4 lines
arch/nds32/kernel/vdso.c new file +3 -0
+     return of_address_to_resource(timer_node, 0, &timer_res);
+}
 
+int arch_setup_additional_pages(struct linux_binprm *bprm, int uses_interp)

arch/nds32/kernel/vdso.c line 189

Quoted 10 lines
arch/nds32/kernel/vdso.c new file +9 -0
+{
 
+     /*Map timer to user space */
+     vdso_base += PAGE_SIZE;
+     prot = __pgprot(_PAGE_V | _PAGE_M_UR_KR | _PAGE_D |
+                     _PAGE_G | _PAGE_C_DEV);
+     ret = io_remap_pfn_range(vma, vdso_base, timer_res.start >> PAGE_SHIFT,
+                              PAGE_SIZE, prot);
+     if (ret)
+             goto up_fail;

Maybe this is fine, but it looks a bit suspicious.

Is it safe to map IO memory to a userspace process like this?

In general that isn't safe, since userspace could access other registers (if those exist), perform accesses that change the state of hardware, or make unsupported access types (e.g. unaligned, atomic) that result in errors the kernel can't handle.

Quoted 5 lines
Quoted 1 line

Does none of that apply here?

We only provide read permission to this page so hareware state won't be chagned. It will trigger exception if we try to write. We will check about the alignment/atomic issue of this region.

It still feels a bit odd. A hostile userspace could potentially find out about what the kernel is doing. For example, if the deadline of the next timer is accessible by reading that page, userspace could infer a lot of things that we'd normally want to keep hidden. Not knowing this HW, I cannot answer that question, but maybe you can.

Another question: MMIO accesses can be quite slow. How much do you gain by having a vdso compared to executing a system call?

Thanks,

	M.
Signature · 1 line
Jazz is not dead. It just smells funny...
#38 lore raw

Re: [PATCH v3 17/33] nds32: VDSO support

Hi, Marc:

2017-12-08 20:29 GMT+08:00 Marc Zyngier <[email protected]>:

Quoted 87 lines · Greentime Hu
Quoted 80 lines

Hi, Mark:

2017-12-08 18:21 GMT+08:00 Mark Rutland <[email protected]>:

Quoted 16 lines · Greentime Hu
Quoted 4 lines

From: Greentime Hu <greentime-MUIXKm3Oiri1Z/[email protected]>

This patch adds VDSO support. The VDSO code is currently used for sys_rt_sigreturn() and optimised gettimeofday() (using the SoC timer counter).

[...]

arch/nds32/kernel/vdso.c line 72

Quoted 5 lines
arch/nds32/kernel/vdso.c new file +5 -0
+static int grab_timer_node_info(void)
+{
+     struct device_node *timer_node;
+
+     timer_node = of_find_node_by_name(NULL, "timer");

Please use a compatible string, rather than matching the timer by name.

Quoted 6 lines

It's plausible that you have multiple nodes called "timer" in the DT, under different parent nodes, and this might not be the device you think it is. I see your dt in patch 24 has two timer nodes.

It would be best if your clocksource driver exposed some stuct that you looked at here, so that you're guaranteed to user the same device.

We'd like to use "timer" here because there are 2 different timer IPs and we are sure that they won't be in the same SoC.
We think this implementation in VDSO should be platform independent to get cycle-count register.
Our customer or other SoC provider who can use "timer" and define cycle-count-offset or cycle-count-down then we can get the correct cycle-count.

We sent atcpit100 patch last time along with our arch, however we'd like to send it to its sub system this time and my colleague is still working on it.
He may send the timer patch next week.

Quoted 5 lines

arch/nds32/kernel/vdso.c line 76

Quoted 4 lines
arch/nds32/kernel/vdso.c new file +4 -0
+     of_property_read_u32(timer_node, "cycle-count-offset",
+                          &vdso_data->cycle_count_offset);
+     vdso_data->cycle_count_down =
+         of_property_read_bool(timer_node, "cycle-count-down");
Quoted 7 lines

... and then you'd only need to parse these in one place, too.

IIUC these are proeprties for the atcpit device, which has no documentation or driver in this series.

So I'm rather confused as to what's going on here.

These properties are defined in dts which can provide the cycle count register offset address of that timer, so that we can get cycle-count.

Quoted 24 lines
Quoted 4 lines
arch/nds32/kernel/vdso.c new file +3 -0
+     return of_address_to_resource(timer_node, 0, &timer_res);
+}
 
+int arch_setup_additional_pages(struct linux_binprm *bprm, int uses_interp)

arch/nds32/kernel/vdso.c line 189

Quoted 10 lines
arch/nds32/kernel/vdso.c new file +9 -0
+{
 
+     /*Map timer to user space */
+     vdso_base += PAGE_SIZE;
+     prot = __pgprot(_PAGE_V | _PAGE_M_UR_KR | _PAGE_D |
+                     _PAGE_G | _PAGE_C_DEV);
+     ret = io_remap_pfn_range(vma, vdso_base, timer_res.start >> PAGE_SHIFT,
+                              PAGE_SIZE, prot);
+     if (ret)
+             goto up_fail;

Maybe this is fine, but it looks a bit suspicious.

Is it safe to map IO memory to a userspace process like this?

In general that isn't safe, since userspace could access other registers (if those exist), perform accesses that change the state of hardware, or make unsupported access types (e.g. unaligned, atomic) that result in errors the kernel can't handle.

Quoted 5 lines
Quoted 1 line

Does none of that apply here?

We only provide read permission to this page so hareware state won't be chagned. It will trigger exception if we try to write. We will check about the alignment/atomic issue of this region.

Quoted 9 lines

It still feels a bit odd. A hostile userspace could potentially find out about what the kernel is doing. For example, if the deadline of the next timer is accessible by reading that page, userspace could infer a lot of things that we'd normally want to keep hidden. Not knowing this HW, I cannot answer that question, but maybe you can.

Another question: MMIO accesses can be quite slow. How much do you gain by having a vdso compared to executing a system call?

I think the rest of the timer registers should be fine to be read. Anyway we will discuss about the security issue.

Based on our previous experiments.

Decrease 4,519,021 (47%) cycle count for executing gettimeofday()
with: without vDSO(using syscall) = 5,091,342 : 9,610,363

The cycle count was get by CPU performance monitor.

Thanks.
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#39 lore raw

PATCH v3 18/33 nds32: Signal handling support

In reply to Greentime Hu

From: Greentime Hu <[email protected]>

This patch adds support for signal handling.

---
 arch/nds32/include/uapi/asm/sigcontext.h |   73 +++++++
 arch/nds32/kernel/signal.c               |  350 ++++++++++++++++++++++++++++++
 2 files changed, 423 insertions(+)
 create mode 100644 arch/nds32/include/uapi/asm/sigcontext.h
 create mode 100644 arch/nds32/kernel/signal.c
arch/nds32/include/uapi/asm/sigcontext.h new file +73 -0
new file mode 100644
index 0000000..1c0dfcb
@@ -0,0 +1,73 @@
+/*
+ * Copyright (C) 2005-2017 Andes Technology Corporation
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program.  If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#ifndef _ASMNDS32_SIGCONTEXT_H
+#define _ASMNDS32_SIGCONTEXT_H
+
+/*
+ * Signal context structure - contains all info to do with the state
+ * before the signal handler was invoked.  Note: only add new entries
+ * to the end of the structure.
+ */
+
+struct zol_struct {
+	unsigned long nds32_lc;	/* $LC */
+	unsigned long nds32_le;	/* $LE */
+	unsigned long nds32_lb;	/* $LB */
+};
+
+struct sigcontext {
+	unsigned long trap_no;
+	unsigned long error_code;
+	unsigned long oldmask;
+	unsigned long nds32_r0;
+	unsigned long nds32_r1;
+	unsigned long nds32_r2;
+	unsigned long nds32_r3;
+	unsigned long nds32_r4;
+	unsigned long nds32_r5;
+	unsigned long nds32_r6;
+	unsigned long nds32_r7;
+	unsigned long nds32_r8;
+	unsigned long nds32_r9;
+	unsigned long nds32_r10;
+	unsigned long nds32_r11;
+	unsigned long nds32_r12;
+	unsigned long nds32_r13;
+	unsigned long nds32_r14;
+	unsigned long nds32_r15;
+	unsigned long nds32_r16;
+	unsigned long nds32_r17;
+	unsigned long nds32_r18;
+	unsigned long nds32_r19;
+	unsigned long nds32_r20;
+	unsigned long nds32_r21;
+	unsigned long nds32_r22;
+	unsigned long nds32_r23;
+	unsigned long nds32_r24;
+	unsigned long nds32_r25;
+	unsigned long nds32_fp;	/* $r28 */
+	unsigned long nds32_gp;	/* $r29 */
+	unsigned long nds32_lp;	/* $r30 */
+	unsigned long nds32_sp;	/* $r31 */
+	unsigned long nds32_ipc;
+	unsigned long fault_address;
+	unsigned long used_math_flag;
+	/* FPU Registers */
+	struct zol_struct zol;
+};
+
+#endif
arch/nds32/kernel/signal.c new file +350 -0

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Signature · 1 line
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#40 lore raw

PATCH v3 19/33 nds32: Library functions

In reply to Greentime Hu

From: Greentime Hu <greentime-MUIXKm3Oiri1Z/[email protected]>

This patch add support for various library functions.

---
 arch/nds32/include/asm/string.h  |   30 ++++
 arch/nds32/include/asm/swab.h    |   48 +++++++
 arch/nds32/include/asm/uaccess.h |  296 ++++++++++++++++++++++++++++++++++++++
 arch/nds32/kernel/nds32_ksyms.c  |   44 ++++++
 arch/nds32/lib/Makefile          |    3 +
 arch/nds32/lib/clear_user.S      |   55 +++++++
 arch/nds32/lib/copy_from_user.S  |   58 ++++++++
 arch/nds32/lib/copy_template.S   |   83 +++++++++++
 arch/nds32/lib/copy_to_user.S    |   58 ++++++++
 arch/nds32/lib/memcpy.S          |   43 ++++++
 arch/nds32/lib/memmove.S         |   83 +++++++++++
 arch/nds32/lib/memset.S          |   46 ++++++
 arch/nds32/lib/memzero.S         |   31 ++++
 13 files changed, 878 insertions(+)
 create mode 100644 arch/nds32/include/asm/string.h
 create mode 100644 arch/nds32/include/asm/swab.h
 create mode 100644 arch/nds32/include/asm/uaccess.h
 create mode 100644 arch/nds32/kernel/nds32_ksyms.c
 create mode 100644 arch/nds32/lib/Makefile
 create mode 100644 arch/nds32/lib/clear_user.S
 create mode 100644 arch/nds32/lib/copy_from_user.S
 create mode 100644 arch/nds32/lib/copy_template.S
 create mode 100644 arch/nds32/lib/copy_to_user.S
 create mode 100644 arch/nds32/lib/memcpy.S
 create mode 100644 arch/nds32/lib/memmove.S
 create mode 100644 arch/nds32/lib/memset.S
 create mode 100644 arch/nds32/lib/memzero.S
arch/nds32/include/asm/string.h new file +30 -0
new file mode 100644
index 0000000..cf4d4b8
@@ -0,0 +1,30 @@
+/*
+ * Copyright (C) 2005-2017 Andes Technology Corporation
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program.  If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#ifndef __ASM_NDS32_STRING_H
+#define __ASM_NDS32_STRING_H
+
+#define __HAVE_ARCH_MEMCPY
+extern void *memcpy(void *, const void *, __kernel_size_t);
+
+#define __HAVE_ARCH_MEMMOVE
+extern void *memmove(void *, const void *, __kernel_size_t);
+
+#define __HAVE_ARCH_MEMSET
+extern void *memset(void *, int, __kernel_size_t);
+
+extern void *memzero(void *ptr, __kernel_size_t n);
+#endif
arch/nds32/include/asm/swab.h new file +48 -0

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arch/nds32/include/asm/uaccess.h new file +296 -0

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arch/nds32/kernel/nds32_ksyms.c new file +44 -0

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arch/nds32/lib/Makefile new file +3 -0
new file mode 100644
index 0000000..0f98401
@@ -0,0 +1,3 @@
+lib-y		:= copy_page.o memcpy.o memmove.o   \
+		   memset.o memzero.o \
+		   copy_from_user.o copy_to_user.o clear_user.o
arch/nds32/lib/clear_user.S new file +55 -0

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arch/nds32/lib/copy_from_user.S new file +58 -0

58 lines not on this page · raw message

arch/nds32/lib/copy_template.S new file +83 -0

83 lines not on this page · raw message

arch/nds32/lib/copy_to_user.S new file +58 -0

58 lines not on this page · raw message

arch/nds32/lib/memcpy.S new file +43 -0

43 lines not on this page · raw message

arch/nds32/lib/memmove.S new file +83 -0

83 lines not on this page · raw message

arch/nds32/lib/memset.S new file +46 -0

46 lines not on this page · raw message

arch/nds32/lib/memzero.S new file +31 -0
new file mode 100644
index 0000000..00c9996
@@ -0,0 +1,31 @@
+/*
+ * Copyright (C) 2005-2017 Andes Technology Corporation
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program.  If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#include <linux/linkage.h>
+
+	.text
+ENTRY(memzero)
+	beqz	$r1, 1f
+	push	$lp
+        move    $r2, $r1
+        move    $r1, #0
+	push	$r0
+        bal     memset
+	pop	$r0
+	pop	$lp
+1:
+        ret
+ENDPROC(memzero)
Signature · 6 lines
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#41 lore raw

PATCH v3 20/33 nds32: Debugging support

In reply to Greentime Hu

From: Greentime Hu <[email protected]>

This patch adds ptrace support.

---
 arch/nds32/include/uapi/asm/ptrace.h |   38 ++++
 arch/nds32/kernel/ptrace.c           |  325 ++++++++++++++++++++++++++++++++++
 2 files changed, 363 insertions(+)
 create mode 100644 arch/nds32/include/uapi/asm/ptrace.h
 create mode 100644 arch/nds32/kernel/ptrace.c
arch/nds32/include/uapi/asm/ptrace.h new file +38 -0
new file mode 100644
index 0000000..76fe2ae
@@ -0,0 +1,38 @@
+/*
+ * Copyright (C) 2005-2017 Andes Technology Corporation
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program.  If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#ifndef __UAPI_ASM_NDS32_PTRACE_H
+#define __UAPI_ASM_NDS32_PTRACE_H
+
+#ifndef __ASSEMBLY__
+
+/*
+ * User structures for general purpose register.
+ */
+struct user_pt_regs {
+	long uregs[26];
+	long fp;
+	long gp;
+	long lp;
+	long sp;
+	long ipc;
+	long lb;
+	long le;
+	long lc;
+	long syscallno;
+};
+#endif
+#endif
arch/nds32/kernel/ptrace.c new file +325 -0

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Signature · 1 line
1.7.9.5
#42 lore raw

PATCH v3 21/33 nds32: L2 cache support

In reply to Greentime Hu

From: Greentime Hu <[email protected]>

This patch adds L2 cache support.

---
 arch/nds32/include/asm/l2_cache.h |  155 +++++++++++++++++++++++++++++++++++++
 arch/nds32/kernel/atl2c.c         |   77 ++++++++++++++++++
 2 files changed, 232 insertions(+)
 create mode 100644 arch/nds32/include/asm/l2_cache.h
 create mode 100644 arch/nds32/kernel/atl2c.c
arch/nds32/include/asm/l2_cache.h new file +155 -0
new file mode 100644
index 0000000..a12a3fe
@@ -0,0 +1,155 @@
+/*
+ * Copyright (C) 2005-2017 Andes Technology Corporation
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program.  If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#ifndef L2_CACHE_H
+#define L2_CACHE_H
+
+/* CCTL_CMD_OP */
+#define L2_CA_CONF_OFF		0x0
+#define L2_IF_CONF_OFF		0x4
+#define L2CC_SETUP_OFF		0x8
+#define L2CC_PROT_OFF		0xC
+#define L2CC_CTRL_OFF		0x10
+#define L2_INT_EN_OFF           0x20
+#define L2_STA_OFF              0x24
+#define RDERR_ADDR_OFF		0x28
+#define WRERR_ADDR_OFF		0x2c
+#define EVDPTERR_ADDR_OFF	0x30
+#define IMPL3ERR_ADDR_OFF	0x34
+#define L2_CNT0_CTRL_OFF        0x40
+#define L2_EVNT_CNT0_OFF        0x44
+#define L2_CNT1_CTRL_OFF        0x48
+#define L2_EVNT_CNT1_OFF        0x4c
+#define L2_CCTL_CMD_OFF		0x60
+#define L2_CCTL_STATUS_OFF	0x64
+#define L2_LINE_TAG_OFF		0x68
+#define L2_LINE_DPT_OFF		0x70
+
+#define CCTL_CMD_L2_IX_INVAL    0x0
+#define CCTL_CMD_L2_PA_INVAL    0x1
+#define CCTL_CMD_L2_IX_WB       0x2
+#define CCTL_CMD_L2_PA_WB       0x3
+#define CCTL_CMD_L2_PA_WBINVAL  0x5
+#define CCTL_CMD_L2_SYNC        0xa
+
+/* CCTL_CMD_TYPE */
+#define CCTL_SINGLE_CMD         0
+#define CCTL_BLOCK_CMD          0x10
+#define CCTL_ALL_CMD		0x10
+
+/******************************************************************************
+ * L2_CA_CONF (Cache architecture configuration)
+ *****************************************************************************/
+#define L2_CA_CONF_offL2SET		0
+#define L2_CA_CONF_offL2WAY		4
+#define L2_CA_CONF_offL2CLSZ            8
+#define L2_CA_CONF_offL2DW		11
+#define L2_CA_CONF_offL2PT		14
+#define L2_CA_CONF_offL2VER		16
+
+#define L2_CA_CONF_mskL2SET	(0xFUL << L2_CA_CONF_offL2SET)
+#define L2_CA_CONF_mskL2WAY	(0xFUL << L2_CA_CONF_offL2WAY)
+#define L2_CA_CONF_mskL2CLSZ    (0x7UL << L2_CA_CONF_offL2CLSZ)
+#define L2_CA_CONF_mskL2DW	(0x7UL << L2_CA_CONF_offL2DW)
+#define L2_CA_CONF_mskL2PT	(0x3UL << L2_CA_CONF_offL2PT)
+#define L2_CA_CONF_mskL2VER	(0xFFFFUL << L2_CA_CONF_offL2VER)
+
+/******************************************************************************
+ * L2CC_SETUP (L2CC Setup register)
+ *****************************************************************************/
+#define L2CC_SETUP_offPART              0
+#define L2CC_SETUP_mskPART              (0x3UL << L2CC_SETUP_offPART)
+#define L2CC_SETUP_offDDLATC            4
+#define L2CC_SETUP_mskDDLATC            (0x3UL << L2CC_SETUP_offDDLATC)
+#define L2CC_SETUP_offTDLATC            8
+#define L2CC_SETUP_mskTDLATC            (0x3UL << L2CC_SETUP_offTDLATC)
+
+/******************************************************************************
+ * L2CC_PROT (L2CC Protect register)
+ *****************************************************************************/
+#define L2CC_PROT_offMRWEN              31
+#define L2CC_PROT_mskMRWEN      (0x1UL << L2CC_PROT_offMRWEN)
+
+/******************************************************************************
+ * L2_CCTL_STATUS_Mn (The L2CCTL command working status for Master n)
+ *****************************************************************************/
+#define L2CC_CTRL_offEN                 31
+#define L2CC_CTRL_mskEN                 (0x1UL << L2CC_CTRL_offEN)
+
+/******************************************************************************
+ * L2_CCTL_STATUS_Mn (The L2CCTL command working status for Master n)
+ *****************************************************************************/
+#define L2_CCTL_STATUS_offCMD_COMP      31
+#define L2_CCTL_STATUS_mskCMD_COMP      (0x1 << L2_CCTL_STATUS_offCMD_COMP)
+
+#ifndef __ASSEMBLY__
+extern void __iomem *atl2c_base;
+
+#include <linux/smp.h>
+#include <asm/io.h>
+#include <asm/bitfield.h>
+
+#define L2C_R_REG(offset)               readl(atl2c_base + offset)
+#define L2C_W_REG(offset, value)        writel(value, atl2c_base + offset)
+
+#define L2_CMD_RDY()    \
+        do{;}while((L2C_R_REG(L2_CCTL_STATUS_OFF) & L2_CCTL_STATUS_mskCMD_COMP) == 0)
+
+static inline unsigned long L2_CACHE_SET(void)
+{
+	return 64 << ((L2C_R_REG(L2_CA_CONF_OFF) & L2_CA_CONF_mskL2SET) >>
+		      L2_CA_CONF_offL2SET);
+}
+
+static inline unsigned long L2_CACHE_WAY(void)
+{
+	return 1 +
+	    ((L2C_R_REG(L2_CA_CONF_OFF) & L2_CA_CONF_mskL2WAY) >>
+	     L2_CA_CONF_offL2WAY);
+}
+
+static inline unsigned long L2_CACHE_LINE_SIZE(void)
+{
+
+	return 4 << ((L2C_R_REG(L2_CA_CONF_OFF) & L2_CA_CONF_mskL2CLSZ) >>
+		     L2_CA_CONF_offL2CLSZ);
+}
+
+static inline unsigned long GET_L2CC_CTRL_CPU(unsigned long cpu)
+{
+	if (cpu == smp_processor_id())
+		return L2C_R_REG(L2CC_CTRL_OFF);
+	return L2C_R_REG(L2CC_CTRL_OFF + (cpu << 8));
+}
+
+static inline void SET_L2CC_CTRL_CPU(unsigned long cpu, unsigned long val)
+{
+	if (cpu == smp_processor_id())
+		L2C_W_REG(L2CC_CTRL_OFF, val);
+	else
+		L2C_W_REG(L2CC_CTRL_OFF + (cpu << 8), val);
+}
+
+static inline unsigned long GET_L2CC_STATUS_CPU(unsigned long cpu)
+{
+	if (cpu == smp_processor_id())
+		return L2C_R_REG(L2_CCTL_STATUS_OFF);
+	return L2C_R_REG(L2_CCTL_STATUS_OFF + (cpu << 8));
+}
+
+#endif
+
+#endif
arch/nds32/kernel/atl2c.c new file +77 -0

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Signature · 1 line
1.7.9.5
#43 lore raw

PATCH v3 22/33 nds32: Loadable modules

In reply to Greentime Hu

From: Greentime Hu <[email protected]>

This patch adds support for loadable modules.

---
 arch/nds32/include/asm/module.h |   24 ++++
 arch/nds32/kernel/module.c      |  299 +++++++++++++++++++++++++++++++++++++++
 2 files changed, 323 insertions(+)
 create mode 100644 arch/nds32/include/asm/module.h
 create mode 100644 arch/nds32/kernel/module.c
arch/nds32/include/asm/module.h new file +24 -0
new file mode 100644
index 0000000..5ed2b75
@@ -0,0 +1,24 @@
+/*
+ * Copyright (C) 2005-2017 Andes Technology Corporation
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program.  If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#ifndef _ASM_NDS32_MODULE_H
+#define _ASM_NDS32_MODULE_H
+
+#include <asm-generic/module.h>
+
+#define MODULE_ARCH_VERMAGIC	"NDS32v3"
+
+#endif /* _ASM_NDS32_MODULE_H */
arch/nds32/kernel/module.c new file +299 -0

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Signature · 1 line
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#44 lore raw

PATCH v3 23/33 nds32: Generic timers support

In reply to Greentime Hu

From: Greentime Hu <[email protected]>

This patch adds support for timer.

---
 arch/nds32/kernel/time.c |   24 ++++++++++++++++++++++++
 1 file changed, 24 insertions(+)
 create mode 100644 arch/nds32/kernel/time.c
arch/nds32/kernel/time.c new file +24 -0
new file mode 100644
index 0000000..aef06f6
@@ -0,0 +1,24 @@
+/*
+ * Copyright (C) 2005-2017 Andes Technology Corporation
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program.  If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#include <linux/clocksource.h>
+#include <linux/clk-provider.h>
+
+void __init time_init(void)
+{
+	of_clk_init(NULL);
+	timer_probe();
+}
Signature · 1 line
1.7.9.5
#46 lore raw

PATCH v3 24/33 nds32: Device tree support

In reply to Greentime Hu

From: Greentime Hu <[email protected]>

This patch adds support for device tree.

---
 arch/nds32/boot/dts/Makefile   |    8 +++++
 arch/nds32/boot/dts/ae3xx.dts  |   67 ++++++++++++++++++++++++++++++++++++++
 arch/nds32/boot/dts/ag101p.dts |   70 ++++++++++++++++++++++++++++++++++++++++
 arch/nds32/kernel/devtree.c    |   32 ++++++++++++++++++
 4 files changed, 177 insertions(+)
 create mode 100644 arch/nds32/boot/dts/Makefile
 create mode 100644 arch/nds32/boot/dts/ae3xx.dts
 create mode 100644 arch/nds32/boot/dts/ag101p.dts
 create mode 100644 arch/nds32/kernel/devtree.c
arch/nds32/boot/dts/Makefile new file +8 -0
new file mode 100644
index 0000000..d31faa8
@@ -0,0 +1,8 @@
+ifneq '$(CONFIG_NDS32_BUILTIN_DTB)' '""'
+BUILTIN_DTB := $(patsubst "%",%,$(CONFIG_NDS32_BUILTIN_DTB)).dtb.o
+else
+BUILTIN_DTB :=
+endif
+obj-$(CONFIG_OF) += $(BUILTIN_DTB)
+
+clean-files := *.dtb *.dtb.S
arch/nds32/boot/dts/ae3xx.dts new file +67 -0

67 lines not on this page · raw message

arch/nds32/boot/dts/ag101p.dts new file +70 -0

70 lines not on this page · raw message

arch/nds32/kernel/devtree.c new file +32 -0
new file mode 100644
index 0000000..858fe3a
@@ -0,0 +1,32 @@
+/*
+ * Copyright (C) 2005-2017 Andes Technology Corporation
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program.  If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#include <linux/bug.h>
+#include <linux/printk.h>
+#include <linux/of_fdt.h>
+
+void __init early_init_devtree(void *params)
+{
+	if (!params || !early_init_dt_scan(params)) {
+		pr_crit("\n"
+			"Error: invalid device tree blob at (virtual address 0x%p)\n"
+			"\nPlease check your bootloader.", params);
+
+		BUG_ON(1);
+	}
+
+	dump_stack_set_arch_desc("%s (DT)", of_flat_dt_get_machine_name());
+}
Signature · 1 line
1.7.9.5
#47 lore raw

Re: [PATCH v3 24/33] nds32: Device tree support

arch/nds32/boot/dts/ae3xx.dts line 59

Quoted 9 lines · Greentime Hu
arch/nds32/boot/dts/ae3xx.dts new file +9 -0
+	timer0: timer@f0400000 {
+		compatible = "andestech,atcpit100";
+		reg = <0xf0400000 0x1000>;
+		interrupts = <2>;
+		clocks = <&clk_pll>;
+		clock-names = "apb_pclk";
+		cycle-count-offset = <0x38>;
+		cycle-count-down;
+	};

The cover leter mentioned the atcpit100 driver had been removed, but the node is still here, and the vdso code seems to look for this node.

This binding needs documentation.

Thanks,
Mark.

#48 lore raw

Re: [PATCH v3 24/33] nds32: Device tree support

In reply to Greentime Hu

arch/nds32/boot/dts/ag101p.dts line 56

Quoted 8 lines · Greentime Hu
arch/nds32/boot/dts/ag101p.dts new file +8 -0
+	timer0: timer@98400000 {
+		compatible = "andestech,atftmr010";
+		reg = <0x98400000 0x1000>;
+		interrupts = <19>;
+		clocks = <&clk_pll>;
+		clock-names = "apb_pclk";
+		cycle-count-offset = <0x20>;
+	};

Looking through the series, I can't find a binding or driver for this timer, either.

Does timekeeping work with this series, or are additional patches necessary?

Thanks,
Mark.

#49 lore raw

PATCH v3 25/33 nds32: Miscellaneous header files

In reply to Greentime Hu

From: Greentime Hu <[email protected]>

This patch introduces some miscellaneous header files.

---
 arch/nds32/include/asm/delay.h          |   51 +++++++++++++++++++++++++++++++
 arch/nds32/include/asm/linkage.h        |   24 +++++++++++++++
 arch/nds32/include/uapi/asm/byteorder.h |   26 ++++++++++++++++
 3 files changed, 101 insertions(+)
 create mode 100644 arch/nds32/include/asm/delay.h
 create mode 100644 arch/nds32/include/asm/linkage.h
 create mode 100644 arch/nds32/include/uapi/asm/byteorder.h
arch/nds32/include/asm/delay.h new file +51 -0
new file mode 100644
index 0000000..bdeeb76
@@ -0,0 +1,51 @@
+/*
+ * Copyright (C) 2005-2017 Andes Technology Corporation
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program.  If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#ifndef __NDS32_DELAY_H__
+#define __NDS32_DELAY_H__
+
+#include <asm/param.h>
+
+static inline void __delay(unsigned long loops)
+{
+	__asm__ __volatile__(".align 2\n"
+			     "1:\n"
+			     "\taddi\t%0, %0, -1\n"
+			     "\tbgtz\t%0, 1b\n"
+			     :"=r"(loops)
+			     :"0"(loops));
+}
+
+static inline void __udelay(unsigned long usecs, unsigned long lpj)
+{
+	usecs *= (unsigned long)(((0x8000000000000000ULL / (500000 / HZ)) +
+				  0x80000000ULL) >> 32);
+	usecs = (unsigned long)(((unsigned long long)usecs * lpj) >> 32);
+	__delay(usecs);
+}
+
+#define udelay(usecs) __udelay((usecs), loops_per_jiffy)
+
+/* make sure "usecs *= ..." in udelay do not overflow. */
+#if HZ >= 1000
+#define MAX_UDELAY_MS	1
+#elif HZ <= 200
+#define MAX_UDELAY_MS	5
+#else
+#define MAX_UDELAY_MS	(1000 / HZ)
+#endif
+
+#endif
arch/nds32/include/asm/linkage.h new file +24 -0
new file mode 100644
index 0000000..d17abd8
@@ -0,0 +1,24 @@
+/*
+ * Copyright (C) 2005-2017 Andes Technology Corporation
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program.  If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#ifndef __ASM_LINKAGE_H
+#define __ASM_LINKAGE_H
+
+/* This file is required by include/linux/linkage.h */
+#define __ALIGN .align 2
+#define __ALIGN_STR ".align 2"
+
+#endif
arch/nds32/include/uapi/asm/byteorder.h new file +26 -0
new file mode 100644
index 0000000..198e8dd
@@ -0,0 +1,26 @@
+/*
+ * Copyright (C) 2005-2017 Andes Technology Corporation
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program.  If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#ifndef __NDS32_BYTEORDER_H__
+#define __NDS32_BYTEORDER_H__
+
+#ifdef __NDS32_EB__
+#include <linux/byteorder/big_endian.h>
+#else
+#include <linux/byteorder/little_endian.h>
+#endif
+
+#endif /* __NDS32_BYTEORDER_H__ */
Signature · 1 line
1.7.9.5
#50 lore raw

PATCH v3 26/33 nds32: defconfig

In reply to Greentime Hu

From: Greentime Hu <[email protected]>

This patch adds nds32 defconfig.

---
 arch/nds32/configs/defconfig |  108 ++++++++++++++++++++++++++++++++++++++++++
 1 file changed, 108 insertions(+)
 create mode 100644 arch/nds32/configs/defconfig
arch/nds32/configs/defconfig new file +108 -0
new file mode 100644
index 0000000..069ebe6
@@ -0,0 +1,108 @@
+CONFIG_CROSS_COMPILE="nds32le-linux-"
+CONFIG_SYSVIPC=y
+CONFIG_POSIX_MQUEUE=y
+CONFIG_HIGH_RES_TIMERS=y
+CONFIG_BSD_PROCESS_ACCT=y
+CONFIG_BSD_PROCESS_ACCT_V3=y
+CONFIG_IKCONFIG=y
+CONFIG_IKCONFIG_PROC=y
+CONFIG_LOG_BUF_SHIFT=14
+CONFIG_USER_NS=y
+CONFIG_RELAY=y
+CONFIG_BLK_DEV_INITRD=y
+CONFIG_KALLSYMS_ALL=y
+CONFIG_PROFILING=y
+CONFIG_MODULES=y
+CONFIG_MODULE_UNLOAD=y
+# CONFIG_BLK_DEV_BSG is not set
+# CONFIG_CACHE_L2 is not set
+CONFIG_VMSPLIT_3G_OPT=y
+CONFIG_PREEMPT=y
+# CONFIG_COMPACTION is not set
+CONFIG_HZ_100=y
+# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
+CONFIG_NET=y
+CONFIG_PACKET=y
+CONFIG_UNIX=y
+CONFIG_NET_KEY=y
+CONFIG_INET=y
+CONFIG_IP_MULTICAST=y
+# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
+# CONFIG_INET_XFRM_MODE_TUNNEL is not set
+# CONFIG_INET_XFRM_MODE_BEET is not set
+# CONFIG_INET_DIAG is not set
+# CONFIG_IPV6 is not set
+# CONFIG_BLK_DEV is not set
+CONFIG_NETDEVICES=y
+# CONFIG_NET_CADENCE is not set
+# CONFIG_NET_VENDOR_BROADCOM is not set
+CONFIG_FTMAC100=y
+# CONFIG_NET_VENDOR_INTEL is not set
+# CONFIG_NET_VENDOR_MARVELL is not set
+# CONFIG_NET_VENDOR_MICREL is not set
+# CONFIG_NET_VENDOR_NATSEMI is not set
+# CONFIG_NET_VENDOR_SEEQ is not set
+# CONFIG_NET_VENDOR_STMICRO is not set
+# CONFIG_NET_VENDOR_WIZNET is not set
+CONFIG_INPUT_EVDEV=y
+# CONFIG_INPUT_KEYBOARD is not set
+# CONFIG_INPUT_MOUSE is not set
+CONFIG_INPUT_TOUCHSCREEN=y
+# CONFIG_SERIO is not set
+CONFIG_VT_HW_CONSOLE_BINDING=y
+CONFIG_SERIAL_8250=y
+# CONFIG_SERIAL_8250_DEPRECATED_OPTIONS is not set
+CONFIG_SERIAL_8250_CONSOLE=y
+CONFIG_SERIAL_8250_NR_UARTS=3
+CONFIG_SERIAL_8250_RUNTIME_UARTS=3
+CONFIG_SERIAL_OF_PLATFORM=y
+# CONFIG_HW_RANDOM is not set
+# CONFIG_HWMON is not set
+# CONFIG_RC_CORE is not set
+# CONFIG_VGA_CONSOLE is not set
+# CONFIG_HID_A4TECH is not set
+# CONFIG_HID_APPLE is not set
+# CONFIG_HID_BELKIN is not set
+# CONFIG_HID_CHERRY is not set
+# CONFIG_HID_CHICONY is not set
+# CONFIG_HID_CYPRESS is not set
+# CONFIG_HID_EZKEY is not set
+# CONFIG_HID_ITE is not set
+# CONFIG_HID_KENSINGTON is not set
+# CONFIG_HID_LOGITECH is not set
+# CONFIG_HID_MICROSOFT is not set
+# CONFIG_HID_MONTEREY is not set
+# CONFIG_USB_SUPPORT is not set
+CONFIG_CLKSRC_ATCPIT100=y
+CONFIG_GENERIC_PHY=y
+CONFIG_EXT4_FS=y
+CONFIG_EXT4_FS_POSIX_ACL=y
+CONFIG_EXT4_FS_SECURITY=y
+CONFIG_EXT4_ENCRYPTION=y
+CONFIG_FUSE_FS=y
+CONFIG_MSDOS_FS=y
+CONFIG_VFAT_FS=y
+CONFIG_TMPFS=y
+CONFIG_TMPFS_POSIX_ACL=y
+CONFIG_CONFIGFS_FS=y
+CONFIG_NFS_FS=y
+CONFIG_NFS_V3_ACL=y
+CONFIG_NFS_V4=y
+CONFIG_NFS_V4_1=y
+CONFIG_NFS_USE_LEGACY_DNS=y
+CONFIG_NLS_CODEPAGE_437=y
+CONFIG_NLS_ISO8859_1=y
+CONFIG_DEBUG_INFO=y
+CONFIG_DEBUG_INFO_DWARF4=y
+CONFIG_GDB_SCRIPTS=y
+CONFIG_READABLE_ASM=y
+CONFIG_HEADERS_CHECK=y
+CONFIG_DEBUG_SECTION_MISMATCH=y
+CONFIG_MAGIC_SYSRQ=y
+CONFIG_DEBUG_KERNEL=y
+CONFIG_PANIC_ON_OOPS=y
+# CONFIG_SCHED_DEBUG is not set
+# CONFIG_DEBUG_PREEMPT is not set
+CONFIG_STACKTRACE=y
+CONFIG_RCU_CPU_STALL_TIMEOUT=300
+# CONFIG_CRYPTO_HW is not set
Signature · 1 line
1.7.9.5
#51 lore raw

PATCH v3 27/33 nds32: Build infrastructure

In reply to Greentime Hu

From: Greentime Hu <[email protected]>

This patch adds Makefile, Kconfig and vmlinux.lds.S files required for building an nds32 kernel.

---
 arch/nds32/Kconfig                 |  108 ++++++++++++++++++++++++
 arch/nds32/Kconfig.cpu             |  161 ++++++++++++++++++++++++++++++++++++
 arch/nds32/Makefile                |   66 +++++++++++++++
 arch/nds32/boot/Makefile           |   15 ++++
 arch/nds32/include/asm/Kbuild      |   53 ++++++++++++
 arch/nds32/include/uapi/asm/Kbuild |   28 +++++++
 arch/nds32/kernel/Makefile         |   23 ++++++
 arch/nds32/kernel/vmlinux.lds.S    |   70 ++++++++++++++++
 arch/nds32/mm/Makefile             |    7 ++
 9 files changed, 531 insertions(+)
 create mode 100644 arch/nds32/Kconfig
 create mode 100644 arch/nds32/Kconfig.cpu
 create mode 100644 arch/nds32/Makefile
 create mode 100644 arch/nds32/boot/Makefile
 create mode 100644 arch/nds32/include/asm/Kbuild
 create mode 100644 arch/nds32/include/uapi/asm/Kbuild
 create mode 100644 arch/nds32/kernel/Makefile
 create mode 100644 arch/nds32/kernel/vmlinux.lds.S
 create mode 100644 arch/nds32/mm/Makefile
arch/nds32/Kconfig new file +108 -0
new file mode 100644
index 0000000..c83506e
@@ -0,0 +1,108 @@
+#
+# For a description of the syntax of this configuration file,
+# see Documentation/kbuild/kconfig-language.txt.
+#
+
+config NDS32
+        def_bool y
+	select ARCH_HAS_RAW_COPY_USER
+	select ARCH_WANT_FRAME_POINTERS if FTRACE
+	select ARCH_WANT_IPC_PARSE_VERSION
+	select CLKSRC_MMIO
+	select CLONE_BACKWARDS
+	select COMMON_CLK
+	select TIMER_OF
+	select FRAME_POINTER
+	select GENERIC_ATOMIC64
+	select GENERIC_CPU_DEVICES
+	select GENERIC_CLOCKEVENTS
+	select GENERIC_IRQ_CHIP
+	select GENERIC_IRQ_PROBE
+	select GENERIC_IRQ_SHOW
+	select GENERIC_STRNCPY_FROM_USER
+	select GENERIC_STRNLEN_USER
+	select GENERIC_TIME_VSYSCALL
+	select HANDLE_DOMAIN_IRQ
+	select HAVE_ARCH_TRACEHOOK
+	select HAVE_DEBUG_KMEMLEAK
+	select HAVE_MEMBLOCK
+	select HAVE_REGS_AND_STACK_ACCESS_API
+	select IRQ_DOMAIN
+	select LOCKDEP_SUPPORT
+	select MODULES_USE_ELF_RELA
+	select OF
+	select OF_EARLY_FLATTREE
+	select NO_BOOTMEM
+	select NO_IOPORT_MAP
+	select RTC_LIB
+	select THREAD_INFO_IN_TASK
+	help
+	  Andes(nds32) Linux support.
+
+config GENERIC_CALIBRATE_DELAY
+	def_bool n
+
+config GENERIC_CSUM
+        def_bool y
+
+config GENERIC_HWEIGHT
+        def_bool y
+
+config GENERIC_LOCKBREAK
+        def_bool y
+	depends on PREEMPT
+
+config RWSEM_GENERIC_SPINLOCK
+	def_bool y
+
+config TRACE_IRQFLAGS_SUPPORT
+	def_bool y
+
+config STACKTRACE_SUPPORT
+        def_bool y
+
+config FIX_EARLYCON_MEM
+	def_bool y
+
+config PGTABLE_LEVELS
+	default 2
+
+source "init/Kconfig"
+
+menu "System Type"
+source "arch/nds32/Kconfig.cpu"
+config NR_CPUS
+	int
+	default 1
+
+config MMU
+        def_bool y
+
+config NDS32_BUILTIN_DTB
+        string "Builtin DTB"
+        default ""
+	help
+	  User can use it to specify the dts of the SoC
+endmenu
+
+menu "Kernel Features"
+source "kernel/Kconfig.preempt"
+source "mm/Kconfig"
+source "kernel/Kconfig.hz"
+endmenu
+
+menu "Executable file formats"
+source "fs/Kconfig.binfmt"
+endmenu
+
+source "net/Kconfig"
+source "drivers/Kconfig"
+source "fs/Kconfig"
+
+menu "Kernel hacking"
+source "lib/Kconfig.debug"
+endmenu
+
+source "security/Kconfig"
+source "crypto/Kconfig"
+source "lib/Kconfig"
arch/nds32/Kconfig.cpu new file +161 -0

161 lines not on this page · raw message

arch/nds32/Makefile new file +66 -0

66 lines not on this page · raw message

arch/nds32/boot/Makefile new file +15 -0
new file mode 100644
index 0000000..3f9b86f
@@ -0,0 +1,15 @@
+targets := Image Image.gz
+
+$(obj)/Image: vmlinux FORCE
+	$(call if_changed,objcopy)
+
+$(obj)/Image.gz: $(obj)/Image FORCE
+	$(call if_changed,gzip)
+
+install: $(obj)/Image
+	$(CONFIG_SHELL) $(srctree)/$(src)/install.sh $(KERNELRELEASE) \
+	$(obj)/Image System.map "$(INSTALL_PATH)"
+
+zinstall: $(obj)/Image.gz
+	$(CONFIG_SHELL) $(srctree)/$(src)/install.sh $(KERNELRELEASE) \
+	$(obj)/Image.gz System.map "$(INSTALL_PATH)"
arch/nds32/include/asm/Kbuild new file +53 -0

53 lines not on this page · raw message

arch/nds32/include/uapi/asm/Kbuild new file +28 -0
new file mode 100644
index 0000000..c4dc909
@@ -0,0 +1,28 @@
+# UAPI Header export list
+include include/uapi/asm-generic/Kbuild.asm
+
+generic-y += errno.h
+generic-y += ioctl.h
+generic-y += ioctls.h
+generic-y += ipcbuf.h
+generic-y += shmbuf.h
+generic-y += bitsperlong.h
+generic-y += fcntl.h
+generic-y += stat.h
+generic-y += mman.h
+generic-y += msgbuf.h
+generic-y += poll.h
+generic-y += posix_types.h
+generic-y += resource.h
+generic-y += sembuf.h
+generic-y += setup.h
+generic-y += siginfo.h
+generic-y += signal.h
+generic-y += socket.h
+generic-y += sockios.h
+generic-y += swab.h
+generic-y += statfs.h
+generic-y += termbits.h
+generic-y += termios.h
+generic-y += types.h
+generic-y += ucontext.h
arch/nds32/kernel/Makefile new file +23 -0
new file mode 100644
index 0000000..4279274
@@ -0,0 +1,23 @@
+#
+# Makefile for the linux kernel.
+#
+
+CPPFLAGS_vmlinux.lds	:= -DTEXTADDR=$(TEXTADDR)
+AFLAGS_head.o		:= -DTEXTADDR=$(TEXTADDR)
+
+# Object file lists.
+
+obj-y			:= ex-entry.o ex-exit.o ex-scall.o irq.o \
+			process.o ptrace.o setup.o signal.o \
+			sys_nds32.o time.o traps.o cacheinfo.o \
+			dma.o syscall_table.o vdso.o
+
+obj-$(CONFIG_MODULES)		+= nds32_ksyms.o module.o
+obj-$(CONFIG_STACKTRACE)	+= stacktrace.o
+obj-$(CONFIG_OF)		+= devtree.o
+obj-$(CONFIG_CACHE_L2)		+= atl2c.o
+
+extra-y := head.o vmlinux.lds
+
+
+obj-y				+= vdso/
arch/nds32/kernel/vmlinux.lds.S new file +70 -0

70 lines not on this page · raw message

arch/nds32/mm/Makefile new file +7 -0
new file mode 100644
index 0000000..6b68558
@@ -0,0 +1,7 @@
+obj-y				:= extable.o tlb.o \
+				   fault.o init.o ioremap.o mmap.o \
+                                   mm-nds32.o cacheflush.o proc.o
+
+obj-$(CONFIG_ALIGNMENT_TRAP)	+= alignment.o
+obj-$(CONFIG_HIGHMEM)           += highmem.o
+CFLAGS_proc-n13.o		+= -fomit-frame-pointer
Signature · 1 line
1.7.9.5
#52 lore raw

PATCH v3 28/33 MAINTAINERS: Add nds32

In reply to Greentime Hu

From: Greentime Hu <[email protected]>

---
 MAINTAINERS |   11 +++++++++++
 1 file changed, 11 insertions(+)
MAINTAINERS +11 -0
index 2f4e462..20284c8 100644
@@ -857,6 +857,17 @@ X:	drivers/iio/*/adjd*
 F:	drivers/staging/iio/*/ad*
 F:	drivers/staging/iio/trigger/iio-trig-bfin-timer.c
 
+ANDES ARCHITECTURE
+M:	Greentime Hu <[email protected]>
+M:	Vincent Chen <[email protected]>
+T:	git https://github.com/andestech/linux.git
+S:	Supported
+F:	arch/nds32
+F:	Documentation/devicetree/bindings/interrupt-controller/andestech,ativic32.txt
+F:	Documentation/devicetree/bindings/nds32
+K:	nds32
+N:	nds32
+
 ANDROID CONFIG FRAGMENTS
 M:	Rob Herring <[email protected]>
 S:	Supported
Signature · 1 line
1.7.9.5
#53 lore raw

PATCH v3 29/33 dt-bindings: nds32 CPU Bindings

In reply to Greentime Hu

From: Greentime Hu <[email protected]>

This patch adds nds32 CPU binding documents.

---
 Documentation/devicetree/bindings/nds32/cpus.txt |   37 ++++++++++++++++++++++
 1 file changed, 37 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/nds32/cpus.txt
Documentation/devicetree/bindings/nds32/cpus.txt new file +37 -0
new file mode 100644
index 0000000..9a52937
@@ -0,0 +1,37 @@
+* Andestech Processor Binding
+
+This binding specifies what properties must be available in the device tree
+representation of a Andestech Processor Core, which is the root node in the
+tree.
+
+Required properties:
+
+	- compatible:
+		Usage: required
+		Value type: <string>
+		Definition: should be one of:
+			"andestech,n13"
+			"andestech,n15"
+			"andestech,d15"
+			"andestech,n10"
+			"andestech,d10"
+			"andestech,nds32v3"
+	- device_type
+		Usage: required
+		Value type: <string>
+		Definition: must be "cpu"
+	- reg: Contains CPU index.
+	- clock-frequency: Contains the clock frequency for CPU, in Hz.
+
+* Examples
+
+/ {
+	cpus {
+		cpu@0 {
+			device_type = "cpu";
+			compatible = "andestech,n13", "andestech,nds32v3";
+			reg = <0x0>;
+			clock-frequency = <60000000>
+		};
+	};
+};
Signature · 1 line
1.7.9.5
maintainer Reviewed-by on v3 29/33
#54 lore raw

Re: [PATCH v3 29/33] dt-bindings: nds32 CPU Bindings

Quoted 4 lines · Greentime Hu

From: Greentime Hu <[email protected]>

This patch adds nds32 CPU binding documents.

Quoted 8 lines
---
 Documentation/devicetree/bindings/nds32/cpus.txt |   37 ++++++++++++++++++++++
 1 file changed, 37 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/nds32/cpus.txt
#55 lore raw

PATCH v3 30/33 dt-bindings: nds32 SoC Bindings

In reply to Greentime Hu

From: Greentime Hu <[email protected]>

This patch adds nds32 SoC(AE3XX and AG101P) binding documents.

---
 .../devicetree/bindings/nds32/andestech-boards     |   40 ++++++++++++++++++++
 1 file changed, 40 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/nds32/andestech-boards
Documentation/devicetree/bindings/nds32/andestech-boards new file +40 -0
new file mode 100644
index 0000000..f5d7569
@@ -0,0 +1,40 @@
+Andestech(nds32) AE3XX Platform
+-----------------------------------------------------------------------------
+The AE3XX prototype demonstrates the AE3XX example platform on the FPGA. It
+is composed of one Andestech(nds32) processor and AE3XX.
+
+Required properties (in root node):
+- compatible = "andestech,ae3xx";
+
+Example:
+/dts-v1/;
+/ {
+	compatible = "andestech,ae3xx";
+	#address-cells = <1>;
+	#size-cells = <1>;
+	interrupt-parent = <&intc>;
+};
+
+Andestech(nds32) AG101P Platform
+-----------------------------------------------------------------------------
+AG101P is a generic SoC Platform IP that works with any of Andestech(nds32)
+processors to provide a cost-effective and high performance solution for
+majority of embedded systems in variety of application domains. Users may
+simply attach their IP on one of the system buses together with certain glue
+logics to complete a SoC solution for a specific application. With
+comprehensive simulation and design environments, users may evaluate the
+system performance of their applications and track bugs of their designs
+efficiently. The optional hardware development platform further provides real
+system environment for early prototyping and software/hardware co-development.
+
+Required properties (in root node):
+	compatible = "andestech,ag101p";
+
+Example:
+/dts-v1/;
+/ {
+	compatible = "andestech,ag101p";
+	#address-cells = <1>;
+	#size-cells = <1>;
+	interrupt-parent = <&intc>;
+};
Signature · 1 line
1.7.9.5
maintainer Reviewed-by on v3 30/33
#56 lore raw

Re: [PATCH v3 30/33] dt-bindings: nds32 SoC Bindings

Quoted 9 lines · Greentime Hu

From: Greentime Hu <[email protected]>

This patch adds nds32 SoC(AE3XX and AG101P) binding documents.

---
 .../devicetree/bindings/nds32/andestech-boards     |   40 ++++++++++++++++++++
 1 file changed, 40 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/nds32/andestech-boards
#57 lore raw

PATCH v3 31/33 dt-bindings: interrupt-controller: Andestech Internal Vector Interrupt Controller

In reply to Greentime Hu

From: Greentime Hu <[email protected]>

This patch adds an irqchip driver document for the Andestech Internal Vector Interrupt Controller.

---
 .../interrupt-controller/andestech,ativic32.txt    |   19 +++++++++++++++++++
 1 file changed, 19 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/interrupt-controller/andestech,ativic32.txt
Documentation/devicetree/bindings/interrupt-controller/andestech,ativic32.txt new file +19 -0
new file mode 100644
index 0000000..f4b4193
@@ -0,0 +1,19 @@
+* Andestech Internal Vector Interrupt Controller
+
+The Internal Vector Interrupt Controller (IVIC) is a basic interrupt controller
+suitable for a simpler SoC platform not requiring a more sophisticated and
+bigger External Vector Interrupt Controller.
+
+
+Main node required properties:
+
+- compatible : should at least contain  "andestech,ativic32".
+- interrupt-controller : Identifies the node as an interrupt controller
+- #interrupt-cells: 1 cells and refer to interrupt-controller/interrupts
+
+Examples:
+	intc: interrupt-controller {
+		compatible = "andestech,ativic32";
+		#interrupt-cells = <1>;
+		interrupt-controller;
+	};
Signature · 1 line
1.7.9.5
maintainer
#58 lore raw

Re: [PATCH v3 31/33] dt-bindings: interrupt-controller: Andestech Internal Vector Interrupt Controller

Quoted 11 lines · Greentime Hu

From: Greentime Hu <greentime-MUIXKm3Oiri1Z/[email protected]>

This patch adds an irqchip driver document for the Andestech Internal Vector Interrupt Controller.

---
 .../interrupt-controller/andestech,ativic32.txt    |   19 +++++++++++++++++++
 1 file changed, 19 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/interrupt-controller/andestech,ativic32.txt

I acked v2. Please add acks when posting new versions.

Rob
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#59 lore raw

PATCH v3 32/33 irqchip: Andestech Internal Vector Interrupt Controller driver

In reply to Greentime Hu

From: Greentime Hu <greentime-MUIXKm3Oiri1Z/[email protected]>

This patch adds the Andestech Internal Vector Interrupt Controller driver. You can find the spec here. Ch4.9 of AndeStar SPA V3 Manual.
http://www.andestech.com/product.php?cls=9

---
 drivers/irqchip/Makefile       |    1 +
 drivers/irqchip/irq-ativic32.c |  120 ++++++++++++++++++++++++++++++++++++++++
 2 files changed, 121 insertions(+)
 create mode 100644 drivers/irqchip/irq-ativic32.c
drivers/irqchip/Makefile +1 -0
index b842dfd..201ca9f 100644
@@ -80,3 +80,4 @@ obj-$(CONFIG_ARCH_ASPEED)		+= irq-aspeed-vic.o irq-aspeed-i2c-ic.o
 obj-$(CONFIG_STM32_EXTI) 		+= irq-stm32-exti.o
 obj-$(CONFIG_QCOM_IRQ_COMBINER)		+= qcom-irq-combiner.o
 obj-$(CONFIG_IRQ_UNIPHIER_AIDET)	+= irq-uniphier-aidet.o
+obj-$(CONFIG_NDS32)			+= irq-ativic32.o
drivers/irqchip/irq-ativic32.c new file +120 -0

120 lines not on this page · raw message

Signature · 6 lines
1.7.9.5

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Reviewed-by on v3 32/33
#60 lore raw

Re: [PATCH v3 32/33] irqchip: Andestech Internal Vector Interrupt Controller driver

Quoted 8 lines · Greentime Hu

From: Greentime Hu <greentime-MUIXKm3Oiri1Z/[email protected]>

This patch adds the Andestech Internal Vector Interrupt Controller driver. You can find the spec here. Ch4.9 of AndeStar SPA V3 Manual.
http://www.andestech.com/product.php?cls=9

Once there is an agreement on this series being fit for mainline, let me know how you want to get this merged (either as a whole series, or with this driver going through the irq tree).

Thanks,

	M.
Signature · 5 lines
Jazz is not dead. It just smells funny...
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#61 lore raw

PATCH v3 33/33 net: faraday add nds32 support.

In reply to Greentime Hu

From: Greentime Hu <[email protected]>

This patch is used to support nds32 architecture to use these faraday mac IP.

---
 drivers/net/ethernet/faraday/Kconfig |    6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)
drivers/net/ethernet/faraday/Kconfig +3 -3
index 040c7f1..1bdaffc 100644
@@ -5,7 +5,7 @@
 config NET_VENDOR_FARADAY
 	bool "Faraday devices"
 	default y
-	depends on ARM
+	depends on ARM || NDS32 || COMPILE_TEST
 	---help---
 	  If you have a network (Ethernet) card belonging to this class, say Y.
 
@@ -18,7 +18,7 @@ if NET_VENDOR_FARADAY
 
 config FTMAC100
 	tristate "Faraday FTMAC100 10/100 Ethernet support"
-	depends on ARM
+	depends on ARM || NDS32 || COMPILE_TEST
 	select MII
 	---help---
 	  This driver supports the FTMAC100 10/100 Ethernet controller
@@ -27,7 +27,7 @@ config FTMAC100
 
 config FTGMAC100
 	tristate "Faraday FTGMAC100 Gigabit Ethernet support"
-	depends on ARM
+	depends on ARM || NDS32 || COMPILE_TEST
 	select PHYLIB
 	---help---
 	  This driver supports the FTGMAC100 Gigabit Ethernet controller
Signature · 1 line
1.7.9.5