x86/devicetree: Enable multiprocessing
Subsystems (2)
v8 cover x86/devicetree: Enable multiprocessing
Current x86 implementation of Device Tree does not support multiprocessing, and the bindings documentation describes the "reg" property of "cpu" nodes as "CPU number" instead of hardware-assigned local APIC ID.
v8:
* Fixed build error with CONFIG_X86_LOCAL_APIC=n reported by kbuild.
v7:
* Change log update.
v6:
* Calling of_property_read_u32() to get Local APIC ID from "reg".
* DT documentation changes: corrected CPU node example and changed the "reg" property description.
v5:
* Using the "reg" property to specify Local APIC ID.
Ivan Gorinov (2):
of: Documentation: Specify local APIC ID in "reg" x86/devicetree: Use CPU description from Device Tree
Documentation/devicetree/bindings/x86/ce4100.txt | 37 ++++++++++++++----- arch/x86/kernel/devicetree.c | 45 +++++++++++++++++------- 2 files changed, 61 insertions(+), 21 deletions(-)
Signature · 1 line
2.7.4
PATCH v8 1/2 of: Documentation: Specify local APIC ID in "reg"
Use the "reg" property to specify the processor's local APIC ID instead of setting it to the CPU node index in Device Tree.
Local APIC ID is assigned by hardware and visible in the APIC ID register. Some processor models allow APIC ID to be changed by software, but CPUID instruction executed with %eax = 0x0b always returns the initial ID in %edx.
Local APIC ID does not match the node index in many systems.
--- Documentation/devicetree/bindings/x86/ce4100.txt | 37 ++++++++++++++++++------ 1 file changed, 28 insertions(+), 9 deletions(-)
Documentation/devicetree/bindings/x86/ce4100.txt +28 -9
@@ -7,17 +7,36 @@ Many of the "generic" devices like HPET or IO APIC have the ce4100 name in their compatible property because they first appeared in this SoC. -The CPU node ------------- - cpu@0 { - device_type = "cpu"; - compatible = "intel,ce4100"; - reg = <0>; - lapic = <&lapic0>; +The CPU nodes +------------- + + cpus { + #address-cells = <1>; + #size-cells = <0>; + + cpu@0x00 { + device_type = "cpu"; + compatible = "intel,ce4100"; + reg = <0x00>; + }; + + cpu@0x02 { + device_type = "cpu"; + compatible = "intel,ce4100"; + reg = <0x02>; + }; }; -The reg property describes the CPU number. The lapic property points to -the local APIC timer. +A "cpu" node describes one logical processor (hardware thread). + +Required properties: + +- device_type + Device type, must be "cpu". + +- reg + Local APIC ID, the unique number assigned to each processor by + system hardware. The SoC node ------------
Signature · 1 line
2.7.4
Re: [PATCH v8 1/2] of: Documentation: Specify local APIC ID in "reg"
Quoted 27 lines · Ivan Gorinov
Use the "reg" property to specify the processor's local APIC ID instead of setting it to the CPU node index in Device Tree.
Local APIC ID is assigned by hardware and visible in the APIC ID register. Some processor models allow APIC ID to be changed by software, but CPUID instruction executed with %eax =
0x0balways returns the initial ID in %edx.Local APIC ID does not match the node index in many systems.
Signed-off-by Ivan Gorinov <[email protected]>--- Documentation/devicetree/bindings/x86/ce4100.txt | 37 ++++++++++++++++++------ 1 file changed, 28 insertions(+), 9 deletions(-)Documentation/devicetree/bindings/x86/ce4100.txt +0
-5@@ -7,17 +7,36 @@ Many of the "generic" devices like HPET or IO APIC have the ce4100 name in their compatible property because they first appeared in this SoC. -The CPU node ------------- - cpu@0 { - device_type = "cpu"; - compatible = "intel,ce4100";
Documentation/devicetree/bindings/x86/ce4100.txt Many of the "generic" devices like HPET or IO APIC have the ce4100 · line 17
Quoted 10 lines
Documentation/devicetree/bindings/x86/ce4100.txt +8
-2- reg = <0>; - lapic = <&lapic0>; +The CPU nodes +------------- + + cpus { + #address-cells = <1>; + #size-cells = <0>; + + cpu@0x00 {
As I mentioned on prior versions, drop the '0x' and leading zeros.
Otherwise,
Quoted 30 lines
Documentation/devicetree/bindings/x86/ce4100.txt +20
-3+ device_type = "cpu"; + compatible = "intel,ce4100"; + reg = <0x00>; + }; + + cpu@0x02 { + device_type = "cpu"; + compatible = "intel,ce4100"; + reg = <0x02>; + }; }; -The reg property describes the CPU number. The lapic property points to -the local APIC timer. +A "cpu" node describes one logical processor (hardware thread). + +Required properties: + +- device_type + Device type, must be "cpu". + +- reg + Local APIC ID, the unique number assigned to each processor by + system hardware. The SoC node ------------ --2.7.4
tip-bot for Ivan Gorinov
merge bot[tip:x86/platform] of/Documentation: Specify local APIC ID in "reg"
In reply to Ivan Gorinovof/Documentation: Specify local APIC ID in "reg"
Commit-ID: 7f2e85840871f199057e65232ebde846192ed989 Gitweb: https://git.kernel.org/tip/7f2e85840871f199057e65232ebde846192ed989 Author: Ivan Gorinov <[email protected]> AuthorDate: Thu, 22 Mar 2018 14:35:33 -0700 Committer: Thomas Gleixner <[email protected]> CommitDate: Mon, 26 Mar 2018 15:13:32 +0200
of/Documentation: Specify local APIC ID in "reg"
Use the "reg" property to specify the processor's local APIC ID instead of setting it to the CPU node index in Device Tree.
Local APIC ID is assigned by hardware and visible in the APIC ID register. Some processor models allow APIC ID to be changed by software, but CPUID instruction executed with %eax = 0x0b always returns the initial ID in %edx.
Local APIC ID does not match the node index in many systems.
--- Documentation/devicetree/bindings/x86/ce4100.txt | 37 ++++++++++++++++++------ 1 file changed, 28 insertions(+), 9 deletions(-)
Documentation/devicetree/bindings/x86/ce4100.txt +28 -9
@@ -7,17 +7,36 @@ Many of the "generic" devices like HPET or IO APIC have the ce4100 name in their compatible property because they first appeared in this SoC. -The CPU node ------------- - cpu@0 { - device_type = "cpu"; - compatible = "intel,ce4100"; - reg = <0>; - lapic = <&lapic0>; +The CPU nodes +------------- + + cpus { + #address-cells = <1>; + #size-cells = <0>; + + cpu@0 { + device_type = "cpu"; + compatible = "intel,ce4100"; + reg = <0x00>; + }; + + cpu@2 { + device_type = "cpu"; + compatible = "intel,ce4100"; + reg = <0x02>; + }; }; -The reg property describes the CPU number. The lapic property points to -the local APIC timer. +A "cpu" node describes one logical processor (hardware thread). + +Required properties: + +- device_type + Device type, must be "cpu". + +- reg + Local APIC ID, the unique number assigned to each processor by + system hardware. The SoC node ------------
PATCH v8 2/2 x86/devicetree: Use CPU description from Device Tree
In reply to Ivan GorinovCurrent x86 Device Tree implementation does not support multiprocessing. Use new DT bindings to describe the processors.
--- arch/x86/kernel/devicetree.c | 45 ++++++++++++++++++++++++++++++++------------ 1 file changed, 33 insertions(+), 12 deletions(-)
arch/x86/kernel/devicetree.c +33 -12
@@ -130,34 +130,52 @@ static void __init dtb_setup_hpet(void)#endif } +#ifdef CONFIG_X86_LOCAL_APIC + +static void __init dtb_cpu_setup (void ) +{ +struct device_node *dn; +u32 apic_id, version; +int ret; + + version =GET_APIC_VERSION (apic_read (APIC_LVR )); +for_each_node_by_type (dn,"cpu" ) { + ret =of_property_read_u32 (dn,"reg" , &apic_id); +if (ret <0 ) { +pr_warn ("%pOF: missing local APIC ID\n" , dn); +continue ; + } +generic_processor_info (apic_id, version); + } +} +static void __init dtb_lapic_setup (void ) { -#ifdef CONFIG_X86_LOCAL_APIC struct device_node *dn;struct resource r; +unsigned long lapic_addr =APIC_DEFAULT_PHYS_BASE ;int ret; dn =of_find_compatible_node (NULL ,NULL ,"intel,ce4100-lapic" ); -if (!dn) -return ; - - ret =of_address_to_resource (dn,0 , &r); -if (WARN_ON (ret)) -return ; +if (dn) { + ret =of_address_to_resource (dn,0 , &r); +if (WARN_ON (ret)) +return ; + lapic_addr = r.start; + }/* Did the boot loader setup the local APIC ? */ if (!boot_cpu_has (X86_FEATURE_APIC )) { -if (apic_force_enable (r.start)) +if (apic_force_enable (lapic_addr))return ; } smp_found_config =1 ; pic_mode =1 ; -register_lapic_address (r.start); -generic_processor_info (boot_cpu_physical_apicid, -GET_APIC_VERSION (apic_read (APIC_LVR ))); -#endif +register_lapic_address (lapic_addr); } +#endif /* CONFIG_X86_LOCAL_APIC */ +#ifdef CONFIG_X86_IO_APIC static unsigned int ioapic_id;
@@ -255,7 +273,10 @@ static void __init dtb_ioapic_setup(void) {}static void __init dtb_apic_setup (void ) { +#ifdef CONFIG_X86_LOCAL_APIC dtb_lapic_setup (); +dtb_cpu_setup (); +#endif dtb_ioapic_setup (); }
Signature · 1 line
2.7.4
tip-bot for Ivan Gorinov
merge bot[tip:x86/platform] x86/devicetree: Use CPU description from Device Tree
x86/devicetree: Use CPU description from Device Tree
Commit-ID: 4e07db9c8db87e3b71be4c3cd626ddc9bacd5a1e Gitweb: https://git.kernel.org/tip/4e07db9c8db87e3b71be4c3cd626ddc9bacd5a1e Author: Ivan Gorinov <[email protected]> AuthorDate: Thu, 22 Mar 2018 14:35:47 -0700 Committer: Thomas Gleixner <[email protected]> CommitDate: Mon, 26 Mar 2018 15:13:32 +0200
x86/devicetree: Use CPU description from Device Tree
Current x86 Device Tree implementation does not support multiprocessing. Use new DT bindings to describe the processors.
--- arch/x86/kernel/devicetree.c | 45 ++++++++++++++++++++++++++++++++------------ 1 file changed, 33 insertions(+), 12 deletions(-)
arch/x86/kernel/devicetree.c +33 -12
@@ -131,34 +131,52 @@ static void __init dtb_setup_hpet(void)#endif } +#ifdef CONFIG_X86_LOCAL_APIC + +static void __init dtb_cpu_setup (void ) +{ +struct device_node *dn; +u32 apic_id, version; +int ret; + + version =GET_APIC_VERSION (apic_read (APIC_LVR )); +for_each_node_by_type (dn,"cpu" ) { + ret =of_property_read_u32 (dn,"reg" , &apic_id); +if (ret <0 ) { +pr_warn ("%pOF: missing local APIC ID\n" , dn); +continue ; + } +generic_processor_info (apic_id, version); + } +} +static void __init dtb_lapic_setup (void ) { -#ifdef CONFIG_X86_LOCAL_APIC struct device_node *dn;struct resource r; +unsigned long lapic_addr =APIC_DEFAULT_PHYS_BASE ;int ret; dn =of_find_compatible_node (NULL ,NULL ,"intel,ce4100-lapic" ); -if (!dn) -return ; - - ret =of_address_to_resource (dn,0 , &r); -if (WARN_ON (ret)) -return ; +if (dn) { + ret =of_address_to_resource (dn,0 , &r); +if (WARN_ON (ret)) +return ; + lapic_addr = r.start; + }/* Did the boot loader setup the local APIC ? */ if (!boot_cpu_has (X86_FEATURE_APIC )) { -if (apic_force_enable (r.start)) +if (apic_force_enable (lapic_addr))return ; } smp_found_config =1 ; pic_mode =1 ; -register_lapic_address (r.start); -generic_processor_info (boot_cpu_physical_apicid, -GET_APIC_VERSION (apic_read (APIC_LVR ))); -#endif +register_lapic_address (lapic_addr); } +#endif /* CONFIG_X86_LOCAL_APIC */ +#ifdef CONFIG_X86_IO_APIC static unsigned int ioapic_id;
@@ -259,7 +277,10 @@ static void __init dtb_ioapic_setup(void) {}static void __init dtb_apic_setup (void ) { +#ifdef CONFIG_X86_LOCAL_APIC dtb_lapic_setup (); +dtb_cpu_setup (); +#endif dtb_ioapic_setup (); }
Quoted 4 lines · Ivan Gorinov
Current x86 implementation of Device Tree does not support multiprocessing, and the bindings documentation describes the "reg" property of "cpu" nodes as "CPU number" instead of hardware-assigned local APIC ID.
FWIW,
Quoted 26 lines
v8:
* Fixed build error withCONFIG_X86_LOCAL_APIC=nreported by kbuild.v7:
* Change log update.v6:
* Callingof_property_read_u32()to get Local APIC ID from "reg".* DT documentation changes: corrected CPU node example and changed the "reg" property description.
v5:
* Using the "reg" property to specify Local APIC ID.Ivan Gorinov (2):
of: Documentation: Specify local APIC ID in "reg" x86/devicetree: Use CPU description from Device TreeDocumentation/devicetree/bindings/x86/ce4100.txt | 37 ++++++++++++++----- arch/x86/kernel/devicetree.c | 45 +++++++++++++++++------- 2 files changed, 61 insertions(+), 21 deletions(-)--
2.7.4
Signature · 2 lines
With Best Regards, Andy Shevchenko