arm64: zynqmp: Enable various kconfig features

PATCH New Michal Simek 1 participant 5 messages Mar 28, 2018 Arm/Zynq architecture

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Michal Simek

author

2018-03-28 14:41 UTC #0 lore raw

cover arm64: zynqmp: Enable various kconfig features

This patchset is enabling missing options were the most interesting one is SPL_ATF which permits to boot system from one fit image file.

Thanks,
Michal

Luca Ceresoli (1):
arm64: zynqmp: Enable booting to ATF

Michal Simek (3):
arm64: zynqmp: Enable ethernet phys for zc1751 dc5
arm64: zynqmp: Enable mac address randomization for zc1751 dc5
arm64: zynqmp: Enable Fixed link support

 configs/xilinx_zynqmp_zc1751_xm015_dc1_defconfig | 2 ++
 configs/xilinx_zynqmp_zc1751_xm016_dc2_defconfig | 2 ++
 configs/xilinx_zynqmp_zc1751_xm018_dc4_defconfig | 2 ++
 configs/xilinx_zynqmp_zc1751_xm019_dc5_defconfig | 8 ++++++++
 configs/xilinx_zynqmp_zcu102_rev1_0_defconfig    | 2 ++
 configs/xilinx_zynqmp_zcu102_revA_defconfig      | 2 ++
 configs/xilinx_zynqmp_zcu102_revB_defconfig      | 2 ++
 7 files changed, 20 insertions(+)

Signature · 1 line

1.9.1

Michal Simek

author

2018-03-28 14:41 UTC #1 lore raw

PATCH 1/4 arm64: zynqmp: Enable booting to ATF

From: Luca Ceresoli <[email protected]>

U-Boot is now able to boot to ARM Trusted Firmware (ATF). The boot flow is SPL(EL3) loads ATF and full u-boot and jump to ATF(EL3) which pass control to full u-boot(EL2). This has been tested on zcu106, so enable it in this defconfig.

To generate an image that triggers this booting flow, you need to pass '-O arm-trusted-firmware' to mkimage.

Signed-off-by Luca Ceresoli <[email protected]>

Signed-off-by Michal Simek <[email protected]>

---

 configs/xilinx_zynqmp_zc1751_xm015_dc1_defconfig | 1 +
 configs/xilinx_zynqmp_zc1751_xm016_dc2_defconfig | 1 +
 configs/xilinx_zynqmp_zc1751_xm018_dc4_defconfig | 1 +
 configs/xilinx_zynqmp_zc1751_xm019_dc5_defconfig | 1 +
 configs/xilinx_zynqmp_zcu102_rev1_0_defconfig    | 1 +
 configs/xilinx_zynqmp_zcu102_revA_defconfig      | 1 +
 configs/xilinx_zynqmp_zcu102_revB_defconfig      | 1 +
 7 files changed, 7 insertions(+)

configs/xilinx_zynqmp_zc1751_xm015_dc1_defconfig +1 -0

index 1125ebda8a9f..208e3e97c0a2 100644
@@ -18,6 +18,7 @@ CONFIG_SPL_LOAD_FIT=y
 CONFIG_SPL_OS_BOOT=y
 CONFIG_SPL_RAM_SUPPORT=y
 CONFIG_SPL_RAM_DEVICE=y
+CONFIG_SPL_ATF=y
 CONFIG_SYS_PROMPT="ZynqMP> "
 CONFIG_FASTBOOT=y
 CONFIG_FASTBOOT_FLASH=y

configs/xilinx_zynqmp_zc1751_xm016_dc2_defconfig +1 -0

index 8fc13ef0ecc4..392efbb4156b 100644
@@ -19,6 +19,7 @@ CONFIG_SPL_LOAD_FIT=y
 CONFIG_SPL_OS_BOOT=y
 CONFIG_SPL_RAM_SUPPORT=y
 CONFIG_SPL_RAM_DEVICE=y
+CONFIG_SPL_ATF=y
 CONFIG_SYS_PROMPT="ZynqMP> "
 CONFIG_FASTBOOT=y
 CONFIG_FASTBOOT_FLASH=y

configs/xilinx_zynqmp_zc1751_xm018_dc4_defconfig +1 -0

index 0a057bf3fefd..456916b57288 100644
@@ -15,6 +15,7 @@ CONFIG_SPL_LOAD_FIT=y
 CONFIG_SPL_OS_BOOT=y
 CONFIG_SPL_RAM_SUPPORT=y
 CONFIG_SPL_RAM_DEVICE=y
+CONFIG_SPL_ATF=y
 CONFIG_SYS_PROMPT="ZynqMP> "
 CONFIG_CMD_MEMTEST=y
 CONFIG_CMD_CLK=y

configs/xilinx_zynqmp_zc1751_xm019_dc5_defconfig +1 -0

index 47edf519f953..3dca21dc1650 100644
@@ -16,6 +16,7 @@ CONFIG_SPL_LOAD_FIT=y
 CONFIG_SPL_OS_BOOT=y
 CONFIG_SPL_RAM_SUPPORT=y
 CONFIG_SPL_RAM_DEVICE=y
+CONFIG_SPL_ATF=y
 CONFIG_SYS_PROMPT="ZynqMP> "
 CONFIG_CMD_MEMTEST=y
 CONFIG_CMD_CLK=y

configs/xilinx_zynqmp_zcu102_rev1_0_defconfig +1 -0

index cb3e2f5ca9f2..58c404e332fa 100644
@@ -18,6 +18,7 @@ CONFIG_SPL_LOAD_FIT=y
 CONFIG_SPL_OS_BOOT=y
 CONFIG_SPL_RAM_SUPPORT=y
 CONFIG_SPL_RAM_DEVICE=y
+CONFIG_SPL_ATF=y
 CONFIG_SYS_PROMPT="ZynqMP> "
 CONFIG_FASTBOOT=y
 CONFIG_FASTBOOT_FLASH=y

configs/xilinx_zynqmp_zcu102_revA_defconfig +1 -0

index 19b9683f023b..90ac04825450 100644
@@ -18,6 +18,7 @@ CONFIG_SPL_LOAD_FIT=y
 CONFIG_SPL_OS_BOOT=y
 CONFIG_SPL_RAM_SUPPORT=y
 CONFIG_SPL_RAM_DEVICE=y
+CONFIG_SPL_ATF=y
 CONFIG_SYS_PROMPT="ZynqMP> "
 CONFIG_FASTBOOT=y
 CONFIG_FASTBOOT_FLASH=y

configs/xilinx_zynqmp_zcu102_revB_defconfig +1 -0

index b660200508f9..3a9d011cf3f6 100644
@@ -18,6 +18,7 @@ CONFIG_SPL_LOAD_FIT=y
 CONFIG_SPL_OS_BOOT=y
 CONFIG_SPL_RAM_SUPPORT=y
 CONFIG_SPL_RAM_DEVICE=y
+CONFIG_SPL_ATF=y
 CONFIG_SYS_PROMPT="ZynqMP> "
 CONFIG_FASTBOOT=y
 CONFIG_FASTBOOT_FLASH=y

Signature · 1 line

1.9.1

Michal Simek

author

2018-03-28 14:41 UTC #2 lore raw

PATCH 2/4 arm64: zynqmp: Enable ethernet phys for zc1751 dc5

In reply to Michal Simek

Enable ethernet phys for zc1751 dc5.

Signed-off-by Michal Simek <[email protected]>

---

 configs/xilinx_zynqmp_zc1751_xm019_dc5_defconfig | 6 ++++++
 1 file changed, 6 insertions(+)

configs/xilinx_zynqmp_zc1751_xm019_dc5_defconfig +6 -0

index 3dca21dc1650..ab6262f6df34 100644
@@ -45,6 +45,12 @@ CONFIG_MISC=y
 CONFIG_DM_MMC=y
 CONFIG_MMC_SDHCI=y
 CONFIG_MMC_SDHCI_ZYNQ=y
+CONFIG_PHY_MARVELL=y
+CONFIG_PHY_NATSEMI=y
+CONFIG_PHY_REALTEK=y
+CONFIG_PHY_TI=y
+CONFIG_PHY_VITESSE=y
+CONFIG_PHY_FIXED=y
 CONFIG_DM_ETH=y
 CONFIG_PHY_GIGE=y
 CONFIG_ZYNQ_GEM=y

Signature · 1 line

1.9.1

Michal Simek

author

2018-03-28 14:41 UTC #3 lore raw

PATCH 3/4 arm64: zynqmp: Enable mac address randomization for zc1751 dc5

In reply to Michal Simek

There is no memory which stores mac address that's why generate it.

Signed-off-by Michal Simek <[email protected]>

---

 configs/xilinx_zynqmp_zc1751_xm019_dc5_defconfig | 1 +
 1 file changed, 1 insertion(+)

configs/xilinx_zynqmp_zc1751_xm019_dc5_defconfig +1 -0

index ab6262f6df34..a8fab109f8aa 100644
@@ -33,6 +33,7 @@ CONFIG_CMD_EXT4_WRITE=y
 CONFIG_SPL_OF_CONTROL=y
 CONFIG_OF_EMBED=y
 CONFIG_ENV_IS_IN_FAT=y
+CONFIG_NET_RANDOM_ETHADDR=y
 CONFIG_SPL_DM=y
 CONFIG_SPL_DM_SEQ_ALIAS=y
 CONFIG_CLK_ZYNQMP=y

Signature · 1 line

1.9.1

Michal Simek

author

2018-03-28 14:41 UTC #4 lore raw

PATCH 4/4 arm64: zynqmp: Enable Fixed link support

In reply to Michal Simek

This patch enables the fixed link support for
all ZynqMP boards.

Signed-off-by Siva Durga Prasad Paladugu <[email protected]>

Signed-off-by Michal Simek <[email protected]>

---

 configs/xilinx_zynqmp_zc1751_xm015_dc1_defconfig | 1 +
 configs/xilinx_zynqmp_zc1751_xm016_dc2_defconfig | 1 +
 configs/xilinx_zynqmp_zc1751_xm018_dc4_defconfig | 1 +
 configs/xilinx_zynqmp_zcu102_rev1_0_defconfig    | 1 +
 configs/xilinx_zynqmp_zcu102_revA_defconfig      | 1 +
 configs/xilinx_zynqmp_zcu102_revB_defconfig      | 1 +
 6 files changed, 6 insertions(+)

configs/xilinx_zynqmp_zc1751_xm015_dc1_defconfig +1 -0

index 208e3e97c0a2..74a10b737d56 100644
@@ -69,6 +69,7 @@ CONFIG_PHY_NATSEMI=y
 CONFIG_PHY_REALTEK=y
 CONFIG_PHY_TI=y
 CONFIG_PHY_VITESSE=y
+CONFIG_PHY_FIXED=y
 CONFIG_DM_ETH=y
 CONFIG_PHY_GIGE=y
 CONFIG_ZYNQ_GEM=y

configs/xilinx_zynqmp_zc1751_xm016_dc2_defconfig +1 -0

index 392efbb4156b..5876718fd2a3 100644
@@ -65,6 +65,7 @@ CONFIG_PHY_NATSEMI=y
 CONFIG_PHY_REALTEK=y
 CONFIG_PHY_TI=y
 CONFIG_PHY_VITESSE=y
+CONFIG_PHY_FIXED=y
 CONFIG_DM_ETH=y
 CONFIG_PHY_GIGE=y
 CONFIG_ZYNQ_GEM=y

configs/xilinx_zynqmp_zc1751_xm018_dc4_defconfig +1 -0

index 456916b57288..51bccedbf58e 100644
@@ -57,6 +57,7 @@ CONFIG_PHY_NATSEMI=y
 CONFIG_PHY_REALTEK=y
 CONFIG_PHY_TI=y
 CONFIG_PHY_VITESSE=y
+CONFIG_PHY_FIXED=y
 CONFIG_DM_ETH=y
 CONFIG_PHY_GIGE=y
 CONFIG_ZYNQ_GEM=y

configs/xilinx_zynqmp_zcu102_rev1_0_defconfig +1 -0

index 58c404e332fa..4e7f394f8a3b 100644
@@ -75,6 +75,7 @@ CONFIG_PHY_NATSEMI=y
 CONFIG_PHY_REALTEK=y
 CONFIG_PHY_TI=y
 CONFIG_PHY_VITESSE=y
+CONFIG_PHY_FIXED=y
 CONFIG_DM_ETH=y
 CONFIG_PHY_GIGE=y
 CONFIG_ZYNQ_GEM=y

configs/xilinx_zynqmp_zcu102_revA_defconfig +1 -0

index 90ac04825450..a018398abb89 100644
@@ -75,6 +75,7 @@ CONFIG_PHY_NATSEMI=y
 CONFIG_PHY_REALTEK=y
 CONFIG_PHY_TI=y
 CONFIG_PHY_VITESSE=y
+CONFIG_PHY_FIXED=y
 CONFIG_DM_ETH=y
 CONFIG_PHY_GIGE=y
 CONFIG_ZYNQ_GEM=y

configs/xilinx_zynqmp_zcu102_revB_defconfig +1 -0

index 3a9d011cf3f6..9e6a1be60db5 100644
@@ -75,6 +75,7 @@ CONFIG_PHY_NATSEMI=y
 CONFIG_PHY_REALTEK=y
 CONFIG_PHY_TI=y
 CONFIG_PHY_VITESSE=y
+CONFIG_PHY_FIXED=y
 CONFIG_DM_ETH=y
 CONFIG_PHY_GIGE=y
 CONFIG_ZYNQ_GEM=y

Signature · 1 line

1.9.1