refactor dts and add support for more boards

PATCH In review [email protected] 2 participants 17 messages Apr 11, 2018 – May 12, 2018

Subsystems (5)

Stable branch Device tree bindings Arm MediaTek CPU frequency scaling framework +1 more subsystems

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2018-04-11 08:53 UTC #0 lore raw

v2 cover refactor dts and add support for more boards

From: Sean Wang <[email protected]>

Changes since v1:
- Dropped several patches which have been merged.
- Rebased to linux-next-20180410 where those dependent patches including
[1] and [2] all have been got merged.
- Revised according to suggestions and comments on v1, where the major work is to put board-specific nodes into DTS files and to leave the common nodes among boards in DTSI files as done in patch 7,9,10,11 and 12.
- Merged Ryder Lee's patch for update audio nodes reflecting the latest bindings.
- Revised commit message.

The series is to refactor current .dts for allowing more boards can properly join and reuse almost the same device node definitions.

Before we're doing that, some works about enhancements and fixups are being made on the dt-binding document and .dts files. In addition, the series has to depend on the patch [1][2]. Otherwise, certain build failure would have an occurrence.

[1] arm: dts: mt7623: add PCIe related nodes
http://lists.infradead.org/pipermail/linux-mediatek/2018-February/012053.html

[2] dt-bindings: soc: add header files required for MT7623A SCPSYS dt-binding
http://lists.infradead.org/pipermail/linux-mediatek/2018-February/011930.html

Ryder Lee (1):
arm: dts: mediatek: modify audio related nodes for both MT2701 and

    MT7623

Sean Wang (11):
dt-bindings: cpufreq: mediatek: use - instead of _ in examples
arm: dts: mediatek: converted to using SPDX identifiers
arm: dts: mt7623: fix invalid memory node being generated
arm: dts: mt7623: fix available memory size on bananapi-r2
arm: dts: mt7623: fix all Warnings (unit_address_vs_reg)
arm: dts: mt7623: add BTIF, HSDMA and SPI-NOR device nodes
arm: dts: mt6323: move node mt6323 leds to mt6323.dtsi
arm: dts: mt7623: extend common file reused by all boards with MT7623
SoCs
arm: dts: mt7623: add MT7623A SoC level DTS
arm: dts: mt7623: add MT7623A reference boards
arm: dts: mt7623: add MT7623N reference board with eMMC

 .../bindings/cpufreq/cpufreq-mediatek.txt          |   6 +-
 arch/arm/boot/dts/Makefile                         |   3 +
 arch/arm/boot/dts/mt2701-evb.dts                   |   9 +-
 arch/arm/boot/dts/mt2701.dtsi                      | 197 ++++----
 arch/arm/boot/dts/mt6323.dtsi                      |  17 +-
 arch/arm/boot/dts/mt6580-evbp1.dts                 |   9 +-
 arch/arm/boot/dts/mt6580.dtsi                      |   9 +-
 arch/arm/boot/dts/mt6589-aquaris5.dts              |  10 +-
 arch/arm/boot/dts/mt6589.dtsi                      |  12 +-
 arch/arm/boot/dts/mt6592-evb.dts                   |   9 +-
 arch/arm/boot/dts/mt6592.dtsi                      |   9 +-
 arch/arm/boot/dts/mt7623.dtsi                      | 537 ++++++++++++++++-----
 arch/arm/boot/dts/mt7623a-rfb-emmc.dts             | 291 +++++++++++
 arch/arm/boot/dts/mt7623a-rfb-nand.dts             | 337 +++++++++++++
 arch/arm/boot/dts/mt7623a.dtsi                     |  44 ++
 arch/arm/boot/dts/mt7623n-bananapi-bpi-r2.dts      | 279 ++---------
 arch/arm/boot/dts/mt7623n-rfb-emmc.dts             | 326 +++++++++++++
 arch/arm/boot/dts/mt7623n-rfb-nand.dts             |  40 +-
 arch/arm/boot/dts/mt7623n-rfb.dtsi                 |  12 +-
 arch/arm/boot/dts/mt8127-moose.dts                 |   9 +-
 arch/arm/boot/dts/mt8127.dtsi                      |   9 +-
 arch/arm/boot/dts/mt8135-evbp1.dts                 |   9 +-
 arch/arm/boot/dts/mt8135.dtsi                      |   9 +-
 23 files changed, 1576 insertions(+), 616 deletions(-)
 create mode 100644 arch/arm/boot/dts/mt7623a-rfb-emmc.dts
 create mode 100644 arch/arm/boot/dts/mt7623a-rfb-nand.dts
 create mode 100644 arch/arm/boot/dts/mt7623a.dtsi
 create mode 100644 arch/arm/boot/dts/mt7623n-rfb-emmc.dts

Signature · 1 line

2.7.4

[email protected]

author

2018-04-11 08:53 UTC #1 lore raw

PATCH v2 1/12 dt-bindings: cpufreq: mediatek: use - instead of _ in examples

From: Sean Wang <[email protected]>

It should be good that no use "_" is in examples. Consequently, those nodes in certain files which have an inappropriate name containing "_" are all being replaced with "-".

Signed-off-by Sean Wang <[email protected]>

Cc "Rafael J. Wysocki" <[email protected]>

Cc Viresh Kumar <[email protected]>

Cc Rob Herring <[email protected]>

Cc Mark Rutland <[email protected]>

Cc linux-pm at vger.kernel.org

Cc devicetree at vger.kernel.org

Acked-by Viresh Kumar <[email protected]>

Reviewed-by Rob Herring <[email protected]>

---
 Documentation/devicetree/bindings/cpufreq/cpufreq-mediatek.txt | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

Documentation/devicetree/bindings/cpufreq/cpufreq-mediatek.txt +3 -3

index d36f07e..38cfbb5 100644
@@ -26,7 +26,7 @@ Optional properties:
 
 Example 1 (MT7623 SoC):
 
-	cpu_opp_table: opp_table {
+	cpu_opp_table: opp-table {
 		compatible = "operating-points-v2";
 		opp-shared;

@@ -86,7 +86,7 @@ Example 1 (MT7623 SoC):
 	};
 
 Example 2 (MT8173 SoC):
-	cpu_opp_table_a: opp_table_a {
+	cpu_opp_table_a: opp-table-a {
 		compatible = "operating-points-v2";
 		opp-shared;

@@ -131,7 +131,7 @@ Example 2 (MT8173 SoC):
 		};
 	};
 
-	cpu_opp_table_b: opp_table_b {
+	cpu_opp_table_b: opp-table-b {
 		compatible = "operating-points-v2";
 		opp-shared;

Signature · 1 line

2.7.4

Matthias Brugger

maintainer Reviewed-by on v2 1/12

2018-05-02 08:59 UTC #2 lore raw

Re: [PATCH v2 01/12] dt-bindings: cpufreq: mediatek: use - instead of _ in examples

Quoted 15 lines · sean.wang at mediatek.com

From: Sean Wang <[email protected]>
It should be good that no use "_" is in examples. Consequently, those nodes in certain files which have an inappropriate name containing "_" are all being replaced with "-".
Signed-off-by Sean Wang <[email protected]>
Cc "Rafael J. Wysocki" <[email protected]>
Cc Viresh Kumar <[email protected]>
Cc Rob Herring <[email protected]>
Cc Mark Rutland <[email protected]>
Cc linux-pm at vger.kernel.org
Cc devicetree at vger.kernel.org
Acked-by Viresh Kumar <[email protected]>
Reviewed-by Rob Herring <[email protected]>

Quoted 4 lines

---
 Documentation/devicetree/bindings/cpufreq/cpufreq-mediatek.txt | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

Reviewed-by Matthias Brugger <[email protected]>

Rafael, will you take this through your tree?

Regards,
Matthias

Quoted 32 lines

Documentation/devicetree/bindings/cpufreq/cpufreq-mediatek.txt +3 -3

index d36f07e..38cfbb5 100644
@@ -26,7 +26,7 @@ Optional properties:
 
 Example 1 (MT7623 SoC):
 
-	cpu_opp_table: opp_table {
+	cpu_opp_table: opp-table {
 		compatible = "operating-points-v2";
 		opp-shared;

@@ -86,7 +86,7 @@ Example 1 (MT7623 SoC):
 	};
 
 Example 2 (MT8173 SoC):
-	cpu_opp_table_a: opp_table_a {
+	cpu_opp_table_a: opp-table-a {
 		compatible = "operating-points-v2";
 		opp-shared;

@@ -131,7 +131,7 @@ Example 2 (MT8173 SoC):
 		};
 	};
 
-	cpu_opp_table_b: opp_table_b {
+	cpu_opp_table_b: opp-table-b {
 		compatible = "operating-points-v2";
 		opp-shared;

[email protected]

author

2018-04-11 08:53 UTC #3 lore raw

PATCH v2 2/12 arm: dts: mediatek: converted to using SPDX identifiers

In reply to [email protected]

From: Sean Wang <[email protected]>

Convert boilerplate license statement into proper SPDX identifier style.

Signed-off-by Sean Wang <[email protected]>

Cc Philippe Ombredanne <[email protected]>

Cc Rob Herring <[email protected]>

---
 arch/arm/boot/dts/mt2701-evb.dts       |  9 +--------
 arch/arm/boot/dts/mt2701.dtsi          |  9 +--------
 arch/arm/boot/dts/mt6323.dtsi          |  8 +-------
 arch/arm/boot/dts/mt6580-evbp1.dts     |  9 +--------
 arch/arm/boot/dts/mt6580.dtsi          |  9 +--------
 arch/arm/boot/dts/mt6589-aquaris5.dts  | 10 +---------
 arch/arm/boot/dts/mt6589.dtsi          | 12 ++----------
 arch/arm/boot/dts/mt6592-evb.dts       |  9 +--------
 arch/arm/boot/dts/mt6592.dtsi          |  9 +--------
 arch/arm/boot/dts/mt7623.dtsi          |  9 +--------
 arch/arm/boot/dts/mt7623n-rfb-nand.dts |  9 +--------
 arch/arm/boot/dts/mt7623n-rfb.dtsi     |  9 +--------
 arch/arm/boot/dts/mt8127-moose.dts     |  9 +--------
 arch/arm/boot/dts/mt8127.dtsi          |  9 +--------
 arch/arm/boot/dts/mt8135-evbp1.dts     |  9 +--------
 arch/arm/boot/dts/mt8135.dtsi          |  9 +--------
 16 files changed, 17 insertions(+), 130 deletions(-)

arch/arm/boot/dts/mt2701-evb.dts +1 -8

index 63af4b1..be0edb3 100644
@@ -1,15 +1,8 @@
+// SPDX-License-Identifier: GPL-2.0
 /*
  * Copyright (c) 2015 MediaTek Inc.
  * Author: Erin Lo <[email protected]>
  *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
  */
 
 /dts-v1/;

arch/arm/boot/dts/mt2701.dtsi +1 -8

index 05557fc..cf1c8eb 100644
@@ -1,15 +1,8 @@
+// SPDX-License-Identifier: GPL-2.0
 /*
  * Copyright (c) 2015 MediaTek Inc.
  * Author: Erin.Lo <[email protected]>
  *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
  */
 
 #include <dt-bindings/clock/mt2701-clk.h>

arch/arm/boot/dts/mt6323.dtsi +1 -7

index 7c783d6..958980c 100644
@@ -1,15 +1,9 @@
+// SPDX-License-Identifier: GPL-2.0
 /*
  * Copyright (c) 2017 MediaTek Inc.
  * Author: John Crispin <[email protected]>
  *	   Sean Wang <[email protected]>
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
  *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
  */
 
 &pwrap {

arch/arm/boot/dts/mt6580-evbp1.dts +1 -8

index 17daeae..ca13789 100644
@@ -1,15 +1,8 @@
+// SPDX-License-Identifier: GPL-2.0
 /*
  * Copyright (c) 2015 MediaTek Inc.
  * Author: Mars.C <[email protected]>
  *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
  */
 
 /dts-v1/;

arch/arm/boot/dts/mt6580.dtsi +1 -8

index a349dba..2bdc5ed 100644
@@ -1,15 +1,8 @@
+// SPDX-License-Identifier: GPL-2.0
 /*
  * Copyright (c) 2015 MediaTek Inc.
  * Author: Mars.C <[email protected]>
  *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
  */
 
 #include <dt-bindings/interrupt-controller/irq.h>

arch/arm/boot/dts/mt6589-aquaris5.dts +1 -9

index 594a6f3..7bbaa12 100644
@@ -1,16 +1,8 @@
+// SPDX-License-Identifier: GPL-2.0+
 /*
  * Copyright (c) 2014 MundoReader S.L.
  * Author: Matthias Brugger <[email protected]>
  *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
  */
 
 /dts-v1/;

arch/arm/boot/dts/mt6589.dtsi +2 ~~-10~~

index 41df742..28df849 100644
@@ -1,17 +1,9 @@
+// SPDX-License-Identifier: GPL-2.0+
 /*
  * Copyright (c) 2014 MundoReader S.L.
  * Author: Matthias Brugger <[email protected]>
  *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- */
+*/
 
 #include <dt-bindings/interrupt-controller/irq.h>
 #include <dt-bindings/interrupt-controller/arm-gic.h>

arch/arm/boot/dts/mt6592-evb.dts +1 -8

index b57237e..02849f6 100644
@@ -1,15 +1,8 @@
+// SPDX-License-Identifier: GPL-2.0
 /*
  * Copyright (c) 2014 MediaTek Inc.
  * Author: Howard Chen <[email protected]>
  *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
  */
 
 /dts-v1/;

arch/arm/boot/dts/mt6592.dtsi +1 -8

index c69201f..8696ac8 100644
@@ -1,15 +1,8 @@
+// SPDX-License-Identifier: GPL-2.0
 /*
  * Copyright (c) 2014 MediaTek Inc.
  * Author: Howard Chen <[email protected]>
  *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
  */
 
 #include <dt-bindings/interrupt-controller/irq.h>

arch/arm/boot/dts/mt7623.dtsi +1 -8

index e10c034..fec4715 100644
@@ -1,16 +1,9 @@
+// SPDX-License-Identifier: GPL-2.0
 /*
  * Copyright (c) 2017 MediaTek Inc.
  * Author: John Crispin <[email protected]>
  *	   Sean Wang <[email protected]>
  *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
  */
 
 #include <dt-bindings/interrupt-controller/irq.h>

arch/arm/boot/dts/mt7623n-rfb-nand.dts +1 -8

index f729c71..6b0d401 100644
@@ -1,15 +1,8 @@
+// SPDX-License-Identifier: GPL-2.0
 /*
  * Copyright (c) 2017 MediaTek Inc.
  * Author: John Crispin <[email protected]>
  *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
  */
 
 /dts-v1/;

arch/arm/boot/dts/mt7623n-rfb.dtsi +1 -8

index 256c5fd..a199ae7 100644
@@ -1,16 +1,9 @@
+// SPDX-License-Identifier: GPL-2.0
 /*
  * Copyright (c) 2017 MediaTek Inc.
  * Author: John Crispin <[email protected]>
  *	   Sean Wang <[email protected]>
  *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
  */
 
 /dts-v1/;

arch/arm/boot/dts/mt8127-moose.dts +1 -8

index 073e295..308829b 100644
@@ -1,15 +1,8 @@
+// SPDX-License-Identifier: GPL-2.0
 /*
  * Copyright (c) 2014 MediaTek Inc.
  * Author: Joe.C <[email protected]>
  *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
  */
 
 /dts-v1/;

arch/arm/boot/dts/mt8127.dtsi +1 -8

index 916c095..3adfc6f 100644
@@ -1,15 +1,8 @@
+// SPDX-License-Identifier: GPL-2.0
 /*
  * Copyright (c) 2014 MediaTek Inc.
  * Author: Joe.C <[email protected]>
  *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
  */
 
 #include <dt-bindings/interrupt-controller/irq.h>

arch/arm/boot/dts/mt8135-evbp1.dts +1 -8

index 460db6d..0ace7a4 100644
@@ -1,15 +1,8 @@
+// SPDX-License-Identifier: GPL-2.0
 /*
  * Copyright (c) 2014 MediaTek Inc.
  * Author: Joe.C <[email protected]>
  *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
  */
 
 /dts-v1/;

arch/arm/boot/dts/mt8135.dtsi +1 -8

index a97b4ee..688069d 100644
@@ -1,15 +1,8 @@
+// SPDX-License-Identifier: GPL-2.0
 /*
  * Copyright (c) 2014 MediaTek Inc.
  * Author: Joe.C <[email protected]>
  *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
  */
 
 #include <dt-bindings/clock/mt8135-clk.h>

Signature · 1 line

2.7.4

[email protected]

author

2018-04-11 08:53 UTC #4 lore raw

PATCH v2 3/12 arm: dts: mt7623: fix invalid memory node being generated

In reply to [email protected]

From: Sean Wang <[email protected]>

Below two wrong nodes in existing DTS files would cause a fail boot since in fact the address 0 is not the correct place the memory device locates at.

memory {
        device_type = "memory";
        reg = <0x0 0x0 0x0 0x0>;
};

memory at 80000000 {
        reg = <0x0 0x80000000 0x0 0x40000000>;
};

In order to avoid having a memory node starting at address 0, we can't include file skeleton64.dtsi and instead need to explicitly manually define a few of properties the DTS relies on such as #address-cells and #size-cells in root node and device_type in the node memory at 80000000.

Cc stable at vger.kernel.org

Fixes 31ac0d69a1d4 ("ARM: dts: mediatek: add MT7623 basic support")

Signed-off-by Sean Wang <[email protected]>

Cc Rob Herring <[email protected]>

---
 arch/arm/boot/dts/mt7623.dtsi                 | 3 ++-
 arch/arm/boot/dts/mt7623n-bananapi-bpi-r2.dts | 1 +
 arch/arm/boot/dts/mt7623n-rfb.dtsi            | 1 +
 3 files changed, 4 insertions(+), 1 deletion(-)

arch/arm/boot/dts/mt7623.dtsi +2 -1

index fec4715..406a9f3 100644
@@ -15,11 +15,12 @@
 #include <dt-bindings/phy/phy.h>
 #include <dt-bindings/reset/mt2701-resets.h>
 #include <dt-bindings/thermal/thermal.h>
-#include "skeleton64.dtsi"
 
 / {
 	compatible = "mediatek,mt7623";
 	interrupt-parent = <&sysirq>;
+	#address-cells = <2>;
+	#size-cells = <2>;
 
 	cpu_opp_table: opp-table {
 		compatible = "operating-points-v2";

arch/arm/boot/dts/mt7623n-bananapi-bpi-r2.dts +1 -0

index bbf56f8..5938e4c 100644
@@ -109,6 +109,7 @@
 	};
 
 	memory at 80000000 {
+		device_type = "memory";
 		reg = <0 0x80000000 0 0x40000000>;
 	};
 };

arch/arm/boot/dts/mt7623n-rfb.dtsi +1 -0

index a199ae7..343e8ef 100644
@@ -40,6 +40,7 @@
 	};
 
 	memory at 80000000 {
+		device_type = "memory";
 		reg = <0 0x80000000 0 0x40000000>;
 	};

Signature · 1 line

2.7.4

Matthias Brugger

maintainer

2018-05-11 15:03 UTC #5 lore raw

Re: [PATCH v2 03/12] arm: dts: mt7623: fix invalid memory node being generated

Quoted 24 lines · sean.wang at mediatek.com

From: Sean Wang <[email protected]>
Below two wrong nodes in existing DTS files would cause a fail boot since in fact the address 0 is not the correct place the memory device locates at.
memory {
        device_type = "memory";
        reg = <0x0 0x0 0x0 0x0>;
};
memory at 80000000 {
        reg = <0x0 0x80000000 0x0 0x40000000>;
};
In order to avoid having a memory node starting at address 0, we can't include file skeleton64.dtsi and instead need to explicitly manually define a few of properties the DTS relies on such as #address-cells and #size-cells in root node and device_type in the node memory at 80000000.
Cc stable at vger.kernel.org
Fixes 31ac0d69a1d4 ("ARM: dts: mediatek: add MT7623 basic support")
Signed-off-by Sean Wang <[email protected]>
Cc Rob Herring <[email protected]>

Quoted 6 lines

---
 arch/arm/boot/dts/mt7623.dtsi                 | 3 ++-
 arch/arm/boot/dts/mt7623n-bananapi-bpi-r2.dts | 1 +
 arch/arm/boot/dts/mt7623n-rfb.dtsi            | 1 +
 3 files changed, 4 insertions(+), 1 deletion(-)

merged. We would need this at least for mt2701 as well, correct? Would you mind to provide a patch.

Regards,
Matthias

Quoted 43 lines

arch/arm/boot/dts/mt7623.dtsi +2 -1

index fec4715..406a9f3 100644
@@ -15,11 +15,12 @@
 #include <dt-bindings/phy/phy.h>
 #include <dt-bindings/reset/mt2701-resets.h>
 #include <dt-bindings/thermal/thermal.h>
-#include "skeleton64.dtsi"
 
 / {
 	compatible = "mediatek,mt7623";
 	interrupt-parent = <&sysirq>;
+	#address-cells = <2>;
+	#size-cells = <2>;
 
 	cpu_opp_table: opp-table {
 		compatible = "operating-points-v2";

arch/arm/boot/dts/mt7623n-bananapi-bpi-r2.dts +1 -0

index bbf56f8..5938e4c 100644
@@ -109,6 +109,7 @@
 	};
 
 	memory at 80000000 {
+		device_type = "memory";
 		reg = <0 0x80000000 0 0x40000000>;
 	};
 };

arch/arm/boot/dts/mt7623n-rfb.dtsi +1 -0

index a199ae7..343e8ef 100644
@@ -40,6 +40,7 @@
 	};
 
 	memory at 80000000 {
+		device_type = "memory";
 		reg = <0 0x80000000 0 0x40000000>;
 	};

Sean Wang

author

2018-05-12 05:28 UTC #6 lore raw

Re: [PATCH v2 03/12] arm: dts: mt7623: fix invalid memory node being generated

Quoted 33 lines · Matthias Brugger

Quoted 24 lines · sean.wang at mediatek.com
From: Sean Wang <[email protected]>
Below two wrong nodes in existing DTS files would cause a fail boot since in fact the address 0 is not the correct place the memory device locates at.
memory {
        device_type = "memory";
        reg = <0x0 0x0 0x0 0x0>;
};
memory at 80000000 {
        reg = <0x0 0x80000000 0x0 0x40000000>;
};
In order to avoid having a memory node starting at address 0, we can't include file skeleton64.dtsi and instead need to explicitly manually define a few of properties the DTS relies on such as #address-cells and #size-cells in root node and device_type in the node memory at 80000000.
Cc stable at vger.kernel.org
Fixes 31ac0d69a1d4 ("ARM: dts: mediatek: add MT7623 basic support")
Signed-off-by Sean Wang <[email protected]>
Cc Rob Herring <[email protected]>
Quoted 6 lines
---
 arch/arm/boot/dts/mt7623.dtsi                 | 3 ++-
 arch/arm/boot/dts/mt7623n-bananapi-bpi-r2.dts | 1 +
 arch/arm/boot/dts/mt7623n-rfb.dtsi            | 1 +
 3 files changed, 4 insertions(+), 1 deletion(-)

Quoted 6 lines

merged. We would need this at least for mt2701 as well, correct? Would you mind to provide a patch.
Regards,
Matthias

Thanks! I totally think the same problem could happen on mt2701, so I'm happy to come up with a patch for that.

Sean

Quoted 43 lines

arch/arm/boot/dts/mt7623.dtsi +2 -1

index fec4715..406a9f3 100644
@@ -15,11 +15,12 @@
 #include <dt-bindings/phy/phy.h>
 #include <dt-bindings/reset/mt2701-resets.h>
 #include <dt-bindings/thermal/thermal.h>
-#include "skeleton64.dtsi"
 
 / {
 	compatible = "mediatek,mt7623";
 	interrupt-parent = <&sysirq>;
+	#address-cells = <2>;
+	#size-cells = <2>;
 
 	cpu_opp_table: opp-table {
 		compatible = "operating-points-v2";

arch/arm/boot/dts/mt7623n-bananapi-bpi-r2.dts +1 -0

index bbf56f8..5938e4c 100644
@@ -109,6 +109,7 @@
 	};
 
 	memory at 80000000 {
+		device_type = "memory";
 		reg = <0 0x80000000 0 0x40000000>;
 	};
 };

arch/arm/boot/dts/mt7623n-rfb.dtsi +1 -0

index a199ae7..343e8ef 100644
@@ -40,6 +40,7 @@
 	};
 
 	memory at 80000000 {
+		device_type = "memory";
 		reg = <0 0x80000000 0 0x40000000>;
 	};

[email protected]

author

2018-04-11 08:53 UTC #7 lore raw

PATCH v2 4/12 arm: dts: mt7623: fix available memory size on bananapi-r2

In reply to [email protected]

From: Sean Wang <[email protected]>

There is 2GB DDR3 available on bananapi-r2 board as [1] specified.

[1] http://www.banana-pi.org/r2.html

Signed-off-by Sean Wang <[email protected]>

Cc Rob Herring <[email protected]>

---
 arch/arm/boot/dts/mt7623n-bananapi-bpi-r2.dts | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

arch/arm/boot/dts/mt7623n-bananapi-bpi-r2.dts +1 -1

index 5938e4c..d2a354e 100644
@@ -110,7 +110,7 @@
 
 	memory at 80000000 {
 		device_type = "memory";
-		reg = <0 0x80000000 0 0x40000000>;
+		reg = <0 0x80000000 0 0x80000000>;
 	};
 };

Signature · 1 line

2.7.4

[email protected]

author

2018-04-11 08:53 UTC #8 lore raw

PATCH v2 5/12 arm: dts: mt7623: fix all Warnings (unit_address_vs_reg)

In reply to [email protected]

From: Sean Wang <[email protected]>

Fix below a lot of Warnings (unit_address_vs_reg) that dtc complains so much for

Node /oscillator at 1 has a unit name, but no reg property Node /oscillator at 0 has a unit name, but no reg property Node /pinctrl at 10005000/cir at 0 has a unit name, but no reg property Node /pinctrl at 10005000/i2c at 0 has a unit name, but no reg property Node /pinctrl at 10005000/i2c at 1 has a unit name, but no reg property Node /pinctrl at 10005000/i2s at 0 has a unit name, but no reg property Node /pinctrl at 10005000/i2s at 1 has a unit name, but no reg property Node /pinctrl at 10005000/keys at 0 has a unit name, but no reg property Node /pinctrl at 10005000/leds at 0 has a unit name, but no reg property Node /pinctrl at 10005000/pwm at 0 has a unit name, but no reg property Node /pinctrl at 10005000/spi at 0 has a unit name, but no reg property Node /pinctrl at 10005000/uart at 0 has a unit name, but no reg property Node /pinctrl at 10005000/uart at 1 has a unit name, but no reg property Node /pinctrl at 10005000/uart at 2 has a unit name, but no reg property Node /ethernet at 1b100000/mdio-bus/switch at 0/ports has a reg or ranges property, but no unit name

Signed-off-by Sean Wang <[email protected]>

Cc Rob Herring <[email protected]>

Cc Mark Rutland <[email protected]>

Cc devicetree at vger.kernel.org

---
 arch/arm/boot/dts/mt7623.dtsi                 |  4 ++--
 arch/arm/boot/dts/mt7623n-bananapi-bpi-r2.dts | 27 ++++++++++++---------------
 arch/arm/boot/dts/mt7623n-rfb.dtsi            |  2 +-
 3 files changed, 15 insertions(+), 18 deletions(-)

arch/arm/boot/dts/mt7623.dtsi +2 -2

index 406a9f3..b9b5619 100644
@@ -124,14 +124,14 @@
 		#clock-cells = <0>;
 	};
 
-	rtc32k: oscillator at 1 {
+	rtc32k: oscillator-1 {
 		compatible = "fixed-clock";
 		#clock-cells = <0>;
 		clock-frequency = <32000>;
 		clock-output-names = "rtc32k";
 	};
 
-	clk26m: oscillator at 0 {
+	clk26m: oscillator-0 {
 		compatible = "fixed-clock";
 		#clock-cells = <0>;
 		clock-frequency = <26000000>;

arch/arm/boot/dts/mt7623n-bananapi-bpi-r2.dts +12 ~~-15~~

index d2a354e..71023a6 100644
@@ -145,8 +145,6 @@
 
 		switch at 0 {
 			compatible = "mediatek,mt7530";
-			#address-cells = <1>;
-			#size-cells = <0>;
 			reg = <0>;
 			reset-gpios = <&pio 33 0>;
 			core-supply = <&mt6323_vpa_reg>;

@@ -155,7 +153,6 @@
 			ports {
 				#address-cells = <1>;
 				#size-cells = <0>;
-				reg = <0>;
 
 				port at 0 {
 					reg = <0>;

@@ -259,14 +256,14 @@
 };
 
 &pio {
-	cir_pins_a:cir at 0 {
+	cir_pins_a:cir-default {
 		pins-cir {
 			pinmux = <MT7623_PIN_46_IR_FUNC_IR>;
 			bias-disable;
 		};
 	};
 
-	i2c0_pins_a: i2c at 0 {
+	i2c0_pins_a: i2c0-default {
 		pins-i2c0 {
 			pinmux = <MT7623_PIN_75_SDA0_FUNC_SDA0>,
 				 <MT7623_PIN_76_SCL0_FUNC_SCL0>;

@@ -274,7 +271,7 @@
 		};
 	};
 
-	i2c1_pins_a: i2c at 1 {
+	i2c1_pins_a: i2c1-default {
 		pin-i2c1 {
 			pinmux = <MT7623_PIN_57_SDA1_FUNC_SDA1>,
 				 <MT7623_PIN_58_SCL1_FUNC_SCL1>;

@@ -282,7 +279,7 @@
 		};
 	};
 
-	i2s0_pins_a: i2s at 0 {
+	i2s0_pins_a: i2s0-default {
 		pin-i2s0 {
 			pinmux = <MT7623_PIN_49_I2S0_DATA_FUNC_I2S0_DATA>,
 				 <MT7623_PIN_72_I2S0_DATA_IN_FUNC_I2S0_DATA_IN>,

@@ -294,7 +291,7 @@
 		};
 	};
 
-	i2s1_pins_a: i2s at 1 {
+	i2s1_pins_a: i2s1-default {
 		pin-i2s1 {
 			pinmux = <MT7623_PIN_33_I2S1_DATA_FUNC_I2S1_DATA>,
 				 <MT7623_PIN_34_I2S1_DATA_IN_FUNC_I2S1_DATA_IN>,

@@ -306,7 +303,7 @@
 		};
 	};
 
-	key_pins_a: keys at 0 {
+	key_pins_a: keys-alt {
 		pins-keys {
 			pinmux = <MT7623_PIN_256_GPIO256_FUNC_GPIO256>,
 				 <MT7623_PIN_257_GPIO257_FUNC_GPIO257> ;

@@ -314,7 +311,7 @@
 		};
 	};
 
-	led_pins_a: leds at 0 {
+	led_pins_a: leds-alt {
 		pins-leds {
 			pinmux = <MT7623_PIN_239_EXT_SDIO0_FUNC_GPIO239>,
 				 <MT7623_PIN_240_EXT_XCS_FUNC_GPIO240>,

@@ -433,7 +430,7 @@
 		};
 	};
 
-	pwm_pins_a: pwm at 0 {
+	pwm_pins_a: pwm-default {
 		pins-pwm {
 			pinmux = <MT7623_PIN_203_PWM0_FUNC_PWM0>,
 				 <MT7623_PIN_204_PWM1_FUNC_PWM1>,

@@ -443,7 +440,7 @@
 		};
 	};
 
-	spi0_pins_a: spi at 0 {
+	spi0_pins_a: spi0-default {
 		pins-spi {
 			pinmux = <MT7623_PIN_53_SPI0_CSN_FUNC_SPI0_CS>,
 				<MT7623_PIN_54_SPI0_CK_FUNC_SPI0_CK>,

@@ -453,21 +450,21 @@
 		};
 	};
 
-	uart0_pins_a: uart at 0 {
+	uart0_pins_a: uart0-default {
 		pins-dat {
 			pinmux = <MT7623_PIN_79_URXD0_FUNC_URXD0>,
 				 <MT7623_PIN_80_UTXD0_FUNC_UTXD0>;
 		};
 	};
 
-	uart1_pins_a: uart at 1 {
+	uart1_pins_a: uart1-default {
 		pins-dat {
 			pinmux = <MT7623_PIN_81_URXD1_FUNC_URXD1>,
 				 <MT7623_PIN_82_UTXD1_FUNC_UTXD1>;
 		};
 	};
 
-	uart2_pins_a: uart at 2 {
+	uart2_pins_a: uart2-default {
 		pins-dat {
 			pinmux = <MT7623_PIN_14_GPIO14_FUNC_URXD2>,
 				 <MT7623_PIN_15_GPIO15_FUNC_UTXD2>;

arch/arm/boot/dts/mt7623n-rfb.dtsi +1 -1

index 343e8ef..5c5cc7d 100644
@@ -44,7 +44,7 @@
 		reg = <0 0x80000000 0 0x40000000>;
 	};
 
-	usb_p1_vbus: regulator at 0 {
+	usb_p1_vbus: regulator-5v {
 		compatible = "regulator-fixed";
 		regulator-name = "usb_vbus";
 		regulator-min-microvolt = <5000000>;

Signature · 1 line

2.7.4

[email protected]

author

2018-04-11 08:53 UTC #9 lore raw

PATCH v2 6/12 arm: dts: mt7623: add BTIF, HSDMA and SPI-NOR device nodes

In reply to [email protected]

From: Sean Wang <[email protected]>

add BTIF, HSDMA and SPI-NOR device nodes and enable it on relevant boards

Signed-off-by Sean Wang <[email protected]>

---
 arch/arm/boot/dts/mt7623.dtsi                 | 36 ++++++++++++++++++++++++++-
 arch/arm/boot/dts/mt7623n-bananapi-bpi-r2.dts |  6 ++++-
 2 files changed, 40 insertions(+), 2 deletions(-)

arch/arm/boot/dts/mt7623.dtsi +35 -1

index b9b5619..8cf3d26 100644
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: GPL-2.0
 /*
- * Copyright (c) 2017 MediaTek Inc.
+ * Copyright (c) 2017-2018 MediaTek Inc.
  * Author: John Crispin <[email protected]>
  *	   Sean Wang <[email protected]>
  *

@@ -486,6 +486,18 @@
 		nvmem-cell-names = "calibration-data";
 	};
 
+	btif: serial at 1100c000 {
+		compatible = "mediatek,mt7623-btif",
+			     "mediatek,mtk-btif";
+		reg = <0 0x1100c000 0 0x1000>;
+		interrupts = <GIC_SPI 50 IRQ_TYPE_LEVEL_LOW>;
+		clocks = <&pericfg CLK_PERI_BTIF>;
+		clock-names = "main";
+		reg-shift = <2>;
+		reg-io-width = <4>;
+		status = "disabled";
+	};
+
 	nandc: nfi at 1100d000 {
 		compatible = "mediatek,mt7623-nfc",
 			     "mediatek,mt2701-nfc";

@@ -511,6 +523,18 @@
 		status = "disabled";
 	};
 
+	nor_flash: spi at 11014000 {
+		compatible = "mediatek,mt7623-nor",
+			     "mediatek,mt8173-nor";
+		reg = <0 0x11014000 0 0x1000>;
+		clocks = <&pericfg CLK_PERI_FLASH>,
+			 <&topckgen CLK_TOP_FLASH_SEL>;
+		clock-names = "spi", "sf";
+		#address-cells = <1>;
+		#size-cells = <0>;
+		status = "disabled";
+	};
+
 	spi1: spi at 11016000 {
 		compatible = "mediatek,mt7623-spi",
 			     "mediatek,mt2701-spi";

@@ -867,6 +891,16 @@
 		#reset-cells = <1>;
 	};
 
+	hsdma: dma-controller at 1b007000 {
+		compatible = "mediatek,mt7623-hsdma";
+		reg = <0 0x1b007000 0 0x1000>;
+		interrupts = <GIC_SPI 98 IRQ_TYPE_LEVEL_LOW>;
+		clocks = <&ethsys CLK_ETHSYS_HSDMA>;
+		clock-names = "hsdma";
+		power-domains = <&scpsys MT2701_POWER_DOMAIN_ETH>;
+		#dma-cells = <1>;
+	};
+
 	eth: ethernet at 1b100000 {
 		compatible = "mediatek,mt7623-eth",
 			     "mediatek,mt2701-eth",

arch/arm/boot/dts/mt7623n-bananapi-bpi-r2.dts +5 -1

index 71023a6..1fd6f55 100644
@@ -1,5 +1,5 @@
 /*
- * Copyright 2017 Sean Wang <[email protected]>
+ * Copyright 2017-2018 Sean Wang <[email protected]>
  *
  * SPDX-License-Identifier: (GPL-2.0+ OR MIT)
  */

@@ -114,6 +114,10 @@
 	};
 };
 
+&btif {
+	status = "okay";
+};
+
 &cir {
 	pinctrl-names = "default";
 	pinctrl-0 = <&cir_pins_a>;

Signature · 1 line

2.7.4

[email protected]

author

2018-04-11 08:54 UTC #10 lore raw

PATCH v2 7/12 arm: dts: mt6323: move node mt6323 leds to mt6323.dtsi

In reply to [email protected]

From: Sean Wang <[email protected]>

Since those LEDs are parts of PMIC MT6323, it is reasonable to merge those LEDs node definition back into mt6323.dtsi. This way can improve the reusability of those nodes among different boards with the same PMIC.

And LED is very much board specific and thus the mt6323.dtsi only includes the parent node here and leave these child nodes in the board specific dts file.

Signed-off-by Sean Wang <[email protected]>

Cc Lee Jones <[email protected]>

Cc Rob Herring <[email protected]>

---
 arch/arm/boot/dts/mt6323.dtsi                 |  9 ++++-
 arch/arm/boot/dts/mt7623n-bananapi-bpi-r2.dts | 50 ++++++++++++---------------
 2 files changed, 30 insertions(+), 29 deletions(-)

arch/arm/boot/dts/mt6323.dtsi +8 -1

index 958980c..ba39740 100644
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: GPL-2.0
 /*
- * Copyright (c) 2017 MediaTek Inc.
+ * Copyright (c) 2017-2018 MediaTek Inc.
  * Author: John Crispin <[email protected]>
  *	   Sean Wang <[email protected]>
  *

@@ -14,6 +14,13 @@
 		interrupt-controller;
 		#interrupt-cells = <2>;
 
+		mt6323_leds: leds {
+			compatible = "mediatek,mt6323-led";
+			#address-cells = <1>;
+			#size-cells = <0>;
+			status = "disabled";
+		};
+
 		mt6323regulator: mt6323regulator{
 			compatible = "mediatek,mt6323-regulator";

arch/arm/boot/dts/mt7623n-bananapi-bpi-r2.dts +22 ~~-28~~

62 lines not on this page · raw message

Signature · 1 line

2.7.4

[email protected]

author

2018-04-11 08:54 UTC #11 lore raw

PATCH v2 8/12 arm: dts: mediatek: modify audio related nodes for both MT2701 and MT7623

In reply to [email protected]

From: Ryder Lee <[email protected]>

Modify audio related nodes to reflect the actual usage in binding documents.

Signed-off-by Ryder Lee <[email protected]>

Signed-off-by Sean Wang <[email protected]>

---
 arch/arm/boot/dts/mt2701.dtsi | 188 ++++++++++++++++++++---------------------
 arch/arm/boot/dts/mt7623.dtsi | 190 ++++++++++++++++++++----------------------
 2 files changed, 182 insertions(+), 196 deletions(-)

arch/arm/boot/dts/mt2701.dtsi +90 ~~-98~~

index cf1c8eb..180377e 100644
@@ -419,104 +419,96 @@
 		status = "disabled";
 	};
 
-	afe: audio-controller at 11220000 {
-		compatible = "mediatek,mt2701-audio";
-		reg = <0 0x11220000 0 0x2000>,
-		      <0 0x112a0000 0 0x20000>;
-		interrupts =  <GIC_SPI 104 IRQ_TYPE_LEVEL_LOW>,
-			      <GIC_SPI 132 IRQ_TYPE_LEVEL_LOW>;
-		interrupt-names	= "afe", "asys";
-		power-domains = <&scpsys MT2701_POWER_DOMAIN_IFR_MSC>;
-
-		clocks = <&infracfg CLK_INFRA_AUDIO>,
-			 <&topckgen CLK_TOP_AUD_MUX1_SEL>,
-			 <&topckgen CLK_TOP_AUD_MUX2_SEL>,
-			 <&topckgen CLK_TOP_AUD_MUX1_DIV>,
-			 <&topckgen CLK_TOP_AUD_MUX2_DIV>,
-			 <&topckgen CLK_TOP_AUD_48K_TIMING>,
-			 <&topckgen CLK_TOP_AUD_44K_TIMING>,
-			 <&topckgen CLK_TOP_AUDPLL_MUX_SEL>,
-			 <&topckgen CLK_TOP_APLL_SEL>,
-			 <&topckgen CLK_TOP_AUD1PLL_98M>,
-			 <&topckgen CLK_TOP_AUD2PLL_90M>,
-			 <&topckgen CLK_TOP_HADDS2PLL_98M>,
-			 <&topckgen CLK_TOP_HADDS2PLL_294M>,
-			 <&topckgen CLK_TOP_AUDPLL>,
-			 <&topckgen CLK_TOP_AUDPLL_D4>,
-			 <&topckgen CLK_TOP_AUDPLL_D8>,
-			 <&topckgen CLK_TOP_AUDPLL_D16>,
-			 <&topckgen CLK_TOP_AUDPLL_D24>,
-			 <&topckgen CLK_TOP_AUDINTBUS_SEL>,
-			 <&clk26m>,
-			 <&topckgen CLK_TOP_SYSPLL1_D4>,
-			 <&topckgen CLK_TOP_AUD_K1_SRC_SEL>,
-			 <&topckgen CLK_TOP_AUD_K2_SRC_SEL>,
-			 <&topckgen CLK_TOP_AUD_K3_SRC_SEL>,
-			 <&topckgen CLK_TOP_AUD_K4_SRC_SEL>,
-			 <&topckgen CLK_TOP_AUD_K5_SRC_SEL>,
-			 <&topckgen CLK_TOP_AUD_K6_SRC_SEL>,
-			 <&topckgen CLK_TOP_AUD_K1_SRC_DIV>,
-			 <&topckgen CLK_TOP_AUD_K2_SRC_DIV>,
-			 <&topckgen CLK_TOP_AUD_K3_SRC_DIV>,
-			 <&topckgen CLK_TOP_AUD_K4_SRC_DIV>,
-			 <&topckgen CLK_TOP_AUD_K5_SRC_DIV>,
-			 <&topckgen CLK_TOP_AUD_K6_SRC_DIV>,
-			 <&topckgen CLK_TOP_AUD_I2S1_MCLK>,
-			 <&topckgen CLK_TOP_AUD_I2S2_MCLK>,
-			 <&topckgen CLK_TOP_AUD_I2S3_MCLK>,
-			 <&topckgen CLK_TOP_AUD_I2S4_MCLK>,
-			 <&topckgen CLK_TOP_AUD_I2S5_MCLK>,
-			 <&topckgen CLK_TOP_AUD_I2S6_MCLK>,
-			 <&topckgen CLK_TOP_ASM_M_SEL>,
-			 <&topckgen CLK_TOP_ASM_H_SEL>,
-			 <&topckgen CLK_TOP_UNIVPLL2_D4>,
-			 <&topckgen CLK_TOP_UNIVPLL2_D2>,
-			 <&topckgen CLK_TOP_SYSPLL_D5>;
-
-		clock-names = "infra_sys_audio_clk",
-			 "top_audio_mux1_sel",
-			 "top_audio_mux2_sel",
-			 "top_audio_mux1_div",
-			 "top_audio_mux2_div",
-			 "top_audio_48k_timing",
-			 "top_audio_44k_timing",
-			 "top_audpll_mux_sel",
-			 "top_apll_sel",
-			 "top_aud1_pll_98M",
-			 "top_aud2_pll_90M",
-			 "top_hadds2_pll_98M",
-			 "top_hadds2_pll_294M",
-			 "top_audpll",
-			 "top_audpll_d4",
-			 "top_audpll_d8",
-			 "top_audpll_d16",
-			 "top_audpll_d24",
-			 "top_audintbus_sel",
-			 "clk_26m",
-			 "top_syspll1_d4",
-			 "top_aud_k1_src_sel",
-			 "top_aud_k2_src_sel",
-			 "top_aud_k3_src_sel",
-			 "top_aud_k4_src_sel",
-			 "top_aud_k5_src_sel",
-			 "top_aud_k6_src_sel",
-			 "top_aud_k1_src_div",
-			 "top_aud_k2_src_div",
-			 "top_aud_k3_src_div",
-			 "top_aud_k4_src_div",
-			 "top_aud_k5_src_div",
-			 "top_aud_k6_src_div",
-			 "top_aud_i2s1_mclk",
-			 "top_aud_i2s2_mclk",
-			 "top_aud_i2s3_mclk",
-			 "top_aud_i2s4_mclk",
-			 "top_aud_i2s5_mclk",
-			 "top_aud_i2s6_mclk",
-			 "top_asm_m_sel",
-			 "top_asm_h_sel",
-			 "top_univpll2_d4",
-			 "top_univpll2_d2",
-			 "top_syspll_d5";
+	audsys: clock-controller at 11220000 {
+		compatible = "mediatek,mt2701-audsys", "syscon";
+		reg = <0 0x11220000 0 0x2000>;
+		#clock-cells = <1>;
+
+		afe: audio-controller {
+			compatible = "mediatek,mt2701-audio";
+			interrupts =  <GIC_SPI 104 IRQ_TYPE_LEVEL_LOW>,
+				      <GIC_SPI 132 IRQ_TYPE_LEVEL_LOW>;
+			interrupt-names	= "afe", "asys";
+			power-domains = <&scpsys MT2701_POWER_DOMAIN_IFR_MSC>;
+
+			clocks = <&infracfg CLK_INFRA_AUDIO>,
+				 <&topckgen CLK_TOP_AUD_MUX1_SEL>,
+				 <&topckgen CLK_TOP_AUD_MUX2_SEL>,
+				 <&topckgen CLK_TOP_AUD_48K_TIMING>,
+				 <&topckgen CLK_TOP_AUD_44K_TIMING>,
+				 <&topckgen CLK_TOP_AUD_K1_SRC_SEL>,
+				 <&topckgen CLK_TOP_AUD_K2_SRC_SEL>,
+				 <&topckgen CLK_TOP_AUD_K3_SRC_SEL>,
+				 <&topckgen CLK_TOP_AUD_K4_SRC_SEL>,
+				 <&topckgen CLK_TOP_AUD_K1_SRC_DIV>,
+				 <&topckgen CLK_TOP_AUD_K2_SRC_DIV>,
+				 <&topckgen CLK_TOP_AUD_K3_SRC_DIV>,
+				 <&topckgen CLK_TOP_AUD_K4_SRC_DIV>,
+				 <&topckgen CLK_TOP_AUD_I2S1_MCLK>,
+				 <&topckgen CLK_TOP_AUD_I2S2_MCLK>,
+				 <&topckgen CLK_TOP_AUD_I2S3_MCLK>,
+				 <&topckgen CLK_TOP_AUD_I2S4_MCLK>,
+				 <&audsys CLK_AUD_I2SO1>,
+				 <&audsys CLK_AUD_I2SO2>,
+				 <&audsys CLK_AUD_I2SO3>,
+				 <&audsys CLK_AUD_I2SO4>,
+				 <&audsys CLK_AUD_I2SIN1>,
+				 <&audsys CLK_AUD_I2SIN2>,
+				 <&audsys CLK_AUD_I2SIN3>,
+				 <&audsys CLK_AUD_I2SIN4>,
+				 <&audsys CLK_AUD_ASRCO1>,
+				 <&audsys CLK_AUD_ASRCO2>,
+				 <&audsys CLK_AUD_ASRCO3>,
+				 <&audsys CLK_AUD_ASRCO4>,
+				 <&audsys CLK_AUD_AFE>,
+				 <&audsys CLK_AUD_AFE_CONN>,
+				 <&audsys CLK_AUD_A1SYS>,
+				 <&audsys CLK_AUD_A2SYS>,
+				 <&audsys CLK_AUD_AFE_MRGIF>;
+
+			clock-names = "infra_sys_audio_clk",
+				      "top_audio_mux1_sel",
+				      "top_audio_mux2_sel",
+				      "top_audio_a1sys_hp",
+				      "top_audio_a2sys_hp",
+				      "i2s0_src_sel",
+				      "i2s1_src_sel",
+				      "i2s2_src_sel",
+				      "i2s3_src_sel",
+				      "i2s0_src_div",
+				      "i2s1_src_div",
+				      "i2s2_src_div",
+				      "i2s3_src_div",
+				      "i2s0_mclk_en",
+				      "i2s1_mclk_en",
+				      "i2s2_mclk_en",
+				      "i2s3_mclk_en",
+				      "i2so0_hop_ck",
+				      "i2so1_hop_ck",
+				      "i2so2_hop_ck",
+				      "i2so3_hop_ck",
+				      "i2si0_hop_ck",
+				      "i2si1_hop_ck",
+				      "i2si2_hop_ck",
+				      "i2si3_hop_ck",
+				      "asrc0_out_ck",
+				      "asrc1_out_ck",
+				      "asrc2_out_ck",
+				      "asrc3_out_ck",
+				      "audio_afe_pd",
+				      "audio_afe_conn_pd",
+				      "audio_a1sys_pd",
+				      "audio_a2sys_pd",
+				      "audio_mrgif_pd";
+
+			assigned-clocks = <&topckgen CLK_TOP_AUD_MUX1_SEL>,
+					  <&topckgen CLK_TOP_AUD_MUX2_SEL>,
+					  <&topckgen CLK_TOP_AUD_MUX1_DIV>,
+					  <&topckgen CLK_TOP_AUD_MUX2_DIV>;
+			assigned-clock-parents = <&topckgen CLK_TOP_AUD1PLL_98M>,
+						 <&topckgen CLK_TOP_AUD2PLL_90M>;
+			assigned-clock-rates = <0>, <0>, <49152000>, <45158400>;
+		};
 	};
 
 	mmsys: syscon at 14000000 {

arch/arm/boot/dts/mt7623.dtsi +92 ~~-98~~

197 lines not on this page · raw message

Signature · 1 line

2.7.4

[email protected]

author

2018-04-11 08:54 UTC #12 lore raw

PATCH v2 9/12 arm: dts: mt7623: extend common file reused by all boards with MT7623 SoCs

In reply to [email protected]

From: Sean Wang <[email protected]>

Move all possible setups for pio into SoC level DTSI file mt7623.dtsi in order to introduce more boards such as official MT7623A reference boards without copy-n-pasting almost the same content of nodes in pio into every new file.

So, it should be better to reuse those nodes by consolidating them into the common file mt7623.dtsi from the current existent DTS and allow new DTS files to refer to them.

Signed-off-by Sean Wang <[email protected]>

---
 arch/arm/boot/dts/mt7623.dtsi                 | 246 ++++++++++++++++++++++++++
 arch/arm/boot/dts/mt7623n-bananapi-bpi-r2.dts | 217 -----------------------
 arch/arm/boot/dts/mt7623n-rfb-nand.dts        |  31 ----
 3 files changed, 246 insertions(+), 248 deletions(-)

arch/arm/boot/dts/mt7623.dtsi +246 -0

index eef81d2..01893858 100644
@@ -935,3 +935,249 @@
 		status = "disabled";
 	};
 };
+
+&pio {
+	cir_pins_a:cir-default {
+		pins-cir {
+			pinmux = <MT7623_PIN_46_IR_FUNC_IR>;
+			bias-disable;
+		};
+	};
+
+	i2c0_pins_a: i2c0-default {
+		pins-i2c0 {
+			pinmux = <MT7623_PIN_75_SDA0_FUNC_SDA0>,
+				 <MT7623_PIN_76_SCL0_FUNC_SCL0>;
+			bias-disable;
+		};
+	};
+
+	i2c1_pins_a: i2c1-default {
+		pin-i2c1 {
+			pinmux = <MT7623_PIN_57_SDA1_FUNC_SDA1>,
+				 <MT7623_PIN_58_SCL1_FUNC_SCL1>;
+			bias-disable;
+		};
+	};
+
+	i2s0_pins_a: i2s0-default {
+		pin-i2s0 {
+			pinmux = <MT7623_PIN_49_I2S0_DATA_FUNC_I2S0_DATA>,
+				 <MT7623_PIN_72_I2S0_DATA_IN_FUNC_I2S0_DATA_IN>,
+				 <MT7623_PIN_73_I2S0_LRCK_FUNC_I2S0_LRCK>,
+				 <MT7623_PIN_74_I2S0_BCK_FUNC_I2S0_BCK>,
+				 <MT7623_PIN_126_I2S0_MCLK_FUNC_I2S0_MCLK>;
+			drive-strength = <MTK_DRIVE_12mA>;
+			bias-pull-down;
+		};
+	};
+
+	i2s1_pins_a: i2s1-default {
+		pin-i2s1 {
+			pinmux = <MT7623_PIN_33_I2S1_DATA_FUNC_I2S1_DATA>,
+				 <MT7623_PIN_34_I2S1_DATA_IN_FUNC_I2S1_DATA_IN>,
+				 <MT7623_PIN_35_I2S1_BCK_FUNC_I2S1_BCK>,
+				 <MT7623_PIN_36_I2S1_LRCK_FUNC_I2S1_LRCK>,
+				 <MT7623_PIN_37_I2S1_MCLK_FUNC_I2S1_MCLK>;
+			drive-strength = <MTK_DRIVE_12mA>;
+			bias-pull-down;
+		};
+	};
+
+	key_pins_a: keys-alt {
+		pins-keys {
+			pinmux = <MT7623_PIN_256_GPIO256_FUNC_GPIO256>,
+				 <MT7623_PIN_257_GPIO257_FUNC_GPIO257> ;
+			input-enable;
+		};
+	};
+
+	led_pins_a: leds-alt {
+		pins-leds {
+			pinmux = <MT7623_PIN_239_EXT_SDIO0_FUNC_GPIO239>,
+				 <MT7623_PIN_240_EXT_XCS_FUNC_GPIO240>,
+				 <MT7623_PIN_241_EXT_SCK_FUNC_GPIO241>;
+		};
+	};
+
+	mmc0_pins_default: mmc0default {
+		pins-cmd-dat {
+			pinmux = <MT7623_PIN_111_MSDC0_DAT7_FUNC_MSDC0_DAT7>,
+				 <MT7623_PIN_112_MSDC0_DAT6_FUNC_MSDC0_DAT6>,
+				 <MT7623_PIN_113_MSDC0_DAT5_FUNC_MSDC0_DAT5>,
+				 <MT7623_PIN_114_MSDC0_DAT4_FUNC_MSDC0_DAT4>,
+				 <MT7623_PIN_118_MSDC0_DAT3_FUNC_MSDC0_DAT3>,
+				 <MT7623_PIN_119_MSDC0_DAT2_FUNC_MSDC0_DAT2>,
+				 <MT7623_PIN_120_MSDC0_DAT1_FUNC_MSDC0_DAT1>,
+				 <MT7623_PIN_121_MSDC0_DAT0_FUNC_MSDC0_DAT0>,
+				 <MT7623_PIN_116_MSDC0_CMD_FUNC_MSDC0_CMD>;
+			input-enable;
+			bias-pull-up;
+		};
+
+		pins-clk {
+			pinmux = <MT7623_PIN_117_MSDC0_CLK_FUNC_MSDC0_CLK>;
+			bias-pull-down;
+		};
+
+		pins-rst {
+			pinmux = <MT7623_PIN_115_MSDC0_RSTB_FUNC_MSDC0_RSTB>;
+			bias-pull-up;
+		};
+	};
+
+	mmc0_pins_uhs: mmc0 {
+		pins-cmd-dat {
+			pinmux = <MT7623_PIN_111_MSDC0_DAT7_FUNC_MSDC0_DAT7>,
+				 <MT7623_PIN_112_MSDC0_DAT6_FUNC_MSDC0_DAT6>,
+				 <MT7623_PIN_113_MSDC0_DAT5_FUNC_MSDC0_DAT5>,
+				 <MT7623_PIN_114_MSDC0_DAT4_FUNC_MSDC0_DAT4>,
+				 <MT7623_PIN_118_MSDC0_DAT3_FUNC_MSDC0_DAT3>,
+				 <MT7623_PIN_119_MSDC0_DAT2_FUNC_MSDC0_DAT2>,
+				 <MT7623_PIN_120_MSDC0_DAT1_FUNC_MSDC0_DAT1>,
+				 <MT7623_PIN_121_MSDC0_DAT0_FUNC_MSDC0_DAT0>,
+				 <MT7623_PIN_116_MSDC0_CMD_FUNC_MSDC0_CMD>;
+			input-enable;
+			drive-strength = <MTK_DRIVE_2mA>;
+			bias-pull-up = <MTK_PUPD_SET_R1R0_01>;
+		};
+
+		pins-clk {
+			pinmux = <MT7623_PIN_117_MSDC0_CLK_FUNC_MSDC0_CLK>;
+			drive-strength = <MTK_DRIVE_2mA>;
+			bias-pull-down = <MTK_PUPD_SET_R1R0_01>;
+		};
+
+		pins-rst {
+			pinmux = <MT7623_PIN_115_MSDC0_RSTB_FUNC_MSDC0_RSTB>;
+			bias-pull-up;
+		};
+	};
+
+	mmc1_pins_default: mmc1default {
+		pins-cmd-dat {
+			pinmux = <MT7623_PIN_107_MSDC1_DAT0_FUNC_MSDC1_DAT0>,
+				 <MT7623_PIN_108_MSDC1_DAT1_FUNC_MSDC1_DAT1>,
+				 <MT7623_PIN_109_MSDC1_DAT2_FUNC_MSDC1_DAT2>,
+				 <MT7623_PIN_110_MSDC1_DAT3_FUNC_MSDC1_DAT3>,
+				 <MT7623_PIN_105_MSDC1_CMD_FUNC_MSDC1_CMD>;
+			input-enable;
+			drive-strength = <MTK_DRIVE_4mA>;
+			bias-pull-up = <MTK_PUPD_SET_R1R0_10>;
+		};
+
+		pins-clk {
+			pinmux = <MT7623_PIN_106_MSDC1_CLK_FUNC_MSDC1_CLK>;
+			bias-pull-down;
+			drive-strength = <MTK_DRIVE_4mA>;
+		};
+
+		pins-wp {
+			pinmux = <MT7623_PIN_29_EINT7_FUNC_MSDC1_WP>;
+			input-enable;
+			bias-pull-up;
+		};
+
+		pins-insert {
+			pinmux = <MT7623_PIN_261_MSDC1_INS_FUNC_GPIO261>;
+			bias-pull-up;
+		};
+	};
+
+	mmc1_pins_uhs: mmc1 {
+		pins-cmd-dat {
+			pinmux = <MT7623_PIN_107_MSDC1_DAT0_FUNC_MSDC1_DAT0>,
+				 <MT7623_PIN_108_MSDC1_DAT1_FUNC_MSDC1_DAT1>,
+				 <MT7623_PIN_109_MSDC1_DAT2_FUNC_MSDC1_DAT2>,
+				 <MT7623_PIN_110_MSDC1_DAT3_FUNC_MSDC1_DAT3>,
+				 <MT7623_PIN_105_MSDC1_CMD_FUNC_MSDC1_CMD>;
+			input-enable;
+			drive-strength = <MTK_DRIVE_4mA>;
+			bias-pull-up = <MTK_PUPD_SET_R1R0_10>;
+		};
+
+		pins-clk {
+			pinmux = <MT7623_PIN_106_MSDC1_CLK_FUNC_MSDC1_CLK>;
+			drive-strength = <MTK_DRIVE_4mA>;
+			bias-pull-down = <MTK_PUPD_SET_R1R0_10>;
+		};
+	};
+
+	nand_pins_default: nanddefault {
+		pins-ale {
+			pinmux = <MT7623_PIN_116_MSDC0_CMD_FUNC_NALE>;
+			drive-strength = <MTK_DRIVE_8mA>;
+			bias-pull-down = <MTK_PUPD_SET_R1R0_10>;
+		};
+
+		pins-dat {
+			pinmux = <MT7623_PIN_111_MSDC0_DAT7_FUNC_NLD7>,
+				 <MT7623_PIN_112_MSDC0_DAT6_FUNC_NLD6>,
+				 <MT7623_PIN_114_MSDC0_DAT4_FUNC_NLD4>,
+				 <MT7623_PIN_118_MSDC0_DAT3_FUNC_NLD3>,
+				 <MT7623_PIN_121_MSDC0_DAT0_FUNC_NLD0>,
+				 <MT7623_PIN_120_MSDC0_DAT1_FUNC_NLD1>,
+				 <MT7623_PIN_113_MSDC0_DAT5_FUNC_NLD5>,
+				 <MT7623_PIN_115_MSDC0_RSTB_FUNC_NLD8>,
+				 <MT7623_PIN_119_MSDC0_DAT2_FUNC_NLD2>;
+			input-enable;
+			drive-strength = <MTK_DRIVE_8mA>;
+			bias-pull-up;
+		};
+
+		pins-we {
+			pinmux = <MT7623_PIN_117_MSDC0_CLK_FUNC_NWEB>;
+			drive-strength = <MTK_DRIVE_8mA>;
+			bias-pull-up = <MTK_PUPD_SET_R1R0_10>;
+		};
+	};
+
+	pcie_default: pcie_pin_default {
+		pins_cmd_dat {
+			pinmux = <MT7623_PIN_208_AUD_EXT_CK1_FUNC_PCIE0_PERST_N>,
+				 <MT7623_PIN_209_AUD_EXT_CK2_FUNC_PCIE1_PERST_N>;
+			bias-disable;
+		};
+	};
+
+	pwm_pins_a: pwm-default {
+		pins-pwm {
+			pinmux = <MT7623_PIN_203_PWM0_FUNC_PWM0>,
+				 <MT7623_PIN_204_PWM1_FUNC_PWM1>,
+				 <MT7623_PIN_205_PWM2_FUNC_PWM2>,
+				 <MT7623_PIN_206_PWM3_FUNC_PWM3>,
+				 <MT7623_PIN_207_PWM4_FUNC_PWM4>;
+		};
+	};
+
+	spi0_pins_a: spi0-default {
+		pins-spi {
+			pinmux = <MT7623_PIN_53_SPI0_CSN_FUNC_SPI0_CS>,
+				<MT7623_PIN_54_SPI0_CK_FUNC_SPI0_CK>,
+				<MT7623_PIN_55_SPI0_MI_FUNC_SPI0_MI>,
+				<MT7623_PIN_56_SPI0_MO_FUNC_SPI0_MO>;
+			bias-disable;
+		};
+	};
+
+	uart0_pins_a: uart0-default {
+		pins-dat {
+			pinmux = <MT7623_PIN_79_URXD0_FUNC_URXD0>,
+				 <MT7623_PIN_80_UTXD0_FUNC_UTXD0>;
+		};
+	};
+
+	uart1_pins_a: uart1-default {
+		pins-dat {
+			pinmux = <MT7623_PIN_81_URXD1_FUNC_URXD1>,
+				 <MT7623_PIN_82_UTXD1_FUNC_UTXD1>;
+		};
+	};
+
+	uart2_pins_a: uart2-default {
+		pins-dat {
+			pinmux = <MT7623_PIN_14_GPIO14_FUNC_URXD2>,
+				 <MT7623_PIN_15_GPIO15_FUNC_UTXD2>;
+		};
+	};
+};

arch/arm/boot/dts/mt7623n-bananapi-bpi-r2.dts +0 ~~-217~~

223 lines not on this page · raw message

arch/arm/boot/dts/mt7623n-rfb-nand.dts +0 ~~-31~~

index 6b0d401..96ff3c9 100644
@@ -71,34 +71,3 @@
 		};
 	};
 };
-
-&pio {
-	nand_pins_default: nanddefault {
-		pins-ale {
-			pinmux = <MT7623_PIN_116_MSDC0_CMD_FUNC_NALE>;
-			drive-strength = <MTK_DRIVE_8mA>;
-			bias-pull-down = <MTK_PUPD_SET_R1R0_10>;
-		};
-
-		pins-dat {
-			pinmux = <MT7623_PIN_111_MSDC0_DAT7_FUNC_NLD7>,
-				 <MT7623_PIN_112_MSDC0_DAT6_FUNC_NLD6>,
-				 <MT7623_PIN_114_MSDC0_DAT4_FUNC_NLD4>,
-				 <MT7623_PIN_118_MSDC0_DAT3_FUNC_NLD3>,
-				 <MT7623_PIN_121_MSDC0_DAT0_FUNC_NLD0>,
-				 <MT7623_PIN_120_MSDC0_DAT1_FUNC_NLD1>,
-				 <MT7623_PIN_113_MSDC0_DAT5_FUNC_NLD5>,
-				 <MT7623_PIN_115_MSDC0_RSTB_FUNC_NLD8>,
-				 <MT7623_PIN_119_MSDC0_DAT2_FUNC_NLD2>;
-			input-enable;
-			drive-strength = <MTK_DRIVE_8mA>;
-			bias-pull-up;
-		};
-
-		pins-we {
-			pinmux = <MT7623_PIN_117_MSDC0_CLK_FUNC_NWEB>;
-			drive-strength = <MTK_DRIVE_8mA>;
-			bias-pull-up = <MTK_PUPD_SET_R1R0_10>;
-		};
-	};
-};

Signature · 1 line

2.7.4

[email protected]

author

2018-04-11 08:54 UTC #13 lore raw

PATCH v2 10/12 arm: dts: mt7623: add MT7623A SoC level DTS

In reply to [email protected]

From: Sean Wang <[email protected]>

Add a common file for MT7623A SoC level DTS, indicating MT7623A only has a specific definition for power domain. That causes we need to change related consumers devices such as audio, ethernet, crypto, NAND, and USB controller to grasp its own power domain it should belong to.

Signed-off-by Sean Wang <[email protected]>

---
 arch/arm/boot/dts/mt7623a.dtsi | 44 ++++++++++++++++++++++++++++++++++++++++++
 1 file changed, 44 insertions(+)
 create mode 100644 arch/arm/boot/dts/mt7623a.dtsi

arch/arm/boot/dts/mt7623a.dtsi new file +44 -0

new file mode 100644
index 0000000..0735a1fb8
@@ -0,0 +1,44 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (c) 2017-2018 MediaTek Inc.
+ * Author: Sean Wang <[email protected]>
+ *
+ */
+
+/dts-v1/;
+#include <dt-bindings/power/mt7623a-power.h>
+#include "mt7623.dtsi"
+
+&afe {
+	power-domains = <&scpsys MT7623A_POWER_DOMAIN_IFR_MSC>;
+};
+
+&crypto {
+	power-domains = <&scpsys MT7623A_POWER_DOMAIN_ETH>;
+};
+
+&eth {
+	power-domains = <&scpsys MT7623A_POWER_DOMAIN_ETH>;
+};
+
+&nandc {
+	power-domains = <&scpsys MT7623A_POWER_DOMAIN_IFR_MSC>;
+};
+
+&pcie {
+	power-domains = <&scpsys MT7623A_POWER_DOMAIN_HIF>;
+};
+
+&scpsys {
+	compatible = "mediatek,mt7623a-scpsys";
+	clocks = <&topckgen CLK_TOP_ETHIF_SEL>;
+	clock-names = "ethif";
+};
+
+&usb1 {
+	power-domains = <&scpsys MT7623A_POWER_DOMAIN_HIF>;
+};
+
+&usb2 {
+	power-domains = <&scpsys MT7623A_POWER_DOMAIN_HIF>;
+};

Signature · 1 line

2.7.4

[email protected]

author

2018-04-11 08:54 UTC #14 lore raw

PATCH v2 11/12 arm: dts: mt7623: add MT7623A reference boards

In reply to [email protected]

From: Sean Wang <[email protected]>

Add MT7623A reference board with eMMC and NAND, respectively.

The both boards compared against MT7623N BPI-R2, we could see there are UART[0-1] and USB2 being removed, I2C2 and SPI1 being added, I2C1, UART2 owning distinct pin usage and an extra WM8960 codec chip plugged into the I2C1 offering the functionality of audio player and recorder through SoC audio front-end engine (AFE).

Signed-off-by Sean Wang <[email protected]>

Suggested-by Ryder Lee <[email protected]>

---
 arch/arm/boot/dts/Makefile             |   2 +
 arch/arm/boot/dts/mt7623.dtsi          |  32 ++++
 arch/arm/boot/dts/mt7623a-rfb-emmc.dts | 291 ++++++++++++++++++++++++++++
 arch/arm/boot/dts/mt7623a-rfb-nand.dts | 337 +++++++++++++++++++++++++++++++++
 4 files changed, 662 insertions(+)
 create mode 100644 arch/arm/boot/dts/mt7623a-rfb-emmc.dts
 create mode 100644 arch/arm/boot/dts/mt7623a-rfb-nand.dts

arch/arm/boot/dts/Makefile +2 -0

index 7e24249..bc33a3c 100644
@@ -1150,6 +1150,8 @@ dtb-$(CONFIG_ARCH_MEDIATEK) += \
 	mt6580-evbp1.dtb \
 	mt6589-aquaris5.dtb \
 	mt6592-evb.dtb \
+	mt7623a-rfb-emmc.dtb \
+	mt7623a-rfb-nand.dtb \
 	mt7623n-rfb-nand.dtb \
 	mt7623n-bananapi-bpi-r2.dtb \
 	mt8127-moose.dtb \

arch/arm/boot/dts/mt7623.dtsi +32 -0

index 01893858..f84c37b 100644
@@ -960,6 +960,22 @@
 		};
 	};
 
+	i2c1_pins_b: i2c1-alt {
+		pin-i2c1 {
+			pinmux = <MT7623_PIN_242_URTS2_FUNC_SCL1>,
+				 <MT7623_PIN_243_UCTS2_FUNC_SDA1>;
+			bias-disable;
+		};
+	};
+
+	i2c2_pins_b: i2c2-alt {
+		pin-i2c2 {
+			pinmux = <MT7623_PIN_122_GPIO122_FUNC_SDA2>,
+				 <MT7623_PIN_123_HTPLG_FUNC_SCL2>;
+			bias-disable;
+		};
+	};
+
 	i2s0_pins_a: i2s0-default {
 		pin-i2s0 {
 			pinmux = <MT7623_PIN_49_I2S0_DATA_FUNC_I2S0_DATA>,

@@ -1160,6 +1176,15 @@
 		};
 	};
 
+	spi1_pins_a: spi1-default {
+		pins-spi {
+			pinmux = <MT7623_PIN_7_SPI1_CSN_FUNC_SPI1_CS>,
+				<MT7623_PIN_199_SPI1_CK_FUNC_SPI1_CK>,
+				<MT7623_PIN_8_SPI1_MI_FUNC_SPI1_MI>,
+				<MT7623_PIN_9_SPI1_MO_FUNC_SPI1_MO>;
+		};
+	};
+
 	uart0_pins_a: uart0-default {
 		pins-dat {
 			pinmux = <MT7623_PIN_79_URXD0_FUNC_URXD0>,

@@ -1180,4 +1205,11 @@
 				 <MT7623_PIN_15_GPIO15_FUNC_UTXD2>;
 		};
 	};
+
+	uart2_pins_b: uart2-alt {
+		pins-dat {
+			pinmux = <MT7623_PIN_200_URXD2_FUNC_URXD2>,
+				 <MT7623_PIN_201_UTXD2_FUNC_UTXD2>;
+		};
+	};
 };

arch/arm/boot/dts/mt7623a-rfb-emmc.dts new file +291 -0

291 lines not on this page · raw message

arch/arm/boot/dts/mt7623a-rfb-nand.dts new file +337 -0

337 lines not on this page · raw message

Signature · 1 line

2.7.4

[email protected]

author

2018-04-11 08:54 UTC #15 lore raw

PATCH v2 12/12 arm: dts: mt7623: add MT7623N reference board with eMMC

In reply to [email protected]

From: Sean Wang <[email protected]>

Add MT7623N reference board with eMMC. On the board, there is additional external PHY ICPlus IP1001 transceiver available by port 5 on the MDIO bus connectted with GMAC2.

Signed-off-by Sean Wang <[email protected]>

Suggested-by Ryder Lee <[email protected]>

---
 arch/arm/boot/dts/Makefile             |   1 +
 arch/arm/boot/dts/mt7623.dtsi          |  17 ++
 arch/arm/boot/dts/mt7623n-rfb-emmc.dts | 326 +++++++++++++++++++++++++++++++++
 3 files changed, 344 insertions(+)
 create mode 100644 arch/arm/boot/dts/mt7623n-rfb-emmc.dts

arch/arm/boot/dts/Makefile +1 -0

index bc33a3c..19013d4 100644
@@ -1152,6 +1152,7 @@ dtb-$(CONFIG_ARCH_MEDIATEK) += \
 	mt6592-evb.dtb \
 	mt7623a-rfb-emmc.dtb \
 	mt7623a-rfb-nand.dtb \
+	mt7623n-rfb-emmc.dtb \
 	mt7623n-rfb-nand.dtb \
 	mt7623n-bananapi-bpi-r2.dtb \
 	mt8127-moose.dtb \

arch/arm/boot/dts/mt7623.dtsi +17 -0

index f84c37b..d1eb123 100644
@@ -968,6 +968,14 @@
 		};
 	};
 
+	i2c2_pins_a: i2c2-default {
+		pin-i2c2 {
+			pinmux = <MT7623_PIN_77_SDA2_FUNC_SDA2>,
+				 <MT7623_PIN_78_SCL2_FUNC_SCL2>;
+			bias-disable;
+		};
+	};
+
 	i2c2_pins_b: i2c2-alt {
 		pin-i2c2 {
 			pinmux = <MT7623_PIN_122_GPIO122_FUNC_SDA2>,

@@ -1185,6 +1193,15 @@
 		};
 	};
 
+	spi2_pins_a: spi2-default {
+		pins-spi {
+			pinmux = <MT7623_PIN_101_SPI2_CSN_FUNC_SPI2_CS>,
+				 <MT7623_PIN_104_SPI2_CK_FUNC_SPI2_CK>,
+				 <MT7623_PIN_102_SPI2_MI_FUNC_SPI2_MI>,
+				 <MT7623_PIN_103_SPI2_MO_FUNC_SPI2_MO>;
+		};
+	};
+
 	uart0_pins_a: uart0-default {
 		pins-dat {
 			pinmux = <MT7623_PIN_79_URXD0_FUNC_URXD0>,

arch/arm/boot/dts/mt7623n-rfb-emmc.dts new file +326 -0

326 lines not on this page · raw message

Signature · 1 line

2.7.4

Matthias Brugger

maintainer

2018-05-11 16:40 UTC #16 lore raw

In reply to [email protected]

Quoted 31 lines · sean.wang at mediatek.com

From: Sean Wang <[email protected]>
Changes since v1:
- Dropped several patches which have been merged.
- Rebased to linux-next-20180410 where those dependent patches including
[1] and [2] all have been got merged.
- Revised according to suggestions and comments on v1, where the major work is to put board-specific nodes into DTS files and to leave the common nodes among boards in DTSI files as done in patch 7,9,10,11 and 12.
- Merged Ryder Lee's patch for update audio nodes reflecting the latest bindings.
- Revised commit message.
The series is to refactor current .dts for allowing more boards can properly join and reuse almost the same device node definitions.
Before we're doing that, some works about enhancements and fixups are being made on the dt-binding document and .dts files. In addition, the series has to depend on the patch [1][2]. Otherwise, certain build failure would have an occurrence.
[1] arm: dts: mt7623: add PCIe related nodes
http://lists.infradead.org/pipermail/linux-mediatek/2018-February/012053.html
[2] dt-bindings: soc: add header files required for MT7623A SCPSYS dt-binding
http://lists.infradead.org/pipermail/linux-mediatek/2018-February/011930.html
Ryder Lee (1):
arm: dts: mediatek: modify audio related nodes for both MT2701 and
    MT7623

Quoted 14 lines

Sean Wang (11):
dt-bindings: cpufreq: mediatek: use - instead of _ in examples
arm: dts: mediatek: converted to using SPDX identifiers
arm: dts: mt7623: fix invalid memory node being generated
arm: dts: mt7623: fix available memory size on bananapi-r2
arm: dts: mt7623: fix all Warnings (unit_address_vs_reg)
arm: dts: mt7623: add BTIF, HSDMA and SPI-NOR device nodes
arm: dts: mt6323: move node mt6323 leds to mt6323.dtsi
arm: dts: mt7623: extend common file reused by all boards with MT7623
SoCs
arm: dts: mt7623: add MT7623A SoC level DTS
arm: dts: mt7623: add MT7623A reference boards
arm: dts: mt7623: add MT7623N reference board with eMMC

I merged all but 1/12 which needs to go through rafaels tree and 8/12 which was already applied from a different series.

You can find them in v4.17-next/soc on git.kernel.org

Regards,
Matthias

Quoted 29 lines

 .../bindings/cpufreq/cpufreq-mediatek.txt          |   6 +-
 arch/arm/boot/dts/Makefile                         |   3 +
 arch/arm/boot/dts/mt2701-evb.dts                   |   9 +-
 arch/arm/boot/dts/mt2701.dtsi                      | 197 ++++----
 arch/arm/boot/dts/mt6323.dtsi                      |  17 +-
 arch/arm/boot/dts/mt6580-evbp1.dts                 |   9 +-
 arch/arm/boot/dts/mt6580.dtsi                      |   9 +-
 arch/arm/boot/dts/mt6589-aquaris5.dts              |  10 +-
 arch/arm/boot/dts/mt6589.dtsi                      |  12 +-
 arch/arm/boot/dts/mt6592-evb.dts                   |   9 +-
 arch/arm/boot/dts/mt6592.dtsi                      |   9 +-
 arch/arm/boot/dts/mt7623.dtsi                      | 537 ++++++++++++++++-----
 arch/arm/boot/dts/mt7623a-rfb-emmc.dts             | 291 +++++++++++
 arch/arm/boot/dts/mt7623a-rfb-nand.dts             | 337 +++++++++++++
 arch/arm/boot/dts/mt7623a.dtsi                     |  44 ++
 arch/arm/boot/dts/mt7623n-bananapi-bpi-r2.dts      | 279 ++---------
 arch/arm/boot/dts/mt7623n-rfb-emmc.dts             | 326 +++++++++++++
 arch/arm/boot/dts/mt7623n-rfb-nand.dts             |  40 +-
 arch/arm/boot/dts/mt7623n-rfb.dtsi                 |  12 +-
 arch/arm/boot/dts/mt8127-moose.dts                 |   9 +-
 arch/arm/boot/dts/mt8127.dtsi                      |   9 +-
 arch/arm/boot/dts/mt8135-evbp1.dts                 |   9 +-
 arch/arm/boot/dts/mt8135.dtsi                      |   9 +-
 23 files changed, 1576 insertions(+), 616 deletions(-)
 create mode 100644 arch/arm/boot/dts/mt7623a-rfb-emmc.dts
 create mode 100644 arch/arm/boot/dts/mt7623a-rfb-nand.dts
 create mode 100644 arch/arm/boot/dts/mt7623a.dtsi
 create mode 100644 arch/arm/boot/dts/mt7623n-rfb-emmc.dts