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Backport several fixes from 64bits to 32bits hibernation

PATCH In review Chen Yu 4 participants 16 messages Sep 21, 2018 – Oct 5, 2018

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Chen Yu

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#0 lore raw

v4 cover Backport several fixes from 64bits to 32bits hibernation

Currently there are mainly three bugs in 32bits system when doing hibernation:
1. The page copy code is not running in safe page, which might cause hang during resume.
2. There's no text mapping for the final jump address
of the original kernel, which might cause the system jumping into illegal address and causes system hang during resume.
3. The restore kernel switches to its own kernel page table(swapper_pg_dir) rather than the original kernel page table after all the pages been copied back, which might cause invalid virtual-physical mapping issue during resume.

To solve these problems:

1. Copy the code core_restore_code to a safe page, to avoid the instruction code been overwritten when image kernel pages are being copied.
2. Set up temporary text mapping for the image kernel's jump address, so that after all the pages have been copied back, the system could jump to this address.
3. Switch to the original kernel page table during resume.

Furthermore, MD5 hash check for e820 map is also backported from 64bits system.

In order to make this patch set more readable, these fixes are splitted into several sub patches.

And use CONFIG_X86_64 to control the common code to be 'activated' for 32 bit system during each sub-patch for better maintaining.

Chen Yu (1):
PM / hibernate: Check the success of generating md5 digest before
hibernation

Zhimin Gu (11):
x86, hibernate: Fix nosave_regions setup for hibernation x86-32/asm/power: Create stack frames in hibernate_asm_32.S x86, hibernate: Extract the common code of 64/32 bit system x86-32, hibernate: Enable CONFIG_ARCH_HIBERNATION_HEADER on 32bit
system
x86, hibernate: Rename temp_level4_pgt to temp_pgt x86-32, hibernate: Use temp_pgt as the temporary page table x86-32, hibernate: Use the page size macro instead of constant value x86-32, hibernate: Switch to original page table after resumed x86-32, hibernate: Switch to relocated restore code during resume on
32bit system
x86-32, hibernate: Set up temporary text mapping for 32bit system x86-32, hibernate: Adjust in_suspend after resumed on 32bit system

 arch/x86/Kconfig                  |   2 +-
 arch/x86/include/asm/suspend.h    |   8 +
 arch/x86/include/asm/suspend_32.h |   4 +
 arch/x86/kernel/setup.c           |   2 +-
 arch/x86/power/Makefile           |   2 +-
 arch/x86/power/hibernate.c        | 248 ++++++++++++++++++++++++++++++
 arch/x86/power/hibernate_32.c     |  52 +++++--
 arch/x86/power/hibernate_64.c     | 224 +--------------------------
 arch/x86/power/hibernate_asm_32.S |  37 ++++-
 arch/x86/power/hibernate_asm_64.S |   2 +-
 10 files changed, 334 insertions(+), 247 deletions(-)
 create mode 100644 arch/x86/power/hibernate.c
Signature · 1 line
2.17.1
author
#1 lore raw

PATCH v4 1/12 x86, hibernate: Fix nosave_regions setup for hibernation

From: Zhimin Gu <[email protected]>

On 32bit systems, nosave_regions(non RAM areas) located between max_low_pfn and max_pfn are not excluded from hibernation snapshot currently, which may result in a machine check exception when trying to access these unsafe regions during hibernation:

[  612.800453] Disabling lock debugging due to kernel taint
[  612.805786] mce: [Hardware Error]: CPU 0: Machine Check Exception: 5 Bank 6: fe00000000801136
[  612.814344] mce: [Hardware Error]: RIP !INEXACT! 60:<00000000d90be566> {swsusp_save+0x436/0x560}
[  612.823167] mce: [Hardware Error]: TSC 1f5939fe276 ADDR dd000000 MISC 30e0000086
[  612.830677] mce: [Hardware Error]: PROCESSOR 0:306c3 TIME 1529487426 SOCKET 0 APIC 0 microcode 24
[  612.839581] mce: [Hardware Error]: Run the above through 'mcelog --ascii'
[  612.846394] mce: [Hardware Error]: Machine check: Processor context corrupt
[  612.853380] Kernel panic - not syncing: Fatal machine check
[  612.858978] Kernel Offset: 0x18000000 from 0xc1000000 (relocation range: 0xc0000000-0xf7ffdfff)

This is because on 32bit systems, pages above max_low_pfn are regarded as high memeory, and accessing unsafe pages might cause expected MCE. On the problematic 32bit system, there are reserved memory above low memory, which triggered the MCE:

e820 memory mapping:

[    0.000000] BIOS-e820: [mem 0x0000000000000000-0x000000000009d7ff] usable
[    0.000000] BIOS-e820: [mem 0x000000000009d800-0x000000000009ffff] reserved
[    0.000000] BIOS-e820: [mem 0x00000000000e0000-0x00000000000fffff] reserved
[    0.000000] BIOS-e820: [mem 0x0000000000100000-0x00000000d160cfff] usable
[    0.000000] BIOS-e820: [mem 0x00000000d160d000-0x00000000d1613fff] ACPI NVS
[    0.000000] BIOS-e820: [mem 0x00000000d1614000-0x00000000d1a44fff] usable
[    0.000000] BIOS-e820: [mem 0x00000000d1a45000-0x00000000d1ecffff] reserved
[    0.000000] BIOS-e820: [mem 0x00000000d1ed0000-0x00000000d7eeafff] usable
[    0.000000] BIOS-e820: [mem 0x00000000d7eeb000-0x00000000d7ffffff] reserved
[    0.000000] BIOS-e820: [mem 0x00000000d8000000-0x00000000d875ffff] usable
[    0.000000] BIOS-e820: [mem 0x00000000d8760000-0x00000000d87fffff] reserved
[    0.000000] BIOS-e820: [mem 0x00000000d8800000-0x00000000d8fadfff] usable
[    0.000000] BIOS-e820: [mem 0x00000000d8fae000-0x00000000d8ffffff] ACPI data
[    0.000000] BIOS-e820: [mem 0x00000000d9000000-0x00000000da71bfff] usable
[    0.000000] BIOS-e820: [mem 0x00000000da71c000-0x00000000da7fffff] ACPI NVS
[    0.000000] BIOS-e820: [mem 0x00000000da800000-0x00000000dbb8bfff] usable
[    0.000000] BIOS-e820: [mem 0x00000000dbb8c000-0x00000000dbffffff] reserved
[    0.000000] BIOS-e820: [mem 0x00000000dd000000-0x00000000df1fffff] reserved
[    0.000000] BIOS-e820: [mem 0x00000000f8000000-0x00000000fbffffff] reserved
[    0.000000] BIOS-e820: [mem 0x00000000fec00000-0x00000000fec00fff] reserved
[    0.000000] BIOS-e820: [mem 0x00000000fed00000-0x00000000fed03fff] reserved
[    0.000000] BIOS-e820: [mem 0x00000000fed1c000-0x00000000fed1ffff] reserved
[    0.000000] BIOS-e820: [mem 0x00000000fee00000-0x00000000fee00fff] reserved
[    0.000000] BIOS-e820: [mem 0x00000000ff000000-0x00000000ffffffff] reserved
[    0.000000] BIOS-e820: [mem 0x0000000100000000-0x000000041edfffff] usable

Fix this problem by changing pfn limit from max_low_pfn to max_pfn. This fix does not impact 64bit system because on 64bit max_low_pfn is the same as max_pfn.

---
 arch/x86/kernel/setup.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)
arch/x86/kernel/setup.c +1 -1
index b4866badb235..90ecc108bc8a 100644
@@ -1251,7 +1251,7 @@ void __init setup_arch(char **cmdline_p)
 	x86_init.hyper.guest_late_init();
 
 	e820__reserve_resources();
-	e820__register_nosave_regions(max_low_pfn);
+	e820__register_nosave_regions(max_pfn);
 
 	x86_init.resources.reserve_resources();
 
Signature · 1 line
2.17.1
author
#2 lore raw

PATCH v4 2/12 PM / hibernate: Check the success of generating md5 digest before hibernation

In reply to Chen Yu

Currently if get_e820_md5() fails, then it will hibernate nevertheless. Actually the error code should be propagated to upper caller so that the hibernation could be aware of the result and terminates the process if md5 digest fails.

---
 arch/x86/power/hibernate_64.c | 11 +++++------
 1 file changed, 5 insertions(+), 6 deletions(-)
arch/x86/power/hibernate_64.c +5 -6
index f8e3b668d20b..e0de959ad02d 100644
@@ -265,9 +265,9 @@ static int get_e820_md5(struct e820_table *table, void *buf)
 	return ret;
 }
 
-static void hibernation_e820_save(void *buf)
+static int hibernation_e820_save(void *buf)
 {
-	get_e820_md5(e820_table_firmware, buf);
+	return get_e820_md5(e820_table_firmware, buf);
 }
 
 static bool hibernation_e820_mismatch(void *buf)
@@ -287,8 +287,9 @@ static bool hibernation_e820_mismatch(void *buf)
 	return memcmp(result, buf, MD5_DIGEST_SIZE) ? true : false;
 }
 #else
-static void hibernation_e820_save(void *buf)
+static int hibernation_e820_save(void *buf)
 {
+	return 0;
 }
 
 static bool hibernation_e820_mismatch(void *buf)
@@ -333,9 +334,7 @@ int arch_hibernation_header_save(void *addr, unsigned int max_size)
 
 	rdr->magic = RESTORE_MAGIC;
 
-	hibernation_e820_save(rdr->e820_digest);
-
-	return 0;
+	return hibernation_e820_save(rdr->e820_digest);
 }
 
 /**
Signature · 1 line
2.17.1
author
#3 lore raw

PATCH v4 3/12 x86-32/asm/power: Create stack frames in hibernate_asm_32.S

In reply to Chen Yu

From: Zhimin Gu <[email protected]>

swsusp_arch_suspend() is callable non-leaf function which doesn't honor CONFIG_FRAME_POINTER, which can result in bad stack traces. Also it's not annotated as ELF callable function which can confuse tooling.

Create a stack frame for it when CONFIG_FRAME_POINTER is enabled and give it proper ELF function annotation.

Also in this patch introduces the restore_registers() symbol and gives it ELF function annotation, thus to prepare for later register restore.

Analogous changes were made for 64bit before in Commit ef0f3ed5a4ac (x86/asm/power: Create stack frames in hibernate_asm_64.S)
and
Commit 4ce827b4cc58 (x86/power/64: Fix hibernation return address corruption)

Cc "Rafael J. Wysocki" <[email protected]>
---
 arch/x86/include/asm/suspend_32.h | 4 ++++
 arch/x86/power/hibernate_asm_32.S | 9 +++++++++
 2 files changed, 13 insertions(+)
arch/x86/include/asm/suspend_32.h +4 -0
index 8be6afb58471..fdbd9d7b7bca 100644
@@ -32,4 +32,8 @@ struct saved_context {
 	unsigned long return_address;
 } __attribute__((packed));
 
+/* routines for saving/restoring kernel state */
+extern char core_restore_code[];
+extern char restore_registers[];
+
 #endif /* _ASM_X86_SUSPEND_32_H */
arch/x86/power/hibernate_asm_32.S +9 -0
index 6e56815e13a0..671d38d0d931 100644
@@ -12,6 +12,7 @@
 #include <asm/page_types.h>
 #include <asm/asm-offsets.h>
 #include <asm/processor-flags.h>
+#include <asm/frame.h>
 
 .text
 
@@ -24,8 +25,11 @@ ENTRY(swsusp_arch_suspend)
 	pushfl
 	popl saved_context_eflags
 
+	FRAME_BEGIN
 	call swsusp_save
+	FRAME_END
 	ret
+ENDPROC(swsusp_arch_suspend)
 
 ENTRY(restore_image)
 	movl	mmu_cr4_features, %ecx
@@ -58,6 +62,10 @@ copy_loop:
 	.p2align 4,,7
 
 done:
+
+	/* code below belongs to the image kernel */
+	.align PAGE_SIZE
+ENTRY(restore_registers)
 	/* go back to the original page tables */
 	movl	$swapper_pg_dir, %eax
 	subl	$__PAGE_OFFSET, %eax
@@ -83,3 +91,4 @@ done:
 	xorl	%eax, %eax
 
 	ret
+ENDPROC(restore_registers)
Signature · 1 line
2.17.1
author
#4 lore raw

PATCH v4 4/12 x86, hibernate: Extract the common code of 64/32 bit system

In reply to Chen Yu

From: Zhimin Gu <[email protected]>

Reduce the hibernation code duplication between x86-32 and x86-64 by extracting the common code into hibernate.c.

Currently only pfn_is_nosave() is the activated common function in hibernate.c

No functional change.

---
 arch/x86/include/asm/suspend.h |   8 ++
 arch/x86/power/Makefile        |   2 +-
 arch/x86/power/hibernate.c     | 246 +++++++++++++++++++++++++++++++++
 arch/x86/power/hibernate_32.c  |  15 +-
 arch/x86/power/hibernate_64.c  | 221 -----------------------------
 5 files changed, 256 insertions(+), 236 deletions(-)
 create mode 100644 arch/x86/power/hibernate.c
arch/x86/include/asm/suspend.h +8 -0
index ecffe81ff65c..40b02558749f 100644
@@ -4,3 +4,11 @@
 #else
 # include <asm/suspend_64.h>
 #endif
+extern unsigned long restore_jump_address __visible;
+extern unsigned long jump_address_phys;
+extern unsigned long restore_cr3 __visible;
+extern unsigned long temp_level4_pgt __visible;
+extern unsigned long relocated_restore_code __visible;
+extern int relocate_restore_code(void);
+/* Defined in hibernate_asm_32/64.S */
+extern asmlinkage __visible int restore_image(void);
arch/x86/power/Makefile +1 -1
index a4701389562c..37923d715741 100644
@@ -7,4 +7,4 @@ nostackp := $(call cc-option, -fno-stack-protector)
 CFLAGS_cpu.o	:= $(nostackp)
 
 obj-$(CONFIG_PM_SLEEP)		+= cpu.o
-obj-$(CONFIG_HIBERNATION)	+= hibernate_$(BITS).o hibernate_asm_$(BITS).o
+obj-$(CONFIG_HIBERNATION)	+= hibernate_$(BITS).o hibernate_asm_$(BITS).o hibernate.o
arch/x86/power/hibernate.c new file +246 -0

246 lines not on this page · raw message

arch/x86/power/hibernate_32.c +1 -14
index afc4ed7b1578..f82fbd279d08 100644
@@ -14,9 +14,7 @@
 #include <asm/pgtable.h>
 #include <asm/mmzone.h>
 #include <asm/sections.h>
-
-/* Defined in hibernate_asm_32.S */
-extern int restore_image(void);
+#include <asm/suspend.h>
 
 /* Pointer to the temporary resume page tables */
 pgd_t *resume_pg_dir;
@@ -162,14 +160,3 @@ asmlinkage int swsusp_arch_resume(void)
 	restore_image();
 	return 0;
 }
-
-/*
- *	pfn_is_nosave - check if given pfn is in the 'nosave' section
- */
-
-int pfn_is_nosave(unsigned long pfn)
-{
-	unsigned long nosave_begin_pfn = __pa_symbol(&__nosave_begin) >> PAGE_SHIFT;
-	unsigned long nosave_end_pfn = PAGE_ALIGN(__pa_symbol(&__nosave_end)) >> PAGE_SHIFT;
-	return (pfn >= nosave_begin_pfn) && (pfn < nosave_end_pfn);
-}
arch/x86/power/hibernate_64.c +0 -221

236 lines not on this page · raw message

Signature · 1 line
2.17.1
author
#5 lore raw

PATCH v4 5/12 x86-32, hibernate: Enable CONFIG_ARCH_HIBERNATION_HEADER on 32bit system

In reply to Chen Yu

From: Zhimin Gu <[email protected]>

Enable CONFIG_ARCH_HIBERNATION_HEADER for 32bit system so that

1. arch_hibernation_header_save/restore() are invoked across hibernation on 32bit system.
2. The checksum handling as well as 'magic' number checking for 32bit system are enabled.

Controlled by CONFIG_X86_64 in hibernate.c

Cc "Rafael J. Wysocki" <[email protected]>
---
 arch/x86/Kconfig           |  2 +-
 arch/x86/power/hibernate.c | 10 +++++++++-
 2 files changed, 10 insertions(+), 2 deletions(-)
arch/x86/Kconfig +1 -1
index 1a0be022f91d..e8de5de1057f 100644
@@ -2422,7 +2422,7 @@ menu "Power management and ACPI options"
 
 config ARCH_HIBERNATION_HEADER
 	def_bool y
-	depends on X86_64 && HIBERNATION
+	depends on HIBERNATION
 
 source "kernel/power/Kconfig"
 
arch/x86/power/hibernate.c +9 -1
index f63793b8de3f..a04ca13bf592 100644
@@ -53,7 +53,6 @@ int pfn_is_nosave(unsigned long pfn)
 	return pfn >= nosave_begin_pfn && pfn < nosave_end_pfn;
 }
 
-#ifdef CONFIG_X86_64
 
 #define MD5_DIGEST_SIZE 16
 
@@ -140,7 +139,11 @@ static bool hibernation_e820_mismatch(void *buf)
 }
 #endif
 
+#ifdef CONFIG_X86_64
 #define RESTORE_MAGIC	0x23456789ABCDEF01UL
+#else
+#define RESTORE_MAGIC	0x12345678UL
+#endif
 
 /**
  *	arch_hibernation_header_save - populate the architecture specific part
@@ -154,6 +157,7 @@ int arch_hibernation_header_save(void *addr, unsigned int max_size)
 	if (max_size < sizeof(struct restore_data_record))
 		return -EOVERFLOW;
 	rdr->magic = RESTORE_MAGIC;
+#ifdef CONFIG_X86_64
 	rdr->jump_address = (unsigned long)restore_registers;
 	rdr->jump_address_phys = __pa_symbol(restore_registers);
 
@@ -175,6 +179,7 @@ int arch_hibernation_header_save(void *addr, unsigned int max_size)
 	 * have any of the PCID bits set.
 	 */
 	rdr->cr3 = restore_cr3 & ~CR3_PCID_MASK;
+#endif
 
 	return hibernation_e820_save(rdr->e820_digest);
 }
@@ -193,9 +198,11 @@ int arch_hibernation_header_restore(void *addr)
 		return -EINVAL;
 	}
 
+#ifdef CONFIG_X86_64
 	restore_jump_address = rdr->jump_address;
 	jump_address_phys = rdr->jump_address_phys;
 	restore_cr3 = rdr->cr3;
+#endif
 
 	if (hibernation_e820_mismatch(rdr->e820_digest)) {
 		pr_crit("Hibernate inconsistent memory map detected!\n");
@@ -205,6 +212,7 @@ int arch_hibernation_header_restore(void *addr)
 	return 0;
 }
 
+#ifdef CONFIG_X86_64
 int relocate_restore_code(void)
 {
 	pgd_t *pgd;
Signature · 1 line
2.17.1
author
#6 lore raw

PATCH v4 6/12 x86, hibernate: Rename temp_level4_pgt to temp_pgt

In reply to Chen Yu

From: Zhimin Gu <[email protected]>

As 32bit system is not using 4-level page, rename it to temp_pgt so that it can be reused for both 32bit and 64bit hibernation.

No functional change.

---
 arch/x86/include/asm/suspend.h    | 2 +-
 arch/x86/power/hibernate.c        | 2 +-
 arch/x86/power/hibernate_64.c     | 2 +-
 arch/x86/power/hibernate_asm_64.S | 2 +-
 4 files changed, 4 insertions(+), 4 deletions(-)
arch/x86/include/asm/suspend.h +1 -1
index 40b02558749f..a892494ca5e4 100644
@@ -7,7 +7,7 @@
 extern unsigned long restore_jump_address __visible;
 extern unsigned long jump_address_phys;
 extern unsigned long restore_cr3 __visible;
-extern unsigned long temp_level4_pgt __visible;
+extern unsigned long temp_pgt __visible;
 extern unsigned long relocated_restore_code __visible;
 extern int relocate_restore_code(void);
 /* Defined in hibernate_asm_32/64.S */
arch/x86/power/hibernate.c +1 -1
index a04ca13bf592..e3409e4a9b6a 100644
@@ -36,7 +36,7 @@ unsigned long jump_address_phys;
  * in the image header).
  */
 unsigned long restore_cr3 __visible;
-unsigned long temp_level4_pgt __visible;
+unsigned long temp_pgt __visible;
 unsigned long relocated_restore_code __visible;
 
 /**
arch/x86/power/hibernate_64.c +1 -1
index 8bc2eb0dc464..239f424ccb29 100644
@@ -121,7 +121,7 @@ static int set_up_temporary_mappings(void)
 			return result;
 	}
 
-	temp_level4_pgt = __pa(pgd);
+	temp_pgt = __pa(pgd);
 	return 0;
 }
 
arch/x86/power/hibernate_asm_64.S +1 -1
index fd369a6e9ff8..3008baa2fa95 100644
@@ -59,7 +59,7 @@ ENTRY(restore_image)
 	movq	restore_cr3(%rip), %r9
 
 	/* prepare to switch to temporary page tables */
-	movq	temp_level4_pgt(%rip), %rax
+	movq	temp_pgt(%rip), %rax
 	movq	mmu_cr4_features(%rip), %rbx
 
 	/* prepare to copy image data to their original locations */
Signature · 1 line
2.17.1
author
#7 lore raw

PATCH v4 7/12 x86-32, hibernate: Use temp_pgt as the temporary page table

In reply to Chen Yu

From: Zhimin Gu <[email protected]>

This is to reuse the temp_pgt for both 32bit and 64bit system.

No functional change.

---
 arch/x86/power/hibernate_32.c     | 2 ++
 arch/x86/power/hibernate_asm_32.S | 3 +--
 2 files changed, 3 insertions(+), 2 deletions(-)
arch/x86/power/hibernate_32.c +2 -0
index f82fbd279d08..a44bdada4e4e 100644
@@ -156,6 +156,8 @@ asmlinkage int swsusp_arch_resume(void)
 	if (error)
 		return error;
 
+	temp_pgt = __pa(resume_pg_dir);
+
 	/* We have got enough memory and from now on we cannot recover */
 	restore_image();
 	return 0;
arch/x86/power/hibernate_asm_32.S +1 -2
index 671d38d0d931..f0627cf30a36 100644
@@ -33,8 +33,7 @@ ENDPROC(swsusp_arch_suspend)
 
 ENTRY(restore_image)
 	movl	mmu_cr4_features, %ecx
-	movl	resume_pg_dir, %eax
-	subl	$__PAGE_OFFSET, %eax
+	movl	temp_pgt, %eax
 	movl	%eax, %cr3
 
 	jecxz	1f	# cr4 Pentium and higher, skip if zero
Signature · 1 line
2.17.1
#8 lore raw

Re: [PATCH 07/12][v4] x86-32, hibernate: Use temp_pgt as the temporary page table

Quoted 6 lines · Chen Yu

From: Zhimin Gu <[email protected]>

This is to reuse the temp_pgt for both 32bit and 64bit system.

No functional change.

I'd say this is functional change. "No functional change" normally means "compiled code has not changed".

Signature · 2 lines
(english) http://www.livejournal.com/~pavelmachek
(cesky, pictures) http://atrey.karlin.mff.cuni.cz/~pavel/picture/horses/blog.html
author
#9 lore raw

PATCH v4 8/12 x86-32, hibernate: Use the page size macro instead of constant value

In reply to Chen Yu

From: Zhimin Gu <[email protected]>

Convert the hard code into PAGE_SIZE for better scalability.

No functional change.

---
 arch/x86/power/hibernate_asm_32.S | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)
arch/x86/power/hibernate_asm_32.S +1 -1
index f0627cf30a36..f5103ae96582 100644
@@ -52,7 +52,7 @@ copy_loop:
 	movl	pbe_address(%edx), %esi
 	movl	pbe_orig_address(%edx), %edi
 
-	movl	$1024, %ecx
+	movl	$(PAGE_SIZE >> 2), %ecx
 	rep
 	movsl
 
Signature · 1 line
2.17.1
author
#10 lore raw

PATCH v4 9/12 x86-32, hibernate: Switch to original page table after resumed

In reply to Chen Yu

From: Zhimin Gu <[email protected]>

After all the pages are restored to previous address, the page table switches back to current swapper_pg_dir. However the swapper_pg_dir currently in used might not be consistent with previous page table, which might cause issue after resume.

Fix this issue by switching to original page table after resume, and the address of the original page table is saved in the hibernation image header.

Move the manipulation of restore_cr3 into common code blocks.

---
 arch/x86/power/hibernate.c        |  4 ++--
 arch/x86/power/hibernate_asm_32.S | 10 +++++++---
 2 files changed, 9 insertions(+), 5 deletions(-)
arch/x86/power/hibernate.c +2 -2
index e3409e4a9b6a..4935b8139229 100644
@@ -160,6 +160,7 @@ int arch_hibernation_header_save(void *addr, unsigned int max_size)
 #ifdef CONFIG_X86_64
 	rdr->jump_address = (unsigned long)restore_registers;
 	rdr->jump_address_phys = __pa_symbol(restore_registers);
+#endif
 
 	/*
 	 * The restore code fixes up CR3 and CR4 in the following sequence:
@@ -179,7 +180,6 @@ int arch_hibernation_header_save(void *addr, unsigned int max_size)
 	 * have any of the PCID bits set.
 	 */
 	rdr->cr3 = restore_cr3 & ~CR3_PCID_MASK;
-#endif
 
 	return hibernation_e820_save(rdr->e820_digest);
 }
@@ -201,8 +201,8 @@ int arch_hibernation_header_restore(void *addr)
 #ifdef CONFIG_X86_64
 	restore_jump_address = rdr->jump_address;
 	jump_address_phys = rdr->jump_address_phys;
-	restore_cr3 = rdr->cr3;
 #endif
+	restore_cr3 = rdr->cr3;
 
 	if (hibernation_e820_mismatch(rdr->e820_digest)) {
 		pr_crit("Hibernate inconsistent memory map detected!\n");
arch/x86/power/hibernate_asm_32.S +7 -3
index f5103ae96582..6b2b94937113 100644
@@ -25,6 +25,10 @@ ENTRY(swsusp_arch_suspend)
 	pushfl
 	popl saved_context_eflags
 
+	/* save cr3 */
+	movl	%cr3, %eax
+	movl	%eax, restore_cr3
+
 	FRAME_BEGIN
 	call swsusp_save
 	FRAME_END
@@ -32,6 +36,8 @@ ENTRY(swsusp_arch_suspend)
 ENDPROC(swsusp_arch_suspend)
 
 ENTRY(restore_image)
+	movl	restore_cr3, %ebp
+
 	movl	mmu_cr4_features, %ecx
 	movl	temp_pgt, %eax
 	movl	%eax, %cr3
@@ -66,9 +72,7 @@ done:
 	.align PAGE_SIZE
 ENTRY(restore_registers)
 	/* go back to the original page tables */
-	movl	$swapper_pg_dir, %eax
-	subl	$__PAGE_OFFSET, %eax
-	movl	%eax, %cr3
+	movl	%ebp, %cr3
 	movl	mmu_cr4_features, %ecx
 	jecxz	1f	# cr4 Pentium and higher, skip if zero
 	movl	%ecx, %cr4;  # turn PGE back on
Signature · 1 line
2.17.1
author
#11 lore raw

PATCH v4 10/12 x86-32, hibernate: Switch to relocated restore code during resume on 32bit system

In reply to Chen Yu

From: Zhimin Gu <[email protected]>

On 64bit system, code should be executed in a safe page during page restoring, as the page where instruction is running during resume might be scribbled and causes issues.

Although on 32 bit, we only suspend resuming by same kernel that did the suspend, we'd like to remove that restriction in the future.

Porting corresponding code from
64bit system: Allocate a safe page, and copy the restore code to it, then jump to the safe page to run the code.

---
 arch/x86/power/hibernate.c        | 2 --
 arch/x86/power/hibernate_32.c     | 4 ++++
 arch/x86/power/hibernate_asm_32.S | 7 +++++++
 3 files changed, 11 insertions(+), 2 deletions(-)
arch/x86/power/hibernate.c +0 -2
index 4935b8139229..7383cb67ffd7 100644
@@ -212,7 +212,6 @@ int arch_hibernation_header_restore(void *addr)
 	return 0;
 }
 
-#ifdef CONFIG_X86_64
 int relocate_restore_code(void)
 {
 	pgd_t *pgd;
@@ -251,4 +250,3 @@ int relocate_restore_code(void)
 	__flush_tlb_all();
 	return 0;
 }
-#endif
arch/x86/power/hibernate_32.c +4 -0
index a44bdada4e4e..a9861095fbb8 100644
@@ -158,6 +158,10 @@ asmlinkage int swsusp_arch_resume(void)
 
 	temp_pgt = __pa(resume_pg_dir);
 
+	error = relocate_restore_code();
+	if (error)
+		return error;
+
 	/* We have got enough memory and from now on we cannot recover */
 	restore_image();
 	return 0;
arch/x86/power/hibernate_asm_32.S +7 -0
index 6b2b94937113..e9adda6b6b02 100644
@@ -39,6 +39,13 @@ ENTRY(restore_image)
 	movl	restore_cr3, %ebp
 
 	movl	mmu_cr4_features, %ecx
+
+	/* jump to relocated restore code */
+	movl	relocated_restore_code, %eax
+	jmpl	*%eax
+
+/* code below has been relocated to a safe page */
+ENTRY(core_restore_code)
 	movl	temp_pgt, %eax
 	movl	%eax, %cr3
 
Signature · 1 line
2.17.1
author
#12 lore raw

PATCH v4 11/12 x86-32, hibernate: Set up temporary text mapping for 32bit system

In reply to Chen Yu

From: Zhimin Gu <[email protected]>

Set up the temporary text mapping for the final jump address so that the system could jump to the right address after all the pages have been copied back to their original address - otherwise the final mapping for the jump address is invalid.

Analogous changes were made for 64-bit in:
Commit 65c0554b73c9 ('x86/power/64: Fix kernel text mapping corruption during image restoration')

---
 arch/x86/power/hibernate.c        |  4 ----
 arch/x86/power/hibernate_32.c     | 31 +++++++++++++++++++++++++++++++
 arch/x86/power/hibernate_asm_32.S |  3 +++
 3 files changed, 34 insertions(+), 4 deletions(-)
arch/x86/power/hibernate.c +0 -4
index 7383cb67ffd7..bcddf09b5aa3 100644
@@ -157,10 +157,8 @@ int arch_hibernation_header_save(void *addr, unsigned int max_size)
 	if (max_size < sizeof(struct restore_data_record))
 		return -EOVERFLOW;
 	rdr->magic = RESTORE_MAGIC;
-#ifdef CONFIG_X86_64
 	rdr->jump_address = (unsigned long)restore_registers;
 	rdr->jump_address_phys = __pa_symbol(restore_registers);
-#endif
 
 	/*
 	 * The restore code fixes up CR3 and CR4 in the following sequence:
@@ -198,10 +196,8 @@ int arch_hibernation_header_restore(void *addr)
 		return -EINVAL;
 	}
 
-#ifdef CONFIG_X86_64
 	restore_jump_address = rdr->jump_address;
 	jump_address_phys = rdr->jump_address_phys;
-#endif
 	restore_cr3 = rdr->cr3;
 
 	if (hibernation_e820_mismatch(rdr->e820_digest)) {
arch/x86/power/hibernate_32.c +31 -0
index a9861095fbb8..15695e30f982 100644
@@ -143,6 +143,32 @@ static inline void resume_init_first_level_page_table(pgd_t *pg_dir)
 #endif
 }
 
+static int set_up_temporary_text_mapping(pgd_t *pgd_base)
+{
+	pgd_t *pgd;
+	pmd_t *pmd;
+	pte_t *pte;
+
+	pgd = pgd_base + pgd_index(restore_jump_address);
+
+	pmd = resume_one_md_table_init(pgd);
+	if (!pmd)
+		return -ENOMEM;
+
+	if (boot_cpu_has(X86_FEATURE_PSE)) {
+		set_pmd(pmd + pmd_index(restore_jump_address),
+		__pmd((jump_address_phys & PMD_MASK) | pgprot_val(PAGE_KERNEL_LARGE_EXEC)));
+	} else {
+		pte = resume_one_page_table_init(pmd);
+		if (!pte)
+			return -ENOMEM;
+		set_pte(pte + pte_index(restore_jump_address),
+		__pte((jump_address_phys & PAGE_MASK) | pgprot_val(PAGE_KERNEL_EXEC)));
+	}
+
+	return 0;
+}
+
 asmlinkage int swsusp_arch_resume(void)
 {
 	int error;
@@ -152,6 +178,11 @@ asmlinkage int swsusp_arch_resume(void)
 		return -ENOMEM;
 
 	resume_init_first_level_page_table(resume_pg_dir);
+
+	error = set_up_temporary_text_mapping(resume_pg_dir);
+	if (error)
+		return error;
+
 	error = resume_physical_mapping_init(resume_pg_dir);
 	if (error)
 		return error;
arch/x86/power/hibernate_asm_32.S +3 -0
index e9adda6b6b02..01f653fae7bd 100644
@@ -36,6 +36,8 @@ ENTRY(swsusp_arch_suspend)
 ENDPROC(swsusp_arch_suspend)
 
 ENTRY(restore_image)
+	/* prepare to jump to the image kernel */
+	movl	restore_jump_address, %ebx
 	movl	restore_cr3, %ebp
 
 	movl	mmu_cr4_features, %ecx
@@ -74,6 +76,7 @@ copy_loop:
 	.p2align 4,,7
 
 done:
+	jmpl	*%ebx
 
 	/* code below belongs to the image kernel */
 	.align PAGE_SIZE
Signature · 1 line
2.17.1
author
#13 lore raw

PATCH v4 12/12 x86-32, hibernate: Adjust in_suspend after resumed on 32bit system

In reply to Chen Yu

From: Zhimin Gu <[email protected]>

Update the in_suspend variable to reflect the actual hibernation status. Back-port from 64bit system.

---
 arch/x86/power/hibernate_asm_32.S | 3 +++
 1 file changed, 3 insertions(+)
arch/x86/power/hibernate_asm_32.S +3 -0
index 01f653fae7bd..6fe383002125 100644
@@ -103,5 +103,8 @@ ENTRY(restore_registers)
 
 	xorl	%eax, %eax
 
+	/* tell the hibernation core that we've just restored the memory */
+	movl	%eax, in_suspend
+
 	ret
 ENDPROC(restore_registers)
Signature · 1 line
2.17.1
Acked-by on the v4 series
#14 lore raw
In reply to Chen Yu
Quoted 21 lines · Chen Yu

Currently there are mainly three bugs in 32bits system when doing hibernation:
1. The page copy code is not running in safe page, which might cause hang during resume.
2. There's no text mapping for the final jump address
of the original kernel, which might cause the system jumping into illegal address and causes system hang during resume.
3. The restore kernel switches to its own kernel page table(swapper_pg_dir) rather than the original kernel page table after all the pages been copied back, which might cause invalid virtual-physical mapping issue during resume.

To solve these problems:

1. Copy the code core_restore_code to a safe page, to avoid the instruction code been overwritten when image kernel pages are being copied.
2. Set up temporary text mapping for the image kernel's jump address, so that after all the pages have been copied back, the system could jump to this address.
3. Switch to the original kernel page table during resume.

Quoted 8 lines

Furthermore, MD5 hash check for e820 map is also backported from 64bits system.

In order to make this patch set more readable, these fixes are splitted into several sub patches.

And use CONFIG_X86_64 to control the common code to be 'activated' for 32 bit system during each sub-patch for better maintaining.

Rafael, it's all yours :)

Thanks,

tglx

#15 lore raw
Quoted 29 lines · CEST Thomas Gleixner
Quoted 27 lines · Chen Yu

Currently there are mainly three bugs in 32bits system when doing hibernation:
1. The page copy code is not running in safe page, which might cause hang during resume.
2. There's no text mapping for the final jump address
of the original kernel, which might cause the system jumping into illegal address and causes system hang during resume.
3. The restore kernel switches to its own kernel page table(swapper_pg_dir) rather than the original kernel page table after all the pages been copied back, which might cause invalid virtual-physical mapping issue during resume.

To solve these problems:

1. Copy the code core_restore_code to a safe page, to avoid the instruction code been overwritten when image kernel pages are being copied.
2. Set up temporary text mapping for the image kernel's jump address, so that after all the pages have been copied back, the system could jump to this address.
3. Switch to the original kernel page table during resume.

Furthermore, MD5 hash check for e820 map is also backported from 64bits system.

In order to make this patch set more readable, these fixes are splitted into several sub patches.

Quoted 6 lines
Quoted 2 lines

And use CONFIG_X86_64 to control the common code to be 'activated' for 32 bit system during each sub-patch for better maintaining.

Rafael, it's all yours :)

Thank you, I have applied the series.

This was long overdue, many thanks to everyone involved for taking care of it!

Thanks,
Rafael