staging: mt7621-pci: cleanup
Subsystems (2)
v2 cover staging: mt7621-pci: cleanup
Fix issues found with checkpatch.pl for mt7621-pci staging driver.
Mamta Shukla (5):
staging: mt7621-pci: Do not initialise statics to 0
staging: mt7621-pci: Add spaces around '&'
staging: mt7621-pci: Add spaces around '|'
staging: mt7621-pci: Add spaces around '<<'
staging: mt7621-pci: Prefer using the BIT macro
drivers/staging/mt7621-pci/pci-mt7621.c | 50 ++++++++++++++++----------------- 1 file changed, 25 insertions(+), 25 deletions(-)
Signature · 1 line
1.9.1
PATCH v2 1/5 staging: mt7621-pci: Do not initialise statics to 0
Remove initialisation for static global variable to fix checkpatch issue.
ERROR: do not initialise statics to 0
---
change in v2:
-Change in subjectline to begin with capital letter.
drivers/staging/mt7621-pci/pci-mt7621.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
drivers/staging/mt7621-pci/pci-mt7621.c +1 -1
@@ -122,7 +122,7 @@#define RALINK_PCIE_CLK_EN BIT(21)#define MEMORY_BASE 0x0 -static int pcie_link_status =0 ; +static int pcie_link_status;/** * struct mt7621_pcie_port - PCIe port information
Signature · 1 line
1.9.1
PATCH v2 2/5 staging: mt7621-pci: Add spaces around '&'
In reply to Mamta ShuklaAdd spaces around '&' to fix checkpatch issue.
CHECK: spaces preferred around that '&' (ctx:VxV)
---
change in v2:
-Cleanup for subjectline of patch.
drivers/staging/mt7621-pci/pci-mt7621.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
drivers/staging/mt7621-pci/pci-mt7621.c +1 -1
@@ -489,7 +489,7 @@ static int mt7621_pci_probe(struct platform_device *pdev)DEASSERT_SYSRST_PCIE (val); -if ((*(unsigned int *)(0xbe00000c )&0xFFFF ) ==0x0101 )// MT7621 E2 +if ((*(unsigned int *)(0xbe00000c ) &0xFFFF ) ==0x0101 )// MT7621 E2 bypass_pipe_rst (pcie);set_phy_for_ssc (pcie);
Signature · 1 line
1.9.1
PATCH v2 3/5 staging: mt7621-pci: Add spaces around '|'
In reply to Mamta ShuklaAdd spaces around '|' to fix checkpatch issue
CHECK: spaces preferred around that '|' (ctx:VxV)
---
change in v2:
-Cleanup for subject line of patch.
drivers/staging/mt7621-pci/pci-mt7621.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-)
drivers/staging/mt7621-pci/pci-mt7621.c +3 -3
@@ -644,7 +644,7 @@ static int mt7621_pci_probe(struct platform_device *pdev)switch (pcie_link_status) {case 7 : val =read_config (pcie,2 ,0x4 ); -write_config (pcie,2 ,0x4 , val|0x4 ); +write_config (pcie,2 ,0x4 , val |0x4 ); val =read_config (pcie,2 ,0x70c ); val &= ~(0xff )<<8 ; val |=0x50 <<8 ;
@@ -653,14 +653,14 @@ static int mt7621_pci_probe(struct platform_device *pdev)case 5 :case 6 : val =read_config (pcie,1 ,0x4 ); -write_config (pcie,1 ,0x4 , val|0x4 ); +write_config (pcie,1 ,0x4 , val |0x4 ); val =read_config (pcie,1 ,0x70c ); val &= ~(0xff )<<8 ; val |=0x50 <<8 ;write_config (pcie,1 ,0x70c , val);default : val =read_config (pcie,0 ,0x4 ); -write_config (pcie,0 ,0x4 , val|0x4 );//bus master enable +write_config (pcie,0 ,0x4 , val |0x4 );//bus master enable val =read_config (pcie,0 ,0x70c ); val &= ~(0xff )<<8 ; val |=0x50 <<8 ;
Signature · 1 line
1.9.1
PATCH v2 4/5 staging: mt7621-pci: Add spaces around '<<'
In reply to Mamta ShuklaAdd spaces around '<<' to fix checkpatch issue.
CHECK: spaces preferred around that '<<' (ctx:VxV)
---
changes in v2:
-Cleanup for subject line of patch.
-Replace (1<<x) with BIT(x) at possible patch and add as a new patch in
this series.
drivers/staging/mt7621-pci/pci-mt7621.c | 40 ++++++++++++++++----------------- 1 file changed, 20 insertions(+), 20 deletions(-)
drivers/staging/mt7621-pci/pci-mt7621.c +20 -20
@@ -474,12 +474,12 @@ static int mt7621_pci_probe(struct platform_device *pdev)ASSERT_SYSRST_PCIE (RALINK_PCIE0_RST |RALINK_PCIE1_RST |RALINK_PCIE2_RST ); - *(unsigned int *)(0xbe000060 ) &= ~(0x3 <<10 |0x3 <<3 ); - *(unsigned int *)(0xbe000060 ) |=0x1 <<10 |0x1 <<3 ; + *(unsigned int *)(0xbe000060 ) &= ~(0x3 <<10 |0x3 <<3 ); + *(unsigned int *)(0xbe000060 ) |=0x1 <<10 |0x1 <<3 ;mdelay (100 ); - *(unsigned int *)(0xbe000600 ) |=0x1 <<19 |0x1 <<8 |0x1 <<7 ;// use GPIO19/GPIO8/GPIO7 (PERST_N/UART_RXD3/UART_TXD3) + *(unsigned int *)(0xbe000600 ) |=0x1 <<19 |0x1 <<8 |0x1 <<7 ;// use GPIO19/GPIO8/GPIO7 (PERST_N/UART_RXD3/UART_TXD3) mdelay (100 ); - *(unsigned int *)(0xbe000620 ) &= ~(0x1 <<19 |0x1 <<8 |0x1 <<7 );// clear DATA + *(unsigned int *)(0xbe000620 ) &= ~(0x1 <<19 |0x1 <<8 |0x1 <<7 );// clear DATA mdelay (100 );
@@ -510,18 +510,18 @@ static int mt7621_pci_probe(struct platform_device *pdev)rt_sysc_m32 (RALINK_PCIE_RST ,0 ,RALINK_RSTCTRL );/* Use GPIO control instead of PERST_N */ - *(unsigned int *)(0xbe000620 ) |=0x1 <<19 |0x1 <<8 |0x1 <<7 ;// set DATA + *(unsigned int *)(0xbe000620 ) |=0x1 <<19 |0x1 <<8 |0x1 <<7 ;// set DATA mdelay (1000 );if ((pcie_read (pcie,RT6855_PCIE0_OFFSET +RALINK_PCI_STATUS ) &0x1 ) ==0 ) {printk ("PCIE0 no card, disable it(RST&CLK)\n" );ASSERT_SYSRST_PCIE (RALINK_PCIE0_RST );rt_sysc_m32 (RALINK_PCIE0_CLK_EN ,0 ,RALINK_CLKCFG1 ); - pcie_link_status &= ~(1 <<0 ); + pcie_link_status &= ~(1 <<0 ); }else { - pcie_link_status |=1 <<0 ; + pcie_link_status |=1 <<0 ; val =pcie_read (pcie,RALINK_PCI_PCIMSK_ADDR ); - val |= (1 <<20 );// enable pcie1 interrupt + val |= (1 <<20 );// enable pcie1 interrupt pcie_write (pcie, val,RALINK_PCI_PCIMSK_ADDR ); }
@@ -529,11 +529,11 @@ static int mt7621_pci_probe(struct platform_device *pdev)printk ("PCIE1 no card, disable it(RST&CLK)\n" );ASSERT_SYSRST_PCIE (RALINK_PCIE1_RST );rt_sysc_m32 (RALINK_PCIE1_CLK_EN ,0 ,RALINK_CLKCFG1 ); - pcie_link_status &= ~(1 <<1 ); + pcie_link_status &= ~(1 <<1 ); }else { - pcie_link_status |=1 <<1 ; + pcie_link_status |=1 <<1 ; val =pcie_read (pcie,RALINK_PCI_PCIMSK_ADDR ); - val |= (1 <<21 );// enable pcie1 interrupt + val |= (1 <<21 );// enable pcie1 interrupt pcie_write (pcie, val,RALINK_PCI_PCIMSK_ADDR ); }
@@ -541,11 +541,11 @@ static int mt7621_pci_probe(struct platform_device *pdev)printk ("PCIE2 no card, disable it(RST&CLK)\n" );ASSERT_SYSRST_PCIE (RALINK_PCIE2_RST );rt_sysc_m32 (RALINK_PCIE2_CLK_EN ,0 ,RALINK_CLKCFG1 ); - pcie_link_status &= ~(1 <<2 ); + pcie_link_status &= ~(1 <<2 ); }else { - pcie_link_status |=1 <<2 ; + pcie_link_status |=1 <<2 ; val =pcie_read (pcie,RALINK_PCI_PCIMSK_ADDR ); - val |= (1 <<22 );// enable pcie2 interrupt + val |= (1 <<22 );// enable pcie2 interrupt pcie_write (pcie, val,RALINK_PCI_PCIMSK_ADDR ); }
@@ -646,8 +646,8 @@ static int mt7621_pci_probe(struct platform_device *pdev) val =read_config (pcie,2 ,0x4 );write_config (pcie,2 ,0x4 , val |0x4 ); val =read_config (pcie,2 ,0x70c ); - val &= ~(0xff )<<8 ; - val |=0x50 <<8 ; + val &= ~(0xff ) <<8 ; + val |=0x50 <<8 ;write_config (pcie,2 ,0x70c , val);case 3 :case 5 :
@@ -655,15 +655,15 @@ static int mt7621_pci_probe(struct platform_device *pdev) val =read_config (pcie,1 ,0x4 );write_config (pcie,1 ,0x4 , val |0x4 ); val =read_config (pcie,1 ,0x70c ); - val &= ~(0xff )<<8 ; - val |=0x50 <<8 ; + val &= ~(0xff ) <<8 ; + val |=0x50 <<8 ;write_config (pcie,1 ,0x70c , val);default : val =read_config (pcie,0 ,0x4 );write_config (pcie,0 ,0x4 , val |0x4 );//bus master enable val =read_config (pcie,0 ,0x70c ); - val &= ~(0xff )<<8 ; - val |=0x50 <<8 ; + val &= ~(0xff ) <<8 ; + val |=0x50 <<8 ;write_config (pcie,0 ,0x70c , val); }
Signature · 1 line
1.9.1
PATCH v2 5/5 staging: mt7621-pci: Prefer using the BIT macro
In reply to Mamta ShuklaReplace all occurrences of (1<<x) with BIT(x).
---
change in v2:
-Add this patch as a new patch in this patch series.
drivers/staging/mt7621-pci/pci-mt7621.c | 26 +++++++++++++------------- 1 file changed, 13 insertions(+), 13 deletions(-)
drivers/staging/mt7621-pci/pci-mt7621.c +13 -13
@@ -475,11 +475,11 @@ static int mt7621_pci_probe(struct platform_device *pdev)ASSERT_SYSRST_PCIE (RALINK_PCIE0_RST |RALINK_PCIE1_RST |RALINK_PCIE2_RST ); *(unsigned int *)(0xbe000060 ) &= ~(0x3 <<10 |0x3 <<3 ); - *(unsigned int *)(0xbe000060 ) |=0x1 <<10 |0x1 <<3 ; + *(unsigned int *)(0xbe000060 ) |=BIT (10 ) |BIT (3 );mdelay (100 ); - *(unsigned int *)(0xbe000600 ) |=0x1 <<19 |0x1 <<8 |0x1 <<7 ;// use GPIO19/GPIO8/GPIO7 (PERST_N/UART_RXD3/UART_TXD3) + *(unsigned int *)(0xbe000600 ) |=BIT (19 ) |BIT (8 ) |BIT (7 );// use GPIO19/GPIO8/GPIO7 (PERST_N/UART_RXD3/UART_TXD3) mdelay (100 ); - *(unsigned int *)(0xbe000620 ) &= ~(0x1 <<19 |0x1 <<8 |0x1 <<7 );// clear DATA + *(unsigned int *)(0xbe000620 ) &= ~(BIT (19 ) |BIT (8 ) |BIT (7 ));// clear DATA mdelay (100 );
@@ -510,18 +510,18 @@ static int mt7621_pci_probe(struct platform_device *pdev)rt_sysc_m32 (RALINK_PCIE_RST ,0 ,RALINK_RSTCTRL );/* Use GPIO control instead of PERST_N */ - *(unsigned int *)(0xbe000620 ) |=0x1 <<19 |0x1 <<8 |0x1 <<7 ;// set DATA + *(unsigned int *)(0xbe000620 ) |=BIT (19 ) |BIT (8 ) |BIT (7 );// set DATA mdelay (1000 );if ((pcie_read (pcie,RT6855_PCIE0_OFFSET +RALINK_PCI_STATUS ) &0x1 ) ==0 ) {printk ("PCIE0 no card, disable it(RST&CLK)\n" );ASSERT_SYSRST_PCIE (RALINK_PCIE0_RST );rt_sysc_m32 (RALINK_PCIE0_CLK_EN ,0 ,RALINK_CLKCFG1 ); - pcie_link_status &= ~(1 <<0 ); + pcie_link_status &= ~(BIT (0 )); }else { - pcie_link_status |=1 <<0 ; + pcie_link_status |=BIT (0 ); val =pcie_read (pcie,RALINK_PCI_PCIMSK_ADDR ); - val |= (1 <<20 );// enable pcie1 interrupt + val |=BIT (20 );// enable pcie1 interrupt pcie_write (pcie, val,RALINK_PCI_PCIMSK_ADDR ); }
@@ -529,11 +529,11 @@ static int mt7621_pci_probe(struct platform_device *pdev)printk ("PCIE1 no card, disable it(RST&CLK)\n" );ASSERT_SYSRST_PCIE (RALINK_PCIE1_RST );rt_sysc_m32 (RALINK_PCIE1_CLK_EN ,0 ,RALINK_CLKCFG1 ); - pcie_link_status &= ~(1 <<1 ); + pcie_link_status &= ~(BIT (1 )); }else { - pcie_link_status |=1 <<1 ; + pcie_link_status |=BIT (1 ); val =pcie_read (pcie,RALINK_PCI_PCIMSK_ADDR ); - val |= (1 <<21 );// enable pcie1 interrupt + val |=BIT (21 );// enable pcie1 interrupt pcie_write (pcie, val,RALINK_PCI_PCIMSK_ADDR ); }
@@ -541,11 +541,11 @@ static int mt7621_pci_probe(struct platform_device *pdev)printk ("PCIE2 no card, disable it(RST&CLK)\n" );ASSERT_SYSRST_PCIE (RALINK_PCIE2_RST );rt_sysc_m32 (RALINK_PCIE2_CLK_EN ,0 ,RALINK_CLKCFG1 ); - pcie_link_status &= ~(1 <<2 ); + pcie_link_status &= ~(BIT (2 )); }else { - pcie_link_status |=1 <<2 ; + pcie_link_status |=BIT (2 ); val =pcie_read (pcie,RALINK_PCI_PCIMSK_ADDR ); - val |= (1 <<22 );// enable pcie2 interrupt + val |=BIT (22 );// enable pcie2 interrupt pcie_write (pcie, val,RALINK_PCI_PCIMSK_ADDR ); }
Signature · 1 line
1.9.1