usb: dwc3: Introduce refclk lpm
Subsystems (2)
cover usb: dwc3: Introduce refclk lpm
This patch series introduce a new feature in DWC_usb31 with more aggressive low power management using reference clock.
Thinh Nguyen (3):
usb: dwc3: Add reference clock properties
usb: dwc3: Set reference clock period
usb: dwc3: Enable low power management using refclk
Documentation/devicetree/bindings/usb/dwc3.txt | 18 ++++++++++++++ drivers/usb/dwc3/core.c | 34 ++++++++++++++++++++++++++ drivers/usb/dwc3/core.h | 14 +++++++++++ 3 files changed, 66 insertions(+)
Signature · 1 line
2.11.0
PATCH 1/3 usb: dwc3: Add reference clock properties
Add two new device properties to program the reference clock period and to enable low power management using the reference clock. This allows a higher demand to go in low power for Audio Device Class devices. This feature is currently only valid for DWC_usb31 peripheral controller v1.80a and higher.
Set "snps,refclk-period-ns" to program the reference clock period. The valid input periods are as follow:
+-------------+-----------------+ | Period (ns) | Freq (MHz) | +-------------+-----------------+ | 25 | 39.7/40 | | 41 | 24.4 | | 50 | 20 | | 52 | 19.2 | | 58 | 17.2 | | 62 | 16.1 | +-------------+-----------------+
Set "snps,refclk-lpm" to enable low power scheduling of isochronous transfers by running SOF/ITP counters using the reference clock. Both "snps,dis_u2_susphy_quirk" and "snps,dis_enblslpm_quirk" must not be set for this feature to be enabled.
--- Documentation/devicetree/bindings/usb/dwc3.txt | 18 ++++++++++++++++++ 1 file changed, 18 insertions(+)
Documentation/devicetree/bindings/usb/dwc3.txt +18 -0
@@ -95,6 +95,24 @@ Optional properties: this and tx-thr-num-pkt-prd to a valid, non-zero value 1-16 (DWC_usb31 programming guide section 1.2.3) to enable periodic ESS TX threshold. + - snps,refclk-period-ns: set to program the reference clock period. The valid + input periods are as follow: + +-------------+-----------------+ + | Period (ns) | Freq (MHz) | + +-------------+-----------------+ + | 25 | 39.7/40 | + | 41 | 24.4 | + | 50 | 20 | + | 52 | 19.2 | + | 58 | 17.2 | + | 62 | 16.1 | + +-------------+-----------------+ + - snps,enable-refclk-lpm: set to enable low power scheduling of isochronous + transfers by running SOF/ITP counters using the + reference clock. Only valid for DWC_usb31 peripheral + controller v1.80a and higher. Both + "snps,dis_u2_susphy_quirk" and + "snps,dis_enblslpm_quirk" must not be set. - <DEPRECATED> tx-fifo-resize: determines if the FIFO *has* to be reallocated. - snps,incr-burst-type-adjustment: Value for INCR burst type of GSBUSCFG0
Signature · 1 line
2.11.0
Re: [PATCH 1/3] usb: dwc3: Add reference clock properties
hi,
Quoted 45 lines · Thinh Nguyen
Add two new device properties to program the reference clock period and to enable low power management using the reference clock. This allows a higher demand to go in low power for Audio Device Class devices. This feature is currently only valid for
DWC_usb31peripheral controller v1.80a and higher.Set "snps,refclk-period-ns" to program the reference clock period. The valid input periods are as follow:
+-------------+-----------------+ | Period (ns) | Freq (MHz) | +-------------+-----------------+ | 25 | 39.7/40 | | 41 | 24.4 | | 50 | 20 | | 52 | 19.2 | | 58 | 17.2 | | 62 | 16.1 | +-------------+-----------------+Set "snps,refclk-lpm" to enable low power scheduling of isochronous transfers by running SOF/ITP counters using the reference clock. Both "snps,dis_u2_susphy_quirk" and "snps,dis_enblslpm_quirk" must not be set for this feature to be enabled.
Signed-off-by Thinh Nguyen <[email protected]>--- Documentation/devicetree/bindings/usb/dwc3.txt | 18 ++++++++++++++++++ 1 file changed, 18 insertions(+)Documentation/devicetree/bindings/usb/dwc3.txt +8
-0@@ -95,6 +95,24 @@ Optional properties: this and tx-thr-num-pkt-prd to a valid, non-zero value 1-16 (DWC_usb31 programming guide section 1.2.3) to enable periodic ESS TX threshold. + - snps,refclk-period-ns: set to program the reference clock period. The valid + input periods are as follow: + +-------------+-----------------+ + | Period (ns) | Freq (MHz) | + +-------------+-----------------+ + | 25 | 39.7/40 | + | 41 | 24.4 | + | 50 | 20 |
Documentation/devicetree/bindings/usb/dwc3.txt Optional properties: · line 115
Quoted 10 lines
Documentation/devicetree/bindings/usb/dwc3.txt +10
-0+ | 52 | 19.2 | + | 58 | 17.2 | + | 62 | 16.1 | + +-------------+-----------------+ + - snps,enable-refclk-lpm: set to enable low power scheduling of isochronous + transfers by running SOF/ITP counters using the + reference clock. Only valid for DWC_usb31 peripheral + controller v1.80a and higher. Both + "snps,dis_u2_susphy_quirk" and + "snps,dis_enblslpm_quirk" must not be set.
sounds like you should rely on clk API here. Then on driver call clk_get_rate() to computer whatever you need to compute.
Signature · 1 line
balbi
Re: [PATCH 1/3] usb: dwc3: Add reference clock properties
Hi Felipe,
Quoted 52 lines · Felipe Balbi
hi,
Quoted 49 lines · Thinh Nguyen
Add two new device properties to program the reference clock period and to enable low power management using the reference clock. This allows a higher demand to go in low power for Audio Device Class devices. This feature is currently only valid for
DWC_usb31peripheral controller v1.80a and higher.Set "snps,refclk-period-ns" to program the reference clock period. The valid input periods are as follow:
+-------------+-----------------+ | Period (ns) | Freq (MHz) | +-------------+-----------------+ | 25 | 39.7/40 | | 41 | 24.4 | | 50 | 20 | | 52 | 19.2 | | 58 | 17.2 | | 62 | 16.1 | +-------------+-----------------+Set "snps,refclk-lpm" to enable low power scheduling of isochronous transfers by running SOF/ITP counters using the reference clock. Both "snps,dis_u2_susphy_quirk" and "snps,dis_enblslpm_quirk" must not be set for this feature to be enabled.
Signed-off-by Thinh Nguyen <[email protected]>--- Documentation/devicetree/bindings/usb/dwc3.txt | 18 ++++++++++++++++++ 1 file changed, 18 insertions(+)Documentation/devicetree/bindings/usb/dwc3.txt +12
-0@@ -95,6 +95,24 @@ Optional properties: this and tx-thr-num-pkt-prd to a valid, non-zero value 1-16 (DWC_usb31 programming guide section 1.2.3) to enable periodic ESS TX threshold. + - snps,refclk-period-ns: set to program the reference clock period. The valid + input periods are as follow: + +-------------+-----------------+ + | Period (ns) | Freq (MHz) | + +-------------+-----------------+ + | 25 | 39.7/40 | + | 41 | 24.4 | + | 50 | 20 | + | 52 | 19.2 | + | 58 | 17.2 | + | 62 | 16.1 | + +-------------+-----------------+
Quoted 9 lines
Documentation/devicetree/bindings/usb/dwc3.txt Optional properties: · line 115
Quoted 6 lines
Documentation/devicetree/bindings/usb/dwc3.txt +6
-0+ - snps,enable-refclk-lpm: set to enable low power scheduling of isochronous + transfers by running SOF/ITP counters using the + reference clock. Only valid for DWC_usb31 peripheral + controller v1.80a and higher. Both + "snps,dis_u2_susphy_quirk" and + "snps,dis_enblslpm_quirk" must not be set.sounds like you should rely on clk API here. Then on driver call
clk_get_rate()to computer whatever you need to compute.
There's nothing to compute here. We can simply enable this feature with "snps, enable-refclk-lpm" and the controller will use the default refclk settings.
Thinh
Re: [PATCH 1/3] usb: dwc3: Add reference clock properties
Hi,
Quoted 59 lines · Thinh Nguyen
Quoted 50 lines
Quoted 49 lines · Thinh Nguyen
Add two new device properties to program the reference clock period and to enable low power management using the reference clock. This allows a higher demand to go in low power for Audio Device Class devices. This feature is currently only valid for
DWC_usb31peripheral controller v1.80a and higher.Set "snps,refclk-period-ns" to program the reference clock period. The valid input periods are as follow:
+-------------+-----------------+ | Period (ns) | Freq (MHz) | +-------------+-----------------+ | 25 | 39.7/40 | | 41 | 24.4 | | 50 | 20 | | 52 | 19.2 | | 58 | 17.2 | | 62 | 16.1 | +-------------+-----------------+Set "snps,refclk-lpm" to enable low power scheduling of isochronous transfers by running SOF/ITP counters using the reference clock. Both "snps,dis_u2_susphy_quirk" and "snps,dis_enblslpm_quirk" must not be set for this feature to be enabled.
Signed-off-by Thinh Nguyen <[email protected]>--- Documentation/devicetree/bindings/usb/dwc3.txt | 18 ++++++++++++++++++ 1 file changed, 18 insertions(+)Documentation/devicetree/bindings/usb/dwc3.txt +12
-0@@ -95,6 +95,24 @@ Optional properties: this and tx-thr-num-pkt-prd to a valid, non-zero value 1-16 (DWC_usb31 programming guide section 1.2.3) to enable periodic ESS TX threshold. + - snps,refclk-period-ns: set to program the reference clock period. The valid + input periods are as follow: + +-------------+-----------------+ + | Period (ns) | Freq (MHz) | + +-------------+-----------------+ + | 25 | 39.7/40 | + | 41 | 24.4 | + | 50 | 20 | + | 52 | 19.2 | + | 58 | 17.2 | + | 62 | 16.1 | + +-------------+-----------------+Quoted 9 lines
Documentation/devicetree/bindings/usb/dwc3.txt Optional properties: · line 115
Quoted 6 lines
Documentation/devicetree/bindings/usb/dwc3.txt +6
-0+ - snps,enable-refclk-lpm: set to enable low power scheduling of isochronous + transfers by running SOF/ITP counters using the + reference clock. Only valid for DWC_usb31 peripheral + controller v1.80a and higher. Both + "snps,dis_u2_susphy_quirk" and + "snps,dis_enblslpm_quirk" must not be set.sounds like you should rely on clk API here. Then on driver call
clk_get_rate()to computer whatever you need to compute.
Quoted 3 lines
There's nothing to compute here. We can simply enable this feature with "snps, enable-refclk-lpm" and the controller will use the default refclk settings.
Right, right. What I'm saying, though, is that we have a clock API for describing a clock. So why wouldn't we rely on that API for this? I think both of these new properties can be replaced with standard clock API properties:
clocks = <&clk1>, ..., <&lpm_clk>
clock-names = "clock1", ...., "lpm";Then dwc3 core could, simply, check if we have a clock named "lpm" and if there is, use NSECS_PER_SEC / clk_get_rate() to get its period and write it to the register that needs the information.
Re: [PATCH 1/3] usb: dwc3: Add reference clock properties
Hi Felipe,
Quoted 70 lines · Felipe Balbi
Hi,
Quoted 59 lines · Thinh Nguyen
Quoted 50 lines
Quoted 49 lines · Thinh Nguyen
Add two new device properties to program the reference clock period and to enable low power management using the reference clock. This allows a higher demand to go in low power for Audio Device Class devices. This feature is currently only valid for
DWC_usb31peripheral controller v1.80a and higher.Set "snps,refclk-period-ns" to program the reference clock period. The valid input periods are as follow:
+-------------+-----------------+ | Period (ns) | Freq (MHz) | +-------------+-----------------+ | 25 | 39.7/40 | | 41 | 24.4 | | 50 | 20 | | 52 | 19.2 | | 58 | 17.2 | | 62 | 16.1 | +-------------+-----------------+Set "snps,refclk-lpm" to enable low power scheduling of isochronous transfers by running SOF/ITP counters using the reference clock. Both "snps,dis_u2_susphy_quirk" and "snps,dis_enblslpm_quirk" must not be set for this feature to be enabled.
Signed-off-by Thinh Nguyen <[email protected]>--- Documentation/devicetree/bindings/usb/dwc3.txt | 18 ++++++++++++++++++ 1 file changed, 18 insertions(+)Documentation/devicetree/bindings/usb/dwc3.txt +12
-0@@ -95,6 +95,24 @@ Optional properties: this and tx-thr-num-pkt-prd to a valid, non-zero value 1-16 (DWC_usb31 programming guide section 1.2.3) to enable periodic ESS TX threshold. + - snps,refclk-period-ns: set to program the reference clock period. The valid + input periods are as follow: + +-------------+-----------------+ + | Period (ns) | Freq (MHz) | + +-------------+-----------------+ + | 25 | 39.7/40 | + | 41 | 24.4 | + | 50 | 20 | + | 52 | 19.2 | + | 58 | 17.2 | + | 62 | 16.1 | + +-------------+-----------------+Quoted 9 lines
Documentation/devicetree/bindings/usb/dwc3.txt Optional properties: · line 115
Quoted 6 lines
Documentation/devicetree/bindings/usb/dwc3.txt +6
-0+ - snps,enable-refclk-lpm: set to enable low power scheduling of isochronous + transfers by running SOF/ITP counters using the + reference clock. Only valid for DWC_usb31 peripheral + controller v1.80a and higher. Both + "snps,dis_u2_susphy_quirk" and + "snps,dis_enblslpm_quirk" must not be set.sounds like you should rely on clk API here. Then on driver call
clk_get_rate()to computer whatever you need to compute.Quoted 3 lines
There's nothing to compute here. We can simply enable this feature with "snps, enable-refclk-lpm" and the controller will use the default refclk settings.
Right, right. What I'm saying, though, is that we have a clock API for describing a clock. So why wouldn't we rely on that API for this? I think both of these new properties can be replaced with standard clock API properties:
Quoted 6 lines
clocks = <&clk1>, ..., <&lpm_clk> clock-names = "clock1", ...., "lpm";Then dwc3 core could, simply, check if we have a clock named "lpm" and if there is, use
NSECS_PER_SEC/clk_get_rate()to get its period and write it to the register that needs the information.
There's no new clock here. We are using the ref_clk for SOF and ITP counter for this feature. Also, clocks are optional on non-DT platforms. To use the clock API, then we need to update the driver to allow some optional clock such as "ref" clock for non-DT platforms. Do you want to do it like this?
Thinh
Re: [PATCH 1/3] usb: dwc3: Add reference clock properties
Hi,
Quoted 40 lines · Thinh Nguyen
Quoted 40 lines
Quoted 29 lines
Quoted 20 lines
Quoted 20 lines
Documentation/devicetree/bindings/usb/dwc3.txt +12
-0@@ -95,6 +95,24 @@ Optional properties: this and tx-thr-num-pkt-prd to a valid, non-zero value 1-16 (DWC_usb31 programming guide section 1.2.3) to enable periodic ESS TX threshold. + - snps,refclk-period-ns: set to program the reference clock period. The valid + input periods are as follow: + +-------------+-----------------+ + | Period (ns) | Freq (MHz) | + +-------------+-----------------+ + | 25 | 39.7/40 | + | 41 | 24.4 | + | 50 | 20 | + | 52 | 19.2 | + | 58 | 17.2 | + | 62 | 16.1 | + +-------------+-----------------+Quoted 9 lines
Documentation/devicetree/bindings/usb/dwc3.txt Optional properties: · line 115
Quoted 6 lines
Documentation/devicetree/bindings/usb/dwc3.txt +6
-0+ - snps,enable-refclk-lpm: set to enable low power scheduling of isochronous + transfers by running SOF/ITP counters using the + reference clock. Only valid for DWC_usb31 peripheral + controller v1.80a and higher. Both + "snps,dis_u2_susphy_quirk" and + "snps,dis_enblslpm_quirk" must not be set.sounds like you should rely on clk API here. Then on driver call
clk_get_rate()to computer whatever you need to compute.Quoted 3 lines
There's nothing to compute here. We can simply enable this feature with "snps, enable-refclk-lpm" and the controller will use the default refclk settings.
Right, right. What I'm saying, though, is that we have a clock API for describing a clock. So why wouldn't we rely on that API for this? I think both of these new properties can be replaced with standard clock API properties:
clocks = <&clk1>, ..., <&lpm_clk> clock-names = "clock1", ...., "lpm";
Quoted 8 lines
Quoted 3 lines
Then dwc3 core could, simply, check if we have a clock named "lpm" and if there is, use
NSECS_PER_SEC/clk_get_rate()to get its period and write it to the register that needs the information.There's no new clock here. We are using the
ref_clkfor SOF and ITP counter for this feature. Also, clocks are optional on non-DT platforms. To use the clock API, then we need to update the driver to allow some optional clock such as "ref" clock for non-DT platforms. Do you want to do it like this?
I can't think of a problem that would arise from that. Can you? Mark, Rob, what do you think?
Signature · 1 line
balbi
Re: [PATCH 1/3] usb: dwc3: Add reference clock properties
Hi Felipe,
Quoted 46 lines · Felipe Balbi
Hi,
Quoted 43 lines · Thinh Nguyen
Quoted 43 lines
Quoted 29 lines
Quoted 20 lines
Quoted 20 lines
Documentation/devicetree/bindings/usb/dwc3.txt +12
-0@@ -95,6 +95,24 @@ Optional properties: this and tx-thr-num-pkt-prd to a valid, non-zero value 1-16 (DWC_usb31 programming guide section 1.2.3) to enable periodic ESS TX threshold. + - snps,refclk-period-ns: set to program the reference clock period. The valid + input periods are as follow: + +-------------+-----------------+ + | Period (ns) | Freq (MHz) | + +-------------+-----------------+ + | 25 | 39.7/40 | + | 41 | 24.4 | + | 50 | 20 | + | 52 | 19.2 | + | 58 | 17.2 | + | 62 | 16.1 | + +-------------+-----------------+Quoted 9 lines
Documentation/devicetree/bindings/usb/dwc3.txt Optional properties: · line 115
Quoted 6 lines
Documentation/devicetree/bindings/usb/dwc3.txt +6
-0+ - snps,enable-refclk-lpm: set to enable low power scheduling of isochronous + transfers by running SOF/ITP counters using the + reference clock. Only valid for DWC_usb31 peripheral + controller v1.80a and higher. Both + "snps,dis_u2_susphy_quirk" and + "snps,dis_enblslpm_quirk" must not be set.sounds like you should rely on clk API here. Then on driver call
clk_get_rate()to computer whatever you need to compute.Quoted 3 lines
There's nothing to compute here. We can simply enable this feature with "snps, enable-refclk-lpm" and the controller will use the default refclk settings.
Right, right. What I'm saying, though, is that we have a clock API for describing a clock. So why wouldn't we rely on that API for this? I think both of these new properties can be replaced with standard clock API properties:
clocks = <&clk1>, ..., <&lpm_clk> clock-names = "clock1", ...., "lpm";Then dwc3 core could, simply, check if we have a clock named "lpm" and if there is, use
NSECS_PER_SEC/clk_get_rate()to get its period and write it to the register that needs the information.
Quoted 8 lines
Quoted 5 lines
There's no new clock here. We are using the
ref_clkfor SOF and ITP counter for this feature. Also, clocks are optional on non-DT platforms. To use the clock API, then we need to update the driver to allow some optional clock such as "ref" clock for non-DT platforms. Do you want to do it like this?I can't think of a problem that would arise from that. Can you? Mark, Rob, what do you think?
No problem. That can be done. This will remove the "snps,refclk-period-ns" property. But we should have "snps,enable-refclk-lpm" to enable this feature.
Thinh
Re: [PATCH 1/3] usb: dwc3: Add reference clock properties
Hi,
Quoted 49 lines · Thinh Nguyen
Quoted 49 lines
Quoted 48 lines · Thinh Nguyen
Quoted 37 lines
Quoted 29 lines
Quoted 20 lines
Quoted 20 lines
Documentation/devicetree/bindings/usb/dwc3.txt +12
-0@@ -95,6 +95,24 @@ Optional properties: this and tx-thr-num-pkt-prd to a valid, non-zero value 1-16 (DWC_usb31 programming guide section 1.2.3) to enable periodic ESS TX threshold. + - snps,refclk-period-ns: set to program the reference clock period. The valid + input periods are as follow: + +-------------+-----------------+ + | Period (ns) | Freq (MHz) | + +-------------+-----------------+ + | 25 | 39.7/40 | + | 41 | 24.4 | + | 50 | 20 | + | 52 | 19.2 | + | 58 | 17.2 | + | 62 | 16.1 | + +-------------+-----------------+Quoted 9 lines
Documentation/devicetree/bindings/usb/dwc3.txt Optional properties: · line 115
Quoted 6 lines
Documentation/devicetree/bindings/usb/dwc3.txt +6
-0+ - snps,enable-refclk-lpm: set to enable low power scheduling of isochronous + transfers by running SOF/ITP counters using the + reference clock. Only valid for DWC_usb31 peripheral + controller v1.80a and higher. Both + "snps,dis_u2_susphy_quirk" and + "snps,dis_enblslpm_quirk" must not be set.sounds like you should rely on clk API here. Then on driver call
clk_get_rate()to computer whatever you need to compute.Quoted 3 lines
There's nothing to compute here. We can simply enable this feature with "snps, enable-refclk-lpm" and the controller will use the default refclk settings.
Right, right. What I'm saying, though, is that we have a clock API for describing a clock. So why wouldn't we rely on that API for this? I think both of these new properties can be replaced with standard clock API properties:
Quoted 6 lines
clocks = <&clk1>, ..., <&lpm_clk> clock-names = "clock1", ...., "lpm";Then dwc3 core could, simply, check if we have a clock named "lpm" and if there is, use
NSECS_PER_SEC/clk_get_rate()to get its period and write it to the register that needs the information.There's no new clock here. We are using the
ref_clkfor SOF and ITP counter for this feature. Also, clocks are optional on non-DT platforms. To use the clock API, then we need to update the driver to allow some optional clock such as "ref" clock for non-DT platforms. Do you want to do it like this?
Quoted 6 lines
Quoted 3 lines
I can't think of a problem that would arise from that. Can you? Mark, Rob, what do you think?
No problem. That can be done. This will remove the "snps,refclk-period-ns" property. But we should have "snps,enable-refclk-lpm" to enable this feature.
not really. Just check if you have a clock named lpm. If you do, then you enable the feature.
Signature · 1 line
balbi
Re: [PATCH 1/3] usb: dwc3: Add reference clock properties
Hi Felipe,
Quoted 52 lines · Felipe Balbi
Hi,
Quoted 49 lines · Thinh Nguyen
Quoted 49 lines
Quoted 48 lines · Thinh Nguyen
Quoted 37 lines
Quoted 29 lines
Quoted 20 lines
Quoted 20 lines
Documentation/devicetree/bindings/usb/dwc3.txt +12
-0@@ -95,6 +95,24 @@ Optional properties: this and tx-thr-num-pkt-prd to a valid, non-zero value 1-16 (DWC_usb31 programming guide section 1.2.3) to enable periodic ESS TX threshold. + - snps,refclk-period-ns: set to program the reference clock period. The valid + input periods are as follow: + +-------------+-----------------+ + | Period (ns) | Freq (MHz) | + +-------------+-----------------+ + | 25 | 39.7/40 | + | 41 | 24.4 | + | 50 | 20 | + | 52 | 19.2 | + | 58 | 17.2 | + | 62 | 16.1 | + +-------------+-----------------+Quoted 9 lines
Documentation/devicetree/bindings/usb/dwc3.txt Optional properties: · line 115
Quoted 6 lines
Documentation/devicetree/bindings/usb/dwc3.txt +6
-0+ - snps,enable-refclk-lpm: set to enable low power scheduling of isochronous + transfers by running SOF/ITP counters using the + reference clock. Only valid for DWC_usb31 peripheral + controller v1.80a and higher. Both + "snps,dis_u2_susphy_quirk" and + "snps,dis_enblslpm_quirk" must not be set.sounds like you should rely on clk API here. Then on driver call
clk_get_rate()to computer whatever you need to compute.Quoted 3 lines
There's nothing to compute here. We can simply enable this feature with "snps, enable-refclk-lpm" and the controller will use the default refclk settings.
Right, right. What I'm saying, though, is that we have a clock API for describing a clock. So why wouldn't we rely on that API for this? I think both of these new properties can be replaced with standard clock API properties:
Quoted 6 lines
clocks = <&clk1>, ..., <&lpm_clk> clock-names = "clock1", ...., "lpm";Then dwc3 core could, simply, check if we have a clock named "lpm" and if there is, use
NSECS_PER_SEC/clk_get_rate()to get its period and write it to the register that needs the information.There's no new clock here. We are using the
ref_clkfor SOF and ITP counter for this feature. Also, clocks are optional on non-DT platforms. To use the clock API, then we need to update the driver to allow some optional clock such as "ref" clock for non-DT platforms. Do you want to do it like this?
Quoted 9 lines
Quoted 6 lines
Quoted 3 lines
I can't think of a problem that would arise from that. Can you? Mark, Rob, what do you think?
No problem. That can be done. This will remove the "snps,refclk-period-ns" property. But we should have "snps,enable-refclk-lpm" to enable this feature.
not really. Just check if you have a clock named lpm. If you do, then you enable the feature.
But this clock name should be "ref". The new name "lpm" would make it seem like it's a different clock.
Thinh
Re: [PATCH 1/3] usb: dwc3: Add reference clock properties
Hi,
Quoted 53 lines · Thinh Nguyen
Quoted 53 lines
Quoted 52 lines · Thinh Nguyen
Quoted 52 lines
Quoted 40 lines · Thinh Nguyen
Quoted 40 lines
Quoted 29 lines
Quoted 20 lines
Quoted 20 lines
Documentation/devicetree/bindings/usb/dwc3.txt +12
-0@@ -95,6 +95,24 @@ Optional properties: this and tx-thr-num-pkt-prd to a valid, non-zero value 1-16 (DWC_usb31 programming guide section 1.2.3) to enable periodic ESS TX threshold. + - snps,refclk-period-ns: set to program the reference clock period. The valid + input periods are as follow: + +-------------+-----------------+ + | Period (ns) | Freq (MHz) | + +-------------+-----------------+ + | 25 | 39.7/40 | + | 41 | 24.4 | + | 50 | 20 | + | 52 | 19.2 | + | 58 | 17.2 | + | 62 | 16.1 | + +-------------+-----------------+Quoted 9 lines
Documentation/devicetree/bindings/usb/dwc3.txt Optional properties: · line 115
Quoted 6 lines
Documentation/devicetree/bindings/usb/dwc3.txt +6
-0+ - snps,enable-refclk-lpm: set to enable low power scheduling of isochronous + transfers by running SOF/ITP counters using the + reference clock. Only valid for DWC_usb31 peripheral + controller v1.80a and higher. Both + "snps,dis_u2_susphy_quirk" and + "snps,dis_enblslpm_quirk" must not be set.sounds like you should rely on clk API here. Then on driver call
clk_get_rate()to computer whatever you need to compute.Quoted 3 lines
There's nothing to compute here. We can simply enable this feature with "snps, enable-refclk-lpm" and the controller will use the default refclk settings.
Right, right. What I'm saying, though, is that we have a clock API for describing a clock. So why wouldn't we rely on that API for this? I think both of these new properties can be replaced with standard clock API properties:
clocks = <&clk1>, ..., <&lpm_clk> clock-names = "clock1", ...., "lpm";Quoted 8 lines
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Then dwc3 core could, simply, check if we have a clock named "lpm" and if there is, use
NSECS_PER_SEC/clk_get_rate()to get its period and write it to the register that needs the information.There's no new clock here. We are using the
ref_clkfor SOF and ITP counter for this feature. Also, clocks are optional on non-DT platforms. To use the clock API, then we need to update the driver to allow some optional clock such as "ref" clock for non-DT platforms. Do you want to do it like this?I can't think of a problem that would arise from that. Can you? Mark, Rob, what do you think?
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No problem. That can be done. This will remove the "snps,refclk-period-ns" property. But we should have "snps,enable-refclk-lpm" to enable this feature.
not really. Just check if you have a clock named lpm. If you do, then you enable the feature.
But this clock name should be "ref". The new name "lpm" would make it seem like it's a different clock.
now I understand. There's no special LPM clock, this is just the regular old reference clock being used for LPM. I agree with you, only refclk-period-ns will be replaced.
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balbi
Re: [PATCH 1/3] usb: dwc3: Add reference clock properties
Hi Felipe,
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Hi,
Quoted 56 lines · Thinh Nguyen
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Documentation/devicetree/bindings/usb/dwc3.txt +12
-0@@ -95,6 +95,24 @@ Optional properties: this and tx-thr-num-pkt-prd to a valid, non-zero value 1-16 (DWC_usb31 programming guide section 1.2.3) to enable periodic ESS TX threshold. + - snps,refclk-period-ns: set to program the reference clock period. The valid + input periods are as follow: + +-------------+-----------------+ + | Period (ns) | Freq (MHz) | + +-------------+-----------------+ + | 25 | 39.7/40 | + | 41 | 24.4 | + | 50 | 20 | + | 52 | 19.2 | + | 58 | 17.2 | + | 62 | 16.1 | + +-------------+-----------------+Quoted 9 lines
Documentation/devicetree/bindings/usb/dwc3.txt Optional properties: · line 115
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Documentation/devicetree/bindings/usb/dwc3.txt +6
-0+ - snps,enable-refclk-lpm: set to enable low power scheduling of isochronous + transfers by running SOF/ITP counters using the + reference clock. Only valid for DWC_usb31 peripheral + controller v1.80a and higher. Both + "snps,dis_u2_susphy_quirk" and + "snps,dis_enblslpm_quirk" must not be set.sounds like you should rely on clk API here. Then on driver call
clk_get_rate()to computer whatever you need to compute.Quoted 3 lines
There's nothing to compute here. We can simply enable this feature with "snps, enable-refclk-lpm" and the controller will use the default refclk settings.
Right, right. What I'm saying, though, is that we have a clock API for describing a clock. So why wouldn't we rely on that API for this? I think both of these new properties can be replaced with standard clock API properties:
clocks = <&clk1>, ..., <&lpm_clk> clock-names = "clock1", ...., "lpm";Then dwc3 core could, simply, check if we have a clock named "lpm" and if there is, use
NSECS_PER_SEC/clk_get_rate()to get its period and write it to the register that needs the information.Quoted 8 lines
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There's no new clock here. We are using the
ref_clkfor SOF and ITP counter for this feature. Also, clocks are optional on non-DT platforms. To use the clock API, then we need to update the driver to allow some optional clock such as "ref" clock for non-DT platforms. Do you want to do it like this?I can't think of a problem that would arise from that. Can you? Mark, Rob, what do you think?
No problem. That can be done. This will remove the "snps,refclk-period-ns" property. But we should have "snps,enable-refclk-lpm" to enable this feature.
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not really. Just check if you have a clock named lpm. If you do, then you enable the feature.
But this clock name should be "ref". The new name "lpm" would make it seem like it's a different clock.
now I understand. There's no special LPM clock, this is just the regular old reference clock being used for LPM. I agree with you, only refclk-period-ns will be replaced.
I had some misunderstanding with the purpose of GUCTL.REFCLKPER. After a discussion with the RTL engineers, it's not to control the reference clock. Setting this register field does not control the reference clock rate. The controller uses this value to perform internal timing calculations that are based on the reference clock. So, we will still need this property to set this value. I will resend the patch series with some changes and correct the commit messages with the proper definition of this feature.
Thanks,
Thinh