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add EDCCA support to mt76x{0,2}e drivers

PATCH Applied Lorenzo Bianconi 2 participants 5 messages Dec 12, 2018 – Dec 28, 2018

Subsystems (2)
Arm MediaTek MediaTek MT76 wireless LAN driver
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Lorenzo Bianconi

author
#0 lore raw

cover add EDCCA support to mt76x{0,2}e drivers

Introduce EDCCA support to mt76 driver in order to prevent transmission if detected energy is above the threshold.
This series is based on "mt76x0: pci: fix ACS support"
(https://patchwork.kernel.org/patch/10721037/)

Lorenzo Bianconi (3):
mt76: dfs: run mt76x02_dfs_set_domain atomically
mt76x2: init: set default value for MT_TX_LINK_CFG
mt76: add energy detect CCA support to mt76x{0,2}e drivers

 .../net/wireless/mediatek/mt76/mt76x0/pci.c   |  1 +
 .../net/wireless/mediatek/mt76/mt76x0/phy.c   |  2 +
 drivers/net/wireless/mediatek/mt76/mt76x02.h  |  6 ++
 .../net/wireless/mediatek/mt76/mt76x02_dfs.c  |  6 ++
 .../net/wireless/mediatek/mt76/mt76x02_mac.c  | 85 +++++++++++++++++++
 .../net/wireless/mediatek/mt76/mt76x02_mac.h  |  2 +
 .../net/wireless/mediatek/mt76/mt76x02_regs.h |  8 ++
 .../net/wireless/mediatek/mt76/mt76x2/init.c  |  1 +
 .../wireless/mediatek/mt76/mt76x2/pci_init.c  |  1 +
 .../wireless/mediatek/mt76/mt76x2/pci_phy.c   |  2 +
 10 files changed, 114 insertions(+)
Signature · 1 line
2.19.2
author
#1 lore raw

PATCH 1/3 mt76: dfs: run mt76x02_dfs_set_domain atomically

Grab mt76_dev mutex in mt76x02_dfs_set_domain since it runs concurrently with mt76x{0,2}_set_channel routines

Signed-off-by Lorenzo Bianconi <[email protected]>
---
 drivers/net/wireless/mediatek/mt76/mt76x02_dfs.c | 2 ++
 1 file changed, 2 insertions(+)
drivers/net/wireless/mediatek/mt76/mt76x02_dfs.c +2 -0
index 054609c634a2..5bd523b091b6 100644
@@ -881,12 +881,14 @@ mt76x02_dfs_set_domain(struct mt76x02_dev *dev,
 {
 	struct mt76x02_dfs_pattern_detector *dfs_pd = &dev->dfs_pd;
 
+	mutex_lock(&dev->mt76.mutex);
 	if (dfs_pd->region != region) {
 		tasklet_disable(&dfs_pd->dfs_tasklet);
 		dfs_pd->region = region;
 		mt76x02_dfs_init_params(dev);
 		tasklet_enable(&dfs_pd->dfs_tasklet);
 	}
+	mutex_unlock(&dev->mt76.mutex);
 }
 
 void mt76x02_regd_notifier(struct wiphy *wiphy,
Signature · 1 line
2.19.2
author
#2 lore raw

PATCH 2/3 mt76x2: init: set default value for MT_TX_LINK_CFG

In reply to Lorenzo Bianconi

Update default value for MT_TX_LINK_CFG according to vendor driver

Signed-off-by Lorenzo Bianconi <[email protected]>
---
 drivers/net/wireless/mediatek/mt76/mt76x2/init.c | 1 +
 1 file changed, 1 insertion(+)
drivers/net/wireless/mediatek/mt76/mt76x2/init.c +1 -0
index 54a9b5fac787..f8534362e2c8 100644
@@ -143,6 +143,7 @@ void mt76_write_mac_initvals(struct mt76x02_dev *dev)
 		{ MT_VHT_HT_FBK_CFG1,		0xedcba980 },
 		{ MT_PROT_AUTO_TX_CFG,		0x00830083 },
 		{ MT_HT_CTRL_CFG,		0x000001ff },
+		{ MT_TX_LINK_CFG,		0x00001020 },
 	};
 	struct mt76_reg_pair prot_vals[] = {
 		{ MT_CCK_PROT_CFG,		DEFAULT_PROT_CFG_CCK },
Signature · 1 line
2.19.2
author
#3 lore raw

PATCH 3/3 mt76: add energy detect CCA support to mt76x{0,2}e drivers

In reply to Lorenzo Bianconi

Ported from the reference driver. Should fix compliance with ETSI regulatories on preventing transmission while energy detect values are above the threshold.
The code has been tested using an ath9k device running tx99 as noise generator

Signed-off-by Lorenzo Bianconi <[email protected]>
---
 .../net/wireless/mediatek/mt76/mt76x0/pci.c   |  1 +
 .../net/wireless/mediatek/mt76/mt76x0/phy.c   |  2 +
 drivers/net/wireless/mediatek/mt76/mt76x02.h  |  6 ++
 .../net/wireless/mediatek/mt76/mt76x02_dfs.c  |  4 +
 .../net/wireless/mediatek/mt76/mt76x02_mac.c  | 85 +++++++++++++++++++
 .../net/wireless/mediatek/mt76/mt76x02_mac.h  |  2 +
 .../net/wireless/mediatek/mt76/mt76x02_regs.h |  8 ++
 .../wireless/mediatek/mt76/mt76x2/pci_init.c  |  1 +
 .../wireless/mediatek/mt76/mt76x2/pci_phy.c   |  2 +
 9 files changed, 111 insertions(+)
drivers/net/wireless/mediatek/mt76/mt76x0/pci.c +1 -0
index 1906cc62690f..720b05e325a5 100644
@@ -147,6 +147,7 @@ static int mt76x0e_register_device(struct mt76x02_dev *dev)
 		MT_CH_TIME_CFG_RX_AS_BUSY |
 		MT_CH_TIME_CFG_NAV_AS_BUSY |
 		MT_CH_TIME_CFG_EIFS_AS_BUSY |
+		MT_CH_CCA_RC_EN |
 		FIELD_PREP(MT_CH_TIME_CFG_CH_TIMER_CLR, 1));
 
 	err = mt76x0_register_device(dev);
drivers/net/wireless/mediatek/mt76/mt76x0/phy.c +2 -0
index 1eb1a802ed20..b2b38b9fcac7 100644
@@ -1013,6 +1013,8 @@ int mt76x0_phy_set_channel(struct mt76x02_dev *dev,
 	mt76x0_phy_calibrate(dev, false);
 	mt76x0_phy_set_txpower(dev);
 
+	mt76x02_edcca_init(dev);
+
 	ieee80211_queue_delayed_work(dev->mt76.hw, &dev->cal_work,
 				     MT_CALIBRATE_INTERVAL);
drivers/net/wireless/mediatek/mt76/mt76x02.h +6 -0
index b1d83dd34204..5f5831d18af5 100644
@@ -102,6 +102,12 @@ struct mt76x02_dev {
 	u8 slottime;
 
 	struct mt76x02_dfs_pattern_detector dfs_pd;
+
+	/* edcca monitor */
+	bool ed_tx_blocked;
+	bool ed_monitor;
+	u8 ed_trigger;
+	u8 ed_silent;
 };
 
 extern struct ieee80211_rate mt76x02_rates[12];
drivers/net/wireless/mediatek/mt76/mt76x02_dfs.c +4 -0
index 5bd523b091b6..19fdcab746a0 100644
@@ -884,6 +884,10 @@ mt76x02_dfs_set_domain(struct mt76x02_dev *dev,
 	mutex_lock(&dev->mt76.mutex);
 	if (dfs_pd->region != region) {
 		tasklet_disable(&dfs_pd->dfs_tasklet);
+
+		dev->ed_monitor = region == NL80211_DFS_ETSI;
+		mt76x02_edcca_init(dev);
+
 		dfs_pd->region = region;
 		mt76x02_dfs_init_params(dev);
 		tasklet_enable(&dfs_pd->dfs_tasklet);
drivers/net/wireless/mediatek/mt76/mt76x02_mac.c +85 -0

97 lines not on this page · raw message

drivers/net/wireless/mediatek/mt76/mt76x02_mac.h +2 -0
index 4e597004c445..0961db1e21b4 100644
@@ -210,4 +210,6 @@ int mt76x02_mac_set_beacon(struct mt76x02_dev *dev, u8 vif_idx,
 			   struct sk_buff *skb);
 void mt76x02_mac_set_beacon_enable(struct mt76x02_dev *dev, u8 vif_idx,
 				   bool val);
+
+void mt76x02_edcca_init(struct mt76x02_dev *dev);
 #endif
drivers/net/wireless/mediatek/mt76/mt76x02_regs.h +8 -0
index f7de77d09d28..607382644eb2 100644
@@ -318,6 +318,7 @@
 #define MT_CH_TIME_CFG_NAV_AS_BUSY	BIT(3)
 #define MT_CH_TIME_CFG_EIFS_AS_BUSY	BIT(4)
 #define MT_CH_TIME_CFG_MDRDY_CNT_EN	BIT(5)
+#define MT_CH_CCA_RC_EN			BIT(6)
 #define MT_CH_TIME_CFG_CH_TIMER_CLR	GENMASK(9, 8)
 #define MT_CH_TIME_CFG_MDRDY_CLR	GENMASK(11, 10)
 

@@ -378,6 +379,9 @@
 #define MT_TX_PWR_CFG_4			0x1324
 #define MT_TX_PIN_CFG			0x1328
 #define MT_TX_PIN_CFG_TXANT		GENMASK(3, 0)
+#define MT_TX_PIN_CFG_RXANT		GENMASK(11, 8)
+#define MT_TX_PIN_RFTR_EN		BIT(16)
+#define MT_TX_PIN_TRSW_EN		BIT(18)
 
 #define MT_TX_BAND_CFG			0x132c
 #define MT_TX_BAND_CFG_UPPER_40M	BIT(0)

@@ -398,6 +402,7 @@
 #define MT_TXOP_CTRL_CFG		0x1340
 #define MT_TXOP_TRUN_EN			GENMASK(5, 0)
 #define MT_TXOP_EXT_CCA_DLY		GENMASK(15, 8)
+#define MT_TXOP_ED_CCA_EN		BIT(20)
 
 #define MT_TX_RTS_CFG			0x1344
 #define MT_TX_RTS_CFG_RETRY_LIMIT	GENMASK(7, 0)

@@ -409,6 +414,7 @@
 
 #define MT_TX_RETRY_CFG			0x134c
 #define MT_TX_LINK_CFG			0x1350
+#define MT_TX_CFACK_EN			BIT(12)
 #define MT_VHT_HT_FBK_CFG0		0x1354
 #define MT_VHT_HT_FBK_CFG1		0x1358
 #define MT_LG_FBK_CFG0			0x135c

@@ -511,6 +517,7 @@
 #define MT_RX_FILTR_CFG_CTRL_RSV	BIT(16)
 
 #define MT_AUTO_RSP_CFG			0x1404
+#define MT_AUTO_RSP_EN			BIT(0)
 #define MT_AUTO_RSP_PREAMB_SHORT	BIT(4)
 #define MT_LEGACY_BASIC_RATE		0x1408
 #define MT_HT_BASIC_RATE		0x140c

@@ -532,6 +539,7 @@
 #define MT_PN_PAD_MODE			0x150c
 
 #define MT_TXOP_HLDR_ET			0x1608
+#define MT_TXOP_HLDR_TX40M_BLK_EN	BIT(1)
 
 #define MT_PROT_AUTO_TX_CFG		0x1648
 #define MT_PROT_AUTO_TX_CFG_PROT_PADJ	GENMASK(11, 8)
drivers/net/wireless/mediatek/mt76/mt76x2/pci_init.c +1 -0
index 41c60208f175..fc0a6fe5939b 100644
@@ -151,6 +151,7 @@ static int mt76x2_mac_reset(struct mt76x02_dev *dev, bool hard)
 		MT_CH_TIME_CFG_RX_AS_BUSY |
 		MT_CH_TIME_CFG_NAV_AS_BUSY |
 		MT_CH_TIME_CFG_EIFS_AS_BUSY |
+		MT_CH_CCA_RC_EN |
 		FIELD_PREP(MT_CH_TIME_CFG_CH_TIMER_CLR, 1));
 
 	mt76x02_set_tx_ackto(dev);
drivers/net/wireless/mediatek/mt76/mt76x2/pci_phy.c +2 -0
index da7cd40f56ff..65ed62229a5b 100644
@@ -254,6 +254,8 @@ int mt76x2_phy_set_channel(struct mt76x02_dev *dev,
 			       0x38);
 	}
 
+	mt76x02_edcca_init(dev);
+
 	ieee80211_queue_delayed_work(mt76_hw(dev), &dev->cal_work,
 				     MT_CALIBRATE_INTERVAL);
Signature · 1 line
2.19.2